A process for improving the continuity of a metal floating gate

Abstract

The application provides a process method for improving continuity of a metal floating gate, and provides a semiconductor structure, which comprises a substrate, a control gate on the substrate, a floating gate tunneling oxide layer grown on the sidewall of the control gate, an SPA nitrogen-doped film layer formed by performing SPA nitrogen-doping treatment on the floating gate tunneling oxide layer, and TiN deposited on the sidewall of the nitrogen-doped film layer. Before TIN deposition of the metal gate, SPA nitrogen-doping treatment is performed on the interface of the previous tunneling oxide layer, and then TIN deposition is performed, so as to prevent the occurrence of the discontinuous phenomenon of TIN.

Description

TECHNICAL FIELD

[0001] The present application relates to the field of semiconductor technology, in particular to a process method for improving continuity of metal floating gate. BACKGROUND

[0002] SF2.0 structure flash memory uses horizontal field write operation and tip TiN voltage-free coupling erase operation to greatly improve erase efficiency and reduce operating voltage. The new structure can increase the nesting window of erase gate EG to floating gate FG and better tip control, and is expected to have better durability. The cell area is only 60% of the same generation floating gate SF, and the cost is expected to be greatly reduced. However, a technical problem encountered in the prior art is that if better erase efficiency is to be achieved, the thickness of the floating gate FG TIN must be thin and continuous. However, in the prior art, the FG TIN becomes discontinuous after subsequent high-temperature treatment, which greatly affects the erase efficiency and has an adverse effect on the entire circuit. SUMMARY

[0003] In view of the above-mentioned shortcomings of the prior art, the purpose of the present application is to provide a process method for improving the continuity of the metal floating gate, which solves the problem that the floating gate titanium nitride becomes discontinuous after subsequent high-temperature treatment in the prior art, thereby greatly affecting the erase efficiency.

[0004] To achieve the above-mentioned purpose and other related purposes, the present application provides a process method for improving the continuity of the metal floating gate, at least comprising:

[0005] Step one, providing a semiconductor structure, the semiconductor structure comprising a substrate, a control gate on the substrate;

[0006] Step two, growing a floating gate tunnel oxide layer on the sidewall of the control gate;

[0007] Step three, performing SPA nitrogen doping treatment on the floating gate tunnel oxide layer to form a nitrogen-doped film layer;

[0008] Step four, depositing TiN on the sidewall of the nitrogen-doped film layer.

[0009] Preferably, the method for growing the floating gate tunnel oxide layer in step two adopts a furnace tube growth method, and the temperature is 600-900°C.

[0010] Preferably, the thickness of the floating gate tunnel oxide layer in step two is 40-200 angstroms.

[0011] Preferably, the process temperature of the SPA nitrogen doping treatment in step three is 300-650°C.

[0012] Preferably, the thickness of the nitrogen-doped film layer formed in step three is 5-55 angstroms, and the nitrogen doping concentration is 4-50%.

[0013] Preferably, the thickness of the TiN deposited in step four is 10-50 angstroms.

[0014] Preferably, the process temperature for depositing the TiN in step four is 300-500 degrees Celsius.

[0015] Preferably, the method further comprises step five, covering the outside of the control gate TiN and the top of the control gate with a dielectric layer, then forming an erase gate on the dielectric layer of the control gate, then forming source-drain regions in the substrate on both sides of the control gate and outside the word line.

[0016] As described above, the process method for improving the continuity of the metal floating gate of the present application has the following beneficial effects: the present application first performs SPA nitrogen doping treatment on the interface of the previous tunneling oxide layer before depositing the metal gate TiN, then deposits the TiN to prevent the occurrence of the discontinuity of the TiN. BRIEF DESCRIPTION OF DRAWINGS

[0017] Figure 1 shows the structure of the present application after forming the tunneling oxide layer on the semiconductor structure, performing SPA treatment, and then forming the TiN;

[0018] Figure 2 shows the electronic picture of the floating gate TiN formed in the present application;

[0019] Figure 3 shows the electronic picture of the wafer after SPA nitrogen doping treatment of the tunneling oxide layer in the present application;

[0020] Figure 4 shows the flow chart of the process method for improving the continuity of the metal floating gate in the present application. DETAILED DESCRIPTION

[0021] The embodiments of the present application will be described in detail hereinafter with specific reference to the attached drawings, which are provided by way of illustration only and are not intended to limit the scope of the application. Other advantages and effects of the present application will be easily understood by those skilled in the art from the contents disclosed in the specification. The present application can also be implemented or applied in other different embodiments, and the details in the specification can be modified or changed based on different viewpoints and applications without departing from the spirit of the present application.

[0022] Reference will now be made to the drawings, in which Figures 1 to 4 It should be noted that the drawings provided in the present embodiment only schematically illustrate the basic concept of the present application, and the drawings only show the components related to the present application, not the number, shape and size of the components when actually implemented. The actual implementation of each component can be randomly changed in terms of shape, number and proportion, and the layout pattern of the components can also be more complex.

[0023] The present application provides a process for improving the continuity of metal floating gate, such as Figure 4 shown, Figure 4 The process flow diagram for improving the continuity of metal floating gate in the present application is shown, which comprises at least the following steps:

[0024] Step one, providing a semiconductor structure, which comprises a substrate, a control gate on the substrate; such as Figure 1 shown, Figure 1 The structure diagram after forming a tunnel oxide layer and performing SPA treatment on the semiconductor structure and forming TIN in the present application is shown. The semiconductor structure in step one comprises a substrate 01 and a control gate CG (03) on the substrate 01.

[0025] Step two, growing a floating gate tunnel oxide layer on the sidewall of the control gate; such as Figure 1 shown, the floating gate tunnel oxide layer 06 is grown on the sidewall of the control gate CG in step two.

[0026] Further, the method for growing the floating gate tunnel oxide layer 06 in step two of the present embodiment adopts the method of furnace tube growth, and the temperature is 600-900 ℃.

[0027] Further, the thickness of the floating gate tunnel oxide layer 06 in step two of the present embodiment is 40-200 angstroms.

[0028] Step three, performing SPA nitrogen doping treatment on the floating gate tunnel oxide layer to form a nitrogen-doped film layer; such as Figure 1 shown, the nitrogen-doped film layer 05 is formed by performing SPA nitrogen doping treatment on the floating gate tunnel oxide layer 06 in step three.

[0029] Further, the process temperature of the SPA nitrogen doping treatment in step three of the present embodiment is 300-650 ℃.

[0030] Further, the thickness of the nitrogen-doped film layer 05 formed in step three of the present embodiment is 5-55 angstroms, and the nitrogen doping concentration is 4-50%.

[0031] Step four, depositing TiN on the sidewall of the nitrogen-doped film layer; such as Figure 1 shown, the TiN (04) is deposited on the sidewall of the nitrogen-doped film layer 05 in step four.

[0032] Further, the thickness of the TiN (04) deposited in step four of the present embodiment is 10-50 angstroms.

[0033] The process temperature for depositing TiN (04) in step four is 300-500 ℃.

[0034] The method of the embodiment further comprises a step five, covering a medium layer outside the control gate TiN and on top of the control gate, and then forming an erase gate on the medium layer of the control gate, and then forming a word line outside the medium layer, and then forming a source-drain region in the substrate outside the control gate and outside the word line. Figure 1 As shown in the step five, covering a medium layer 07 outside the control gate TiN (03) and on top of the control gate (CG), and then forming an erase gate (EG) 08 on the medium layer 07 of the control gate, and then forming a word line WL outside the medium layer 07, and then forming a source-drain region 02 in the substrate 01 outside the control gate CG and outside the word line WL.

[0035] As shown in the step five, covering a medium layer 07 outside the control gate TiN (03) and on top of the control gate (CG), and then forming an erase gate (EG) 08 on the medium layer 07 of the control gate, and then forming a word line WL outside the medium layer 07, and then forming a source-drain region 02 in the substrate 01 outside the control gate CG and outside the word line WL. Figure 2 Figure 2 An electronic picture showing the floating gate TiN formed in the present application; Figure 3 An electronic picture showing a wafer after the SPA nitrogen-doped treatment of the tunneling oxide layer in the present application. As can be seen, the continuity of the TiN is improved.

[0036] In summary, the structure of the present application, which performs SPA treatment on the interface of the tunneling oxide layer before TIN deposition, improves the continuity of the TIN after high-temperature treatment, and further improves the SPA nitrogen concentration to obtain experimental results, which shows that the morphology of the TIN is further improved. Therefore, the present application effectively overcomes the various shortcomings in the prior art and has high industrial utilization value.

[0037] The above embodiments only exemplarily illustrate the principles and effects of the present application, and are not used to limit the present application. Any person skilled in the art can modify or change the above embodiments without departing from the spirit and scope of the present application. Therefore, all equivalent modifications or changes made by those skilled in the art without departing from the spirit and technical thought disclosed by the present application should be covered by the claims of the present application.​

Claims

1. A process method for improving the continuity of metal floating gates, characterized in that, At least including: Step 1: Provide a semiconductor structure, the semiconductor structure including a substrate and a control gate located on the substrate; Step 2: Grow a floating gate tunneling oxide layer on the sidewall of the control gate; Step 3: Perform SPA nitrogen doping treatment on the floating gate tunneling oxide layer to form a nitrogen-doped film layer; Step 4: Deposit TiN on the sidewall of the nitrogen-doped film layer.

2. The process method for improving the continuity of metal floating gates according to claim 1, characterized in that: The method for growing the floating grid tunnel oxide layer in step two is to use a furnace tube growth method at a temperature of 600~900℃.

3. The process method for improving the continuity of metal floating grids according to claim 2, characterized in that: The thickness of the floating gate tunneling oxide layer in step two is 40~200 angstroms.

4. The process method for improving the continuity of metal floating gates according to claim 1, characterized in that: The process temperature for the nitrogen doping treatment of SPA in step three is 300~650℃.

5. The process method for improving the continuity of metal floating grids according to claim 4, characterized in that: In step three, the thickness of the nitrogen-doped film is 5-55 angstroms, and the nitrogen doping concentration is 4-50%.

6. The process method for improving the continuity of metal floating grids according to claim 1, characterized in that: In step four, the thickness of the deposited TiN is 10-50 angstroms.

7. The process method for improving the continuity of metal floating grids according to claim 6, characterized in that: The process temperature for depositing TiN in step four is 300~500℃.

8. The process method for improving the continuity of metal floating gates according to claim 1, characterized in that: The method further includes step five: covering the outer side of the control gate TiN and the top of the control gate with a dielectric layer, and then forming an erase gate on the dielectric layer of the control gate; then forming a word line on the outer side of the dielectric layer; and then forming source / drain regions in the substrate on both sides of the control gate and outside the word line.

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