A flip-chip LED chip and its preparation method

Abstract

A flip-chip LED and its fabrication method are disclosed. A P-electrode layer is disposed at the bottom layer, and a substrate layer is disposed on its surface. From bottom to top, the substrate layer is provided with a P-electrode layer, an MQW layer, an N-electrode layer, and a transparent conductive layer. A SiNx layer is attached to the bottom surface of the P-electrode layer, and the inner wall of the SiNx layer is attached to the outer walls of the MQW layer, the N-electrode layer, and the transparent conductive layer. The transparent conductive layer is annular, with a metal N-electrode layer disposed in its central part. A full-surface transparent conductive layer is grown using a vapor deposition method and attached to the surface of the N-electrode layer. The transparent conductive layer is composed of semiconductor materials. By controlling the film thickness, the transparent conductive layer is ensured to possess both light transmittance and dielectric continuity, preventing red light absorption while achieving full-surface current expansion. Simultaneously, with appropriate vapor deposition conditions, brightness is improved and voltage is reduced. Combined with material selection and a SiNx protective structure, high overall hardness and good chemical stability are achieved, effectively improving the LED chip brightness and reducing the operating voltage.

Description

Technical Field

[0001] The present invention belongs to the technical field of LED chip preparation technology, and in particular relates to a flip-chip LED chip and a preparation method thereof. Background Art

[0002] The LED chip is the core component of an LED lamp. Its main structure consists of a wafer cut from single-crystal silicon, mounted on a bracket, and then packaged. The wafer consists of a P-type semiconductor and an N-type semiconductor, forming a PN junction to achieve light emission. It is widely used in most electronic devices today. Currently, the main LED chip structures include face-up, flip-chip, and vertical. Face-up structures dominate the market due to their low price. However, because the P and N electrodes are located on the same side, face-up structures are prone to localized heat generation, leading to increased light decay as power increases. While vertical chips allow current to flow vertically through the LED epitaxial layers, avoiding localized heat generation, their manufacturing process is difficult and the industry has been slow to develop. The flip-chip structure, on the other hand, uses eutectic bonding of the chip's PN junction directly to the positive and negative electrodes on the substrate. This eutectic bonding structure improves heat dissipation and avoids localized heat generation. This makes flip-chip LEDs more robust against high-current surges and offers greater light output stability, making them suitable for high-power LED chips without the risk of light decay. Furthermore, it can be mass-produced on a large scale. Therefore, flip-chip LED chips are gradually replacing other similar products and becoming the future direction of LED technology, with promising market prospects.

[0003] Flip-chip technology was first used by packaging companies in the lighting field. Because the chip, electrically connected to the substrate, faces downward, it's called "flip-chip." The most common semiconductor material used to make flip-chip LED chips is aluminum gallium indium phosphide (AlGaInP), with gallium arsenide (GaAs) serving as the current spreading layer on the N-side. The most common structure is a vertical (NP) structure, where the P-side is a large electrode on the entire surface. The N-side is first etched into strips or rings using photolithography from GaAs. Then, an N-side electrode is deposited onto the etched GaAs pattern using photolithography, forming an ohmic contact on the N-side for current spreading.

[0004] The gallium arsenide (strip or ring) current spreading structure currently used in flip-chip LED chips absorbs red light and cannot effectively increase brightness. Since the epitaxial growth technology of red light LEDs mainly involves epitaxially growing AlGaInP material on a GaAs substrate, the lattice matching between AlGaInP and GaAs is good, so fewer dislocations are generated during the epitaxial growth process, and the quantum efficiency within the AlGaInP material exceeds 95%. However, GaAs has a small energy gap and absorbs light emitted by the AlGaInP material, resulting in low light extraction efficiency in the LED. If the area of ​​the gallium arsenide (strip or ring) current spreading structure is reduced, the current spreading will be poor, resulting in the problem of high core voltage. Therefore, a new technical solution is needed to solve this problem. Summary of the Invention

[0005] In view of the above problems in the prior art, the present invention provides a flip-chip LED chip and a preparation method thereof, so as to achieve the effect of more effectively improving the brightness of the LED chip and reducing the operating voltage.

[0006] The present invention is implemented by the following technical solution: A method for preparing a flip-chip LED chip, comprising the following steps:

[0007] S1: epitaxially growing an InGaP cutoff layer, an N epitaxial layer, an MQW layer, and a P epitaxial layer on a GaAs substrate in sequence, forming a separate P electrode layer by evaporation, cleaning the P epitaxial layer and the substrate layer of the P electrode layer, and bonding them together by evaporating a bonding metal layer to form an ohmic contact between the two, and removing the GaAs substrate and the InGaP cutoff layer by solution dissolution or exposure to expose the surface of the N epitaxial layer;

[0008] S2: After removing the InGaP cutoff layer from the N epitaxial layer, a protective film is attached to the middle of the surface of the N epitaxial layer. The area of ​​the N epitaxial layer not covered by the protective film is etched with a solution to form an uneven roughened surface. After the solution etching is completed, the protective film is removed to leave a flat surface in the middle.

[0009] S3: After roughening the surface of the N epitaxial layer, a transparent conductive layer is grown on the entire surface of the N epitaxial layer by evaporation, magnetron sputtering, or arc ion plating. The transparent conductive layer is composed of a conductive material or a semiconductor material. The thickness of the transparent conductive layer is controlled to ensure the light transmittance and dielectric continuity of the transparent conductive layer. The dielectric continuity of the transparent conductive layer is utilized to achieve current expansion across the entire surface.

[0010] S4: Positioning the middle flat surface of the N epitaxial layer according to the transparency of the transparent conductive layer, cutting and peeling off the middle position of the transparent conductive layer by photolithography or solution etching, so that the middle flat surface of the covered N epitaxial layer is exposed, and the transparent conductive layer is annular;

[0011] S5: A metal N-pole layer pattern is made on the flat surface in the middle of the N-epitaxial layer through photolithography, and then the metal N-pole layer is evaporated. The N-PAD needs to be extended outward and placed on the transparent conductive layer to achieve current expansion between the N-PAD and the transparent conductive layer, and ensure that the metal N-pole layer forms an ohmic contact with the N-epitaxial layer to form a flip-chip LED chip;

[0012] S6: a ring-shaped cutting path pattern is made on the surface of the N epitaxial layer by photolithography, and ICP etching is performed according to the cutting path pattern to remove the outer edges of the N epitaxial layer and the MQW layer, so that the MQW layer and the N epitaxial layer above the P epitaxial layer are in a convex platform shape;

[0013] S7: introducing reaction gas to grow a SiNx layer on the outer surface of the P epitaxial layer, the MQW layer, the N epitaxial layer and the transparent conductive layer, reducing the thickness of the SiNx layer by solution etching, and attaching a protective film to control the etching thickness, so that the thickness of the SiNx layer is uniform everywhere, ensuring that the SiNx layer wraps around the side walls of the transparent conductive layer, the N epitaxial layer and the MQW layer;

[0014] S8: Dividing the flip-chip LED chip into multiple individual cores by cutting.

[0015] Furthermore, the material of the transparent conductive layer is an oxide semiconductor material.

[0016] Furthermore, the evaporation rate of the evaporation method in step S3 is 0.1-2 A / s, the oxygen flow rate is controlled to be 5-20 sccm, and the temperature is 100-300°C.

[0017] Furthermore, the material of the transparent conductive layer is selected from one or more of ITO (In2O3:SnO2), IZO (ZnO:In), ATO (SnO2:Sb), AZO (ZnO:Al), GZO (ZnO:Ga) or FTO (SnO2:F).

[0018] Furthermore, the transparent conductive layer has a thickness of

[0019] The present invention also provides a flip-chip LED chip, comprising a P electrode layer, a P epitaxial layer, an MQW layer, an N epitaxial layer, a transparent conductive layer, a metal N electrode layer, a SiNx layer, and a substrate layer. The P electrode layer is provided at the bottom layer, and a substrate layer is provided on its surface. The P epitaxial layer, the MQW layer, the N epitaxial layer, and the transparent conductive layer are provided on the surface of the substrate layer from bottom to top. The bottom surface of the SiNx layer is attached to the P epitaxial layer, and the inner wall of the SiNx layer is attached to the outer wall of the MQW layer, the N epitaxial layer, and the transparent conductive layer. The transparent conductive layer is in the form of a ring, and the metal N electrode layer is provided in the middle of the ring. The metal N electrode layer is provided on the N epitaxial layer. The transparent conductive layer is made of a conductive material or a semiconductor material, and its film thickness is .

[0020] Furthermore, the outer diameters of the P electrode layer and the P epitaxial layer are equal.

[0021] Furthermore, the SiNx layer has a flange structure, the bottom surface of the SiNx flange is attached to the upper surface of the P epitaxial layer, and the flange boss of the SiNx is wrapped around the side walls of the MQW layer, the N epitaxial layer, and the transparent conductive layer, and covers the upper surface of the outer edge of the transparent conductive layer.

[0022] The beneficial effects of the present invention are that it can effectively solve the problem of poor current expansion and reduce the problem of red light absorption, thereby effectively improving the overall brightness. By epitaxially evaporating a transparent conductive layer on the N-type substrate and controlling its growth thickness to ensure the light transmittance and dielectric continuity of the transparent conductive layer, current expansion is achieved across the entire surface while preventing red light absorption. At the same time, suitable evaporation and annealing conditions are used to achieve the effects of improving brightness and reducing voltage. Thickness control is used to ensure that the transparent conductive layer has both conductivity and light transmittance. The material selection and SiNx protective structure are combined to achieve an overall high hardness and good chemical stability. The excellent conductivity and light transmittance of the transparent conductive layer are used to optimize the light reflectance and resistivity of the current expansion layer, thereby more effectively improving the brightness of the LED chip and reducing the operating voltage. BRIEF DESCRIPTION OF THE DRAWINGS

[0023] Figure 1 It is a structural diagram of an embodiment of the present invention.

[0024] In the figure: 1-P electrode layer, 2-P epitaxial layer, 3-MQW layer, 4-N epitaxial layer, 5-transparent conductive layer, 6-metal N-pole layer, 7-SiNx layer, 8-substrate layer. DETAILED DESCRIPTION

[0025] The present invention will be described in further detail below with reference to the accompanying drawings and embodiments.

[0026] It should be noted that when an element is referred to as being "located on" another element, it may be directly on the other element or there may also be an element centered thereon. When an element is considered to be "connected to" another element, it may be directly connected to the other element or there may also be an element centered thereon. The terms "vertical", "horizontal", "left", "right", "upper", "lower" and similar expressions used herein are for illustrative purposes only and do not indicate or imply that the device or element referred to must have a specific orientation, be constructed and operate in a specific orientation, and therefore should not be understood as limiting the present invention.

[0027] In the present invention, unless otherwise expressly specified or limited, the terms "installed," "connected," "connected," "fixed," and the like should be understood in a broad sense. For example, they may refer to fixed connections, detachable connections, or integral connections; they may refer to mechanical connections or electrical connections; they may refer to direct connections or indirect connections through an intermediate medium; and they may refer to internal communication between two components. Those skilled in the art will understand the specific meanings of the above terms in the present invention based on the specific circumstances. The term "and / or" as used herein includes any and all combinations of one or more of the relevant listed items.

[0028] Example 1

[0029] This embodiment provides a method for preparing a flip-chip LED chip, comprising the following steps:

[0030] S1: epitaxially grow an InGaP cutoff layer, an N epitaxial layer, an MQW layer, and a P epitaxial layer on a GaAs substrate in sequence. After forming a separate P electrode layer by evaporation, clean the P epitaxial layer and the substrate layer of the P electrode layer and bond them together by evaporating a bonding metal layer to form an ohmic contact. Remove the GaAs substrate and the InGaP cutoff layer by solution dissolution to expose the surface of the N epitaxial layer.

[0031] S2: After removing the InGaP cutoff layer from the N epitaxial layer, a protective film is attached to the middle of the N epitaxial layer surface. The area of ​​the N epitaxial layer not covered by the protective film is etched with a solution to form an uneven roughened surface. After the solution etching is completed, the protective film is removed to leave a flat surface in the middle. The roughened surface is beneficial for light scattering in subsequent core products, while the flat surface in the middle is conducive to forming good contact with the subsequent metal N-pole layer.

[0032] S3: After roughening the surface of the N epitaxial layer, a transparent conductive layer is grown on the surface of the N epitaxial layer by evaporation. The transparent conductive layer is composed of conductive material or semiconductor material. The evaporation method is easy to detect and control the thickness and composition of the film online. By controlling the film growth thickness to range, preferably To ensure that the transparent conductive layer has both light transmittance and dielectric continuity, the dielectric continuity of the transparent conductive layer is used to achieve current expansion across the entire surface;

[0033] S4: Positioning the middle flat surface of the N epitaxial layer according to the transparency of the transparent conductive layer, and peeling off the middle position of the transparent conductive layer by solution etching, so that the middle flat surface of the covered N epitaxial layer is exposed, and the transparent conductive layer is annular; thereby preventing the transparent conductive layer from having poor adhesion with the metal N-pole layer, and preventing rough black from being caused during subsequent ICP etching;

[0034] S5: A metal N-pole layer pattern is made on the flat surface in the middle of the N-epitaxial layer through photolithography, and then the metal N-pole layer is evaporated. The N-PAD needs to be extended outward and placed on the transparent conductive layer to achieve current expansion between the N-PAD and the transparent conductive layer, and ensure that the metal N-pole layer forms an ohmic contact with the N-epitaxial layer to form a flip-chip LED chip;

[0035] S6: a ring-shaped cutting path pattern is made on the surface of the N epitaxial layer by photolithography, and ICP etching is performed according to the cutting path pattern to remove the outer edges of the N epitaxial layer and the MQW layer, so that the MQW layer and the N epitaxial layer above the P epitaxial layer are in a convex platform shape;

[0036] S7: introducing reaction gas to grow a SiNx layer on the outer surface of the P epitaxial layer, MQW layer, N epitaxial layer and transparent conductive layer, reducing the thickness of the SiNx layer by solution etching, and attaching a protective film to control the etching thickness, so that the thickness of the SiNx layer is uniform everywhere, ensuring that the SiNx layer is wrapped around the side walls of the transparent conductive layer, N epitaxial layer and MQW layer, thereby preventing the side surfaces of the transparent conductive layer, N epitaxial layer and MQW layer from being damaged or contaminated by dirt, especially preventing the contamination of the chemical sputtering in the peripheral cutting process, and ensuring the integrity of the core components;

[0037] S8: Divide the flip-chip LED chip into multiple individual core particles by cutting. Figure 1 Individual core particles are shown.

[0038] Through the above process, a transparent conductive layer is evaporated on the N epitaxial layer. Since the transparent conductive layer is made of semiconductor material, its growth thickness can be controlled to be in a relatively thin range with appropriate evaporation and annealing conditions, thereby ensuring the light transmittance of the thin layer semiconductor medium and limiting the lower limit of the growth thickness to ensure the continuity of the thin layer of current transfer medium, so that it has both light transmittance and conductive properties, thereby preventing red light absorption while achieving current expansion across the entire surface, effectively improving the brightness of the LED chip and reducing the operating voltage.

[0039] In addition, the transparent nature of the transparent conductive layer itself can facilitate the rapid positioning etching of the flat surface in the middle of the N epitaxial layer, thereby promoting the production efficiency of the evaporated metal N-pole layer and the core particle manufacturing process.

[0040] In this embodiment, the transparent conductive layer is made of a semiconductor material, preferably an oxide semiconductor material. Since most metal materials have poor light transmittance, the use of an oxide semiconductor material allows for better light transmittance while maintaining a relatively small thickness and lattice structure. Furthermore, stable current expansion can be achieved by simply ensuring the continuity of the coating.

[0041] In this embodiment, the evaporation method in S3 uses a deposition rate of 0.1-2 A / s, preferably 1 A / s, an oxygen flow rate of 5-20 sccm, preferably 12.5 sccm, and a temperature of 100-300°C, preferably 200°C. By limiting the deposition rate, oxygen flow rate, and temperature to appropriate ranges, the deposition thickness can be precisely controlled, achieving an optimal thickness that combines light transmittance with dielectric continuity, ensuring the excellent performance of the transparent conductive layer.

[0042] In this embodiment, the material of the transparent conductive layer is selected from one or more of ITO (In2O3:SnO2), IZO (ZnO:In), ATO (SnO2:Sb), AZO (ZnO:Al), GZO (ZnO:Ga), or FTO (SnO2:F). The semiconductor dielectric can be light-transmitting at a relatively thin thickness or in a suitable lattice structure. Differences in light transmittance and conductivity exist between the materials. These differences are exploited to form a transparent conductive film by vapor-depositing two or more materials together. Because vapor deposition can control the deposition of thin films with varying composition ratios, the light transmittance and conductivity of the transparent conductive film can be precisely controlled by controlling the ratios of the multiple materials.

[0043] In this embodiment, the upper limit of the thickness of the transparent conductive layer is set to To ensure that the thickness is not too thick to affect light transmission, the lower limit of the thickness of the transparent conductive layer is set to This ensures that the smaller thickness of the coating process will not affect the continuity of the transparent conductive layer.

[0044] like Figure 1 As shown, this embodiment also provides a flip-chip LED chip, including a P electrode layer 1, a P epitaxial layer 2, an MQW layer 3, an N epitaxial layer 4, a transparent conductive layer 5, a metal N electrode layer, a SiNx layer 7, and a substrate layer 8. Among them, the P electrode layer 1 is provided at the bottom layer, and a substrate layer 8 is provided on its surface. The surface of the substrate layer 8 is provided with the P epitaxial layer 2, the MQW layer 3, the N epitaxial layer 4, and the transparent conductive layer 5 in order from bottom to top. The bottom surface of the SiNx layer 7 is attached to the P epitaxial layer 2, and the inner wall of the SiNx is attached to the outer wall of the MQW layer 3, the N epitaxial layer 4 and the transparent conductive layer 5. The transparent conductive layer 5 is in the form of a ring, and a metal N electrode layer 6 is provided in the middle of the ring. The metal N electrode layer 6 is provided on the N epitaxial layer 4. The transparent conductive layer 5 is made of a conductive material or a semiconductor material, and its film thickness is Among them, the P motor and the metal N electrode layer are used to connect the two poles of the power supply respectively, the MQW layer 3 is used to adjust the luminous efficiency and wavelength, and the thickness of the surface transparent conductive layer 5 is limited to It can ensure that it has both thin-layer light transmittance and dielectric continuity. Its thin transparent film can allow red light to fully transmit, and the continuous dielectric film of semiconductor material can ensure sufficient expansion of current. LED chips made with this device can effectively improve the brightness of the LED chip and reduce the operating voltage.

[0045] The P-electrode layer 1 and the P-epitaxial layer constitute a P-type semiconductor layer, the N-epitaxial layer 4 and the metal N-electrode layer 6 constitute an N-type semiconductor layer, and the MQW layer 3 between the P-type semiconductor layer and the N-type semiconductor layer serves as a light-emitting layer. When current is applied through the semiconductor light-emitting layer, the light-emitting layer is excited to emit light. When the light-emitting layer is based on a nitride material, it will emit blue or green light; when the light-emitting layer is based on an aluminum indium gallium phosphide material, it will emit red, orange, yellow and amber light.

[0046] In this embodiment, the outer diameters of the P electrode layer 1 and the P epitaxial layer 2 are equal, thereby ensuring that both are covered by the upper SiNx layer 7 and are not contaminated.

[0047] In this embodiment, SiNx layer 7 has a flange structure. The bottom surface of the SiNx flange adheres to the top surface of the P epitaxial layer 2. The SiNx flange protrusion wraps around the sidewalls of the MQW layer 3, N epitaxial layer 4, and transparent conductive layer 5, and covers the upper surface of the outer edge of the transparent conductive layer 5. Because sputtering contamination from the core cutting solution is distributed all around, the SiNx layer 7 on the entire side surface and the upper surface of the outer edge of the transparent conductive layer 5, as well as the hardness and chemical stability of the SiNx layer 7 itself, achieves high overall impact resistance, prevents sputtering contamination from the cutting solution, and facilitates subsequent cleaning.

[0048] Example 2

[0049] The difference between this embodiment and the first embodiment lies in that the evaporation parameters and materials in step S3 are changed to form a transparent conductive layer with different physical properties, thereby adapting to different working conditions.

[0050] S3: After roughening the surface of the N epitaxial layer, a transparent conductive layer is grown on the entire surface by evaporation and attached to the surface of the N epitaxial layer. The evaporation rate of the evaporation method is 0.1A / s, and the oxygen flow rate is controlled to 5sccm. The temperature is 100℃, and the deposition thickness is precisely controlled at a relatively slow evaporation rate to obtain a thin transparent conductive layer, and its generated thickness is ensured to be At the same time, the material of the transparent conductive layer is selected as ITO; based on the high conductivity and high transmittance of the ITO material itself, the thickness of the coating is further reduced to make it The thinner state ensures that the transparent conductive layer has excellent light transmittance and current expansion, and reduces the overall quality;

[0051] Through the above process, on the basis of the high conductivity and transmittance of ITO material itself, the coating thickness is further reduced to make it The thinner state ensures that the transparent conductive layer has excellent light transmittance and current expansion, and can reduce the overall weight. The corresponding core particles made in this way are suitable for working fields such as aerospace and precision instruments.

[0052] Example 3

[0053] The difference between this embodiment and the first embodiment lies in that the evaporation parameters and materials in step S3 are changed to achieve different physical properties of the transparent conductive layer, thereby adapting to different working conditions.

[0054] S3: After roughening the surface of the N epitaxial layer, a transparent conductive layer is grown on the entire surface by evaporation and attached to the surface of the N epitaxial layer. The evaporation rate of the evaporation method is 2A / s, and the oxygen flow rate is controlled to 20sccm. The temperature is 300℃, and a large thickness film is efficiently deposited at a faster evaporation rate, and its thickness is ensured to be At the same time, the material of the transparent conductive layer is FTO. On the basis of the FTO material's own hard film layer, good chemical and mechanical resistance, the coating thickness is further increased to make it The thicker state makes the transparent conductive layer have excellent impact resistance and corrosion resistance;

[0055] Through the above process, on the basis of the FTO material's own hard film layer, good chemical and mechanical resistance, the coating thickness is further increased to make it The thicker state makes the transparent conductive layer have excellent impact resistance and corrosion resistance. The corresponding core particles made from this are suitable for use in harsh working conditions such as metallurgy, detection, rescue, and transportation.

[0056] Example 4

[0057] The difference between this embodiment and the first embodiment lies in that the evaporation parameters and materials in step S3 are changed to achieve different physical properties of the transparent conductive layer, thereby adapting to different working conditions.

[0058] S3: After roughening the surface of the N epitaxial layer, a transparent conductive layer is grown on the entire surface by evaporation and attached to the surface of the N epitaxial layer. The evaporation rate of the evaporation method is 1A / s, the oxygen flow rate is controlled to 12.5sccm; the temperature is 200℃, and the material of the transparent conductive layer is AZO. Based on the good performance indicators of AZO material, low cost, easy availability of raw materials and non-toxicity, the coating thickness is ensured to be easily controlled. Within the scope, batch manufacturing of transparent conductive layers is easy to achieve;

[0059] Through the above process, based on the good performance index of AZO material, low cost, easy to obtain and non-toxic raw materials, the coating thickness is ensured to be in an easily controllable range. Within this range, batch manufacturing of the transparent conductive layer is easily realized, thereby completing the mass production of multiple core particles and effectively controlling the production cost at a low level, which is suitable for popular products with large demand.

[0060] Example 5

[0061] The difference between this embodiment and the first embodiment lies in that the process type in step S3 is changed to achieve different physical properties of the transparent conductive layer, thereby adapting to different working conditions.

[0062] This embodiment provides a method for preparing a core particle for a flip-chip LED, comprising the following steps:

[0063] S3: After the patterning is roughened, a transparent conductive layer is grown by magnetron sputtering and attached to the surface of the N epitaxial layer. The transparent conductive layer is made of semiconductor material and the growth thickness is controlled to be The thinner state, since magnetron sputtering can form a higher density film, it can ensure The thinner transparent conductive layer has the necessary dielectric continuity, and at the same time, utilizes its thinner state to achieve better light transmittance to fully release red light, and utilizes the dielectric continuity of the transparent conductive layer to achieve current expansion across the entire surface;

[0064] Through the above process, a transparent conductive layer with excellent light transmittance is obtained, and corresponding core particles are made to adapt to strong light working environments.

[0065] Example 6

[0066] The difference between this embodiment and the first embodiment lies in that the process type in step S3 is changed to achieve different physical properties of the transparent conductive layer, thereby adapting to different working conditions.

[0067] This embodiment provides a method for preparing a core particle for a flip-chip LED, comprising the following steps:

[0068] S3: After the pattern roughening is done, a transparent conductive layer is grown on the entire surface by arc ion plating and attached to the surface of the N epitaxial layer. The transparent conductive layer is made of semiconductor material and the growth thickness is controlled to be The thicker state can be completed quickly due to the high deposition rate of arc ion plating. The thick film formation process uses the higher density The thick film achieves good current expansion and has a certain light transmittance to release red light;

[0069] Through the above process, a transparent conductive layer with excellent current spreading performance is obtained, and corresponding core particles are made to adapt to high-power working environments.

[0070] Throughout this specification, reference to terms such as "one embodiment," "some embodiments," "examples," "specific examples," or "some examples" means that a specific feature, structure, material, or characteristic described in conjunction with that embodiment or example is included in at least one embodiment or example of the present invention. In this specification, schematic representations of the above terms do not necessarily refer to the same embodiment or example. Furthermore, the specific features, structures, materials, or characteristics described may be combined in any suitable manner in any one or more embodiments or examples.

[0071] The above-described embodiments merely illustrate several implementations of the present invention, and while their descriptions are relatively specific and detailed, they should not be construed as limiting the scope of the present invention. It should be noted that a person skilled in the art would be able to make numerous variations and improvements without departing from the spirit of the present invention, all of which fall within the scope of protection of the present invention. Therefore, the scope of protection of the present invention shall be determined by the appended claims.

Claims

1. A method for preparing a flip-chip LED chip, characterized in that: The following steps are involved: S1: epitaxially growing an InGaP cutoff layer, an N epitaxial layer, an MQW layer, and a P epitaxial layer on a GaAs substrate in sequence, making a separate P electrode layer by evaporation, cleaning the P epitaxial layer and the substrate layer of the P electrode layer, and bonding them together by evaporating a bonding metal layer to form an ohmic contact between the two, and removing the GaAs substrate and the InGaP cutoff layer by solution dissolution or exposure to expose the surface of the N epitaxial layer; S2: After removing the InGaP cut-off layer from the N epitaxial layer, a protective film is attached to the middle of the surface of the N epitaxial layer. The area of ​​the surface of the N epitaxial layer not covered by the protective film is etched by solution to form an uneven roughened surface. After the solution etching is completed, the protective film is removed to reserve a flat surface in the middle; S3: After roughening the surface of the N epitaxial layer, a transparent conductive layer is grown on the surface of the N epitaxial layer by using a method such as evaporation, magnetron sputtering or arc ion plating. The transparent conductive layer is composed of a conductive material or a semiconductor material. The light transmittance and dielectric continuity of the transparent conductive layer are ensured by controlling the growth thickness. The dielectric continuity of the transparent conductive layer is used to achieve current expansion on the entire surface. The thickness of the transparent conductive layer is S4: positioning the middle flat surface of the surface of the N epitaxial layer according to the transparent property of the transparent conductive layer, cutting and peeling off the middle position of the transparent conductive layer by photolithography or solution etching, so that the middle flat surface of the covered N epitaxial layer is exposed, and the transparent conductive layer is annular; S5: Make a metal N-pole layer pattern on the flat surface in the middle of the N epitaxial layer by photolithography, and then evaporate the metal N-pole layer. The N-PAD needs to be extended outward and placed on the transparent conductive layer to achieve current expansion between the N-PAD and the transparent conductive layer, and ensure that the metal N-pole layer forms an ohmic contact with the N epitaxial layer to form a flip-chip LED chip; S6: making a ring-shaped cutting path pattern on the surface of the N epitaxial layer by photolithography, and performing ICP etching according to the cutting path pattern to remove the outer edges of the N epitaxial layer and the MQW layer, so that the MQW layer and the N epitaxial layer above the P epitaxial layer are in a convex platform shape; S7: introducing reaction gas to grow a SiNx layer on the outer surface of the P epitaxial layer, the MQW layer, the N epitaxial layer and the transparent conductive layer, reducing the thickness of the SiNx layer by solution etching, and attaching a protective film to control the etching thickness, so that the thickness of the SiNx layer is uniform everywhere, ensuring that the SiNx layer is wrapped around the side walls of the transparent conductive layer, the N epitaxial layer and the MQW layer, so as to ensure the integrity of the core components of the flip-chip LED chip and make the current transfer medium of the transparent conductive layer continuous; S8: Dividing the flip-chip LED chip into a plurality of individual core particles by cutting.

2. The method for preparing a flip-chip LED chip according to claim 1, wherein: The evaporation rate of the evaporation method in step S3 is 0.1-2 A / s.

3. The method for preparing a flip-chip LED chip according to claim 1, wherein: The oxygen flow rate of the evaporation method in step S3 is controlled to be 5-20 sccm.

4. The method for preparing a flip-chip LED chip according to claim 1, wherein: The evaporation temperature of the evaporation method in step S3 is 100-300°C.

5. The method for preparing a flip-chip LED chip according to claim 1, wherein: The material of the transparent conductive layer is selected from one or more of ITO, IZO, ATO, AZO, GZO or FTO.

6. A flip-chip LED chip, comprising a P electrode layer, a P epitaxial layer, an MQW layer, an N epitaxial layer, a transparent conductive layer, a metal N electrode layer, a SiNx layer, and a substrate layer, characterized in that: The P electrode layer is arranged at the bottom layer, and a substrate layer is arranged on its surface. The surface of the substrate layer is provided with the P epitaxial layer, the MQW layer, the N epitaxial layer, and the transparent conductive layer in sequence from bottom to top. The bottom surface of the SiNx layer is attached to the P epitaxial layer, and the inner wall of the SiNx is attached to the outer walls of the MQW layer, the N epitaxial layer and the transparent conductive layer. The transparent conductive layer is in the form of a circular ring, and the metal N pole layer is arranged in the middle of the ring. The metal N pole layer is arranged on the N epitaxial layer, and the transparent conductive layer is made of a conductive material or a semiconductor material.

7. The flip-chip LED chip according to claim 6, characterized in that: The outer diameters of the P electrode layer and the P epitaxial layer are equal.

8. The flip-chip LED chip according to claim 6, characterized in that: The SiNx layer has a flange structure, the bottom surface of the SiNx flange is attached to the upper surface of the P epitaxial layer, the flange boss of the SiNx is wrapped around the side walls of the MQW layer, the N epitaxial layer, and the transparent conductive layer, and covers the upper surface of the outer edge of the transparent conductive layer.

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