A multi-channel data storage method and system based on FPGA
By adopting time-sharing storage in the FPGA system, multi-channel data is stored independently as their respective files, solving the problem of low data reading efficiency in traditional methods, and efficient multi-channel data storage and reading are achieved, satisfying high-speed Storage requirements.
Patent Information
- Application Number
- CN202210466636.X
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2022-04-29
- Publication Date
- 2024-12-31
- Estimated Expiration
- 2042-04-29
AI Technical Summary
Traditional multi-channel data storage methods have readability limitations when reading data, and need to read the entire file to separate the required data, resulting in high time consumption, especially inefficient when the data volume is large.
Using a multi-channel data storage method based on FPGA, the data of each channel is stored independently as the corresponding file through time-sharing storage. The data can be obtained by directly reading the files of the required channel, which improves the efficiency of data reading. And meet high-speed storage needs through rotational storage.
It improves the efficiency and operability of data reading, reduces the reading and separation of invalid data, meets the high-speed storage requirements of large amounts of data, and reduces the load of the data acquisition system.
Smart Images
Figure CN115033171B_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to the field of storage technology, and in particular to a multi-channel data storage method and system based on FPGA. Background Art
[0002] With the increasing popularity of electronic products, data acquisition technology and data storage technology have developed rapidly. Especially in the fields of satellite navigation, electronics, radar and other technologies, data acquisition and storage systems are playing an increasingly important role. In addition, the technical requirements for data acquisition and storage systems are also increasing: high data transmission rate, massive storage capacity, low power consumption and cost. Traditional data acquisition and storage systems are difficult to meet such requirements. With the advancement of technology, more and more types of data need to be stored, and the requirements for a single storage device are getting higher and higher, and it is necessary to store data from multiple channels at the same time.
[0003] The FPGA (Field Programmable Gate Array) technology developed in recent years provides good technical support for the new generation of high-speed data acquisition and storage systems. FPGA has a lot of hardware resources. The available logic gate circuits integrated on a chip are up to tens of millions. It can obtain very high frequency through the internal phase-locked loop, with low internal time consumption and very high efficiency. It has a flexible structure and can integrate multiple controllers, decoding and encoding, and various peripheral interface circuits. Therefore, FPGA can be used to design data acquisition and data storage parts. In terms of signal processing, FPGA is convenient for users to call because of its rich core resources. Therefore, the use of FPGA in high-speed data acquisition and storage systems can simplify the design and improve the flexibility and processing speed of the system. At the same time, with the launch of ZYNQ, MPSoC and other series of FPGA products with integrated ARM hard cores by Xilinx, FPGA can achieve higher data throughput processing and storage performance.
[0004] At present, the practice of using FPGA for multi-channel data storage is to frame and package the data of multiple channels in the FPGA, and then store these data packets as the data of one channel, so that there is only one file in the file system. When the data needs to be read, the data corresponding to the file is read from the storage medium, and then the data is parsed according to the framing format before storage, and finally the data of each channel is separated to complete the data reading. This method has great limitations in data readability. When the user only needs to read the data of a certain channel, the entire data corresponding to the file must be read out, and the required data can only be obtained after separation. If the amount of data corresponding to the file is large, a lot of time will be spent on reading and separating useless data. Summary of the invention
[0005] The technical problem to be solved by the present invention is as follows: In view of the above-mentioned problems in the prior art, a multi-channel data storage method and system based on FPGA are provided to improve the operability and convenience when reading data.
[0006] In order to solve the above technical problems, the technical solution adopted by the present invention is:
[0007] A multi-channel data storage method based on FPGA is applied to a data acquisition and playback system. The data acquisition and playback system includes an FPGA unit, a data transceiver unit, a cache unit and a storage unit. The FPGA unit includes a PL end and a PS end. The PL end is connected to the PS end, the data transceiver unit, the cache unit and the storage unit respectively. The method includes:
[0008] S1) The PL end obtains data in the data transceiver unit through at least two target channels, packages the data, and sends the data to the corresponding cache channel in the cache unit for caching, and the PS end generates a file of the target channel in the file system;
[0009] S2) The PS end polls each cache channel, and if there is a cache channel whose data volume reaches the first threshold, updates the information of the corresponding file, and the PL end saves the data packet in the cache channel in the storage unit according to the information of the corresponding file;
[0010] S3) If the PS side receives a stop command, the PL side stops acquiring the data and returns to step S2) until there is no data in each cache channel, and the PS side updates the file system and writes the file system into the storage unit through the PL side; if the PS side does not receive a stop command, it returns to step S2) until the PS side receives a stop command.
[0011] Optionally, step S3) also includes a step of reading files, specifically including: the PS end obtains a read request for the target file, matches the file system to obtain corresponding index information, and the PL end sends the corresponding data packet in the storage unit to the cache unit according to the index information. If the amount of data in the cache unit reaches a second threshold, the PL end reads and unpacks the data packet in the cache unit, and sends the unpacked data to the data transceiver unit through the channel corresponding to the target file.
[0012] Optionally, step S3) also includes a step of deleting files, specifically including: the PS side obtains a deletion request for the target file, matches the file system to obtain corresponding index information, the PL side deletes the corresponding data packet in the storage unit according to the index information, and the PS side deletes the corresponding file in the file system.
[0013] Furthermore, a write channel corresponding to the target channel is provided between the PL terminal and the storage unit, and step S2) specifically includes:
[0014] S21) The PS end detects the data volume of the current cache channel. If the data volume of the current cache channel does not reach the first threshold, step S22) is executed; if the data volume of the current cache channel reaches the first threshold, step S23) is executed;
[0015] S22) taking the next cache channel as the current cache channel and returning to step S21). If all cache channels have been traversed, jumping to step 3);
[0016] S23) The PS end updates the storage space start address in the information of the file of the target channel corresponding to the current cache channel according to the information of the remaining storage space of the storage unit, updates the storage space size in the information of the file of the target channel corresponding to the current cache channel according to the data amount of the current cache channel, and sends the information of the file of the target channel corresponding to the current cache channel and the corresponding data write channel enable command to the PL end;
[0017] S24) the PL terminal sends the data packet in the current cache channel to the storage unit through the data write channel corresponding to the target channel according to the information of the file of the target channel corresponding to the current cache channel, and stores it in the corresponding area of the remaining storage space of the storage unit;
[0018] S25) takes the next cache channel as the current cache channel and returns to step S21). If all cache channels have been traversed, jump to step 3).
[0019] Furthermore, before step S21), the method further includes: the cache channel obtains and caches data packets from the PL end, and if the amount of cached data reaches a first threshold, the PL end generates a flag bit and sends it to the PS end;
[0020] Step S21) specifically includes: if the PS end does not obtain the flag bit of the current cache channel, the data volume of the current cache channel does not reach the first threshold; if the PS end obtains the flag bit of the current cache channel, the data volume of the current cache channel reaches the first threshold.
[0021] Furthermore, after step S24), the process also includes: the PL end generates a completion flag and sends it to the PS end. If the PS end receives the completion flag, step S25) is executed.
[0022] Furthermore, step S21) also includes: if the current cache channel data volume does not reach the first threshold, and the PS end receives a stop instruction, executing step S23).
[0023] The present invention also proposes a data acquisition and playback system, comprising an FPGA unit, a data transceiver unit, a cache unit and a storage unit, wherein the FPGA unit comprises a PL end and a PS end, and the PL end is connected to the PS end, the data transceiver unit, the cache unit and the storage unit, respectively, wherein:
[0024] The PL end is used to obtain data in the data transceiver unit through at least two target channels, and after data packetization, send the data to the corresponding cache channel in the cache unit for cache, and after waiting to obtain file information, save the data packet in the cache channel in the storage unit according to the file information;
[0025] The PS end is used to generate files for each target channel in the file system, and then poll each cache channel. If there is a cache channel whose data volume reaches a first threshold, the information of the corresponding file is updated and sent to the PL end. After receiving a stop instruction, it is also used to command the PL end to stop acquiring the data. After there is no data in each cache channel, the file system is updated and written into the storage unit through the PL end.
[0026] Optionally, the PS end is also used to obtain a read request for the target file, match the file system to obtain corresponding index information and send it to the PL end; the PL end is also used to send the corresponding data packet in the storage unit to the cache unit according to the index information. If the amount of data in the cache unit reaches a second threshold, the data packet in the cache unit is read and unpacked, and the unpacked data is sent to the data transceiver unit through the channel corresponding to the target file.
[0027] Optionally, the PS end is also used to obtain a deletion request for the target file, match the file system to obtain the corresponding index information and send it to the PL end, and then delete the corresponding file in the file system; the PL end is also used to delete the corresponding data packet in the storage unit according to the index information.
[0028] Compared with the prior art, the present invention has the following advantages:
[0029] According to the actual situation that the storage rate of the storage medium is greater than the rate of collecting data, the present invention adopts a time-sharing storage method in the multi-channel data storage process, and stores the data of each channel as a file corresponding to the channel. Since the storage result is a file corresponding to each channel, when it is necessary to read the data of a certain channel, the data of the corresponding file is directly read, that is, the data of the channel is obtained, and there is no need to separate the data after obtaining the data corresponding to the file, thereby improving the efficiency of data reading. At the same time, the time-sharing storage method is adopted to store the data of each channel in turn, which can also meet the requirements of high-speed storage of a large amount of data. BRIEF DESCRIPTION OF THE DRAWINGS
[0030] Figure 1 The figure is a schematic diagram of the hardware structure of the data acquisition and playback system according to an embodiment of the present invention.
[0031] Figure 2 The figure is a schematic diagram of the execution steps of the data acquisition and playback system for storing multi-channel data according to an embodiment of the present invention.
[0032] Figure 3 It is a detailed flow chart of the execution steps of the PS side in the multi-channel data storage process according to an embodiment of the present invention. DETAILED DESCRIPTION
[0033] The present invention is further described below in conjunction with the accompanying drawings and specific preferred embodiments, but the protection scope of the present invention is not limited thereby.
[0034] Related terms explanation
[0035] FPGA: Field Programmable Gate Array, field programmable gate array.
[0036] UltraScale: The name of a series of FPGAs launched by Xilinx.
[0037] PL: Progarmmable Logic, programmable logic in ZYNQ UltraScale series chips.
[0038] PS: Processing System, ARM processor integrated in ZYNQ UltraScale series chips.
[0039] like Figure 1 As shown, this embodiment proposes a data acquisition and playback system, which consists of a set of boards and a chassis, including a data processing board, 4 storage boards, a VPX backplane and a power board, wherein the data processing board includes: UltraScale series FPGA as an FPGA unit, a 24-core optical module as a data transceiver unit, and DDR4 particles as a cache unit, and also includes Gigabit network ports, USB interfaces and other peripherals. The main functions are data transmission and reception, data processing and underlying drivers, including SSD interface drivers based on SATA protocol and related logic of RAID0, and file system management with PS embedded programs. In this embodiment, the storage board is used as a storage unit, and a single storage board contains 8 SSD disks, which are connected to the data processing board through the VPX backplane. The power board is responsible for providing power to all boards in the entire chassis.
[0040] In this embodiment, the FPGA unit includes a PL end and a PS end, wherein the PL end is a traditional FGPA, which can be used for programmable logic design; the PS end is a high-performance ARM, which can be used for embedded development. In this embodiment, the PL end includes a 4-channel optical fiber data transceiver module, a DDR4 data cache module, a data packetization module, a SATA drive and a combined RAIDO module, a data interface switching module and a PL-PS communication module. The PS end communicates with the host computer control software through a gigabit network port, wherein:
[0041] The 4-channel optical fiber data transceiver module interacts with the 24-core optical module to complete the external optical fiber data reception and send the internal playback data. The data packetization module realizes the packetization processing of the data received by each channel of the data transceiver module and the unpacking processing of the playback data;
[0042] The DDR4 data cache module integrates and manages DDR4 particles, encapsulating them into a large-capacity, high-throughput FIFO. At the same time, through address management, according to the number of channels at the front end, it virtualizes the corresponding number of channels for caching data;
[0043] The SATA driver module implements the SATA protocol and forms a RAID0 disk array. It provides a data interface and a command interface to the user layer and can read and write data according to the instructions of the PS end.
[0044] The data interface exchange module mainly connects various types of data in the program according to the working mode;
[0045] The PL-PS communication module realizes data interaction between the PL end and the PS end.
[0046] Therefore, the PL end and the PS end, the data transceiver unit, the cache unit and the storage unit in this embodiment are connected separately.
[0047] The data acquisition and playback system of this embodiment is improved in the file system and storage operation, and the file system is fragmented and managed and the storage operation is performed in time-sharing, so as to realize the function of multi-channel data storage and each channel corresponding to one file. Specifically, in this embodiment, when data is recorded, the PL end of the FPGA unit is configured to execute:
[0048] The PL end obtains the data in the data transceiver unit through at least two target channels of the data transceiver module, packages the data, and sends the data to the corresponding cache channel in the cache unit for caching. After waiting to obtain the file information from the PS end, the data packet in the cache channel is stored in the storage unit according to the file information.
[0049] Correspondingly, the PS side of the FPGA is configured to execute:
[0050] The PS end generates files for each target channel in the file system, and then polls each cache channel. If there is a cache channel whose data volume reaches the first threshold, the information of the corresponding file is updated and sent to the PL end. After receiving the stop command from the host computer, the PL end is ordered to stop acquiring the data. After there is no data in each cache channel, the file system is updated and written to the storage unit through the PL end.
[0051] Through the above configuration, the data of each channel in the FPGA is managed independently, which is convenient for subsequent data processing.
[0052] When exporting data, the PL and PS sides of the FPGA are configured to perform:
[0053] The PS side obtains a read request for the target file, matches the file system to obtain the corresponding index information and sends it to the PL side; the PL side sends the corresponding data packet in the storage unit to the cache unit based on the index information. If the amount of data in the cache unit reaches a second threshold, the data packet in the cache unit is read and unpacked, and the unpacked data is sent to the data transceiver unit through the channel corresponding to the target file.
[0054] When data is deleted, the PL and PS sides of the FPGA are configured to perform:
[0055] The PS side obtains a deletion request for the target file, matches the file system to obtain the corresponding index information and sends it to the PL side, and then deletes the corresponding file in the file system; the PL side deletes the corresponding data packet in the storage unit according to the index information.
[0056] It can be seen that, based on the configuration during data recording, the data acquisition and playback system of this embodiment can delete or export the data of a certain channel separately, thereby improving data processing efficiency and data operability.
[0057] Based on the above configuration, the main logic flow of the data acquisition and playback system of this embodiment when recording data is as follows:
[0058] 1. The software running on the PS side communicates with the host computer control software through the Gigabit network. When the host computer control software clicks to execute the data recording function, the software running on the PS side sends instructions for recording data (including SATA write data instructions and data enable signals, as well as file system file index and other information) through the PL-PS communication module.
[0059] 2. According to the instruction, the optical fiber module transmits the optical fiber data of 4 channels to the data preprocessing module for data packetization. The packetized data is written into the DDR4 data cache module for caching through the data interface exchange module, and the data cache status in each channel is fed back to the PS end main control program.
[0060] 3. After entering the data recording working mode, the control software on the PS side will start to detect the data volume of each channel of the DDR on the PL side, and then issue data storage instructions according to the situation to write the data of the channels that meet the requirements into the RAID0 storage array.
[0061] 4. When the host computer chooses to stop recording data, the command is sent to the software running on the PS side through the Gigabit network, and then the software running on the PS side sends the command to stop recording data to the PL side through the PL-PS communication module.
[0062] 5. When the PL-side data receives the stop recording instruction, it first turns off the data enable, the data preprocessing module stops assembling packets, and no longer transmits data to the subsequent stage. Then it determines whether the data in the DDR4 is read empty. When the data in the DDR4 is read empty, it writes the stop write instruction of the SATA driver module, and then uploads the status information to the software running on the PS side through the PL-PS communication module. The software running on the PS side updates the file system based on the status information, and writes the latest file system to the SSD through the PL-PS communication module and the SATA driver module.
[0063] Based on the above logic, this embodiment also proposes a multi-channel data storage method based on FPGA, which is applied to the data acquisition and playback system of this embodiment. Figure 2 As shown, the method comprises the following steps:
[0064] First, the PS end communicates with the host computer control software through the Gigabit network interface. When the host computer control software clicks to execute the data recording function, the PS end sends the data recording instruction (including SATA write data instruction and data enable signal and file system file index and other information) to the PL end through the PL-PS communication module. Figure 3 As shown in the figure, before the PL end starts to collect data, the PS end first resets the PL end, and then obtains the storage unit status information through the PL end. If the status is normal, the data write enable signal of the target channel is sent to the PL end according to the setting of the upper computer control software. Otherwise, the PL end is reset and the storage unit status information is obtained through the PL end until the status is normal, and then the following steps are performed:
[0065] S1) The PL end obtains data in the data transceiver unit through at least two target channels, packages the data, and sends the data to the corresponding cache channel in the cache unit for caching. The PS end generates a file of the target channel in the file system according to the setting of the host computer control software;
[0066] S2) The PS end polls each cache channel, and if there is a cache channel whose data volume reaches the first threshold, updates the information of the corresponding file, and the PL end saves the data packet in the cache channel in the storage unit according to the information of the corresponding file;
[0067] S3) If the PS side receives a stop command, the PL side stops acquiring the data and returns to step S2) until there is no data in each cache channel, and the PS side updates the file system and writes the file system into the storage unit through the PL side; if the PS side does not receive a stop command, it returns to step S2) until the PS side receives a stop command.
[0068] In this embodiment, a write channel corresponding to the target channel is provided between the PL terminal and the storage unit, and step S2) specifically includes:
[0069] S21) The PS end detects the data volume of the current cache channel. If the data volume of the current cache channel does not reach the first threshold, step S22) is executed; if the data volume of the current cache channel reaches the first threshold, step S23) is executed;
[0070] S22) taking the next cache channel as the current cache channel and returning to step S21). If all cache channels have been traversed, jumping to step 3);
[0071] like Figure 3 As shown, in this embodiment, the target channel is all 4 channels of the data transceiver module, therefore, in the cache unit, DDR channel 1 to DDR channel 4 are all used as corresponding cache channels, when DDR channel 1 is not ready, that is, the data volume of DDR channel 1 does not reach the first threshold, continue to detect the data volume of the next cache channel, if DDR channel 2 is ready, that is, the data volume reaches the first threshold, perform subsequent operations for DDR channel 2, otherwise repeat the above steps until DDR channel 1 to DDR channel 4 are traversed, if DDR channel 1 to DDR channel 4 are not ready at this time, execute step S3), that is, first determine whether a stop instruction is received, then return to step S21), start from DDR channel 1, and re-detect. The subsequent steps performed by the PS end for the prepared cache channel include:
[0072] S23) The PS end updates the storage space start address in the information of the file of the target channel corresponding to the current cache channel according to the information of the remaining storage space of the storage unit, updates the storage space size in the information of the file of the target channel corresponding to the current cache channel according to the data amount of the current cache channel, and sends the information of the file of the target channel corresponding to the current cache channel and the corresponding data write channel enable command to the PL end;
[0073] S24) the PL terminal sends the data packet in the current cache channel to the storage unit through the data write channel corresponding to the target channel according to the information of the file of the target channel corresponding to the current cache channel, and stores it in the corresponding area of the remaining storage space of the storage unit;
[0074] S25) takes the next cache channel as the current cache channel and returns to step S21). If all cache channels have been traversed, jump to step 3).
[0075] like Figure 3 As shown, when the cache channel data is ready, that is, the data volume reaches the first threshold, the PS end updates the storage space starting address and size in the information of the corresponding file, and then sends the corresponding SATA write data instruction of the write channel and the updated file information to the PL end. At the same time, according to the change of the remaining storage space of the storage unit, the amount of data written to the storage unit by the cache channel is obtained. According to the instruction and the corresponding file information, the PL end writes the data of the corresponding size in the cache channel whose data volume reaches the first threshold into the storage unit through the corresponding write channel. After the data of the current cache channel is written, the PS end will execute the data volume judgment and writing of the next cache channel. When all cache channels are traversed, step S3) is executed, that is, first determine whether a stop instruction is received, and then return to step S21), starting from DDR channel 1, re-detection and data writing are performed.
[0076] Through the above steps, this embodiment adopts a time-sharing storage method in the multi-channel data storage process according to the actual situation that the storage rate of the storage medium is greater than the rate of collecting data, and stores the data of each channel in turn in turn, which can meet the requirements of high-speed storage of large amounts of data while maintaining the load of FPGA on data collection at a low level, thereby reserving sufficient computing resources for other operations, such as data playback, data export, etc.
[0077] In this embodiment, when the amount of data in a cache channel reaches a preset first threshold, the PL end will generate a flag and send it to the PS end. Therefore, in step S21), the PS end detects the data amount of the current cache channel specifically including: if the PS end does not obtain the flag of the current cache channel, the data amount of the current cache channel does not reach the first threshold; if the PS end obtains the flag of the current cache channel, the data amount of the current cache channel reaches the first threshold.
[0078] In this embodiment, when the data writing is completed, the PL end will generate a completion flag and send it to the PS end. Therefore, step S24) also includes: the PL end monitors the writing amount of the writing channel. When the writing amount reaches the size in the file information, it stops writing to the storage unit, generates a completion flag and feeds it back to the PS end. If the PS end receives the completion flag, step S25) is executed.
[0079] like Figure 3As shown, when the PS end receives the stop instruction sent by the upper computer, it sends a signal to stop data writing enable to the PL end, and the PL end stops obtaining data from the data transceiver unit. At this time, there may still be data in the cache channel that has not been written into the storage unit. Therefore, in this embodiment, step S21) also includes: if the current cache channel data volume does not reach the first threshold, and the PS end receives the stop instruction, then execute step S23). Correspondingly, in step S3), before the PS end updates the file system, it also includes: the PS end sends a SATA write data stop instruction to the PL end, so as to avoid writing redundant data to the storage unit while writing the remaining data in the cache channel into the storage unit.
[0080] In this embodiment, when exporting data, the main logical process is as follows:
[0081] 1. The software running on the PS side communicates with the host computer control software through the Gigabit network. When the host computer control software selects a file and clicks to execute the data export function, the software running on the PS side sends the command to export data (including SATA read data command and data export enable signal and index of the file to be exported in the file system and other information) through the PL-PS communication module.
[0082] 2. According to the instruction, the data flow is as follows: after the SATA driver module receives the SATA read data instruction, it reads the data to be played back from the SSD according to the file index of the file system issued together, and then outputs it to the data interface exchange module and connects it to the write data of the DDR4 data cache module, and the data is cached in DDR4. In the data export mode, if there is cached data in DDR4, after the data is read out, it is transmitted to the data stream interface of the PL-PS communication module, and the data is sent to the software running on the PS end through the interface, and finally sent to the host computer via the Gigabit network.
[0083] 3. After the SATA driver module finishes reading the exported file, it uploads the status information to the software running on the PS side through the PL-PS communication module, thus ending the export process.
[0084] In this embodiment, when data is imported, the main logical process is as follows:
[0085] 1. The software running on the PS side communicates with the host computer control software through the Gigabit network. When the host computer control software selects a file and clicks to execute the data import function, the software running on the PS side sends the command to export data (including SATA write data command and data import enable signal and index of the file to be imported in the file system and other information) through the PL-PS communication module.
[0086] 2. After the command is issued, the software running on the PS side receives the imported data transmitted by the host computer, and then sends the imported data to the data interface exchange module through the data stream interface of the PL-PS communication module. The data interface exchange module writes the imported data into the DDR4 cache according to the working mode, and then the SATA driver module judges the amount of data in the DDR4, reads the data and writes it into the SSD.
[0087] 3. When the data import is completed, the file system of the software running on the PS side generates a file index based on the status information, and finally writes the updated file system information to the SSD.
[0088] Therefore, the step S3 of this embodiment also includes a step of reading files, specifically including: the PS end obtains a read request for the target file, matches the file system to obtain corresponding index information, and the PL end sends the corresponding data packet in the storage unit to the cache unit according to the index information. If the amount of data in the cache unit reaches a second threshold, the PL end reads and unpacks the data packet in the cache unit, and sends the unpacked data to the data transceiver unit through the channel corresponding to the target file.
[0089] Correspondingly, step S3) of this embodiment also includes a step of deleting files, which specifically includes: the PS side obtains a deletion request for the target file, matches the file system to obtain corresponding index information, the PL side deletes the corresponding data packet in the storage unit according to the index information, and the PS side deletes the corresponding file in the file system.
[0090] In summary, the multi-channel data storage method in this embodiment realizes the function of multi-channel data acquisition to generate multiple corresponding files. When processing multi-channel data storage, through time-sharing and small-block read and write operations, the function of simultaneously collecting multi-channel data and storing each into a file is realized to facilitate subsequent data processing. The data of a certain channel can be deleted or exported separately, which improves the data processing efficiency and data operability. At the same time, the respective advantages of the PS end and the PL end in UltraScaleFPGA can be maximized, which not only realizes a relatively complete file system, but also greatly improves the compatibility of the device, and concentrates the management of the file system and the development of the underlying interface on one chip, which reduces the overall complexity and power consumption of the device, and is conducive to the miniaturization of the device.
[0091] The above is only a preferred embodiment of the present invention, and does not limit the present invention in any form. Although the present invention has been disclosed as a preferred embodiment, it is not intended to limit the present invention. Therefore, any simple modification, equivalent change and modification made to the above embodiment according to the technical essence of the present invention without departing from the content of the technical solution of the present invention shall fall within the scope of protection of the technical solution of the present invention.
Claims
1. A multi-channel data storage method based on FPGA, characterized in that: The method is applied to a data acquisition and playback system, wherein the data acquisition and playback system comprises an FPGA unit, a data transceiver unit, a cache unit and a storage unit, wherein the FPGA unit comprises a PL terminal and a PS terminal, wherein the PL terminal is connected to the PS terminal, the data transceiver unit, the cache unit and the storage unit respectively, and a write channel corresponding to a target channel is arranged between the PL terminal and the storage unit. The method comprises: S1) The PL end obtains data in the data transceiver unit through at least two target channels, packages the data, and sends the data to the corresponding cache channel in the cache unit for caching, and the PS end generates a file of the target channel in the file system; S2) The PS end polls each cache channel, and if there is a cache channel whose data volume reaches the first threshold, updates the information of the corresponding file, and the PL end saves the data packet in the cache channel in the storage unit according to the information of the corresponding file, specifically including: S21) The PS end detects the data volume of the current cache channel. If the data volume of the current cache channel does not reach the first threshold, step S22) is executed; if the data volume of the current cache channel reaches the first threshold, step S23) is executed; S22) taking the next cache channel as the current cache channel and returning to step S21). If all cache channels have been traversed, jumping to step 3); S23) The PS end updates the storage space start address in the information of the file of the target channel corresponding to the current cache channel according to the information of the remaining storage space of the storage unit, updates the storage space size in the information of the file of the target channel corresponding to the current cache channel according to the data amount of the current cache channel, and sends the information of the file of the target channel corresponding to the current cache channel and the corresponding data write channel enable command to the PL end; S24) the PL terminal sends the data packet in the current cache channel to the storage unit through the data write channel corresponding to the target channel according to the information of the file of the target channel corresponding to the current cache channel, and stores it in the corresponding area of the remaining storage space of the storage unit; S25) taking the next cache channel as the current cache channel and returning to step S21); if all cache channels have been traversed, jumping to step 3); S3) If the PS side receives a stop command, the PL side stops acquiring the data and returns to step S2) until there is no data in each cache channel, and the PS side updates the file system and writes the file system into the storage unit through the PL side; if the PS side does not receive a stop command, it returns to step S2) until the PS side receives a stop command.
2. The FPGA-based multi-channel data storage method according to claim 1, characterized in that: After step S3), the process also includes a step of reading files, specifically including: the PS end obtains a read request for the target file, matches the file system to obtain corresponding index information, and the PL end sends the corresponding data packet in the storage unit to the cache unit according to the index information. If the amount of data in the cache unit reaches a second threshold, the PL end reads and unpacks the data packet in the cache unit, and sends the unpacked data to the data transceiver unit through the channel corresponding to the target file.
3. The FPGA-based multi-channel data storage method according to claim 1, characterized in that: After step S3), the step of deleting files is also included, which specifically includes: the PS end obtains a deletion request for the target file, matches the file system to obtain corresponding index information, the PL end deletes the corresponding data packet in the storage unit according to the index information, and the PS end deletes the corresponding file in the file system.
4. The FPGA-based multi-channel data storage method according to claim 1, characterized in that: Before step S21), the method further includes: the cache channel obtains and caches data packets from the PL end, and if the amount of cached data reaches a first threshold, the PL end generates a flag bit and sends it to the PS end; Step S21) specifically includes: if the PS end does not obtain the flag bit of the current cache channel, the data volume of the current cache channel does not reach the first threshold; if the PS end obtains the flag bit of the current cache channel, the data volume of the current cache channel reaches the first threshold.
5. The FPGA-based multi-channel data storage method according to claim 1, characterized in that: After step S24), the process also includes: the PL end generates a completion flag and sends it to the PS end. If the PS end receives the completion flag, step S25 is executed.
6. The FPGA-based multi-channel data storage method according to claim 1, characterized in that: Step S21) also includes: if the current cache channel data volume does not reach the first threshold, and the PS end receives a stop instruction, executing step S23).
7. A data acquisition and playback system, characterized in that: It includes an FPGA unit, a data transceiver unit, a cache unit and a storage unit. The FPGA unit includes a PL end and a PS end. The PL end is connected to the PS end, the data transceiver unit, the cache unit and the storage unit respectively. A write channel corresponding to a target channel is provided between the PL end and the storage unit, wherein: The PL end is used to obtain data in the data transceiver unit through at least two target channels, and after data packetization, send the data to the corresponding cache channel in the cache unit for cache, and after waiting to obtain file information, save the data packet in the cache channel in the storage unit according to the file information; The PS end is used to generate files for each target channel in the file system, and then poll each cache channel. If there is a cache channel whose data volume reaches a first threshold, the PS end updates the information of the corresponding file and sends it to the PL end. After receiving a stop instruction, the PS end is also used to instruct the PL end to stop acquiring the data. After there is no data in each cache channel, the PS end updates the file system and writes the file system into the storage unit through the PL end. The PS end polls each cache channel, and if there is a cache channel whose data volume reaches the first threshold, updates the information of the corresponding file and sends it to the PL end, and the PL end saves the data packet in the cache channel in the storage unit according to the information of the corresponding file, specifically including: S21) The PS end detects the data volume of the current cache channel. If the data volume of the current cache channel does not reach the first threshold, step S22) is executed; if the data volume of the current cache channel reaches the first threshold, step S23) is executed; S22) taking the next cache channel as the current cache channel, returning to step S21), if all cache channels are traversed and the PS end receives a stop instruction, instructing the PL end to stop acquiring the data, and then polling each cache channel until there is no data in each cache channel, updating the file system and writing the file system into the storage unit through the PL end; if all cache channels are traversed and the PS end does not receive a stop instruction, polling each cache channel until the PS end receives a stop instruction; S23) The PS end updates the storage space start address in the information of the file of the target channel corresponding to the current cache channel according to the information of the remaining storage space of the storage unit, updates the storage space size in the information of the file of the target channel corresponding to the current cache channel according to the data amount of the current cache channel, and sends the information of the file of the target channel corresponding to the current cache channel and the corresponding data write channel enable command to the PL end; S24) the PL terminal sends the data packet in the current cache channel to the storage unit through the data write channel corresponding to the target channel according to the information of the file of the target channel corresponding to the current cache channel, and stores it in the corresponding area of the remaining storage space of the storage unit; S25) takes the next cache channel as the current cache channel, and returns to execute step S21). If all cache channels are traversed and the PS end receives a stop instruction, the PL end is ordered to stop obtaining the data, and then each cache channel is polled until there is no data in each cache channel, and the file system is updated and written into the storage unit through the PL end; if all cache channels are traversed and the PS end does not receive a stop instruction, each cache channel is polled until the PS end receives a stop instruction.
8. The data acquisition and playback system according to claim 7, characterized in that: The PS end is also used to obtain a read request for the target file, match the file system to obtain the corresponding index information and send it to the PL end; the PL end is also used to send the corresponding data packet in the storage unit to the cache unit according to the index information. If the amount of data in the cache unit reaches a second threshold, the data packet in the cache unit is read and unpacked, and the unpacked data is sent to the data transceiver unit through the channel corresponding to the target file.
9. The data acquisition and playback system according to claim 7, characterized in that: The PS end is also used to obtain a deletion request for the target file, match the file system to obtain the corresponding index information and send it to the PL end, and then delete the corresponding file in the file system; The PL end is also used to delete the corresponding data packet in the storage unit according to the index information.