A monitoring auxiliary device and method for electromagnetic compatibility testing of integrated circuits

Abstract

The present invention provides a monitoring assistance device and method for electromagnetic compatibility testing of integrated circuits, including: sampling a first feedback signal in a non-electromagnetic interference working state of the IC under test and performing data analysis, comparing the data analysis results with the preset IC types in the device to identify the type of the IC under test, adaptively learning the first feedback signal according to the preset method corresponding to the type of the IC under test to obtain learning result data, determining the preset test items of the IC under test according to the learning result data, then sampling a second feedback signal during the electromagnetic compatibility testing of the IC under test, and performing real-time comparative analysis on the test feedback signal in the second stage with the preset test items and preset test standards to determine whether the working state of the IC under test is normal. If the judgment is negative, an alarm prompt is issued. Compared with the prior art, the monitoring results of the present invention are more accurate, have stronger stability and applicability, a more comprehensive monitoring range, and a higher degree of intelligence.

Description

Technical Field

[0001] The present invention relates to the technical field of integrated circuit testing, and particularly to a monitoring and assisting device and method for integrated circuit electromagnetic compatibility testing. Background Art

[0002] With the continuous development of integrated circuit technology, there are more and more integrated circuit electromagnetic compatibility tests, and higher requirements are imposed on their test results. There are many types of integrated circuit chips, with complex functions, fast operating speeds, and abnormal working states that are not easily observable by the naked eye. There is an urgent need for a device that integrates the functions of multiple types of chips for online intelligent monitoring and assistance. Moreover, for integrated circuit electromagnetic compatibility tests, this device is required to have strong electromagnetic protection capabilities.

[0003] Currently, there are many types of integrated circuits with different performance parameters. Before testing, testers need to study the characteristics of various chips and write programs, resulting in low work efficiency, high harmfulness, and high professional ability requirements for testers. Traditional integrated circuit electromagnetic compatibility test devices have a small test coverage and low applicability, and cannot strictly synchronously monitor each working state of the chip in real time according to the characteristics of integrated circuits with multiple functions, high precision, and fast state changes. At the same time, traditional test devices cannot perform basic on-line fault analysis and latch fault information, which is not conducive to problem analysis and solution. In addition, for the problem of harsh electromagnetic test environments for integrated circuits, traditional test devices lack human-computer interaction functions and cannot be remotely controlled and displayed, protecting the personal safety and health of testers during electromagnetic interference tests. The traditional fixed coefficient sampling method may cause some voltage regions to be greatly affected by interference signals, easily resulting in misjudgment.

[0004] Based on the above, the present invention discloses a monitoring and assisting device and method for integrated circuit electromagnetic compatibility testing, achieving the effects of higher accuracy, higher efficiency, stronger stability and applicability, more comprehensive monitoring range, and higher intelligence in integrated circuit electromagnetic compatibility test monitoring. Summary of the Invention

[0005] The present invention provides a monitoring assistance device and method for electromagnetic compatibility testing of integrated circuits. The method includes: sampling a first feedback signal in a state where the IC under test operates without electromagnetic interference and analyzing the sampled data, comparing the data analysis result with a preset IC type, identifying the type of the IC under test, adaptively learning the first feedback signal according to a preset method corresponding to the type of the IC under test, and obtaining learning result data. Determining a preset test item for the IC under test according to the learning result data, then sampling a second feedback signal during the electromagnetic compatibility test of the IC under test, and performing real-time comparative analysis on the test feedback signal in the second stage with the preset test item and the preset test standard to determine whether the operating state of the IC under test is normal. If the judgment is negative, an alarm prompt is issued. Compared with the prior art, the monitoring result of the present invention is more accurate, has stronger stability and applicability, a more comprehensive monitoring range, and a higher degree of intelligence.

[0006] In a first aspect of the present invention, there is provided a monitoring assistance device for electromagnetic compatibility testing of integrated circuits, including:

[0007] A sampling module for sampling a feedback signal emitted when the IC under test operates. The feedback signal includes a first feedback signal and a second feedback signal. The first feedback signal is a feedback signal emitted by the IC under test in a normal operating state without electromagnetic interference, and the second feedback signal is a feedback signal emitted by the IC under test during electromagnetic compatibility testing;

[0008] An IC type identification module electrically connected to the sampling module for setting a preset IC type and a preset test standard, and performing data analysis on the first feedback signal, and identifying the type of the IC under test according to the preset IC type;

[0009] An adaptive learning module electrically connected to the IC type identification module for adaptively learning the first feedback signal according to a preset method corresponding to the type of the IC under test, and obtaining learning result data. The learning result data includes a communication rate calculation result;

[0010] A preset test item determination module electrically connected to the adaptive learning module for determining a preset test item for the IC under test according to the learning result data;

[0011] A judgment module electrically connected to the IC type identification module and the preset test item determination module respectively for determining whether the operating state of the IC under test is normal according to the preset test item and the preset test standard;

[0012] An alarm module electrically connected to the judgment module for issuing an alarm prompt.

[0013] Further, the preset IC types include: the first type of chip and the second type of chip;

[0014] The adaptive learning module includes: an automatic mode learning unit and an artificial assistance mode learning unit;

[0015] The automatic mode learning unit is electrically connected to the IC type recognition module and is used for performing automatic mode learning and obtaining learning result data when the tested IC is recognized as the first type of chip; the automatic mode learning includes: recognizing the learning result data, judging the completion status of the automatic mode learning, and determining to enter the next round of learning stage or enter the artificial assistance mode or enter the test stage through the completion status;

[0016] The artificial assistance mode learning unit is electrically connected to the IC type recognition module and is used for performing artificial assistance mode learning when the tested IC is recognized as the second type of chip or when it is judged that the automatic mode learning fails. The artificial assistance mode learning is used for manually recognizing and correcting the learning result data and manually judging whether to enter the next round of learning stage or enter the test stage.

[0017] Further, the adaptive learning module includes: an active learning unit, a passive learning unit, and an FPGA unit;

[0018] The active learning unit is used for learning the first feedback signal in an active learning mode. The active mode learning includes performing communication rate matching by means of pulse counting on a timer and calculating the communication clock rate;

[0019] The passive learning unit is used for learning in a passive learning mode when the communication rate matching fails after the active mode learning. The passive learning mode includes performing communication rate matching by increasing the rate in a fixed step for a preset initial rate;

[0020] The FPGA unit is used to complete the active mode learning or the passive mode learning.

[0021] Further, the device further includes:

[0022] A transmission data feature extraction module, electrically connected to the adaptive learning module, for extracting the transmission data features of the feedback signal according to the learning result data;

[0023] An automatic anomaly detection module, electrically connected to the transmission data feature extraction module, for performing automatic anomaly detection according to the transmission data features, the preset test items, and the preset test criteria;

[0024] A fault analysis and fault information latching module, electrically connected to the automatic anomaly detection module, is used for online analysis of faults and latching of fault information.

[0025] Further, the device further includes:

[0026] An AC / DC monitoring auxiliary module, electrically connected to the IC type identification module, is used for monitoring the working state of the AC / DC conversion type chip. The AC / DC monitoring auxiliary module includes a self-calibration circuit unit, an analog signal auxiliary circuit unit, and an AC / DC chip conversion result monitoring unit;

[0027] A dual-power optimization management module, electrically connected to the IC type identification module, is used for power optimization management of the device host.

[0028] Further, the device host includes: a monitoring auxiliary host, a local upper computer, a remote upper computer, and a remote alarm;

[0029] The monitoring auxiliary host is connected to the tested IC through a shielded cable. The sampling module, the IC type identification module, the adaptive learning module, the preset test item determination module, and the judgment module are respectively arranged inside the monitoring auxiliary host;

[0030] The monitoring auxiliary host further includes: an electromagnetic protection system, which is arranged to cover the periphery of all circuits and modules of the monitoring auxiliary host. The electromagnetic protection system includes, from the outer layer to the inner layer: a chassis grounding shielding unit, an electrostatic and surge protection unit, a common-mode filtering unit, a differential-mode filtering unit, an electrical isolation unit, a PCB ground layer protection unit, and a software protection unit;

[0031] The local upper computer, the remote upper computer, and the remote alarm are respectively connected to the monitoring auxiliary host through shielded cables; the local upper computer includes a first processing module and a first display module, the remote upper computer includes a second processing module and a second display module, and the remote alarm includes an alarm module.

[0032] In a second aspect of the present invention, a monitoring auxiliary method for integrated circuit electromagnetic compatibility testing is provided, including a learning stage and a testing stage;

[0033] The learning stage includes:

[0034] Step 1: Sample the first feedback signal in the working state without electromagnetic interference of the tested IC;

[0035] Step 2: Perform data analysis on the first feedback signal, and compare the data analysis result with the preset IC type to identify the type of the tested IC;

[0036] Step 3: Perform adaptive learning on the first feedback signal according to the preset method corresponding to the type of the IC under test, and obtain learning result data, where the learning result data includes a communication rate calculation result;

[0037] Step 4: Determine the preset test items of the IC under test according to the learning result data;

[0038] The test phase includes:

[0039] Step 5: Sample the second feedback signal of the electromagnetic compatibility test of the IC under test; determine whether the feedback signal is an analog signal, if it is determined to be yes, then use an adaptive sampling coefficient adjustment sampling method for sampling; perform electromagnetic compatibility test on the second feedback signal according to the preset test items and the preset test standards;

[0040] Step 6: Determine whether the working state of the IC under test is normal, if it is determined to be no, then issue an alarm prompt.

[0041] Further, the adaptive learning includes the following steps:

[0042] Step 31: Perform learning and handshaking on the first feedback signal in an automatic mode or a manual assistance mode, where the learning includes calculating the communication rate of the first feedback signal using a preset method, and the handshaking includes performing communication rate matching according to the communication rate;

[0043] Step 32: Determine whether the handshaking is successful according to the learning result data, and if it is determined that the handshaking is successful, extract the transmission data characteristics of the first feedback signal;

[0044] Step 33: Perform automatic anomaly detection according to the transmission data characteristics, the preset test items and the preset test standards, and determine whether the automatic anomaly detection result is correct. If it is determined to be yes, then latch the learning result data and enter the test phase. If it is determined to be no, then prompt a fault.

[0045] Further, prompting a fault includes: performing online analysis of the fault and latching the fault information.

[0046] Further, performing learning and handshaking on the first feedback signal in an automatic mode or a manual assistance mode includes the following steps:

[0047] Step 311: Identify whether the type of the IC under test is a first-class chip or a second-class chip;

[0048] Step 312: In the case where the tested IC is identified as a first type of chip, perform automatic mode learning. The automatic mode automatically identifies the learning result data and automatically determines whether to enter the next round of learning stage, enter the manual assistance mode, or enter the testing stage;

[0049] Step 313: Alternatively, in the case where the tested IC is identified as a second type of chip or in the case where it is determined that the automatic mode learning fails, perform manual assistance mode learning. The manual assistance mode learning manually identifies and corrects the learning result data and manually determines whether to enter the next round of learning stage or enter the testing stage.

[0050] The technical solutions provided by the embodiments of the present invention at least bring the following beneficial technical effects:

[0051] The present invention provides a monitoring assistance device and method for integrated circuit electromagnetic compatibility testing. Compared with the prior art, in view of the problem that the traditional fixed coefficient sampling method may cause a relatively large influence of interference signals on some voltage regions and is prone to misjudgment, the device and method of the present invention have more accurate monitoring results, stronger stability, faster monitoring response, and more comprehensive monitoring range for integrated circuit electromagnetic compatibility testing; the integrated circuit electromagnetic compatibility testing for multiple chips has a wider coverage range and stronger applicability; the adaptive learning method avoids the need for testers to learn the characteristics of various chips and write programs before testing, improves the detection efficiency, and reduces the cost; in view of the problem of harsh integrated circuit electromagnetic test environment, the device and method of the present invention have stronger safety. BRIEF DESCRIPTION OF THE DRAWINGS

[0052] Figure 1 is a schematic structural diagram of a monitoring assistance device for integrated circuit electromagnetic compatibility testing provided according to an embodiment of the present invention;

[0053] Figure 2 is a schematic structural diagram of an adaptive sampling circuit provided according to an embodiment of the present invention;

[0054] Figure 3 is a schematic structural diagram of an interface circuit of an FPGA unit provided according to an embodiment of the present invention;

[0055] Figure 4 is a schematic structural diagram of an auxiliary circuit provided according to an embodiment of the present invention;

[0056] Figure 5 is a schematic structural diagram of another monitoring assistance device for integrated circuit electromagnetic compatibility testing provided according to an embodiment of the present invention;

[0057] Figure 6 is a schematic structural diagram of an AC / DC monitoring assistance module provided according to an embodiment of the present invention;

[0058] Figure 7 It is a schematic structural diagram of a dual - power optimization management module provided according to an embodiment of the present invention;

[0059] Figure 8 It is a schematic structural diagram of another monitoring auxiliary device for integrated circuit electromagnetic compatibility testing provided according to an embodiment of the present invention;

[0060] Figure 9 It is a schematic structural diagram of a monitoring auxiliary host and an electromagnetic protection system provided according to an embodiment of the present invention;

[0061] Figure 10 It is a flowchart of a monitoring auxiliary method for integrated circuit electromagnetic compatibility testing provided according to an embodiment of the present invention;

[0062] Reference numerals:

[0063] Sampling module 1, IC type identification module 2, adaptive learning module 3, preset test item determination module 4, judgment module 5, alarm module 6, transmission data feature extraction module 7, automatic anomaly detection module 8, fault analysis and fault information latching module 9, AC / DC monitoring auxiliary module 10, self - calibration circuit unit 101, analog signal auxiliary circuit unit 102, AC / DC chip conversion result monitoring unit 103, dual - power optimization management module 11, monitoring auxiliary host 12, local upper computer 13, remote upper computer 14, remote alarm machine 15. Detailed implementation manners

[0064] It should be noted that, without conflict, the embodiments in the present invention and the features in the embodiments may be combined with each other. The terms "first", "second", etc. in the specification, claims and drawings of the present invention are used to distinguish similar objects, rather than to describe a specific order or sequence. It should be understood that such data may be interchanged under appropriate circumstances so as to implement the embodiments of the present invention described herein. In addition, the terms "include" and "have" and any variations thereof are intended to cover non - exclusive inclusion. For example, a process, method, system, product or device that includes a series of steps S or units does not necessarily have to be limited to those steps S or units clearly listed, but may include other steps S and units not clearly listed or inherent to these process, method, product or device.

[0065] To enable those skilled in the art to better understand the solution of the present invention, the following describes the solution in the embodiments of the present invention clearly and completely in conjunction with the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are only a part of the embodiments of the present invention, rather than all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those of ordinary skill in the art without creative work shall fall within the protection scope of the present invention.

[0066] Embodiment 1

[0067] The following details the technical solution provided by the embodiments of the present invention in conjunction with the accompanying drawings.

[0068] The embodiment of the present invention provides an integrated circuit electromagnetic radiation electromagnetic compatibility test device Figure 1 It is a structural schematic diagram of a monitoring auxiliary device for integrated circuit electromagnetic compatibility testing, as Figure 1 shown, including:

[0069] Sampling module 1, which is used to sample the feedback signals emitted when the IC under test is working. The feedback signals include a first feedback signal and a second feedback signal. The first feedback signal is the feedback signal emitted by the IC under test in the normal working state without electromagnetic interference, and the second feedback signal is the feedback signal emitted by the IC under test during electromagnetic compatibility testing;

[0070] IC type identification module 2, electrically connected to the sampling module 1, which is used to set a preset IC type and a preset test standard, and perform data analysis on the first feedback signal, and identify the type of the IC under test according to the preset IC type;

[0071] Adaptive learning module 3, electrically connected to the IC type identification module 2, which is used to perform adaptive learning on the first feedback signal according to the preset method corresponding to the type of the IC under test, and obtain learning result data. The learning result data includes a communication rate calculation result;

[0072] Preset test item determination module 4, electrically connected to the adaptive learning module 3, which is used to determine the preset test items of the IC under test according to the learning result data;

[0073] Judgment module 5, electrically connected to the IC type identification module 2 and the preset test item determination module 4 respectively, which is used to judge whether the working state of the IC under test is normal according to the preset test items and the preset test standard;

[0074] Alarm module 6, electrically connected to the judgment module 5, which is used to give an alarm prompt.

[0075] It should be noted that the first feedback signal is the feedback signal emitted when the IC under test operates normally without electromagnetic interference; the second feedback signal is the feedback signal emitted when the IC under test enters the electromagnetic compatibility test stage with electromagnetic interference added.

[0076] Preferably, the sampling module 1 is further configured to identify the type of the electromagnetic compatibility feedback signal, determine whether the feedback signal is an analog signal or a digital signal, and perform sampling according to the preset method corresponding to the analog signal or the digital signal.

[0077] Preferably, when it is determined that the feedback signal is an analog signal, the sampling module 1 uses a sampling method of adaptively adjusting the sampling coefficient for sampling. Specifically, an adaptive sampling circuit is included. Please refer to Figure 2 , this adaptive sampling circuit includes: a digital potentiometer R1 and a small-value resistor R2. When powering on each time, the resistors for sampling voltage division are defaulted to the minimum. Then, the CPU automatically adjusts R1 to the optimal resistance value according to the sampling value, so that the sampling signal value is in the region with the smallest error. Among them, the small-value resistor R2 is used to avoid short-circuit situations when R1 is damaged. Preferably, to meet the accuracy requirements, the operational amplifier chip of the conditioning circuit uses a high-performance chip with characteristics such as high common-mode rejection ratio and high slew rate, and the AD chip uses a chip with a 24-bit resolution.

[0078] Among them, the sampling method of adaptively adjusting the sampling coefficient is that this adaptive sampling circuit automatically adjusts the circuit resistance according to the voltage value of the sampling signal to obtain a stable feedback signal.

[0079] The device of the embodiment of the present invention monitors the voltages of various power supply chips. The voltage range is large and the accuracy requirement is high. However, the traditional fixed-coefficient sampling method will cause some voltage regions to be more affected by interference signals, easily resulting in misjudgment. The device of the present invention automatically adjusts different sampling coefficients according to the size of the voltage signal, reduces the error caused by interference signals, reduces the misjudgment rate, and improves the stability and accuracy of electromagnetic compatibility test monitoring.

[0080] For example, when the IC type identified by the IC type identification module 2 is a power supply chip, since the output voltage ranges of different power supply chips are large, if designed with a fixed proportional coefficient according to the conventional method, when the signal is too small, it is easily affected by interference, affecting the accuracy of the test result. In view of this problem, the adaptive sampling circuit proposed in the embodiment of the present invention mainly amplifies the signal to a suitable range at the source end when the signal is too small, and then performs subsequent conditioning and AD conversion, greatly improving the accuracy of the system test result.

[0081] Among them, the IC type recognition module 2 includes software for automatically recognizing the IC type and preset IC types that are preset and saved. The software analyzes the data of the first feedback signal and compares the analysis result with the preset IC types to identify the type of the tested IC. For example, the IC type of the tested IC can be identified as a charging IC through its charging protocol.

[0082] Preferably, the interfaces of the IC type recognition module 2 include: SPI, I2C, UART, USB, RS232, RS485, CAN bus, Ethernet and other interfaces. Except for the Ethernet chip using a dedicated Ethernet connector, other communication chips use DB connectors to improve the electromagnetic protection ability.

[0083] Among them, the adaptive learning module 3 adaptively learns the first feedback signal according to the preset method corresponding to the type of the tested IC and obtains learning result data. For example, when it is recognized that the IC type is a power chip, adaptive learning is performed according to the preset method of the power chip type. Preferably, the chip types corresponding to the preset methods include: power chips, communication chips, analog chips, digital chips, storage chips, sensor chips and data conversion chips. Among them, the learning result data includes the communication rate calculation result. After the adaptive learning obtains the learning result data, the communication rate of the transmitted data is obtained, and the communication handshake with the tested chip can be successful, and the transmission data characteristics can be extracted from the first feedback signal.

[0084] Among them, the preset test item determination module 4 determines the preset test items of the tested IC according to the learning result data. In the specific implementation process, the parameter combination of the preset parameters is obtained according to the learning result, and then the preset test items are matched according to the parameter combination to determine the preset test items. Further, the judgment module 5 judges whether the working state of the tested IC is normal according to the preset test criteria of the preset test items.

[0085] In an exemplary embodiment, the parameters obtained from the learning result include four types: a, b, c, and d, and the combination of two of them can be obtained through learning, that is, the obtained parameter combinations include ab, ac, ad, bc, bd, and cd. Each parameter combination corresponds to a preset test item, and then the determined preset test item is matched with the preset test criteria to judge whether the working state of the tested IC is normal.

[0086] Among them, the alarm module 6 can use the method of sound and light alarm for alarm, and the embodiments of the present invention are not limited.

[0087] In the embodiment of the present invention, the sampling module 1 samples the electromagnetic compatibility feedback signal of the IC under test, the IC type recognition module 2 analyzes the data of the first feedback signal, and identifies the type of the IC under test according to the preset IC type. The adaptive learning module 3 adaptively learns the first feedback signal according to the preset method corresponding to the type of the IC under test, and obtains the learning result data. The preset test item determination module 4 determines the preset test item of the IC under test according to the learning result data, and the judgment module 5 judges whether the working state of the IC under test is normal according to the preset test item and the preset test standard. If the judgment is abnormal, the alarm module 6 issues an alarm prompt to realize the monitoring assistance of the integrated circuit electromagnetic compatibility test.

[0088] In the specific implementation process, first, sample the first feedback signal in the working state of the IC under test without electromagnetic interference; secondly, analyze the data of the first feedback signal, and compare the data analysis result with the preset IC type to identify the type of the IC under test; secondly, adaptively learn the first feedback signal according to the preset method corresponding to the type of the IC under test, and obtain the learning result data; secondly, determine the preset test item of the IC under test according to the learning result data; secondly, sample the second feedback signal of the electromagnetic compatibility test of the IC under test, and perform the electromagnetic compatibility test on the second feedback signal according to the preset test item and the preset test standard; finally, judge whether the working state of the IC under test is normal. If the judgment is negative, an alarm prompt is issued.

[0089] It can be seen that, in the embodiment of the present invention, compared with the prior art, the integrated circuit electromagnetic compatibility test device has at least the following technical effects: aiming at the problem that the traditional fixed coefficient sampling method may cause a large influence on some voltage regions by interference signals and is prone to misjudgment, the device of the present invention has more accurate monitoring results, stronger stability, faster monitoring response and more comprehensive monitoring range for the integrated circuit electromagnetic compatibility test; the integrated circuit electromagnetic compatibility test for multiple chips has a wider coverage range and stronger applicability; the adaptive learning method avoids the need for testers to learn the characteristics of various chips and write programs before testing, improves the detection efficiency and reduces the cost; aiming at the problem of harsh electromagnetic test environment for integrated circuits, the upper computer part of this device has a human-computer interaction function and stronger safety.

[0090] In a preferred embodiment, the preset IC type includes: the first type of chip and the second type of chip;

[0091] Among them, the adaptive learning module 3 in the above embodiment of the present invention includes: an automatic mode learning unit and an artificial assistance mode learning unit;

[0092] Among them, the automatic mode learning unit is electrically connected to the IC type identification module, and is used to perform automatic mode learning and obtain learning result data when the tested IC is identified as the first type of chip; the automatic mode learning includes: identifying the learning result data, and judging the completion status of the automatic mode learning, and determining to enter the next round of learning stage or enter the manual assistance mode or enter the test stage according to the completion status; when it is judged that the completion status of the automatic mode learning is that the predetermined number of rounds is not completed and the learning is successful, enter the next round of learning stage for learning; or, when it is judged that the completion status of the automatic mode learning is that the predetermined number of rounds is completed and the learning fails, enter the manual assistance mode for learning; or, when it is judged that the completion status of the automatic mode learning is that the predetermined number of rounds is completed and the learning is successful, enter the test stage;

[0093] Among them, the manual assistance mode learning unit is electrically connected to the IC type identification module 2, and is used to perform manual assistance mode learning when the tested IC is identified as the second type of chip or when it is judged that the automatic mode learning fails. The manual assistance mode learning is used to perform manual identification and correction on the learning result data, and perform manual judgment on whether to enter the next round of learning stage or enter the test stage.

[0094] Specifically, when the automatic mode learning unit enters the automatic mode learning, the learning stage and the test monitoring stage are completely carried out automatically by the device. Preferably, it is mainly for chips such as communication and digital chips with easy-to-extract working state characteristics; after the learning stage of the manual assistance mode learning unit is completed and the tester confirms that there is no problem, the tester manually enters the monitoring mode. Preferably, it is mainly for chips such as analog chips with relatively complex working state characteristics.

[0095] In the embodiment of the present invention, different ICs of different types are learned in different modes, so as to perform targeted learning according to the performance of different types of chips. For example, when the working state characteristics of communication and digital chips are easy to extract, the automatic mode learning is more efficient, while when it comes to chips such as analog chips with relatively complex working state characteristics, the state characteristics extracted by the manual assistance mode learning are more accurate, which is beneficial to improving the accuracy of monitoring.

[0096] In a preferred embodiment, the adaptive learning module 3 includes: an active learning unit, a passive learning unit, and an FPGA unit;

[0097] The active learning unit is used to learn the first feedback signal in an active learning mode. The active mode learning includes matching the communication rate by counting the pulses of a timer and calculating the communication clock rate;

[0098] The passive learning unit is used to perform learning in the passive learning mode when the communication rate matching fails during learning in the active mode. The passive learning mode includes matching the communication rate by increasing the rate at a fixed step for a preset initial rate.

[0099] The FPGA unit is used to complete the learning in the active mode or the passive mode.

[0100] Specifically, FPGA belongs to a kind of semi-custom circuit in application-specific integrated circuits and is a programmable logic array, which can effectively solve the problem of fewer device gate circuits in the original devices. The basic structure of FPGA includes programmable input / output units, configurable logic blocks, digital clock management modules, embedded block RAMs, wiring resources, embedded dedicated hard cores, and underlying embedded functional units. Due to the characteristics of rich wiring resources, reprogrammability, high integration, and low investment, FPGA has been widely used in the field of digital circuit design. The design process of FPGA includes algorithm design, code simulation, and design, board-level debugging. Designers establish an algorithm architecture according to actual requirements, use EDA to establish a design scheme or write design code in HD, ensure that the design scheme meets actual requirements through code simulation, and finally perform board-level debugging. Use the configuration circuit to download relevant files into the FPGA chip to verify the actual operation effect.

[0101] Preferably, Figure 3 is a schematic diagram of the interface circuit of the FPGA unit provided according to an embodiment of the present invention. As Figure 3 shown, the interfaces of the FPGA unit include: digital signals, SPI, I2C, CAN, UART, USB, RS232, RS485 bus, Ethernet, analog output, power signal, analog input, etc. Among them, for the 9 interfaces of digital signals, SPI, I2C, CAN, UART, USB, RS232, RS485 bus, and Ethernet, protection circuits and isolation circuits are respectively adopted between them and the FPGA unit. For the 3 interfaces of analog output, power signal, and analog input, conditioning circuits, filtering circuits, etc. are added on the basis of the protection of the protection circuit and the isolation circuit to enhance their electromagnetic protection capabilities while making it as convenient as possible for various ICs to access and test, and the monitoring range is wider.

[0102] Preferably, the FPGA unit is electrically connected to a power management circuit, a local host computer hardware circuit, a local alarm circuit, a data storage circuit, and an auxiliary circuit respectively. As Figure 4As shown, the auxiliary circuit mainly realizes the working monitoring and assistance of 8 communication chips or integrated chips such as SPI, I2C, UART, USB, RS232, RS485, CAN bus, and Ethernet. Except for the dedicated Ethernet interface for Ethernet, other communication signals use DB connectors to improve the electromagnetic protection ability. The auxiliary circuit sequentially includes: an interface, an electrostatic and surge protection circuit, a filtering circuit, a conversion circuit, an isolation circuit, an FPGA unit, a display or alarm circuit, and they are connected in series in sequence.

[0103] Preferably, the device further includes:

[0104] A transmission data feature extraction module 7, electrically connected to the adaptive learning module 3, for extracting the transmission data features of the feedback signal according to the learning result data;

[0105] And an automatic anomaly detection module 8, electrically connected to the transmission data feature extraction module 7, for performing automatic anomaly detection according to the transmission data features, the preset test items, and the preset test criteria;

[0106] And a fault analysis and fault information latching module 9, electrically connected to the automatic anomaly detection module 8, for performing on-line analysis of the fault and latching the fault information.

[0107] In the specific implementation process, first, the communication rate matching of the first feedback signal is performed in the active learning mode. The active learning mode performs communication rate matching by counting the pulses of the timer and calculates the communication clock rate. Secondly, it is judged whether the communication rate matching is successful according to the learning result data. If it is judged that the communication rate matching is successful, the transmission data features of the first feedback signal are extracted. Secondly, automatic anomaly detection is performed according to the transmission data features, the preset test items, and the preset test criteria, and it is judged whether the automatic anomaly detection result is correct. If it is judged to be yes, the learning result data is latched and the test stage is entered. If it is judged to be no, a fault is prompted. Secondly, when it is judged that the communication rate matching fails, the communication rate matching of the first feedback signal is performed in the passive learning mode. The passive learning mode performs communication rate matching by increasing the rate at a fixed step for the preset initial rate, and it is judged whether the learning of the passive learning mode reaches 2 rounds. If so, the passive learning mode is ended. If the rate matching is successful, the above-mentioned extraction of the transmission data features of the first feedback signal is repeated. Secondly, automatic anomaly detection is performed according to the transmission data features, the preset test items, and the preset test criteria, and it is judged whether the automatic anomaly detection result is correct. If it is judged to be yes, the learning result data is latched and the test stage is entered. If the automatic anomaly detection result is incorrect, a fault is prompted.

[0108] In the embodiments of the present invention, through the adaptive learning of the active mode and the passive mode, and through automatic anomaly detection, the monitoring assistance accuracy of the electromagnetic compatibility test of integrated circuits is improved, the need for testers to learn various chip characteristics and write programs before testing is avoided, the detection efficiency is improved, and the cost is reduced.

[0109] Preferably, the device further includes:

[0110] An AC / DC monitoring assistance module 10, electrically connected to the IC type identification module 2, for monitoring the working state of the AC / DC conversion type chip. The AC / DC monitoring assistance module 10 includes a self-calibration circuit unit 101, an analog signal assistance circuit unit 102, and an AC / DC chip conversion result monitoring unit 103, as Figure 5 and Figure 6 shown;

[0111] Among them, the self-calibration circuit unit 101 sequentially includes the following circuits: an analog signal input interface, a protection circuit, an isolation circuit, a conditioning circuit, and an AD circuit, and are electrically connected in sequence. Among them, the AD circuit is electrically connected to the FPGA unit; the analog signal assistance circuit unit 102 sequentially includes the following circuits: an analog signal output interface, a protection circuit, a conditioning circuit, and PWM isolation, and are electrically connected in sequence. Among them, the PWM isolation is electrically connected to the FPGA unit; the AC / DC chip conversion result monitoring unit 103 sequentially includes the following circuits: a digital signal input interface, an isolation circuit, and are electrically connected in sequence. Among them, the isolation circuit is electrically connected to the FPGA unit.

[0112] And, a dual-power optimization management module 11, electrically connected to the IC type identification module 2, for optimizing the management of the device host power supply, as Figure 7 shown.

[0113] Specifically, the dual-power optimization management module is respectively connected in parallel with the AV220V interface and the DC15V interface. The AV220V interface is sequentially connected in series with AC / DC conversion and a first-level DC / DC conversion. The first-level DC / DC conversion is respectively connected in parallel with two second-level DC / DC conversions of +5V and -5V, and these two second-level DC / DC conversions are respectively connected to the subsequent circuit; at the same time, the DC15V interface is connected to the first-level DC / DC conversion through a "single-pole double-throw" switch, and is also connected to the two second-level DC / DC conversions of +5V and -5V through another "single-pole double-throw" switch.

[0114] In the specific implementation process, when the IC type of the tested IC is identified as an AC / DC conversion chip, a data table of DC and sinusoidal AC analog signals is obtained through MATALB software, and then imported into the CPU. After calibration by the self-calibration circuit unit, an analog signal is supplied to the analog signal interface of the tested AC / DC conversion chip through the analog signal auxiliary circuit unit. Finally, the digital signal output by the chip is input into the CPU through the AC / DC chip conversion result monitoring unit and compared with the data table formed by MATLAB to monitor the working state of the AC / DC conversion chip.

[0115] Among them, when the IC type of the tested IC is identified as a power chip or an analog chip and the voltage exceeds 12V, it is powered by AC220V and supplies power to the subsequent circuit after AC / DC, 1st stage DC / DC, and 2nd stage DC / DC conversions; when the IC type of the tested IC is identified as a power chip and an analog chip and the voltage does not exceed 12V, it is powered by DC15V and supplies power to the subsequent stage after 1st stage DC / DC and 2nd stage DC / DC conversions; when the IC type of the tested IC is identified as a digital chip and a communication chip, it is powered by the DC15V interface and supplies power to the subsequent stage through 2nd stage DC / DC.

[0116] In the embodiment of the present invention, the switching of the entire power supply path adopts a "single-pole double-throw" mode, which naturally prevents the conflict problem caused by the insertion of dual power supplies, improves the stability of the device monitoring assistance, and at the same time reduces the power consumption and electromagnetic interference of the device.

[0117] In a preferred embodiment, the device host includes: a monitoring assistance host 12, a local upper computer 13, a remote upper computer 14, and a remote alarm machine 15, as Figure 8 and Figure 9 shown;

[0118] The monitoring assistance host 12 is connected to the tested IC through a shielded cable. The sampling module 1, the IC type identification module 2, the adaptive learning module 3, the preset test item determination module 4, and the judgment module 5 are respectively arranged inside the monitoring assistance host 12, where the tested IC is Figure 8 the EUT marked in

[0119] Among them, the monitoring assistance host 12 further includes: an electromagnetic protection system, which is covered around all the circuits and modules of the monitoring assistance host 12. The electromagnetic protection system includes, from the outer layer to the inner layer: a chassis grounding shielding unit, an electrostatic and surge protection unit, a common-mode filtering unit, a differential-mode filtering unit, an electrical isolation unit, a PCB ground layer protection unit, and a software protection unit;

[0120] Among them, the local host computer 13, the remote host computer 14, and the remote alarm 15 are respectively connected to the monitoring auxiliary host 12 through shielded cables; the local host computer 13 includes a first processing module and a first display module, the remote host computer 14 includes a second processing module and a second display module, and the remote alarm 15 includes an alarm module 6.

[0121] Specifically, the monitoring auxiliary device host mainly realizes the monitoring of the chip working state during the electromagnetic compatibility test of the integrated circuit and the auxiliary function of the normal operation of the chip. Through the full-coverage protection of the electromagnetic protection system, it has strong electromagnetic protection capabilities.

[0122] Among them, the local host computer 13 mainly includes: a first processing module and a first display module. The first processing module and the first display module are respectively electrically connected to the monitoring auxiliary device host. The first processing module is used for the function, parameter setting and debugging of the host, and the first display module is used for abnormal display and abnormal analysis result display.

[0123] Among them, the remote host computer 14 includes: a second processing module, a second display module and an abnormal cause analysis module. Usually, the remote host computer 14 is mainly placed in the test control room and is electrically connected to the monitoring auxiliary device host. On the basis of the functions of the local host computer 13, it adds an abnormal cause analysis function.

[0124] The remote alarm is mainly installed in the control room and is electrically connected to the monitoring auxiliary device host. It is used to generate a beeping sound and an indicator light prompt when the chip has an abnormality, so as to notify the test personnel in time.

[0125] In the embodiment of the present invention, the device performs the body splitting setting by operating and monitoring at different locations, and improves the safety of user operation for the problem of harsh electromagnetic test environment of the integrated circuit.

[0126] Embodiment Two

[0127] On the basis of the above device embodiment, the embodiment of the present invention provides a monitoring auxiliary method for integrated circuit electromagnetic compatibility testing. Figure 10 It is a flowchart of a monitoring auxiliary method for integrated circuit electromagnetic compatibility testing provided according to an embodiment of the present invention, as Figure 10 shown, including a learning stage and a testing stage;

[0128] The learning stage includes the following steps:

[0129] Step S100: Sample the first feedback signal in the non-electromagnetic interference working state of the IC under test;

[0130] Step S200: Analyze the data of the first feedback signal, compare the result of the data analysis with a preset IC type, and identify the type of the tested IC;

[0131] Step S300: Perform adaptive learning on the first feedback signal according to a preset method corresponding to the type of the tested IC, and obtain learning result data, where the learning result data includes a communication rate calculation result;

[0132] Step S400: Determine a preset test item of the tested IC according to the learning result data;

[0133] The test phase includes:

[0134] Step S500: Sample a second feedback signal of the electromagnetic compatibility test of the tested IC; determine whether the feedback signal is an analog signal, and if it is determined to be yes, use an adaptive sampling coefficient adjustment sampling method for sampling; perform an electromagnetic compatibility test on the second feedback signal according to the preset test item and the preset test standard;

[0135] Step S600: Determine whether the working state of the tested IC is normal, and if it is determined to be no, issue an alarm prompt.

[0136] Preferably, the adaptive learning includes the following steps:

[0137] Step S310: Perform learning and handshaking on the first feedback signal in an automatic mode or a manual assistance mode, where the learning includes calculating the communication rate of the first feedback signal using a preset method, and the handshaking includes performing communication rate matching according to the communication rate;

[0138] Step S320: Determine whether the handshaking is successful according to the learning result data, and if it is determined that the handshaking is successful, extract the transmission data characteristics of the first feedback signal;

[0139] Step S330: Perform automatic anomaly detection according to the transmission data characteristics, the preset test item, and the preset test standard, and determine whether the result of the automatic anomaly detection is correct. If it is determined to be yes, latch the learning result data and enter the test phase; if it is determined to be no, prompt a fault.

[0140] In a preferred embodiment, prompting a fault includes: performing online analysis of the fault and latching fault information.

[0141] Preferably, performing learning and handshaking on the first feedback signal in an automatic mode or a manual assistance mode includes the following steps:

[0142] Step S311: Identify whether the type of the tested IC is a first type of chip or a second type of chip;

[0143] Step S312: When it is identified that the IC under test is a first - type chip, perform automatic mode learning. The automatic mode automatically identifies the learning result data and automatically determines whether to enter the next round of learning stage, enter the manual assistance mode, or enter the test stage.

[0144] Step S313: Alternatively, when it is identified that the IC under test is a second - type chip or when it is determined that the automatic mode learning fails, perform manual assistance mode learning. The manual assistance mode learning manually identifies and corrects the learning result data and makes a manual determination whether to enter the next round of learning stage or enter the test stage.

[0145] In a preferred embodiment, the monitoring and assistance method for integrated circuit electromagnetic compatibility testing further includes: simultaneously monitoring and assisting at least two functions of the IC under test to achieve synchronous monitoring of different functions of a multi - function chip.

[0146] The specific implementation manner of the embodiments of the present invention can refer to the detailed description of the above - mentioned device embodiments, and will not be elaborated herein.

[0147] Thus, in the embodiments of the present invention, compared with the prior art, the integrated circuit electromagnetic compatibility testing device has at least the following technical effects: for the problem that the traditional fixed - coefficient sampling method may cause a relatively large influence of interference signals on some voltage regions and is prone to false judgment, the method of the present invention has more accurate monitoring results, stronger stability, faster monitoring response, and more comprehensive monitoring range for integrated circuit electromagnetic compatibility testing; for the integrated circuit electromagnetic compatibility testing of multiple chips, it has a wider coverage range and stronger applicability; the adaptive learning method avoids the need for testers to learn the characteristics of various chips and write programs before testing, improves the detection efficiency, and reduces the cost; for the problem of harsh integrated circuit electromagnetic test environment, the upper computer part of this device has a human - machine interaction function and stronger safety.

[0148] The above are only the preferred embodiments of the present invention, and do not limit the patent scope of the present invention accordingly. Any equivalent structure or equivalent process transformation made by using the content of the specification and drawings of the present invention, or directly or indirectly applied to other related technical fields, shall be equally included in the patent protection scope of the present invention.

Claims

1. A monitoring auxiliary device for electromagnetic compatibility testing of integrated circuits, characterized in that, it includes: A sampling module for sampling the feedback signals emitted when the IC under test is working. The feedback signals include a first feedback signal and a second feedback signal. The first feedback signal is the feedback signal emitted by the IC under test in the normal working state without electromagnetic interference, and the second feedback signal is the feedback signal emitted by the IC under test during electromagnetic compatibility testing; An IC type identification module electrically connected to the sampling module, for setting a preset IC type and a preset test standard, and performing data analysis on the first feedback signal, and identifying the type of the IC under test according to the preset IC type; An adaptive learning module electrically connected to the IC type identification module, for adaptively learning the first feedback signal according to the preset method corresponding to the type of the IC under test, and obtaining learning result data, where the learning result data includes a communication rate calculation result; A preset test item determination module electrically connected to the adaptive learning module, for determining the preset test items of the IC under test according to the learning result data; A judgment module electrically connected to the IC type identification module and the preset test item determination module respectively, for judging whether the working state of the IC under test is normal according to the preset test items and the preset test standard; An alarm module electrically connected to the judgment module, for sending out an alarm prompt.

2. The monitoring auxiliary device for electromagnetic compatibility testing of integrated circuits according to claim 1, characterized in that, the preset IC types include: the first type of chip and the second type of chip; the adaptive learning module includes: an automatic mode learning unit and an artificial assistance mode learning unit; The automatic mode learning unit is electrically connected to the IC type identification module, and is used for performing automatic mode learning and obtaining learning result data when the IC under test is identified as the first type of chip; The automatic mode learning includes: identifying the learning result data, and judging the completion state of the automatic mode learning, and determining to enter the next round of learning stage or enter the artificial assistance mode or enter the test stage through the completion state; The artificial assistance mode learning unit is electrically connected to the IC type identification module, and is used for performing artificial assistance mode learning when the IC under test is identified as the second type of chip or when it is judged that the automatic mode learning fails. The artificial assistance mode learning performs artificial identification and correction on the learning result data, and makes an artificial judgment whether to enter the next round of learning stage or enter the test stage.

3. The monitoring auxiliary device for electromagnetic compatibility testing of integrated circuits according to claim 1, characterized in that, the adaptive learning module includes: a proactive learning unit, a passive learning unit and an FPGA unit; The proactive learning unit is used for learning the first feedback signal in a proactive learning mode. The proactive learning mode includes using a method of pulse counting on a timer to perform communication rate matching and calculate the communication clock rate; The passive learning unit is used to perform learning in the passive learning mode when the active learning mode is adopted and the communication rate matching fails. The passive learning mode includes matching the communication rate by increasing the rate in a fixed step for a preset initial rate. The FPGA unit is used to complete the active learning mode or the passive learning mode.

4. A monitoring and assisting device for integrated circuit electromagnetic compatibility testing according to claim 1, characterized in that, further comprising: A transmission data feature extraction module, electrically connected to the adaptive learning module, for extracting the transmission data features of the feedback signal according to the learning result data; An automatic anomaly detection module, electrically connected to the transmission data feature extraction module, for performing automatic anomaly detection according to the transmission data features, the preset test items and the preset test criteria; A fault analysis and fault information latching module, electrically connected to the automatic anomaly detection module, for performing on-line analysis of faults and latching fault information.

5. A monitoring and assisting device for integrated circuit electromagnetic compatibility testing according to claim 1, characterized in that, further comprising: An AC / DC monitoring and assisting module, electrically connected to the IC type identification module, for monitoring the working state of the AC / DC conversion type chip. The AC / DC monitoring and assisting module includes a self-calibration circuit unit, an analog signal assisting circuit unit, and an AC / DC chip conversion result monitoring unit; A dual-power optimization management module, electrically connected to the IC type identification module, for performing power optimization management on the device host.

6. A monitoring and assisting device for integrated circuit electromagnetic compatibility testing according to claim 5, characterized in that, The device host includes: a monitoring and assisting host, a local upper computer, a remote upper computer, and a remote alarm; The monitoring and assisting host is connected to the IC under test through a shielded cable. The sampling module, the IC type identification module, the adaptive learning module, the preset test item determination module, and the judgment module are respectively arranged inside the monitoring and assisting device host; The monitoring and assisting host further includes: an electromagnetic protection system, which is covered outside the peripheries of all circuits and modules of the monitoring and assisting host. The electromagnetic protection system includes, from the outer layer to the inner layer in sequence: a chassis grounding shielding unit, an electrostatic and surge protection unit, a common-mode filtering unit, a differential-mode filtering unit, an electrical isolation unit, a PCB ground layer protection unit, and a software protection unit; The local upper computer, the remote upper computer, and the remote alarm are respectively connected to the monitoring and assisting host through shielded cables; the local upper computer includes a first processing module and a first display module, the remote upper computer includes a second processing module and a second display module, and the remote alarm includes an alarm module.

7. A monitoring and assisting method for integrated circuit electromagnetic compatibility testing, applied to the device according to any one of claims 1 to 6, characterized in that, including a learning stage and a testing stage; The learning stage includes: Step 1: Sample the first feedback signal when the tested IC is in an electromagnetic interference-free working state; Step 2: Analyze the data of the first feedback signal, and compare the data analysis result with the preset IC type to identify the type of the tested IC; Step 3: Perform adaptive learning on the first feedback signal according to the preset method corresponding to the type of the tested IC, and obtain learning result data, where the learning result data includes a communication rate calculation result; Step 4: Determine the preset test items of the tested IC according to the learning result data; The test stage includes: Step 5: Sample the second feedback signal of the electromagnetic compatibility test of the tested IC, and perform electromagnetic compatibility tests on the second feedback signal according to the preset test items and the preset test criteria; Step 6: Determine whether the working state of the tested IC is normal. If the determination result is no, an alarm prompt is issued.

8. A monitoring assistance method for electromagnetic compatibility testing of integrated circuits as claimed in claim 7, characterized in that the adaptive learning includes the following steps: Step 31: Perform learning and handshaking on the first feedback signal in an automatic mode or a manual assistance mode. The learning includes calculating the communication rate of the first feedback signal by using a preset method, and the handshaking includes performing communication rate matching according to the communication rate; Step 32: Determine whether the handshaking is successful according to the learning result data. If it is determined that the handshaking is successful, extract the transmission data characteristics of the first feedback signal; Step 33: Perform automatic anomaly detection according to the transmission data characteristics, the preset test items and the preset test criteria, and determine whether the automatic anomaly detection result is correct. If the determination result is yes, latch the learning result data and enter the test stage. If the determination result is no, a fault is prompted.

9. A monitoring assistance method for electromagnetic compatibility testing of integrated circuits as claimed in claim 8, characterized in that prompting a fault includes: performing online analysis of the fault and latching the fault information.

10. A monitoring assistance method for electromagnetic compatibility testing of integrated circuits as claimed in claim 8, characterized in that performing learning and handshaking on the first feedback signal in an automatic mode or a manual assistance mode includes the following steps: Step 311: Identify whether the type of the tested IC is a first type of chip or a second type of chip; Step 312: Perform automatic mode learning when it is identified that the tested IC is a first type of chip. The automatic mode automatically identifies the learning result data and automatically determines whether to enter the next round of learning stage, the manual assistance mode or the test stage; Step 313: Alternatively, perform manual assistance mode learning when it is identified that the tested IC is a second type of chip or when it is determined that the automatic mode learning fails. The manual assistance mode learning manually identifies and corrects the learning result data and manually determines whether to enter the next round of learning stage or the test stage.

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