Display panel and manufacturing method thereof

Abstract

The display panel and the manufacturing method thereof provided by the embodiment of the present application comprise a substrate, a thin film transistor layer, an insulating layer, an anode layer, a cathode layer and an auxiliary cathode layer. The cathode and the auxiliary cathode are connected. Before conduction, the auxiliary cathode layer is driven by a positive voltage, and the cathode layer is driven by a negative voltage, so that there is a potential difference between the auxiliary cathode layer and the cathode layer. Due to the existence of the potential difference, the Ag particles in the auxiliary cathode migrate to the cathode, so that the voltage drop is reduced, the conduction is increased, and the uniformity of the display panel display is improved. Moreover, the insulating layer is provided with an undercut structure in the second through hole, so that the cathode and the auxiliary cathode are directly connected, thereby further reducing the conduction resistance, the auxiliary cathode layer can directly increase the conduction, and the uniformity of the display panel display is improved.

Description

Technical Field

[0001] This application relates to the field of display technology, specifically to a display panel and a method for manufacturing the display panel. Background Technology

[0002] Currently, Organic Light Emitting Diodes (OLED) displays have become the mainstream product for next-generation display technologies. OLEDs are a new type of current-driven semiconductor light-emitting device that emits light by controlling the injection and recombination of charge carriers to excite organic materials; this is a self-emissive technology. Compared to passively emitting Liquid Crystal Displays (LCDs), self-emissive OLED displays have advantages such as faster response times, higher contrast ratios, wider viewing angles, and are easier to implement in flexible displays.

[0003] The display principles of OLED and LCD panels are essentially the same, both achieving display by controlling the switching state of the thin-film transistors (TFTs) in each sub-pixel. The difference lies in their control mechanisms: OLED displays adjust their brightness by controlling the current flowing through the TFTs, while LCD displays adjust their backlight transmittance by controlling the voltage applied across the liquid crystal cell using the TFTs. Compared to LCDs, OLED displays have higher requirements for the driving current capability of the TFTs. OLEDs are extremely sensitive to their driving current; even slight changes in current can affect their luminous intensity, thus requiring the TFT drivers to continuously and stably provide operating current.

[0004] At room temperature, the resistance of a metal conductor is non-zero. Current flowing through the conductor will cause a voltage drop, a phenomenon known as IR drop. IR drop in metal conductors leads to potential differences at different locations from the input terminal. For large-size display panels, this IR drop causes differences in current across OLEDs at different locations, resulting in uneven panel illumination and affecting image display quality.

[0005] Therefore, how to provide a display panel that can reduce voltage drop and improve display uniformity is a challenge that existing panel manufacturers need to overcome. Summary of the Invention

[0006] The purpose of this application is to provide a display panel and a method for manufacturing the display panel, which can solve the technical problem of poor display uniformity caused by voltage drop of metal traces in existing display panels.

[0007] This application provides a display panel, including:

[0008] Substrate, the substrate including a first surface and a second surface disposed opposite to each other;

[0009] A thin-film transistor layer, wherein the thin-film transistor layer is disposed on the first surface;

[0010] An insulating layer is located on the side of the thin-film transistor layer away from the substrate, and a first through-hole and a second through-hole are provided on the insulating layer, wherein an undercut structure is provided in the second through-hole;

[0011] An anode layer is disposed on the side of the insulating layer away from the substrate and is connected to the thin-film transistor layer through the first through-hole;

[0012] A cathode layer is disposed on the side of the insulating layer away from the substrate and is connected to the thin-film transistor layer through the second through-hole. A third through-hole is disposed on the cathode layer and is located inside the second through-hole.

[0013] An auxiliary cathode layer is disposed on the side of the thin-film transistor layer away from the substrate. The auxiliary cathode layer is located within the third via and is connected to the cathode layer.

[0014] In the display panel described in this application, the thin-film transistor layer includes a light-shielding layer and a metal layer. The light-shielding layer is located on the first surface, and the metal layer is located on the surface of the light-shielding layer away from the substrate. The cathode layer is connected to the light-shielding layer through the metal layer, and the anode layer is connected to the light-shielding layer through the metal layer.

[0015] In the display panel described in this application, the thin-film transistor layer further includes a buffer layer, an interlayer dielectric layer, an active layer, a gate layer, and a gate insulating layer; wherein, the buffer layer is located on the side of the light-shielding layer away from the substrate and covers the substrate layer, the active layer is located on the side of the buffer layer away from the substrate, the gate insulating layer is located on the side of the active layer away from the substrate, the gate layer is located on the side of the gate insulating layer away from the substrate, the interlayer dielectric layer is located on the side of the gate layer away from the substrate and covers the gate layer, the gate insulating layer, and the active layer, and the interlayer dielectric layer is provided with a first via and a second via, and the metal layer is connected to the light-shielding layer through the first via and the metal layer is connected to the active layer through the second via.

[0016] In the display panel described in this application, the insulating layer includes a first insulator layer and a second insulator layer stacked sequentially. The first insulator layer is located on the side of the thin film transistor layer away from the substrate, and the second insulator layer is located on the side of the first insulator layer away from the substrate, and the second insulator layer extends into the second through hole.

[0017] In the display panel described in this application, the insulating layer further includes a third insulator layer, which is located on the side of the second insulator layer away from the substrate.

[0018] In the display panel described in this application, the material of the first insulator layer is the same as the material of the third insulator layer, and the material of the first insulator layer is different from the material of the second insulator layer.

[0019] In the display panel described in this application, the material of the first insulator layer includes one or a combination of silicon oxide and aluminum oxide, the material of the second insulator layer includes one or a combination of silicon nitride and aluminum nitride, and the material of the third insulator layer includes one or a combination of silicon oxide and aluminum oxide.

[0020] In the display panel described in this application, the display panel further includes a passivation layer, a pixel defining layer, a color resist layer, and a light-emitting layer; wherein, the passivation layer is located on the side of the insulating layer away from the substrate, the anode layer is located on the side of the passivation layer away from the substrate, and the anode layer and the cathode layer sequentially penetrate the passivation layer and the insulating layer and are connected to the thin film transistor layer, the pixel defining layer is located on the side of the anode layer away from the substrate, and the color resist layer is disposed on the same layer as the pixel defining layer, the light-emitting layer is located on the side of the color resist layer away from the substrate, and the cathode layer is located on the side of the light-emitting layer away from the substrate.

[0021] This application embodiment also provides a method for manufacturing a display panel, the method comprising:

[0022] A substrate is provided, the substrate including a first surface and a second surface disposed opposite to each other;

[0023] The thin-film transistor layer is formed on the first surface;

[0024] An insulating layer is formed on the side of the thin-film transistor layer away from the substrate. A first through-hole and a second through-hole are provided on the insulating layer, and an undercut structure is provided in the second through-hole of the insulating layer.

[0025] An anode layer is formed on the side of the insulating layer away from the substrate, and the anode layer is connected to the thin-film transistor layer through the first via.

[0026] A cathode layer is formed on the side of the insulating layer away from the substrate. The cathode layer is connected to the thin-film transistor through the first through-hole, and a third through-hole is provided on the cathode layer, the third through-hole being located inside the second through-hole.

[0027] An auxiliary cathode layer is formed on the side of the thin-film transistor layer away from the substrate. The auxiliary cathode layer is located within the third via and is connected to the cathode.

[0028] In the method for manufacturing a display panel according to this application, the specific steps of forming an insulating layer on the thin-film transistor layer, having a first through-hole and a second through-hole on the insulating layer, and having an undercut structure in the second through-hole of the insulating layer include:

[0029] A first insulator layer, a second insulator layer, and a third insulator layer are sequentially formed in the thin-film transistor layer;

[0030] The first insulator layer, the second insulator layer and the third insulator layer are etched for the first time to form the first through hole and the second through hole;

[0031] The first insulator layer, the second insulator layer, and the third insulator layer are etched a second time using an etching process to form an undercut structure, and the undercut structure is located inside the second through hole.

[0032] The display panel and its manufacturing method provided in this application include a substrate, a thin-film transistor layer, an insulating layer, an anode layer, a cathode layer, and an auxiliary cathode layer. The insulating layer has a first through-hole and a second through-hole. The cathode is connected to the thin-film transistor layer via the second through-hole, the anode layer is connected to the thin-film transistor layer via the first through-hole, and the cathode and auxiliary cathode are connected. Before conduction, a positive voltage is used to drive the auxiliary cathode layer, and a negative voltage is used to drive the cathode layer, creating a potential difference between the auxiliary cathode layer and the cathode layer. This potential difference causes Ag particles in the auxiliary cathode to migrate to the cathode, thereby reducing the voltage drop, increasing conductivity, and improving the uniformity of the display panel. Furthermore, because the insulating layer has an undercut structure within the second through-hole, the cathode and auxiliary cathode are directly connected, further reducing the conduction resistance. The auxiliary cathode layer can directly increase conductivity and improve the uniformity of the display panel. Attached Figure Description

[0033] To more clearly illustrate the technical solutions in the embodiments of this application, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the accompanying drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0034] Figure 1 This is a schematic diagram of the structure of a first embodiment of the display panel provided in this application.

[0035] Figure 2 This is a schematic diagram of a second embodiment of the display panel provided in this application.

[0036] Figure 3 This is a schematic diagram of a third embodiment of the display panel provided in this application.

[0037] Figure 4 This is a schematic diagram of a fourth embodiment of the display panel provided in this application.

[0038] Figure 5 This is a schematic diagram of a fifth embodiment of the display panel provided in this application.

[0039] Figure 6 This is a schematic diagram of a sixth embodiment of the display panel provided in this application.

[0040] Figure 7 This is a flowchart illustrating a method for manufacturing a display panel according to an embodiment of this application.

[0041] Figure 8 This is a schematic diagram of a sub-process of the method for manufacturing a display panel provided in an embodiment of this application.

[0042] Figure 9 A schematic diagram of step 2031 of the method for manufacturing a display panel provided in an embodiment of this application.

[0043] Figure 10 A schematic diagram of step 2032 of the method for manufacturing a display panel provided in an embodiment of this application.

[0044] Figure 11 A schematic diagram of step 2033 of the method for manufacturing a display panel provided in an embodiment of this application.

[0045] Figure 12 This is a schematic diagram of the structure of the display device provided in the embodiments of this application. Detailed Implementation

[0046] The technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only a part of the embodiments of this application, and not all of them. All other embodiments obtained by those skilled in the art based on the embodiments of this application without creative effort are within the scope of protection of this application.

[0047] Please see Figure 1 , Figure 1 This is a schematic diagram of a first embodiment of the display panel provided in this application. Figure 1 As shown, the display panel 10 provided in this embodiment includes a substrate 101, a thin-film transistor layer 102, an insulating layer 103, an anode layer 104, a cathode layer 105, and an auxiliary cathode layer 106. The substrate 101 includes a first surface 101a and a second surface 101b disposed opposite to each other. The thin-film transistor layer 102 is disposed on the first surface 101a. The insulating layer 103 is disposed on the surface of the thin-film transistor layer 102 away from the substrate 101. The anode layer 104 is disposed on the surface of the insulating layer 103 away from the substrate 101. The cathode layer 105 is disposed on the surface of the insulating layer 103 away from the substrate 101. The auxiliary cathode layer 106 is disposed on the surface of the insulating layer 103 away from the substrate 101.

[0048] The insulating layer 103 has a first through-hole 103a and a second through-hole 103b. An undercut structure 103c is formed within the second through-hole 103b. The anode layer 104 is connected to the thin-film transistor layer 102 via the first through-hole 103a. The cathode layer 105 is connected to the thin-film transistor layer 102 via the second through-hole 103b. The cathode layer 105 has a third through-hole 105a located within the second through-hole 103b. An auxiliary cathode layer 106 is located within the third through-hole 105a and is connected to the cathode layer 105.

[0049] It should be noted that the undercut structure 103c is the downward protruding and curved portion of the overall structure. Specifically, in this embodiment, the insulating layer 103 extends out from the middle of the side near the second through hole 103b, thereby forming the undercut structure 103c.

[0050] It should be noted that, due to the undercut structure 103c, the auxiliary cathode layer 106 and the cathode layer 105 can be directly connected. Furthermore, in this embodiment, before displaying with the display panel 10, a positive voltage is provided to the auxiliary cathode layer 106 to drive it, and a negative voltage is provided to the cathode layer 105 to drive it, thereby creating a potential difference between the auxiliary cathode layer 106 and the cathode layer 105. Due to this potential difference, Ag particles in the auxiliary cathode layer 106 migrate towards the cathode layer 105. Moreover, since the cathode layer 105 and the auxiliary cathode layer 106 are directly connected, there is no need to use current to break down the film between them; the Ag particles can migrate directly. Additionally, the connection between the cathode layer 105 and the auxiliary cathode layer 106 also reduces the on-resistance. Therefore, by using the display panel 10 provided in this application embodiment, the voltage drop of the internal metal wires of the display panel 10 can be reduced, the conductivity of the internal metal wires of the display panel 10 can be increased, thereby improving the uniformity of the display of the display panel 10 and improving the image display quality of the display panel 10.

[0051] The depth of the undercut structure 103c is greater than or equal to 0.2 micrometers. Specifically, the depth of the undercut structure 103c is 0.20 micrometers, 0.22 micrometers, 0.24 micrometers, 0.28 micrometers, 0.32 micrometers, 0.38 micrometers, 0.44 micrometers, or 0.50 micrometers. The specific depth of the undercut structure 103c is determined by the specific requirements of the display panel 10. The depth of the undercut structure 103c is the perpendicular distance between the side of the undercut structure 103c closest to the substrate 101 and the side of the thin-film transistor layer 102 furthest from the substrate 101.

[0052] It should be noted that the presence of the undercut structure 103c allows the auxiliary cathode layer 106 to be directly connected to the cathode layer 105. Furthermore, the auxiliary cathode layer 106 and the cathode layer 105 are only connected at the undercut structure 103c. By increasing the depth of the undercut structure 103c, the contact area between the auxiliary cathode layer 106 and the cathode layer 105 can be increased, facilitating the migration of Ag particles from the auxiliary cathode layer 106 to the cathode layer 105. This better reduces the voltage drop across the internal metal wires of the display panel 10, increases the conductivity of the internal metal wires, and ultimately improves the uniformity of the display and the image display quality of the display panel 10.

[0053] Please see Figure 2 , Figure 2 This is a schematic diagram of a second embodiment of the display panel provided in this application, as shown below. Figure 2 As shown, Figure 2 The display panel 10 shown is Figure 1 The difference in the display panel 10 shown is that the thin-film transistor layer 102 includes a light-shielding layer 1021 and a metal layer 1022. The light-shielding layer 1021 is located on the first surface 101a. The metal layer 1022 is located on the surface of the light-shielding layer 1021 away from the substrate 101. The auxiliary cathode layer 106 is connected to the light-shielding layer 1021 via the metal layer 1022. The anode layer 104 is connected to the light-shielding layer 1021 via the metal layer 1022.

[0054] It should be noted that the light-shielding layer 1021 is made of conductive metal, which not only blocks light and prevents it from affecting other film layers, but also transmits current signals.

[0055] In this embodiment, the anode layer 104 and the auxiliary cathode layer 106 are not easily connected to external traces, making it impossible to directly transmit current signals to them, i.e., it is impossible to drive them with positive or negative voltage. However, in this embodiment, the auxiliary cathode layer 106 is connected to the light-shielding layer 1021 via the metal layer 1022, and the anode layer 104 is also connected to the light-shielding layer 1021 via the metal layer 1022. By changing the traces, the auxiliary cathode layer 106 and the anode layer 104 can be connected to external traces, thus facilitating the driving of them with positive or negative voltage.

[0056] Please see Figure 3 , Figure 3 This is a schematic diagram of a third embodiment of the display panel provided in this application, as shown below. Figure 3 As shown, Figure 3 The display panel 10 shown is Figure 2 The difference in the display panel 10 shown is that the thin-film transistor layer 102 further includes a buffer layer 1023, an active layer 1024, a gate insulating layer 1025, a gate layer 1026, and an interlayer dielectric layer 1027. The buffer layer 1023 is located on the side of the light-shielding layer 1021 away from the substrate 101 and covers the substrate 101. The active layer 1024 is located on the side of the buffer layer 1023 away from the substrate 101. The gate insulating layer 1025 is located on the side of the active layer 1024 away from the substrate 101. The gate layer 1026 is located on the side of the gate insulating layer 1025 away from the substrate 101. The interlayer dielectric layer 1027 is located on the side of the gate layer 1026 away from the substrate 101 and covers the gate layer 1026, the gate insulating layer 1025, and the active layer 1024. The interlayer dielectric layer 1027 has a first via 1027a and a second via 1027b. Furthermore, the metal layer 1022 is connected to the light-shielding layer 1021 via the first via 1027a. The metal layer 1022 is connected to the active layer 1024 via the second via 1027b.

[0057] It should be noted that the metal layer 1022 serves as the source or drain of the thin-film transistor layer 102. The desired source or drain can be formed by patterning the metal layer 1022. The metal layer 1022 can be connected to external traces via the light-shielding layer 1021, allowing the source or drain of the thin-film transistor layer 102 to receive external signals through the light-shielding layer 1021.

[0058] Please see Figure 4 , Figure 4 This is a schematic diagram of a fourth embodiment of the display panel provided in this application. Figure 4 As shown, Figure 4 The display panel 10 shown is Figure 3 The difference in the display panel 10 shown is that the insulating layer 103 includes a first insulator layer 1031 and a second insulator layer 1032 stacked sequentially. The first insulator layer 1031 is located on the side of the thin-film transistor layer 102 away from the substrate 101. The second insulator layer 1032 is located on the side of the first insulator layer 1031 away from the substrate 101, and the second insulator layer 1032 extends into the second through-hole 103b.

[0059] It should be noted that the insulating layer 103 includes a first insulator layer 1031 and a second insulator layer 1032 stacked sequentially, and the second insulator layer 1032 extends into the second through hole 103b, thereby forming an undercut structure 103c in the second through hole 103b.

[0060] The first insulator layer 1031 and the second insulator layer 1032 are made of different materials. Therefore, during etching, the etching rates of the first insulator layer 1031 and the second insulator layer 1032 are different, with the second insulator layer 1032 being etched at a slower rate. This results in a portion of the structure of the second insulator layer 1032 extending into the second through hole 103b, thereby forming an undercut structure 103c within the second through hole 103b.

[0061] The first insulator layer 1031 is made of one or a combination of silicon oxide and aluminum oxide. The second insulator layer 1032 is made of one or a combination of silicon nitride and aluminum nitride. Of course, the first insulator layer 1031 and the second insulator layer 1032 can also be made of other materials, as long as, under certain conditions, the etching rate of the second insulator layer 1032 is lower than the etching rate of the first insulator layer 1031.

[0062] Specifically, pH etching, or alkaline etching, is first used to treat the insulating layer 103. Because the etching rates of the first insulator layer 1031 and the second insulator layer 1032 are the same in an alkaline environment, a first via 103a and a second via 103b are formed, facilitating the connection between the anode layer 104 and the cathode layer 105 and the thin-film transistor layer 102. Next, HF etching, also an alkaline etching, is used to treat the second via 103b of the insulating layer 103. In an acidic environment, the etching rate of the first insulator layer 1031 is greater than that of the second insulator layer 1032, causing a portion of the structure of the second insulator layer 1032 to extend into the second via 103b, thus forming an undercut structure 103c within the second via 103b.

[0063] It should be noted that when the material of the first insulator layer 1031 is silicon oxide and the material of the second insulator layer 1032 includes silicon nitride, the first insulator layer 1031 can be formed by chemical vapor deposition using gases such as SiH4 and N2O. During the formation of the first insulator layer 1031, the silicon oxide film density needs to be adjusted through the film deposition process to maximize the etching rate of the first insulator layer 1031. Simultaneously, the second insulator layer 1032 can be formed by chemical vapor deposition using gases such as SiH4, NH3, and N2. During the formation of the second insulator layer 1032, the silicon nitride film density needs to be adjusted through the film deposition process to minimize the etching rate of the second insulator layer 1032. This ensures that the etching rates of both the first and second insulator layers 1031 are greater than 10, facilitating the formation of the undercut structure 103c.

[0064] Please see Figure 5 , Figure 5 This is a schematic diagram illustrating a fifth embodiment of the display panel provided in this application. (See attached diagram.) Figure 5 As shown, Figure 5 The display panel 10 shown is Figure 4 The difference in the display panel 10 shown is that the insulating layer 103 further includes a third insulator layer 1033. The third insulator layer 1033 is located on the side of the second insulator layer 1032 away from the substrate 101.

[0065] The material of the third insulator layer 1033 is the same as that of the first insulator layer 1031. Specifically, the material of the third insulator layer 1033 includes one or a combination of aluminum oxide in silicon oxide.

[0066] The second insulator layer 1032 is typically formed using a chemical deposition method with a hydrogen-containing gas, such as SiH4, NH3, or N2. Therefore, some hydrogen from the second insulator layer 1032 may escape into nearby insulator layers and affect them. In contrast, the first insulator layer 1031 and the third insulator layer 1033 are typically formed using a chemical deposition method with a hydrogen-free gas, such as N2O. Therefore, no hydrogen from the first insulator layer 1031 and the third insulator layer 1033 will escape into nearby insulator layers and affect them.

[0067] Therefore, it should be noted that in this embodiment, by providing a third insulator layer 1033 and a first insulator layer 1031 on both sides of the second insulator layer 1032, hydrogen elements in the second insulator layer 1032 can be prevented from escaping to other nearby film layers and affecting them, thereby helping to improve the display effect of the display panel 10.

[0068] Please see Figure 6 , Figure 6 This is a schematic diagram of a sixth embodiment of the display panel provided in this application. Figure 6 The display panel 10 shown is Figure 5 The difference in the display panel 10 shown is that it further includes a passivation layer 107, a pixel definition layer 108, a color resist layer 109, and a light-emitting layer 110. The passivation layer 107 is located on the side of the insulating layer 103 away from the substrate 101. The anode layer 104 is located on the side of the passivation layer 107 away from the substrate 101, and the anode layer 104 and the cathode layer 105 sequentially penetrate the passivation layer 107 and the insulating layer 103 to connect with the thin-film transistor layer 102. The pixel definition layer 108 is located on the side of the anode layer 104 away from the substrate 101. The color resist layer 109 is disposed on the same layer as the pixel definition layer 108. The light-emitting layer 110 is located on the side of the color resist layer 109 away from the substrate 101. The cathode layer 105 is located on the side of the light-emitting layer 110 away from the substrate 101.

[0069] The display panel provided in this embodiment includes a substrate, a thin-film transistor layer, an insulating layer, an anode layer, a cathode layer, and an auxiliary cathode layer. The insulating layer has a first through-hole and a second through-hole. The cathode is connected to the thin-film transistor layer via the second through-hole, the anode layer is connected to the thin-film transistor layer via the first through-hole, and the cathode and auxiliary cathode are connected. Before conduction, a positive voltage is used to drive the auxiliary cathode layer, and a negative voltage is used to drive the cathode layer, creating a potential difference between the auxiliary cathode layer and the cathode layer. This potential difference causes Ag particles in the auxiliary cathode to migrate to the cathode, thereby reducing the voltage drop, increasing conductivity, and improving the uniformity of the display panel. Furthermore, because the insulating layer has an undercut structure within the second through-hole, the cathode and auxiliary cathode are directly connected, further reducing the conduction resistance. The auxiliary cathode layer can directly increase conductivity and improve the uniformity of the display panel.

[0070] This application also provides a method for manufacturing a display panel. Please refer to [link / reference]. Figure 7 , Figure 7 This is a schematic flowchart illustrating a method for manufacturing a display panel according to an embodiment of this application. Figure 7 As shown, the method for manufacturing a display panel provided in this application embodiment includes the following steps:

[0071] Step 201: Provide a substrate, the substrate including a first surface and a second surface disposed opposite to each other.

[0072] Step 202: Form a thin-film transistor layer on the first surface.

[0073] Step 203: An insulating layer is formed on the side of the thin film transistor layer away from the substrate. A first through-hole and a second through-hole are provided on the insulating layer, and an undercut structure is provided in the second through-hole of the insulating layer.

[0074] Please refer to Figure 8 , Figure 8 This is a schematic diagram of a sub-process of the method for manufacturing a display panel provided in an embodiment of this application. Figure 8 As shown, step 203 of the method for manufacturing a display panel provided in this application embodiment includes the following steps:

[0075] Step 2031: A first insulator layer, a second insulator layer, and a third insulator layer are sequentially formed on the thin-film transistor layer.

[0076] Please refer to Figure 9 , Figure 9 A schematic diagram of step 2031 of the method for manufacturing a display panel provided in an embodiment of this application.

[0077] Step 2032: The first insulator layer, the second insulator layer and the third insulator layer are etched for the first time using an etching process to form the first through hole and the second through hole.

[0078] Please refer to Figure 10 , Figure 10 A schematic diagram of step 2032 of the method for manufacturing a display panel provided in an embodiment of this application.

[0079] Step 2033: The first insulator layer, the second insulator layer and the third insulator layer are etched a second time using an etching process to form an undercut structure, and the undercut structure is located in the second through hole.

[0080] Please refer to Figure 11 , Figure 11 A schematic diagram of step 2033 of the method for manufacturing a display panel provided in an embodiment of this application.

[0081] In existing technologies, the insulating layer that isolates the thin-film transistor layer from other film layers is typically a silicon oxide layer. However, in this application, the insulating layer is formed by sequentially stacking a first insulator layer, a second insulator layer, and a third insulator layer. The second insulator layer is made of silicon nitride, while the first and third insulator layers are made of silicon oxide. The different etching rates of silicon oxide and silicon nitride allow for the formation of an undercut structure within the second via, facilitating the connection between the auxiliary cathode layer and the cathode layer.

[0082] Furthermore, silicon nitride is generally formed using a hydrogen-containing gas, while silicon oxide is generally formed using a hydrogen-free gas. Therefore, although some hydrogen may escape from the second insulator layer to the surrounding layers, the presence of the first and third insulator layers prevents the hydrogen from the second insulator layer from escaping to other surrounding layers.

[0083] Step 204: An anode layer is formed on the side of the insulating layer away from the substrate, and the anode layer is connected to the thin-film transistor layer through a first via.

[0084] Step 205: A cathode layer is formed on the side of the insulating layer away from the substrate. The cathode layer is connected to the thin-film transistor through a first through-hole, and a third through-hole is provided on the cathode layer. The third through-hole is located inside the second through-hole.

[0085] The method for manufacturing a display panel provided in this application includes a substrate, a thin-film transistor layer, an insulating layer, an anode layer, a cathode layer, and an auxiliary cathode layer. The insulating layer has a first through-hole and a second through-hole. The cathode is connected to the thin-film transistor layer via the second through-hole, the anode layer is connected to the thin-film transistor layer via the first through-hole, and the cathode and auxiliary cathode are connected. Before conduction, a positive voltage is used to drive the auxiliary cathode layer, and a negative voltage is used to drive the cathode layer, creating a potential difference between the auxiliary cathode layer and the cathode layer. This potential difference causes Ag particles in the auxiliary cathode to migrate to the cathode, thereby reducing the voltage drop, increasing conductivity, and improving the uniformity of the display panel. Furthermore, because the insulating layer has an undercut structure within the second through-hole, the cathode and auxiliary cathode are directly connected, further reducing the conduction resistance. The auxiliary cathode layer can directly increase conductivity and improve the uniformity of the display panel.

[0086] This application also provides a display device. Please refer to [link to relevant documentation]. Figure 12 , Figure 12 This is a schematic diagram of the structure of a display device provided in an embodiment of this application. Figure 12 As shown, the display device 100 provided in this embodiment includes a display panel 10 and a frame 20. The display panel 10 is disposed on the frame 20. The frame 20 is used to provide support for the display panel 10. The specific details of the display panel can be found in the above description, and will not be repeated here.

[0087] The display device 100 also includes a backlight module located between the frame 20 and the display panel 10. The backlight module is used to provide backlight to the display panel 10.

[0088] The above provides a detailed description of a display panel, a method for manufacturing the display panel, and a display device provided in the embodiments of this application. Specific examples have been used to illustrate the principles and implementation methods of this application. The description of the above embodiments is only for the purpose of helping to understand the method and core ideas of this application. At the same time, for those skilled in the art, there will be changes in the specific implementation methods and application scope based on the ideas of this application. Therefore, the content of this specification should not be construed as a limitation of this application.

Claims

1. A display panel, characterized by, include: Substrate, the substrate including a first surface and a second surface disposed opposite to each other; A thin-film transistor layer, wherein the thin-film transistor layer is disposed on the first surface; An insulating layer is disposed on the side of the thin-film transistor layer away from the substrate, and a first through-hole and a second through-hole are disposed on the insulating layer. An undercut structure is disposed in the second through-hole of the insulating layer; the depth of the undercut structure is greater than or equal to 0.2 micrometers. An anode layer is disposed on the side of the insulating layer away from the substrate and is connected to the thin-film transistor layer through the first through-hole; A cathode layer is disposed on the side of the insulating layer away from the substrate and is connected to the thin-film transistor layer through the first through-hole. A third through-hole is disposed on the cathode layer and is located inside the second through-hole. An auxiliary cathode layer is disposed on the side of the thin-film transistor layer away from the substrate. The auxiliary cathode layer is located within the third via and is connected to the cathode layer. The thin-film transistor layer includes a light-shielding layer and a metal layer. The light-shielding layer is made of conductive metal and is located on the first surface. The metal layer is located on the surface of the light-shielding layer away from the substrate. The auxiliary cathode layer is connected to the light-shielding layer through the metal layer, and the anode layer is connected to the light-shielding layer through the metal layer.

2. The display panel according to claim 1, characterized in that, The thin-film transistor layer further includes a buffer layer, an interlayer dielectric layer, an active layer, a gate layer, and a gate insulating layer; wherein, the buffer layer is located on the side of the light-shielding layer away from the substrate and covers the substrate, the active layer is located on the side of the buffer layer away from the substrate, the gate insulating layer is located on the side of the active layer away from the substrate, the gate layer is located on the side of the gate insulating layer away from the substrate, the interlayer dielectric layer is located on the side of the gate layer away from the substrate and covers the gate layer, the gate insulating layer, and the active layer, and the interlayer dielectric layer is provided with a first via and a second via, and the metal layer is connected to the light-shielding layer through the first via and to the active layer through the second via.

3. The display panel according to claim 1, characterized in that, The insulating layer includes a first insulator layer and a second insulator layer stacked sequentially. The first insulator layer is located on the side of the thin film transistor layer away from the substrate, and the second insulator layer is located on the side of the first insulator layer away from the substrate, with the second insulator layer extending into the second through hole.

4. The display panel according to claim 3, characterized in that, The insulating layer further includes a third insulator layer located on the side of the second insulator layer away from the substrate.

5. The display panel according to claim 4, characterized in that, The material of the first insulator layer is the same as that of the third insulator layer, and the material of the first insulator layer is different from that of the second insulator layer.

6. The display panel according to claim 5, characterized in that, The first insulator layer is made of silicon oxide, the second insulator layer is made of silicon nitride, and the third insulator layer is made of silicon oxide.

7. The display panel according to claim 1, characterized in that, The display panel further includes a passivation layer, a pixel definition layer, a color resist layer, and a light-emitting layer; wherein, the passivation layer is located on the side of the insulating layer away from the substrate, the anode layer is located on the side of the passivation layer away from the substrate, and the anode layer and the cathode layer sequentially penetrate the passivation layer and the insulating layer and are connected to the thin film transistor layer, the pixel definition layer is located on the side of the anode layer away from the substrate, and the color resist layer is disposed on the same layer as the pixel definition layer, the light-emitting layer is located on the side of the color resist layer away from the substrate, and the cathode layer is located on the side of the light-emitting layer away from the substrate.

8. A method for manufacturing a display panel, characterized in that, The manufacturing method is used to manufacture a display panel as described in any one of claims 1 to 7, the manufacturing method comprising: A substrate is provided, the substrate including a first surface and a second surface disposed opposite to each other; The thin-film transistor layer is formed on the first surface; An insulating layer is formed on the side of the thin-film transistor layer away from the substrate. A first through-hole and a second through-hole are provided on the insulating layer, and an undercut structure is provided in the second through-hole of the insulating layer. An anode layer is formed on the side of the insulating layer away from the substrate, and the anode layer is connected to the thin-film transistor layer through the first via. A cathode layer is formed on the side of the insulating layer away from the substrate. The cathode layer is connected to the thin-film transistor through the first through-hole, and a third through-hole is provided on the cathode layer, the third through-hole being located inside the second through-hole. An auxiliary cathode layer is formed on the side of the thin-film transistor layer away from the substrate. The auxiliary cathode layer is located within the third via and is connected to the cathode.

9. The method for manufacturing a display panel according to claim 8, characterized in that, The specific steps of forming an insulating layer on the side of the thin-film transistor layer away from the substrate, wherein the insulating layer has a first through-hole and a second through-hole, and wherein the insulating layer has an undercut structure within the second through-hole, include: A first insulator layer, a second insulator layer, and a third insulator layer are sequentially formed in the thin-film transistor layer; The first insulator layer, the second insulator layer and the third insulator layer are etched for the first time to form the first through hole and the second through hole; The first insulator layer, the second insulator layer, and the third insulator layer are etched a second time using an etching process to form an undercut structure, and the undercut structure is located inside the second through hole.

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