Power Quality Compensation System and Method Considering Bus and Current Peak Control

Abstract

The present disclosure provides a power quality compensation system and method that takes into account both bus and current peak control. The first-stage peak current processing unit is used to make the first command current less than or equal to the first current threshold. The second-stage peak current processing unit generates a second PWM drive signal and a second comparison value based on the sampled current and the second current threshold. The third-stage peak current processing unit generates a third PWM drive signal based on the sampled current and the third current threshold. The sampled current output by the conversion unit is compared with the second current threshold and the third current threshold respectively to control the operation of the conversion unit. Moreover, the power quality compensation system adjusts the first current threshold in real time according to the comparison result between the sampled current and the second current threshold and the comparison result between the actual DC bus voltage and the reference DC bus voltage. This power quality compensation system can reduce the possibility of triggering overcurrent and overvoltage protection and has relatively high reliability.

Description

Technical Field

[0001] The present disclosure relates to a power quality compensation system and method that takes into account both bus and current peak control, and particularly to a power quality compensation system that is not prone to overvoltage or overcurrent protection and has high reliability. Background Art

[0002] With the increase in the number of nonlinear loads connected to the power grid, the harm of harmonics and reactive current generated by nonlinear loads to power equipment in the power grid has become increasingly significant, making people pay more and more attention to the power quality of the current flowing into the power grid. The traditional method mainly uses a power quality compensation system, such as an active power filter (APF, Active Power Filter) or a static var generator (SVG, Static Var Generator), to compensate for the harmonics and reactive current generated by nonlinear loads, so as to improve the power quality of the current flowing into the power grid.

[0003] The power quality compensation system extracts the harmonic and reactive components in the nonlinear load current (or grid current), generates a current with the same magnitude and opposite direction, so as to suppress the harmonic and reactive components in the current flowing into the power grid, thereby improving the power quality of the current flowing into the power grid. The traditional power quality compensation system generally uses a double-loop control method to compensate for harmonics and reactive current. Among them, the voltage loop stabilizes the average value of the DC bus voltage in the power quality compensation system within a specific range, and the current loop is used to achieve the tracking of the output current of the power quality compensation system to the command current. The command current is determined by the output of the voltage loop and the harmonic and reactive components of the extracted nonlinear load current (or grid current).

[0004] When the traditional power quality compensation system compensates for the harmonics and reactive current generated by nonlinear loads, in order to limit the peak value of the output current of the power quality compensation system, a peak current processing unit is generally used to control both the command current of the nonlinear load (or grid) and the command current output by the voltage loop control unit in the power quality compensation system. Therefore, when the actual DC bus voltage output by the conversion unit in the power quality compensation system deviates from the reference DC bus voltage, resulting in an excessive command current output by the voltage loop control unit, the peak current processing unit will suppress the current output by the voltage loop control unit, thereby weakening the control ability of the power quality compensation system for the DC bus voltage and causing the power quality compensation system to perform frequent overvoltage protection.

[0005] In addition, in order to achieve overcurrent protection for the conversion unit within the power quality compensation system, the traditional power quality compensation system uses another peak current processing unit to detect the output current of the conversion unit and perform overcurrent protection on it. However, in some application scenarios, due to reasons such as too high peak current of the nonlinear load and too large active command of the bus voltage loop, the output current of the conversion unit is very likely to exceed the preset current threshold within the power quality compensation system, thereby triggering frequent overcurrent protection of the power quality compensation system, ultimately resulting in the power quality compensation system crashing or even exploding, which will seriously affect the reliability of the power quality compensation system.

[0006] Therefore, how to develop a power quality compensation system that can improve the above-mentioned existing technologies is an urgent need at present. Summary of the Invention

[0007] The purpose of the present disclosure is to provide a power quality compensation system and method that take into account both bus and current peak control, which can reduce the possibility of the power quality compensation system triggering overvoltage or overcurrent protection and improve its reliability.

[0008] To achieve the above object, the present disclosure provides a power quality compensation system, which is electrically coupled to a power grid and a non-linear load, and includes a first-stage peak current processing unit, a current control unit, a current threshold adjustment unit, a conversion unit, a second-stage peak current processing unit, a subtractor, a voltage loop control unit, a third-stage peak current processing unit, and a drive circuit. The first-stage peak current processing unit receives a first command current and a first current threshold to output an instantaneous current command, and the first-stage peak current processing unit is configured to make the first command current less than or equal to the first current threshold. The current control unit generates a first PWM drive signal based on the instantaneous current command and a second command current. The current threshold adjustment unit is electrically coupled to the first-stage peak current processing unit and dynamically adjusts the magnitude of the first current threshold according to one of the second command current or a first comparison value and a second comparison value. The conversion unit outputs an output current and an actual DC bus voltage according to the main drive signal. The second-stage peak current processing unit is electrically coupled between the conversion unit and the current threshold adjustment unit, and generates a second comparison value and a second PWM drive signal according to the sampled current and a second current threshold. The subtractor is electrically coupled to the conversion unit and the current threshold adjustment unit, and outputs a first comparison value according to the actual DC bus voltage and a reference DC bus voltage. The voltage loop control unit is electrically coupled to the subtractor and outputs a second command current according to the first comparison value. The third-stage peak current processing unit is electrically coupled to the conversion unit and generates a third PWM drive signal according to the comparison result between the sampled current and a third current threshold. The drive circuit is electrically coupled to the current control unit, the second-stage peak current processing unit, the third-stage peak current processing unit, and the conversion unit, and outputs a main drive signal to the conversion unit according to the first PWM drive signal, the second PWM drive signal, and the third PWM drive signal, and the conversion unit operates according to the main drive signal.

[0009] The present disclosure also provides a control method, which is applied to the above power quality compensation system. Step S1 is executed: the first-stage peak current processing unit detects the first command current and the first current threshold; step S2 is executed: the first-stage peak current processing unit makes the first command current less than or equal to the first current threshold according to the first current threshold; step S3 is executed: the second-stage peak current processing unit detects the sampled current and the second current threshold; step S4 is executed: the second-stage peak current processing unit outputs a second PWM drive signal and a second comparison value according to the sampled current and the second current threshold, the drive circuit outputs a main drive signal to control the working state of the conversion unit according to the second PWM drive signal, and the current threshold adjustment unit adjusts the first current threshold according to the second comparison value; step S5 is executed: the third-stage peak current processing unit detects the sampled current and the third current threshold; step S6 is executed: the third-stage peak current processing unit outputs a third PWM drive signal according to the sampled current and the third current threshold, and the drive circuit outputs a main drive signal to control the working state of the conversion unit according to the third PWM drive signal.

[0010] The power quality compensation system and its control method of the present disclosure can reduce the possibility of the system triggering overvoltage or overcurrent protection, and have relatively high reliability. Description of the Drawings

[0011] Figure 1 It is a schematic circuit structure diagram of the power quality compensation system according to the first preferred embodiment of the present disclosure.

[0012] Figure 2 It is a schematic circuit structure diagram of the power quality compensation system according to the second preferred embodiment of the present disclosure.

[0013] Figure 3 It is a schematic circuit structure diagram of the power quality compensation system according to the third preferred embodiment of the present disclosure.

[0014] Figure 4 It is a schematic circuit structure diagram of the power quality compensation system according to the fourth preferred embodiment of the present disclosure.

[0015] Figure 5 It is a schematic circuit structure diagram of the power quality compensation system according to the fifth preferred embodiment of the present disclosure.

[0016] Figure 6 It is a schematic circuit structure diagram of the power quality compensation system according to the sixth preferred embodiment of the present disclosure.

[0017] Figure 7 It is a schematic circuit structure diagram of the power quality compensation system according to the seventh preferred embodiment of the present disclosure.

[0018] Figure 8 It is a schematic circuit structure diagram of the power quality compensation system according to the eighth preferred embodiment of the present disclosure.

[0019] Figure 9 According to the present disclosure Figures 1 to 8 It is a flowchart of a control method for the power quality compensation system shown.

[0020] Figure 10 According to the present disclosure Figures 1 to 8 It is a flowchart of a control method for the first-stage peak current processing unit of the power quality compensation system shown.

[0021] Figure 11 According to the present disclosure Figures 1 to 8 It is a flowchart of a control method for the second-stage peak current processing unit of the power quality compensation system shown.

[0022] Figure 12 According to the present disclosure Figures 1 to 8 It is a flowchart of a control method for the third-stage peak current processing unit of the power quality compensation system shown.

[0023] Description of the Reference Numerals:

[0024] 1, 1a, 1b, 1c, 1d, 1e, 1f, 1g: Power quality compensation system

[0025] 11: First end

[0026] 12: Second end

[0027] 2: Power grid

[0028] i s : Grid current

[0029] 3: Nonlinear load

[0030] i L : Nonlinear load current

[0031] 41: First - stage peak current processing unit

[0032] 42: Current control unit

[0033] 43: Current threshold adjustment unit

[0034] 44: Conversion unit

[0035] 441: Inverter

[0036] 442: Filter

[0037] 443: First inductor

[0038] 443a: First end

[0039] 443b: Second end

[0040] 444: Second inductor

[0041] 444a: First end

[0042] 444b: Second end

[0043] 445: Capacitor

[0044] 45: Second - stage peak current processing unit

[0045] 46: Subtractor

[0046] 47: Voltage - loop control unit

[0047] 48: Third - stage peak current processing unit

[0048] 49: Driver circuit

[0049] 50: Current detection unit

[0050] 51: Adder

[0051] ih,ref : First command current

[0052] i th1 : First current threshold

[0053] i ins : Instantaneous current command

[0054] i d,ref : Second command current

[0055] i ref : Reference current command

[0056] C1: First comparison value

[0057] C2: Second comparison value

[0058] PWM1: First PWM drive signal

[0059] PWM2: Second PWM drive signal

[0060] PWM3: Third PWM drive signal

[0061] PWM4: Main drive signal

[0062] i out : Output current

[0063] i apf : Sampled current

[0064] u bus : Actual DC bus voltage

[0065] i th2 : Second current threshold

[0066] u bus,ref : Reference DC bus voltage

[0067] i th3 : Third current threshold

[0068] S1-S7, S21, S22, S41, S42, S61, S62, S81-S84: Steps Detailed implementation manners

[0069] Some typical embodiments embodying the features and advantages of the present disclosure will be described in detail in the following description. It should be understood that the present disclosure can have various changes in different embodiments, all of which do not depart from the scope of the present disclosure, and the descriptions and illustrations therein are for illustrative purposes in nature and not for limiting the present disclosure.

[0070] Figure 1 It is a schematic circuit diagram of a power quality compensation system according to the first preferred embodiment of the present disclosure. AsFigure 1 As shown, the power quality compensation system 1 of this embodiment can be, but is not limited to, an active power filter, a static var generator, or an enhanced static var generator with harmonic compensation function. The power quality compensation system 1 is electrically coupled to the power grid 2 and the nonlinear load 3. The power quality compensation system 1 has a first end 11 and a second end 12. The first end 11 of the power quality compensation system 1 is electrically coupled between the power grid 2 and the second end 12 of the power quality compensation system 1. The second end 12 of the power quality compensation system 1 is electrically coupled between the first end 11 of the power quality compensation system 1 and the nonlinear load 3. Among them, the first end 11 of the power quality compensation system 1 constitutes the output end of the power quality compensation system 1, and the second end 12 of the power quality compensation system 1 constitutes the input end of the power quality compensation system 1. The power quality compensation system 1 obtains the current value of the nonlinear load 3 through the second end 12. Specifically, the current value of the nonlinear load 3 can be obtained through a current sensor. This power quality compensation system 1 is an open-loop compensation system. In this embodiment, the power grid 2 outputs the grid current i s , and the power quality compensation system 1 outputs the output current i out . The output current i out and the grid current i s are superimposed to obtain the nonlinear load current i L .

[0071] The power quality compensation system 1 includes a first-stage peak current processing unit 41, a current control unit 42, a current threshold adjustment unit 43, a transformation unit 44, a second-stage peak current processing unit 45, a subtractor 46, a voltage loop control unit 47, a third-stage peak current processing unit 48, and a drive circuit 49. The first-stage peak current processing unit 41 is used to receive the first command current i L having the fundamental positive sequence component, fundamental negative sequence component, fundamental zero sequence component, and harmonic component in the nonlinear load current i h,ref . Among them, the first command current i h,ref is a reference current related to the nonlinear load current i L . And the first-stage peak current processing unit 41 is electrically coupled to the current threshold adjustment unit 43 to receive the first current threshold i th1 output by the current threshold adjustment unit 43. The first-stage peak current processing unit 41 is used to compare the first command current i h,ref and the first current threshold i th1 , and output the instantaneous current command i ins according to the comparison result of the first command current i h,ref and the first current threshold i th1 . The first-stage peak current processing unit 41 is used to make the first command current i h,ref less than or equal to the first current threshold i th1。

[0072] In some embodiments, the power quality compensation system 1 further includes an adder 51, which is electrically coupled to the first-stage peak current processing unit 41 and the voltage loop control unit 47 to receive the instantaneous current command i ins output by the first-stage peak current processing unit 41 and the second command current i d,ref output by the voltage loop control unit 47, and adds the instantaneous current command i ins and the second command current i d,ref to output a reference current command i ref 。The current control unit 42 is electrically coupled to the adder 51 to receive the reference current command i ins containing the instantaneous current command i d,ref and the second command current i ref in the current information, and the current control unit 42 generates a first PWM drive signal PWM1 according to the instantaneous current command i ins and the second command current i d,ref 。

[0073] The current threshold adjustment unit 43 is electrically coupled to the second-stage peak current processing unit 45, the subtractor 46, and the first-stage peak current processing unit 41 to receive the second comparison value C2 output by the second-stage peak current processing unit 45 and the first comparison value C1 output by the subtractor 46, and dynamically adjusts the magnitude of the first current threshold i th1 according to the first comparison value C1 and the second comparison value C2, and outputs the dynamically adjusted first current threshold i th1 to the first-stage peak current processing unit 41.

[0074] The conversion unit 44 is electrically coupled between the drive circuit 49 and the first end 11 of the power quality compensation system 1, and outputs an output current i out and an actual DC bus voltage u bus according to the main drive signal PWM4 output by the drive circuit 49, where the output current i out is superimposed on the grid current i s output by the grid 2 through the first end 11 of the power quality compensation system 1 to suppress harmonic and reactive components in the grid current i s , thereby improving the power quality of the grid current i s .

[0075] The second-stage peak current processing unit 45 is electrically coupled between the conversion unit 44 and the current threshold adjustment unit 43. The second-stage peak current processing unit 45 is based on the sampled current i apf output by the conversion unit 44 and the second current threshold i th2The comparison result generates a second comparison value C2 and a second PWM drive signal PWM2, and outputs the second comparison value C2 to the current threshold adjustment unit 43, where the second comparison value C2 is used to adjust the first current threshold i output by the current threshold adjustment unit 43 th1 . Additionally, in some embodiments, the second current threshold i th2 can be preset and stored in a control unit (not shown) within the power quality compensation system 1

[0076] The subtractor 46 is electrically coupled between the conversion unit 44 and the current threshold adjustment unit 43 to receive the actual DC bus voltage u output by the conversion unit 44 bus and the reference DC bus voltage u bus,ref , and outputs a first comparison value C1 to the current threshold adjustment unit 43 according to the comparison result of the actual DC bus voltage u bus and the reference DC bus voltage u bus,ref , where the first comparison value C1 is used to adjust the first current threshold i output by the current threshold adjustment unit 43 th1 .

[0077] The voltage loop control unit 47 is electrically coupled between the subtractor 46 and the adder 51 to receive the first comparison value C1 output by the subtractor 46, and outputs a second command current i d,ref to the adder 51

[0078] The third-stage peak current processing unit 48 is electrically coupled to the conversion unit 44 to receive the sampled current i output by the conversion unit 44 apf and the third current threshold i th3 , and generates a third PWM drive signal PWM3 according to the comparison result of the sampled current i apf and the third current threshold i th3 . In some embodiments, the reference DC bus voltage u bus,ref and the third current threshold i th3 can be respectively preset and stored in a control unit (not shown) within the power quality compensation system 1

[0079] The driving circuit 49 is electrically coupled to the current control unit 42, the second-stage peak current processing unit 45, the third-stage peak current processing unit 48, and the conversion unit 44 to receive the first PWM driving signal PWM1 output by the current control unit 42, the second PWM driving signal PWM2 output by the second-stage peak current processing unit 45, and the third PWM driving signal PWM3 output by the third-stage peak current processing unit 48, and output a main driving signal PWM4 to the inverter in the conversion unit 44 according to the first PWM driving signal PWM1, the second PWM driving signal PWM2, and the third PWM driving signal PWM3. The inverter in the conversion unit 44 then operates according to the main driving signal PWM4 so that the output current i out corresponds to the first command current i h,ref , preferably the current value of the output current i out is equal to the first command current i h,ref , thereby enabling the output current i out to compensate for the fundamental positive sequence component, fundamental negative sequence component, fundamental zero sequence component, and harmonic component in the grid current i s .

[0080] And in this embodiment, the first-stage peak current processing unit 41 receives the first command current i h,ref and the first current threshold i th1 to output an instantaneous current command i ins . The first-stage peak current processing unit 41 is used to confirm whether the first command current i h,ref is greater than the first current threshold i th1 . If the first command current i h,ref is greater than the first current threshold i th1 , then the absolute value of the instantaneous current command i ins output by the first-stage peak current processing unit 41 is the first current threshold i th1 . If the first command current i h,ref is less than or equal to the first current threshold i th1 , then the absolute value of the instantaneous current command i ins is the first command current i h,ref to achieve the purpose of making the first command current i h,ref less than or equal to the first current threshold i th1 .

[0081] And in this embodiment, the second PWM driving signal PWM2 output by the second-stage peak current processing unit 45 reflects that the sampled current i apf output by the conversion unit 44 is greater than or equal to the second current threshold i th2When the drive circuit 49 outputs the main drive signal PWM4 according to the second PWM drive signal PWM2 to control the conversion unit 44 to temporarily stop operating. In addition, the second comparison value C2 output by the second-stage peak current processing unit 45 reflects the sampled current i output by the conversion unit 44 apf is greater than or equal to the second current threshold i th2 the current threshold adjustment unit 43 reduces the first current threshold i output by the current threshold adjustment unit 43 according to the second comparison value C2 output by the second-stage peak current processing unit 45 th1 . At this time, if the first-stage peak current processing unit 41 confirms that the first command current i h,ref is still greater than the first current threshold i th1 , the first-stage peak current processing unit 41 will limit the first command current i h,ref .

[0082] And in this embodiment, the first comparison value C1 output by the subtractor 46 reflects the difference between the actual DC bus voltage u output by the conversion unit 44 bus and the reference DC bus voltage u bus,ref is greater than or equal to the set threshold, the current threshold adjustment unit 43 reduces the first current threshold i output by the current threshold adjustment unit 43 according to the first comparison value C1 th1 , at this time, if the first-stage peak current processing unit 41 confirms that the first command current i h,ref is still greater than the first current threshold i th1 , the first-stage peak current processing unit 41 will limit the first command current i h,ref .

[0083] In addition, the second-stage peak current processing unit 45 continuously detects the sampled current i output by the conversion unit 44 apf and the second current threshold i th2 , and the subtractor 46 continuously detects the actual DC bus voltage u output by the conversion unit 44 bus and the reference DC bus voltage u bus,ref . When the current threshold adjustment unit 43 reduces the first current threshold i th1 , the second comparison value C2 output by the second-stage peak current processing unit 45 reflects that the sampled current i output by the conversion unit 44 apf is less than the second current threshold i th2 , and the first comparison value C1 output by the subtractor 46 reflects the actual DC bus voltage u output by the conversion unit 44 bus and the reference DC bus voltage u bus,refWhen the difference is less than the set threshold, the current threshold adjustment unit 43 increases the first current threshold output by the current threshold adjustment unit 43 according to the first comparison value C1 and the second comparison value C2 ith1 , and the drive circuit 49 outputs the main drive signal PWM4 according to the second PWM drive signal PWM2 to control the conversion unit 44 to resume operation. After the current threshold adjustment unit 43 increases the first current threshold i th1 , if the first-stage peak current processing unit 41 confirms that the first command current i h,ref is greater than the first current threshold i th1 , the first-stage peak current processing unit 41 will limit the first command current i h,ref .

[0084] In addition, when the third PWM drive signal PWM3 output by the third-stage peak current processing unit 48 reflects that the sampling current i apf output by the conversion unit 44 is greater than the third current threshold i th3 , the drive circuit 49 outputs the main drive signal PWM4 according to the third PWM drive signal PWM3 to control the conversion unit 44 to be in the shutdown state.

[0085] In some embodiments, the first-stage peak current processing unit 41, the second-stage peak current processing unit 45, and the third-stage peak current processing unit 48 all work in real time, and the first current threshold i th1 is less than the second current threshold i th2 , the second current threshold i th2 is less than the third current threshold i th3 .

[0086] As can be seen from the above power quality compensation system, compared with the traditional power quality compensation system, under some harsh working conditions, the power quality compensation system 1 of the present disclosure compares the sampling current i apf with the second current threshold i th2 and the third current threshold i th3 respectively to control the operation of the conversion unit 44, and at the same time compares the first command current i h,ref with the first current threshold i th1 to achieve the purpose of making the first command current i h,ref less than or equal to the first current threshold i th1 , and the current threshold adjustment unit 43 adjusts the first current threshold i apf in real time according to the comparison result of the sampling current i th2 and the second current threshold i bus and the comparison result of the actual DC bus voltage u bus,ref and the reference DC bus voltage u th1, so that the power quality compensation system 1 avoids frequent overvoltage protection or overcurrent protection, thereby improving the reliability of the system.

[0087] As can be seen from the above, the instantaneous current instruction i output by the first-stage peak current processing unit 41 of the power quality compensation system 1 of the present disclosure is ins Only used to achieve nonlinear load current i L The first command current i h,ref Less than or equal to the first current threshold i th1 The second command current i is used to control the DC bus voltage of the conversion unit 44. d,ref The second command current i is not passed through the first-stage peak current processing unit 41, so the second command current i used to control the DC bus voltage of the conversion unit 44 is d,ref The instantaneous current command i ins The current threshold adjustment unit 43 will adjust the current according to the sampling current i apf and the second current threshold i th2 The comparison result and actual DC bus voltage u bus With reference DC bus voltage u bus,ref The comparison result adjusts the first current threshold i in real time th1 Therefore, compared with the peak current processing unit of the conventional power quality compensation system that simultaneously controls the nonlinear load current and the command current for controlling the DC bus voltage of the conversion unit, the power quality compensation system 1 of the present disclosure has a stronger control capability of the DC bus voltage and can reduce the possibility of inducing overvoltage protection, so the reliability of the power quality compensation system 1 of the present disclosure is higher. In addition, the power quality compensation system 1 of the present disclosure has a second-stage peak current processing unit 45 and a third-stage peak current processing unit 48, wherein the second-stage peak current processing unit 45 controls the sampling current i output by the conversion unit 44 according to the sampling current i apf and the second current threshold i of the conversion unit 44 th2 The third-stage peak current processing unit 48 generates a second PWM driving signal PWM2 to the driving circuit 49, and the third-stage peak current processing unit 48 converts the sampling current i output by the conversion unit 44 into a peak current. apf and the third current threshold i th3 The third PWM driving signal PWM3 is generated, so the sampling current i output by the conversion unit 44 of the present disclosure is apf and the second current threshold i of the conversion unit 44 th2 and the third current threshold i th3 The comparison is performed to control the operation of the conversion unit 44. Therefore, compared with the traditional power quality compensation system in which the current output by the conversion unit is only compared with the current threshold preset in the power quality compensation system, the power quality compensation system 1 disclosed in the present invention can reduce the possibility of triggering overcurrent protection and has higher reliability.

[0088] In some embodiments, the power quality compensation system 1 further includes a current detection unit 50. The current detection unit 50 is electrically coupled between the second end 12 of the power quality compensation system 1 and the first-stage peak current processing unit 41, and the current detection unit 50 is configured to detect the fundamental positive sequence component, fundamental negative sequence component, fundamental zero sequence component, and harmonic component of the non-linear load current i output by the non-linear load 3, and output a first command current i L to the first-stage peak current processing unit 41 according to the detection result. h,ref

[0089] Please continue to refer to Figure 1 , the conversion unit 44 includes an inverter 441 and a filter 442. The inverter 441 is electrically coupled to the drive circuit 49. The inverter 441 is configured to receive the main drive signal PWM4 output by the drive circuit 49, and then act according to the main drive signal PWM4 to correspondingly control the output current i out output by the conversion unit 44. The filter 442 includes a first inductor 443, a second inductor 444, and a capacitor 445. The first end 443a of the first inductor 443 is electrically coupled to the first end 11 of the power quality compensation system 1. The second end 443b of the first inductor 443, the first end 444a of the second inductor 444, and the first end 445a of the capacitor 445 are commonly connected. The second end 445b of the capacitor 445 and the second end 444b of the second inductor 444 are respectively electrically coupled to the inverter 441. In this embodiment, the output current i out of the conversion unit 44 is the current flowing through the first inductor 443, and the first end 444a of the second inductor 444 is electrically coupled to the second-stage peak current processing unit 45. Therefore, the sampled current i apf detected by the second-stage peak current processing unit 45 is the current flowing through the second inductor 444.

[0090] Please refer to Figure 2 , where Figure 2 is a schematic circuit diagram of the power quality compensation system according to the second preferred embodiment of the present disclosure. As Figure 2 shown, the power quality compensation system 1a of this embodiment includes a first-stage peak current processing unit 41, a current control unit 42, a current threshold adjustment unit 43, a conversion unit 44, a second-stage peak current processing unit 45, a subtractor 46, a voltage loop control unit 47, a third-stage peak current processing unit 48, and a drive circuit 49. Among them, the first-stage peak current processing unit 41, current control unit 42, current threshold adjustment unit 43, conversion unit 44, second-stage peak current processing unit 45, subtractor 46, voltage loop control unit 47, third-stage peak current processing unit 48, and drive circuit 49 of the power quality compensation system 1a are respectively connected to​Figure 1 The components shown are similar, and similar component labels represent similar component structures, operations, and functions, so they will not be elaborated here. In this embodiment, compared with Figure 1 the sampled current i detected by the second-stage peak current processing unit 45 apf which is the current flowing through the second inductor 444, the second-stage peak current processing unit 45 of this embodiment is electrically coupled to the second end 443b of the first inductor 443. Therefore, the sampled current i detected by the second-stage peak current processing unit 45 apf is the current flowing through the first inductor 443, which is the output current i of the conversion unit 44 out .

[0091] Please refer to Figure 3 , where Figure 3 is a schematic circuit diagram of the power quality compensation system according to the third preferred embodiment of the present disclosure. As Figure 3 shown, the power quality compensation system 1b of this embodiment includes a first-stage peak current processing unit 41, a current control unit 42, a current threshold adjustment unit 43, a conversion unit 44, a second-stage peak current processing unit 45, a subtractor 46, a voltage loop control unit 47, a third-stage peak current processing unit 48, and a drive circuit 49. Among them, the first-stage peak current processing unit 41, the current control unit 42, the current threshold adjustment unit 43, the conversion unit 44, the second-stage peak current processing unit 45, the subtractor 46, the voltage loop control unit 47, the third-stage peak current processing unit 48, and the drive circuit 49 of the power quality compensation system 1b are respectively connected to Figure 1 the components shown are similar, and similar component labels represent similar component structures, operations, and functions, so they will not be elaborated here. In this embodiment, the first end 11 of the power quality compensation system 1b is electrically coupled between the nonlinear load 3 and the second end 12 of the power quality compensation system 1b, and the second end 12 of the power quality compensation system 1b is electrically coupled between the first end 11 of the power quality compensation system 1b and the power grid 2. The grid current i is obtained through the second end 12 s , specifically, the grid current i can be obtained through a current sensor s , and this power quality compensation system 1b constitutes a closed-loop compensation system. In this embodiment, the current detection unit 50 is used to detect the fundamental positive sequence component, the fundamental negative sequence component, the fundamental zero sequence component, and the harmonic component in the grid current i s , and output a first command current i h,ref according to the detection result, where the first command current i h,ref is a reference current related to the grid current i s .

[0092] Please refer to Figure 4 , whereFigure 4 Schematic diagram of the circuit structure of the power quality compensation system according to the fourth preferred embodiment of the present disclosure. As shown in the figure, the power quality compensation system 1c of this embodiment includes a first-stage peak current processing unit 41, a current control unit 42, a current threshold adjustment unit 43, a conversion unit 44, a second-stage peak current processing unit 45, a subtractor 46, a voltage loop control unit 47, a third-stage peak current processing unit 48, and a drive circuit 49. Among them, the first-stage peak current processing unit 41, the current control unit 42, the current threshold adjustment unit 43, the conversion unit 44, the second-stage peak current processing unit 45, the subtractor 46, the voltage loop control unit 47, the third-stage peak current processing unit 48, and the drive circuit 49 of the power quality compensation system 1c are respectively connected to Figure 3 the components shown are similar, and the similar component numbers represent similar component structures, operations, and functions, so they will not be elaborated here. And in this embodiment, compared with Figure 3 the sampling current i detected by the second-stage peak current processing unit 45 apf is the current flowing through the second inductor 444, the second-stage peak current processing unit 45 of this embodiment is electrically coupled to the second end 443b of the first inductor 443. Therefore, the sampling current i detected by the second-stage peak current processing unit 45 apf is the current flowing through the first inductor 443, that is, the output current i of the conversion unit 44 out .

[0093] Please refer to Figure 5 , where Figure 5 Schematic diagram of the circuit structure of the power quality compensation system according to the fifth preferred embodiment of the present disclosure. As shown in the figure, the power quality compensation system 1d of this embodiment includes a first-stage peak current processing unit 41, a current control unit 42, a current threshold adjustment unit 43, a conversion unit 44, a second-stage peak current processing unit 45, a subtractor 46, a voltage loop control unit 47, a third-stage peak current processing unit 48, and a drive circuit 49. Among them, the first-stage peak current processing unit 41, the current control unit 42, the current threshold adjustment unit 43, the conversion unit 44, the second-stage peak current processing unit 45, the subtractor 46, the voltage loop control unit 47, the third-stage peak current processing unit 48, and the drive circuit 49 of the power quality compensation system 1d are respectively connected to Figure 1 the components shown are similar, and the similar component numbers represent similar component structures, operations, and functions, so they will not be elaborated here. And in this embodiment, the current threshold adjustment unit 43 is not electrically coupled to the subtractor 46 as Figure 1 shown, but is electrically coupled to the voltage loop control unit 47 to receive the second command current i output by the voltage loop control unit 47 d,ref。The current threshold adjustment unit 43 adjusts the first current threshold i dynamically according to the second comparison value C2 output by the second-stage peak current processing unit 45 and the second command current i output by the voltage loop control unit 47 d,ref , and adjusts the magnitude of the first current threshold i th1 dynamically, and outputs the dynamically adjusted first current threshold i th1 to the first-stage peak current processing unit 41. The control method is similar to that of the current threshold adjustment unit 43 of Figure 1 using the first comparison value C1, and will not be elaborated here

[0094] Please refer to Figure 6 , in which Figure 6 is a schematic circuit diagram of the power quality compensation system according to the sixth preferred embodiment of the present disclosure. As shown in the figure, the power quality compensation system 1e of this embodiment includes a first-stage peak current processing unit 41, a current control unit 42, a current threshold adjustment unit 43, a conversion unit 44, a second-stage peak current processing unit 45, a subtractor 46, a voltage loop control unit 47, a third-stage peak current processing unit 48, and a driving circuit 49. The first-stage peak current processing unit 41, the current control unit 42, the current threshold adjustment unit 43, the conversion unit 44, the second-stage peak current processing unit 45, the subtractor 46, the voltage loop control unit 47, the third-stage peak current processing unit 48, and the driving circuit 49 of the power quality compensation system 1e are respectively connected to Figure 5 the components shown are similar, and the similar component labels represent similar component structures, operations, and functions, so they will not be elaborated here. In this embodiment, compared with Figure 5 the sampling current i detected by the second-stage peak current processing unit 45 of apf is the current flowing through the second inductor 444, the second-stage peak current processing unit 45 of this embodiment is electrically coupled to the second end 443b of the first inductor 443. Therefore, the sampling current i detected by the second-stage peak current processing unit 45 apf is the current flowing through the first inductor 443, that is, the output current i of the conversion unit 44 out .

[0095] Please refer to Figure 7 , in which Figure 7 is a schematic circuit diagram of the power quality compensation system according to the seventh preferred embodiment of the present disclosure. As Figure 7As shown, the power quality compensation system 1f of this embodiment includes a first-stage peak current processing unit 41, a current control unit 42, a current threshold adjustment unit 43, a conversion unit 44, a second-stage peak current processing unit 45, a subtractor 46, a voltage loop control unit 47, a third-stage peak current processing unit 48, and a drive circuit 49. Among them, the first-stage peak current processing unit 41, current control unit 42, current threshold adjustment unit 43, conversion unit 44, second-stage peak current processing unit 45, subtractor 46, voltage loop control unit 47, third-stage peak current processing unit 48, and drive circuit 49 of the power quality compensation system 1f are respectively connected to Figure 5 components shown, and similar component numbers represent similar component structures, operations, and functions, so they will not be elaborated here. In this embodiment, the first end 11 of the power quality compensation system 1f is electrically coupled between the nonlinear load 3 and the second end 12 of the power quality compensation system 1f. The second end 12 of the power quality compensation system 1f is electrically coupled between the first end 11 of the power quality compensation system 1f and the power grid 2. The grid current i s is obtained through the second end 12. Specifically, the grid current i s can be obtained through a current sensor. This power quality compensation system 1f constitutes a closed-loop compensation system. In this embodiment, the current detection unit 50 is used to detect the fundamental positive sequence component, fundamental negative sequence component, fundamental zero sequence component, and harmonic component in the grid current i s , and outputs a first command current i h,ref according to the detection result. Among them, the first command current i h,ref is a reference current related to the grid current i s .

[0096] Please refer to Figure 8 , where Figure 8 is a schematic circuit diagram of the power quality compensation system of the eighth preferred embodiment of the present disclosure. As Figure 8 shown, the power quality compensation system 1g of this embodiment includes a first-stage peak current processing unit 41, a current control unit 42, a current threshold adjustment unit 43, a conversion unit 44, a second-stage peak current processing unit 45, a subtractor 46, a voltage loop control unit 47, a third-stage peak current processing unit 48, and a drive circuit 49. Among them, the first-stage peak current processing unit 41, current control unit 42, current threshold adjustment unit 43, conversion unit 44, second-stage peak current processing unit 45, subtractor 46, voltage loop control unit 47, third-stage peak current processing unit 48, and drive circuit 49 of the power quality compensation system 1g are respectively connected to Figure 7 components shown, and similar component numbers represent similar component structures, operations, and functions, so they will not be elaborated here. In this embodiment, compared with Figure 7The sampled current i detected by the second-stage peak current processing unit 45 apf is the current flowing through the second inductor 444. The second-stage peak current processing unit 45 of this embodiment is electrically coupled to the second end 443b of the first inductor 443. Therefore, the sampled current i detected by the second-stage peak current processing unit 45 apf is the current flowing through the first inductor 443, that is, the output current i of the conversion unit 44 out .

[0097] Please refer to Figure 9 , which is a flowchart of a control method applied to the power quality compensation system shown in the present disclosure Figures 1 to 8 . The control method of the power quality compensation system includes: performing step S1, the first-stage peak current processing unit 41 detects the first command current i h,ref and the first current threshold i th1 . Performing step S2, the first-stage peak current processing unit 41 makes the first command current i th1 less than or equal to the first current threshold i h,ref according to the first current threshold i th1 . Performing step S3, the second-stage peak current processing unit 45 detects the sampled current i apf and the second current threshold i th2 . Performing step S4, the second-stage peak current processing unit 45 outputs the second PWM drive signal PWM2 and the second comparison value C2 according to the sampled current i apf and the second current threshold i th2 . The drive circuit 49 outputs the main drive signal PWM4 according to the second PWM drive signal PWM2 to control the working state of the conversion unit 44. The current threshold adjustment unit 43 adjusts the first current threshold i th1 output by the current threshold adjustment unit 43 according to the second comparison value C2. Performing step S5, the third-stage peak current processing unit 48 detects the sampled current i apf and the third current threshold i th3 . Performing step S6, the third-stage peak current processing unit 48 outputs the third PWM drive signal PWM3 according to the sampled current i apf and the third current threshold i th3 . The drive circuit 49 outputs the main drive signal PWM4 according to the third PWM drive signal PWM3 to control the working state of the conversion unit 44. It can be understood that the flowchart shown in the accompanying drawings is only an exemplary illustration and is not necessarily executed in the described order. In some embodiments, the first-stage peak current processing unit 41, the second-stage peak current processing unit 45, and the third-stage peak current processing unit 48 all work in real time, and the first current threshold i th1 is less than the second current threshold i th2, the second current threshold value i th2 is less than the third current threshold value i th3 .

[0098] Please refer to Figure 10 , which is a flowchart of a control method for a first-stage peak current processing unit 41 applied to the power quality compensation system shown in the present disclosure. In some embodiments, the control method of the first-stage peak current processing unit 41 includes: performing step S1, the first-stage peak current processing unit 41 detects a first command current i Figures 1 to 8 h,ref and a first current threshold value i th1 . Performing step S21, the first-stage peak current processing unit 41 confirms whether the first command current i href is greater than the first current threshold value i th1 and outputs an instantaneous current command i ins according to the confirmation result by the first-stage peak current processing unit 41. If the confirmation result of step S21 is yes, then perform step S22. The absolute value of the instantaneous current command i ins output by the first-stage peak current processing unit 41 is the first current threshold value i th1 to achieve the purpose of making the first command current i h,ref less than or equal to the first current threshold value i th1 . After performing step S22, then re-perform step S1, that is, the first-stage peak current processing unit 41 detects the first command current i h,ref and the first current threshold value i th1 in real time. If the confirmation result of step S21 is no, then re-perform step S1, and the first-stage peak current processing unit 41 continues to detect the first command current i h,ref and the first current threshold value i th1 . At this time, the absolute value of the instantaneous current command i ins is the first command current i h,ref apf .

[0099] Please refer to Figure 11 , which is a flowchart of a control method for a second-stage peak current processing unit 45 applied to the power quality compensation system shown in the present disclosure. In some embodiments, the control method of the second-stage peak current processing unit 45 includes: performing step S3, the second-stage peak current processing unit 45 detects a sampled current i Figures 1 to 8 and a second current threshold value i apf and a second current threshold value i th2 . Performing step S41, the second-stage peak current processing unit 45 confirms whether the sampled current i apf is greater than or equal to the second current threshold value i th2, and output a second PWM drive signal PWM2 and a second comparison value C2 according to the confirmation result. If the confirmation result of step S41 is yes, it means that the second-stage peak current processing unit 45 confirms that the sampled current i apf is greater than or equal to the second current threshold i th2 , then step S42 is executed, and the drive circuit 49 outputs a main drive signal PWM4 according to the second PWM drive signal PWM2 to control the conversion unit 44 to temporarily stop operating. The current threshold adjustment unit 43 reduces the first current threshold i th1 output by the current threshold adjustment unit 43. After step S42 is executed or the confirmation result of step S41 is no, step S3 is re-executed, that is, the second-stage peak current processing unit 45 continuously detects the sampled current i apf and the second current threshold i th2 . At this time, if the first-stage peak current processing unit 41 confirms that the first command current i h,ref is greater than the first current threshold i th1 , the first-stage peak current processing unit 41 will limit the first command current i h,ref .

[0100] In some embodiments, the above control method further includes executing step S7: The subtractor 46 detects the actual DC bus voltage u bus and the reference DC bus voltage u bus,ref , and executes step S81: The subtractor 46 confirms whether the difference between the actual DC bus voltage u bus and the reference DC bus voltage u bus,ref is greater than or equal to a set threshold, and outputs a first comparison value C1 according to the confirmation result by the subtractor 46. If the confirmation result of step S81 is yes, it means that the subtractor 46 confirms that the difference between the actual DC bus voltage u bus and the reference DC bus voltage u bus,ref is greater than or equal to the set threshold, then step S82 is executed, and the current threshold adjustment unit 43 reduces the first current threshold i d,ref according to the first comparison value C1 output by the subtractor 46 or the second current command i th1 . If the confirmation result of step S81 is no, step S7 is re-executed.

[0101] In some embodiments, the above control method further includes: after the current threshold adjustment unit 43 reduces the first current threshold, step S83 is executed, and the second-stage peak current processing unit 45 confirms whether the sampled current i apf is less than the second current threshold i th2 , and the subtractor 46 confirms the actual DC bus voltage u bus and the reference DC bus voltage u bus,refwhether the difference is less than a set threshold. If the confirmation result in step S83 is yes, then step S84 is executed, and the current threshold adjustment unit 43 increases the first current threshold according to one of the first comparison value C1 or the second command current i d,ref and the second comparison value C2 ith1 . The drive circuit 49 outputs the main drive signal PWM4 according to the second PWM drive signal PWM2 to control the conversion unit 44 to resume operation. After step S84 is executed, step S83 is executed again. After the current threshold adjustment unit 43 increases the first current threshold i th1 , if the first-stage peak current processing unit 41 confirms that the first command current i h,ref is greater than the first current threshold i th1 , the first-stage peak current processing unit 41 will limit the first command current i h,ref .

[0102] Please refer to Figure 12 , which is the control method flowchart of the third-stage peak current processing unit 48 of the power quality compensation system shown in the present disclosure Figures 1 to 8 . In some embodiments, the control method of the third-stage peak current processing unit 48 includes: executing step S5, and the third-stage peak current processing unit 48 detects the sampled current i apf and the third current threshold i th3 . Execute step S61, and the third-stage peak current processing unit 48 confirms whether the sampled current i apf is greater than the third current threshold i th3 , and outputs the third PWM drive signal PWM3 according to the confirmation result. If the confirmation result in step S61 is yes, that is, it means that the third-stage peak current processing unit 48 confirms that the sampled current i apf is greater than the third current threshold i th3 , then step S62 is executed, and the drive circuit 49 outputs the main drive signal PWM4 according to the third PWM drive signal PWM3 to control the conversion unit 44 to be in the shutdown state. If the confirmation result in step S61 is no, that is, it means that the third-stage peak current processing unit 48 confirms that the sampled current i apf is less than or equal to the third current threshold i th3 , then step S5 is executed again.

[0103] It can be understood that all the execution steps in the above control method are only exemplary descriptions and do not have to be executed in the described order.

[0104] In summary, the instantaneous current command output by the first-stage peak current processing unit of the power quality compensation system of the present disclosure is only used to achieve the purpose of making the first command current of the non-linear load current (or grid current) less than or equal to the first current threshold, while the second command current output by the voltage loop control unit does not pass through the first-stage peak current processing unit. Therefore, the second command current used to control the DC bus voltage of the conversion unit will not be limited by the instantaneous current command output by the first-stage peak current processing unit in terms of the peak current magnitude. And the current threshold adjustment unit adjusts the first current threshold in real time according to the comparison result between the sampled current and the second current threshold and the comparison result between the actual DC bus voltage and the reference DC bus voltage. Therefore, compared with the peak current processing unit of the traditional power quality compensation system that controls both the command current of the non-linear load current (or grid current) and the command current of the DC bus voltage of the conversion unit, the DC bus voltage control ability of the conversion unit of the power quality compensation system of the present disclosure is stronger, and the possibility of triggering overvoltage protection can be reduced. Therefore, the reliability of the power quality compensation system of the present disclosure is relatively high.

[0105] In addition, the power quality compensation system of the present disclosure has a second-stage peak current processing unit and a third-stage peak current processing unit. The second-stage peak current processing unit generates a second PWM drive signal to the drive circuit according to the sampled current output by the conversion unit and the second current threshold. The third-stage peak current processing unit generates a third PWM drive signal according to the sampled current output by the conversion unit and the third current threshold. Therefore, the sampled current output by the conversion unit of the present disclosure is respectively compared with the second current threshold and the third current threshold of the conversion unit to control the operation of the conversion unit. Therefore, compared with the situation where the current output by the conversion unit in the traditional power quality compensation system is only compared with the preset current threshold in the power quality compensation system, the power quality compensation system of the present disclosure can reduce the possibility of triggering overcurrent protection and has relatively high reliability.

Claims

1. A power quality compensation system is electrically coupled to a power grid and a non-linear load, characterized in that, it includes: A first-stage peak current processing unit that receives a first command current and a first current threshold to output an instantaneous current command, and the first-stage peak current processing unit is used to make the first command current less than or equal to the first current threshold; A current control unit that generates a first PWM drive signal based on the instantaneous current command and a second command current; A current threshold adjustment unit is electrically coupled to the first-stage peak current processing unit, and dynamically adjusts the magnitude of the first current threshold according to one of the second command current or a first comparison value and a second comparison value; A conversion unit outputs an output current and an actual DC bus voltage according to a main drive signal; A second-stage peak current processing unit is electrically coupled between the conversion unit and the current threshold adjustment unit, and generates the second comparison value and a second PWM drive signal according to a sampled current and a second current threshold; A subtractor is electrically coupled to the conversion unit and the current threshold adjustment unit, and outputs the first comparison value according to the actual DC bus voltage and a reference DC bus voltage; A voltage loop control unit is electrically coupled to the subtractor, and outputs the second command current according to the first comparison value; A third-stage peak current processing unit is electrically coupled to the conversion unit, and generates a third PWM drive signal according to the comparison result between the sampled current and a third current threshold; and A drive circuit is electrically coupled to the current control unit, the second-stage peak current processing unit, the third-stage peak current processing unit and the conversion unit, and outputs the main drive signal to the conversion unit according to the first PWM drive signal, the second PWM drive signal and the third PWM drive signal, and the conversion unit operates according to the main drive signal.

2. The power quality compensation system according to claim 1, characterized in that, When the second comparison value output by the second-stage peak current processing unit reflects that the sampled current is greater than or equal to the second current threshold, the current threshold adjustment unit reduces the first current threshold according to the second comparison value output by the second-stage peak current processing unit, and when the second PWM drive signal output by the second-stage peak current processing unit reflects that the sampled current is greater than or equal to the second current threshold, the drive circuit outputs the main drive signal according to the second PWM drive signal to control the conversion unit to temporarily stop operating.

3. The power quality compensation system according to claim 2, characterized in that, After the current threshold adjustment unit reduces the first current threshold, when the second comparison value output by the second-stage peak current processing unit reflects that the sampled current is less than the second current threshold, and the first comparison value output by the subtractor reflects that the difference between the actual DC bus voltage and the reference DC bus voltage is less than a set threshold, the current threshold adjustment unit increases the first current threshold according to one of the first comparison value or the second command current and the second comparison value. When the second PWM drive signal output by the second-stage peak current processing unit reflects that the sampled current is less than the second current threshold, the drive circuit outputs a main drive signal according to the second PWM drive signal to control the conversion unit to resume operation.

4. The power quality compensation system according to claim 1, wherein, when the first comparison value output by the subtractor reflects that the difference between the actual DC bus voltage and the reference DC bus voltage is greater than or equal to a set threshold, the current threshold adjustment unit reduces the first current threshold according to the first comparison value or the second command current.

5. The power quality compensation system according to claim 4, wherein, After the current threshold adjustment unit reduces the first current threshold, when the second comparison value output by the second-stage peak current processing unit reflects that the sampled current is less than the second current threshold, and the first comparison value output by the subtractor reflects that the difference between the actual DC bus voltage and the reference DC bus voltage is less than the set threshold, the current threshold adjustment unit increases the first current threshold according to one of the first comparison value or the second command current and the second comparison value. When the second PWM drive signal output by the second-stage peak current processing unit reflects that the sampled current is less than the second current threshold, the drive circuit outputs a main drive signal according to the second PWM drive signal to control the conversion unit to resume operation.

6. The power quality compensation system according to claim 1, wherein, when the third PWM drive signal output by the third-stage peak current processing unit reflects that the sampled current is greater than the third current threshold, the drive circuit outputs the main drive signal according to the third PWM drive signal to control the conversion unit to be in a shutdown state.

7. The power quality compensation system according to claim 1, wherein, the conversion unit includes an inverter and a filter. The inverter is electrically coupled to the drive circuit. The filter includes a first inductor, a second inductor, and a capacitor. A second end of the first inductor, a first end of the second inductor, and a first end of the capacitor are commonly connected. A second end of the capacitor, a second end of the second inductor, and the inverter are connected. A first end of the first inductor is connected to an output end of the power quality compensation system.

8. The power quality compensation system according to claim 7, wherein, The output current is the current flowing through the first inductor, and the sampled current is the current flowing through the first inductor or the current flowing through the second inductor.

9. The power quality compensation system according to claim 1, wherein, the power grid has a grid current, the nonlinear load has a nonlinear load current, and the first command current is a reference current related to the grid current or a reference current related to the nonlinear load current.

10. The power quality compensation system according to claim 9, wherein, the power quality compensation system further includes a current detection unit, which is electrically coupled to the first-stage peak current processing unit, and is used to detect the fundamental positive-sequence component, fundamental negative-sequence component, fundamental zero-sequence component and harmonic component in the grid current or the nonlinear load current, and output the first command current to the first-stage peak current processing unit according to the detection result.

11. The power quality compensation system according to claim 1, wherein, the power quality compensation system further includes an adder, which is electrically coupled to the first-stage peak current processing unit, the voltage loop control unit and the current control unit, and is used to add the instantaneous current command and the second command current to output a reference current command to the current control unit.

12. The power quality compensation system according to claim 1, wherein, the first-stage peak current processing unit, the second-stage peak current processing unit and the third-stage peak current processing unit work in real time, the first current threshold is less than the second current threshold, and the second current threshold is less than the third current threshold.

13. The power quality compensation system according to claim 1, wherein, the power quality compensation system is an active power filter, a static var generator or an enhanced static var generator with harmonic compensation function.

14. A control method is applied to the power quality compensation system according to any one of claims 1-13, wherein the control method includes: Step S1: The first-stage peak current processing unit detects the first command current and the first current threshold; Step S2: The first-stage peak current processing unit makes the first command current less than or equal to the first current threshold according to the first current threshold; Step S3: The second-stage peak current processing unit detects the sampled current and the second current threshold; Step S4: The second-stage peak current processing unit outputs the second PWM drive signal and the second comparison value according to the sampled current and the second current threshold, the drive circuit outputs the main drive signal according to the second PWM drive signal to control the working state of the conversion unit, and the current threshold adjustment unit adjusts the first current threshold according to the second comparison value; Step S5: The third-stage peak current processing unit detects the sampled current and the third current threshold; and Step S6: The third-stage peak current processing unit outputs the third PWM driving signal according to the sampled current and the third current threshold, and the driving circuit outputs the main driving signal according to the third PWM driving signal to control the operating state of the conversion unit.

15. The control method according to claim 14, wherein, the first-stage peak current processing unit, the second-stage peak current processing unit, and the third-stage peak current processing unit operate in real time, the first current threshold is less than the second current threshold, and the second current threshold is less than the third current threshold.

16. The control method according to claim 14, wherein, Step S2 includes: Step S21: The first-stage peak current processing unit determines whether the first command current is greater than the first current threshold, and outputs the instantaneous current command according to the result by the first-stage peak current processing unit; and Step S22: If the first-stage peak current processing unit determines that the first command current is greater than the first current threshold, the absolute value of the instantaneous current command output by the first-stage peak current processing unit is the first current threshold, achieving the purpose of limiting the first command current.

17. The control method according to claim 14, wherein, Step S4 includes: Step S41: The second-stage peak current processing unit determines whether the sampled current is greater than or equal to the second current threshold, and outputs the second PWM driving signal PWM2 and the second comparison value according to the determination result; and Step S42: If the second-stage peak current processing unit determines that the sampled current is greater than or equal to the second current threshold, the driving circuit outputs the main driving signal according to the second PWM driving signal to control the conversion unit to temporarily stop operating, and the current threshold adjustment unit reduces the first current threshold output by the current threshold adjustment unit according to the second comparison value.

18. The control method according to claim 17, wherein, after the current threshold adjustment unit reduces the first current threshold, the control method further includes: Step S83: The second-stage peak current processing unit determines whether the sampled current is less than the second current threshold, and the subtractor determines whether the difference between the actual DC bus voltage and the reference DC bus voltage is less than a set threshold; and Step S84: If the second-stage peak current processing unit determines that the sampled current is less than the second current threshold, and the difference between the actual DC bus voltage and the reference DC bus voltage is less than the set threshold, the current threshold adjustment unit increases the first current threshold according to one of the first comparison value or the second command current and the second comparison value, and the driving circuit outputs the main driving signal according to the second PWM driving signal to control the conversion unit to resume operating.

19. The control method according to claim 14, wherein, the control method further includes: Step S7: The subtractor detects the actual DC bus voltage and the reference DC bus voltage; Step S81: The subtractor confirms whether the difference between the actual DC bus voltage and the reference DC bus voltage is greater than or equal to a set threshold value, and outputs the first comparison value according to the confirmation result; and Step S82: If the subtractor confirms that the difference is greater than or equal to the set threshold value, the current threshold adjustment unit reduces the first current threshold according to the first comparison value or the second command current.

20. The control method according to claim 19, characterized in that after the current threshold adjustment unit reduces the first current threshold, the control method further includes: Step S83: The second-stage peak current processing unit confirms whether the sampled current is less than the second current threshold, and the subtractor confirms whether the difference between the actual DC bus voltage and the reference DC bus voltage is less than the set threshold value; and Step S84: If the second-stage peak current processing unit confirms that the sampled current is less than the second current threshold, and the difference between the actual DC bus voltage and the reference DC bus voltage is less than the set threshold value, the current threshold adjustment unit increases the first current threshold according to one of the first comparison value or the second command current and the second comparison value, and the drive circuit outputs a main drive signal according to the second PWM drive signal to control the conversion unit to resume operation.

21. The control method according to claim 14, characterized in that the step S6 includes: Step S61: The third-stage peak current processing unit confirms whether the sampled current is greater than the third current threshold, and outputs the third PWM drive signal according to the confirmation result; and Step S62: If the third-stage peak current processing unit confirms that the sampled current is greater than the third current threshold, the drive circuit outputs the main drive signal according to the third PWM drive signal to control the conversion unit to be in the shutdown state.

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