Amplifier

Abstract

An amplifier includes an amplifier circuit and a gain adjustment circuit. The amplifier circuit has a designed gain and an actual gain, and is used to output an output signal based on an input signal and the actual gain. The gain adjustment circuit is coupled to the amplifier circuit and is used to receive the input signal and compare a voltage of the input signal with a first reference voltage, wherein when the voltage of the input signal exceeds the first reference voltage, the gain adjustment circuit increases the actual gain of the amplifier circuit, bringing the actual gain closer to the designed gain.

Description

Technical Field

[0001] This invention relates to an amplifier, and more particularly to an amplifier with a gain adjustment circuit. Background Technology

[0002] Generally, assuming an amplifier circuit has a gain of 0dB, when the input signal is small (e.g., 70mV), the output signal is approximately equal to the input signal. However, when the input signal is large (e.g., 1000mV), due to the characteristics of the transistors in the amplifier circuit, the gain is difficult to maintain at 0dB, resulting in an output signal smaller than the input signal. In short, when receiving large input signals, traditional amplifier circuits often suffer from nonlinear amplification, causing the downstream circuitry to receive distorted signals. Therefore, it is necessary to improve traditional amplifier circuits. Summary of the Invention

[0003] One embodiment of the present invention is an amplifier. The amplifier includes an amplifier circuit and a gain adjustment circuit. The amplifier circuit has a designed gain and an actual gain, and is used to output an output signal based on an input signal and the actual gain. The gain adjustment circuit is coupled to the amplifier circuit and is used to receive the input signal and compare a voltage of the input signal with a first reference voltage, wherein when the voltage of the input signal exceeds the first reference voltage, the gain adjustment circuit increases the actual gain of the amplifier circuit, bringing the actual gain closer to the designed gain.

[0004] In summary, through the design of the gain adjustment circuit, the amplifier of this invention can adjust the actual gain of the amplifier circuit when the input signal exceeds the first reference voltage, so that the actual gain is closer to the original design gain of the amplifier circuit. In this way, the amplifier can maintain the same gain when receiving input signals of different magnitudes (that is, even if affected by transistor characteristics, the amplifier can still maintain the linearity of amplification), so that the downstream circuit can receive undistorted signals. Attached Figure Description

[0005] Figure 1 A block diagram of an amplifier is shown for some embodiments of the present invention.

[0006] Figure 2 The diagram illustrates the design gain, actual gain before adjustment, and actual gain after adjustment of an amplifier circuit in an amplifier, according to a partial embodiment of the present invention.

[0007] Figure 3 A circuit diagram of an amplifier is shown for some embodiments of the present invention.

[0008] Figure 4 A circuit diagram of an amplifier is shown for some embodiments of the present invention.

[0009] Figure 5 A circuit diagram of another amplifier is shown for other embodiments of the present invention.

[0010] Figure 6 A circuit diagram of another amplifier is shown for other embodiments of the present invention.

[0011] Figure 7 A circuit diagram of another amplifier is shown for other embodiments of the present invention. Detailed Implementation

[0012] The following detailed description uses examples and accompanying drawings. However, the specific embodiments described are only for explaining this case and are not intended to limit this case. The description of the structural operations is not intended to limit the order of their execution. Any structure that is recombined from components and produces a device with equivalent function is within the scope of this invention.

[0013] Unless otherwise specified, the terms used throughout the specification and the scope of the patent application generally have their ordinary meaning in the context of the art, the invention, and the specific content.

[0014] In addition, the terms "coupled" or "connected" as used in this article can refer to two or more components making direct physical or electrical contact with each other, or making indirect physical or electrical contact with each other, or to two or more components operating or moving with each other.

[0015] Please see Figure 1 One embodiment of the present invention relates to an amplifier 100. The amplifier 100 includes an amplifier circuit 102 and a gain adjustment circuit 104.

[0016] In this embodiment, the amplifier circuit 102 is designed to have a design gain Ad. Please refer to [further details omitted]. Figure 2 Ideally, amplifier circuit 102 outputs an output signal Vout based on an input signal Vin and a design gain Ad, and the relationship between the input signal Vin and the output signal Vout is linear. For example, regardless of how the magnitude of the input signal Vin changes, dividing the magnitude of the output signal Vout by the magnitude of the input signal Vin will always yield the design gain Ad.

[0017] In practical applications, amplifier circuit 102 outputs an output signal Vout based on the input signal Vin and an actual gain Ar. However, when the magnitude of the input signal Vin exceeds a first reference voltage Vref, the relationship between the input signal Vin and the output signal Vout cannot be maintained linearly due to the characteristics of the transistor. Specifically, when the magnitude of the input signal Vin (e.g., 70mV) does not exceed the first reference voltage Vref (e.g., 500mV), the actual gain Ar is roughly equal to the design gain Ad. However, when the magnitude of the input signal Vin (e.g., 1000mV) exceeds the first reference voltage Vref, the actual gain Ar becomes smaller than the design gain Ad, and as the magnitude of the input signal Vin increases, the gap between the actual gain Ar and the design gain Ad also increases.

[0018] Specifically, amplifier circuit 102 can be a differential amplifier, and the input signal Vin can be a differential signal. Please refer to [link / reference]. Figure 3 The amplifier circuit 102 includes a first amplifying transistor 121, a second amplifying transistor 122, a first current source 123, a second current source 124, a first impedance component Z1, a second impedance component Z2, and a third impedance component Z3. The input signal Vin has a positive input signal Vin+ and a negative input signal Vin-.

[0019] The control terminal (e.g., gate) of the first amplifying transistor 121 is coupled to the negative input terminal of the amplifier circuit 102 and is used to receive the negative input signal Vin-. The control terminal (e.g., gate) of the second amplifying transistor 122 is coupled to the positive input terminal of the amplifier circuit 102 and is used to receive the positive input signal Vin+. The first terminal (e.g., drain) of the first amplifying transistor 121 is coupled to the positive output terminal of the amplifier circuit 102, and the first terminal (e.g., drain) of the second amplifying transistor 122 is coupled to the negative output terminal of the amplifier circuit 102. The two ends of the first impedance component Z1 are coupled to the second terminal (e.g., source) of the first amplifying transistor 121 and the second terminal (e.g., source) of the second amplifying transistor 122, respectively. The two ends of the second impedance component Z2 are coupled to the first terminal of the first amplifying transistor 121 and a system high voltage Vcc, respectively. The two ends of the third impedance component Z3 are coupled to the first terminal of the second amplifying transistor 122 and the system high voltage Vcc, respectively. The first current source 123 is coupled to the second terminal of the first amplifying transistor 121 and a ground voltage GND, and is used to provide a first bias current Ibias1. The second current source 124 is coupled to the second terminal of the second amplifying transistor 122 and the ground voltage GND, and is used to provide a second bias current Ibias2.

[0020] For example Figure 1As shown, the gain adjustment circuit 104 is coupled to the amplifier circuit 102. In this embodiment, the gain adjustment circuit 104 includes a comparator 141 and a processing circuit 143. The comparator 141 is coupled to the positive and negative input terminals of the amplifier circuit 102, the processing circuit 143 is coupled to the output terminal of the comparator 141, and the output terminal of the processing circuit 143 is coupled to the first impedance component Z1 of the amplifier circuit 102.

[0021] In operation, comparator 141 receives the input signal Vin and the first reference voltage Vref input to amplifier circuit 102, and compares the voltage of the input signal Vin with the first reference voltage Vref. Specifically, the first reference voltage Vref includes a positive first reference voltage Vref+ and a negative first reference voltage Vref-. Comparator 141 compares the voltage of the positive input signal Vin+ with the positive first reference voltage Vref+, and compares the voltage of the negative input signal Vin- with the negative first reference voltage Vref-. When it detects that the voltage of the positive input signal Vin+ (e.g., 600mV) is greater than the positive first reference voltage Vref+ (e.g., 500mV) and the voltage of the negative input signal Vin- (e.g., -600mV) is less than the negative first reference voltage Vref- (e.g., -500mV), comparator 141 outputs a detection signal DS to processing circuit 143.

[0022] In this embodiment, the processing circuit 143 is used to reduce the resistance value of the first impedance component Z1 according to the detected signal DS. Based on the small-signal model, the gain of the amplifier circuit 102 satisfies the following formula (1):

[0023] Ar=gm*Rd / (1+gm*Rs / 2)…(1)

[0024] Where Ar is the actual gain of amplifier circuit 102, gm is the transconductance of the first amplifying transistor 121 or the second amplifying transistor 122, Rd is the resistance value of the second impedance component Z2 or the third impedance component Z3, and Rs is the resistance value of the first impedance component Z1.

[0025] Therefore, when the processing circuit 143 reduces the resistance value of the first impedance component Z1, the actual gain Ar of the amplifier circuit 102 will increase, and the actual gain Ad will approach the design gain Ad. In other words, when the comparator 141 detects that the voltage of the input signal Vin exceeds the first reference voltage Vref (at this time, the actual gain Ar will be less than the design gain Ad due to the influence of transistor characteristics), the processing circuit 143 will reduce the resistance value of the first impedance component Z1 to increase the actual gain Ar of the amplifier circuit 102, thereby making the actual gain Ar closer to the design gain Ad.

[0026] In another embodiment, in addition to the input signal Vin and the first reference voltage Vref, comparator 141 is also used to receive a second reference voltage (not shown) greater than the first reference voltage Vref. After the processing circuit 143 increases the actual gain Ar of the amplifier circuit 102, if the voltage of the input signal Vin increases again and exceeds the second reference voltage, comparator 141 will output a detection signal DS to the processing circuit 143 again, causing the processing circuit 143 to reduce the resistance value of the first impedance component Z1 again, so as to increase the actual gain Ar of the amplifier circuit 102 again. It is understood that comparator 141 can receive more reference voltages as needed (e.g., a third reference voltage (not shown) greater than the second reference voltage) so that the processing unit 143 can continuously increase the actual gain Ar of the amplifier circuit 102 as the magnitude of the input signal Vin increases. In this way, the adjusted actual gain Ar' (e.g., Figure 2 As shown, the actual gain Ar will have higher linearity compared to the original gain before adjustment.

[0027] Please refer to the following: Figure 3 and Figure 4 Specifically, the first impedance component Z1 in the amplifier circuit 102 includes a plurality of first transistors M1a to M1c, a plurality of first resistors R1a to R1c, and a plurality of second resistors R2a to R2c. The first terminals (e.g., drains) of the first transistors M1a to M1c are coupled to the second terminals of the second amplifying transistor 122 and the second current source 124 via the second resistors R2a to R2c. The second terminals (e.g., sources) of the first transistors M1a to M1c are coupled to the second terminals of the first amplifying transistor 121 and the first current source 123 via the first resistors R1a to R1c. The processing circuit 143 in the gain adjustment circuit 104 is coupled to the control terminals (e.g., gates) of the first transistors M1a to M1c.

[0028] Assuming that only the first transistor M1a is in the on state before the processing unit 143 receives the detection signal DS, at this time, the first transistors M1b to M1c are in the off state, and the equivalent resistance of the first impedance component Z1 is approximately equal to the resistance of the first resistor R1a plus the resistance of the second resistor R2a. When the detection signal DS is received, the processing circuit 143 can output a plurality of first control signals CS1 to the control terminals of the first transistors M1a to M1c, keeping the first transistor M1a in the on state and switching the first transistors M1b to M1c from the off state to the on state. In this way, the equivalent resistance of the first impedance component Z1 will be reduced because the three sets of series resistors (first resistor R1a and second resistor R2a, first resistor R1b and second resistor R2b, and first resistor R1c and second resistor R2c) are connected in parallel.

[0029] In another embodiment, the first impedance component Z1 may consist only of the first transistor M1a (i.e., Figure 4 The first transistors M1b-M1c, the first resistors R1a-R1c, and the second resistors R2a-R2c are omitted. The first terminal of the first transistor M1a is coupled to the second terminal of the second amplifying transistor 122 and the second current source 124. The second terminal of the first transistor M1a is coupled to the second terminal of the first amplifying transistor 121 and the first current source 123. The processing circuit 143 is coupled to the control terminal of the first transistor M1a. It is worth noting that the first transistor M1a is biased in the linear region (or ohmic region). Thus, when the detection signal DS is received, the processing circuit 143 can control the voltage level of the first control signal CS1 output to the control terminal of the first transistor M1a, reducing the equivalent resistance value of the first impedance component Z1 (because the first transistor M1a biased in the linear region behaves like a voltage-controlled resistor).

[0030] In another embodiment, upon receiving the detection signal DS, the processing circuit 143 outputs a plurality of third control signals (not shown) to adjust the resistance values ​​of the second impedance component Z2 and the third impedance component Z3, thereby increasing the actual gain Ar of the amplifier circuit 102. Based on the aforementioned formula (1), when the resistance values ​​of the second impedance component Z2 and the third impedance component Z3 are increased by the adjustment of the processing circuit 143, the actual gain Ar of the amplifier circuit 102 will increase, approaching the conventional design gain Ad. Specifically, the second impedance component Z2 and the third impedance component Z3 can be implemented with variable resistors, or with transistors as in the case of the first impedance component Z1, which will not be elaborated here.

[0031] Please see Figure 5 , Figure 5A circuit diagram of amplifier 200, according to another embodiment of the present invention, is provided. Components in amplifier 200 that are the same as or similar to those in amplifier 100 (e.g., comparator 141 and processing circuit 143 in gain adjustment circuit 104, first amplifying transistor 121, and second amplifying transistor 122) will not be described again. During operation of amplifier 200, processing circuit 143 adjusts the first bias current Ibias1 provided by first current source 223 and the second bias current Ibias2 provided by second current source 224 according to the detection signal DS, thereby increasing the actual gain Ar of amplifier circuit 102. Specifically, the first current source 223 includes a first current mirror (composed of second transistors M2a and M2b), a second current mirror (composed of second transistors M2a and M2c), and a third current mirror (composed of second transistors M2a and M2d). The output terminal Mo1 of the first current mirror is directly coupled to the second terminal of the first amplifying transistor 121, while the output terminals Mo2 of the second current mirror and Mo3 of the third current mirror are coupled to the second terminal of the first amplifying transistor 121 through the first switching components SW1 and SW2, respectively.

[0032] Assuming that before the processing unit 143 receives the detection signal DS, only the first current mirror provides a first current I1 based on a first reference current Iref. In this case, the first bias current Ibias1 provided by the first current source 223 is the first current I1. When the detection signal DS is received, the processing circuit 143 in the gain adjustment circuit 104 can output a plurality of second control signals CS2 to the first switching components SW1 and SW2 to turn on the output terminal Mo2 of the second current mirror and the second terminal of the first amplifying transistor 121, and to turn on the output terminal Mo3 of the third current mirror and the second terminal of the first amplifying transistor 121. In this way, the first current I1, the second current I2 (provided by the second current mirror based on the first reference current Iref), and the third current I3 (provided by the third current mirror based on the first reference current Iref) are simultaneously provided, increasing the first bias current Ibias1 provided by the first current source 223. It is understood that the second current source 224 can be implemented with a plurality of current mirrors (not shown in the figure), just like the first current source 223, and will not be elaborated here.

[0033] Since the transconductance gm of the first amplifying transistor 121 (or the second amplifying transistor 122) is proportional to the square root of the first bias current Ibias1 (or the second bias current Ibias2), when the first bias current Ibias1 (or the second bias current Ibias2) is increased by the adjustment of the processing circuit 143, the transconductance gm of the first amplifying transistor 121 (or the second amplifying transistor 122) will increase. Therefore, based on the aforementioned formula (1), when the transconductance gm of the first amplifying transistor 121 (or the second amplifying transistor 122) increases, the actual gain Ar of the amplifier circuit 102 will increase, and the previously designed gain Ad will be closer to the expected value.

[0034] Please see Figure 6 , Figure 6 A circuit diagram of amplifier 300, according to another embodiment of the present invention, is provided. Components in amplifier 300 that are the same as or similar to those in amplifier 100 will not be described again. During the operation of amplifier 300, processing circuit 143 adjusts the first bias current Ibias1 provided by first current source 323 and the second bias current Ibias2 provided by second current source 324 according to the detection signal DS, thereby increasing the actual gain Ar of amplifier circuit 102. Specifically, the first current source 323 includes a first current mirror (composed of second transistors M2e and M2f) and a first variable resistor Rv1. The output terminal Mo1 of the first current mirror is directly coupled to the second terminal of the first amplifying transistor 121, while the first variable resistor Rv1 is coupled to the input terminal Mi1 of the first current mirror and the system high voltage Vcc.

[0035] When the detection signal DS is received, the processing circuit 143 outputs a second control signal CS2 to the first variable resistor Rv1 to reduce the resistance value of the first variable resistor Rv1, thereby increasing the first reference current Iref flowing into the input terminal Mi1 of the first current mirror. The first current mirror increases the supply of the first current I1 based on the increased first reference current Iref, thus increasing the first bias current Ibias1 provided by the first current source 323. In this way, the actual gain Ar of the amplifier circuit 102 will increase, approaching the previously designed gain Ad. It is understood that the second current source 324 can be implemented with a second current mirror (not shown) and a second variable resistor (not shown), just like the first current source 323, and will not be elaborated here.

[0036] Please see Figure 7 , Figure 7A circuit diagram of an amplifier 400 according to another embodiment of the present invention is provided, wherein components in amplifier 400 that are the same as or similar to those in the foregoing embodiment will not be described again. The amplifier circuit 402 in amplifier 400 is a single-ended amplifier, wherein the first impedance component Z1 is coupled to the second terminal of the first amplifying transistor 121 and the ground voltage GND. During the operation of amplifier 400, when processing circuit 143 receives detection signal DS, processing circuit 143 outputs a first control signal CS1 to adjust the resistance value of the first impedance component Z1, thereby increasing the actual gain Ar of amplifier circuit 502, which is closer to the conventionally designed gain Ad. It is understood that processing circuit 143 in amplifier 400 can also be used to output a second control signal (not shown) to adjust the first bias current Ibias1 provided by the first current source 123, or to output a third control signal (not shown) to adjust the resistance value of the second impedance component Z2.

[0037] In this embodiment, the first amplifying transistor 121, the second amplifying transistor 122, the first transistors M1a-M1c, and the second transistors M2a-M2f are N-type metal-oxide-semiconductor (MODS). However, the present invention is not limited thereto. In other embodiments, the first amplifying transistor 121, the second amplifying transistor 122, the first transistors M1a-M1c, and the second transistors M2a-M2f may also be implemented using P-type MODS or bipolar transistors.

[0038] In summary, through the design of the gain adjustment circuit 104, the amplifiers 100-400 of this invention can adjust the actual gain Ar of amplifier circuits 102 and 402 when the input signal Vin exceeds the first reference voltage Vref, so that the actual gain Ar is closer to the original design gain Ad of amplifier circuits 102 and 402. In this way, amplifiers 100-400 can maintain the same gain when receiving input signals Vin of different magnitudes (that is, even if affected by transistor characteristics, amplifiers 100-400 can still maintain the linearity of amplification), so that the downstream circuits can receive undistorted signals.

[0039] Although the present invention has been disclosed above through embodiments, it is not intended to limit the scope of the invention. Those skilled in the art can make various modifications and refinements without departing from the spirit and scope of the invention. Therefore, the scope of protection of the present invention should be defined in accordance with the appended claims.

[0040] Explanation of reference numerals in the attached figures:

[0041] 100, 200, 300, 400: Amplifiers

[0042] 102, 402: Amplifier circuit

[0043] 104: Gain Adjustment Circuit

[0044] 121: First amplifying transistor

[0045] 122: Second amplifying transistor

[0046] 123, 223, 323: First current source

[0047] 124, 224, 324: Second current source

[0048] 141: Comparator

[0049] 143: Processing Circuit

[0050] Vin: Input signal

[0051] Vin+: Positive input signal

[0052] Vin-: Negative input signal

[0053] Vout: Output signal

[0054] Vref: First reference voltage

[0055] Vref+: Positive first reference voltage

[0056] Vref-: Negative first reference voltage

[0057] Vcc: System high voltage

[0058] GND: Grounding voltage

[0059] Ar,Ar': Actual gain

[0060] Ad: Design Gain

[0061] Z1: First impedance component

[0062] Z2: Second impedance component

[0063] Z3: Third Impedance Component

[0064] M1a, M1b, M1c: First transistor

[0065] R1a, R1b, R1c: First resistor

[0066] R2a, R2b, R2c: Second resistors

[0067] M2a, M2b, M2c, M2d, M2e, M2f: Second transistor

[0068] Mi1: Input terminal

[0069] Mo1, Mo2, Mo3: Output terminals

[0070] SW1, SW2: First switch assembly

[0071] Rv1: First variable resistor

[0072] Iref: First reference current

[0073] I1: First current

[0074] I2: Second current

[0075] I3: Third Current

[0076] DS: Detection signal

[0077] CS1: First control signal

[0078] CS2: Second control signal

[0079] Ibias1: First bias current

[0080] Ibias2: Second bias current

Claims

1. An amplifier, comprising: An amplifier circuit has a design gain and an actual gain, and is used to output an output signal based on an input signal and the actual gain. The amplifier circuit includes an amplifying transistor and a current source. The current source is coupled to a second terminal of the amplifying transistor and is used to provide a bias current. The current source includes a first current mirror and a second current mirror. An output terminal of the first current mirror is coupled to the second terminal of the amplifying transistor and is used to provide a first current based on a reference current. An output terminal of the second current mirror is coupled to the second terminal of the amplifying transistor via a switching assembly, and the second current mirror is used to output a second current based on the reference current. A gain adjustment circuit is coupled to the amplifier circuit and is used to receive the input signal to compare a voltage of the input signal with a first reference voltage. Wherein, when the voltage of the input signal exceeds the first reference voltage, the gain adjustment circuit increases the actual gain of the amplifier circuit, so that the actual gain is closer to the design gain; The gain adjustment circuit is coupled to the switching assembly and is used to turn on the output terminal of the second current mirror and the second terminal of the amplifying transistor by outputting a second control signal to the switching assembly, so that the first current and the second current are provided simultaneously, thereby increasing the bias current provided by the current source and thus improving the actual gain of the amplifier circuit.

2. The amplifier according to claim 1, characterized in that, The amplifier circuit further includes a first impedance component. A control terminal of the amplifying transistor is used to receive the input signal. A first terminal of the amplifying transistor is coupled to an output terminal of the amplifier circuit, and a second terminal of the amplifying transistor is coupled to the first impedance component.

3. The amplifier according to claim 2, characterized in that, The first impedance component includes a first transistor, a first terminal or a second terminal of the first transistor is coupled to the second terminal of the amplifying transistor, and the gain adjustment circuit is coupled to a control terminal of the first transistor and is used to output a first control signal to the control terminal of the first transistor to reduce the resistance value of the first impedance component, thereby increasing the actual gain of the amplifier circuit.

4. The amplifier according to claim 3, characterized in that, The first impedance component further includes a first resistor, which is coupled to either the first terminal or the second terminal of the first transistor.

5. The amplifier according to claim 1, characterized in that, The gain adjustment circuit includes a comparator and a processing circuit. The comparator is used to receive the input signal and the first reference voltage. When the voltage of the input signal exceeds the first reference voltage, the comparator is used to output a detection signal to the processing circuit. The processing circuit is used to increase the actual gain of the amplifier circuit according to the detection signal.

6. The amplifier according to claim 1, characterized in that, The gain adjustment circuit is also used to compare the voltage of the input signal with a second reference voltage that is greater than the first reference voltage. When the voltage of the input signal exceeds the second reference voltage, the gain adjustment circuit increases the actual gain of the amplifier circuit again.

7. The amplifier according to claim 1, characterized in that, The amplifier circuit further includes another amplifying transistor and a first impedance component. The input signal has a positive input signal and a negative input signal. A control terminal of the amplifying transistor is used to receive the negative input signal. A first terminal of the amplifying transistor is coupled to a positive output terminal of the amplifier circuit. A control terminal of the other amplifying transistor is used to receive the positive input signal. A first terminal of the other amplifying transistor is coupled to a negative output terminal of the amplifier circuit. The first impedance component is coupled to a second terminal of the amplifying transistor and a second terminal of the other amplifying transistor.

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