A Vienna rectifier edge modulation method

Abstract

The present invention relates to a Vienna rectifier edge modulation method, comprising the following steps: obtaining a command current in phase with a grid voltage according to a voltage outer loop calculation; obtaining a reference output voltage vector by calculating a current inner loop based on model predictive control; determining the triangle in which the reference output voltage vector is located in a control vector diagram according to the current vector and the reference output voltage vector; drawing perpendicular lines from the vertex of the reference output voltage vector to the three adjacent sides of the triangle, replacing the reference output voltage vector with the voltage vector corresponding to the foot of the perpendicular on the closest side, so that the two phases are clamped; obtaining a differential mode voltage that can eliminate the DC offset of the midpoint voltage according to the instantaneous values ​​of the upper and lower capacitor voltages and the signs of the output voltage and current of the non-clamped phase. The actual output voltage of the present invention has two phases clamped and only one phase modulated, which significantly reduces switching loss; first determining the current sector, and then determining the triangle in which the reference voltage vector is located, thereby minimizing zero-crossing distortion.

Description

Technical Field

[0001] The present invention belongs to the technical field of power electronics, and in particular relates to an edge modulation method for a Vienna rectifier based on model predictive control, which can significantly reduce switching loss and suppress current zero-crossing distortion. Background Art

[0002] With the rapid development of modern power electronics technology, the number of power electronic devices has increased, and the harmonic pollution they cause to the power grid has become increasingly serious. Therefore, power factor correction circuits have emerged. The three-level Vienna rectifier is a high-performance three-level PFC topology. Its outer transistors are two diodes, and the inner transistors are two IGBTs with anti-parallel diodes. The current path switching is determined by the on-off switching of the inner IGBTs. This topological characteristic means that the Vienna rectifier has the advantages of high power density, high reliability, and no need to eliminate dead zones. Therefore, the Vienna rectifier is widely used in applications such as wind turbine systems, aircraft power supplies, and electric vehicles.

[0003] There are two main reasons for the generation of low-frequency harmonics in Vienna rectifier current: current zero-crossing distortion, which generates fifth and seventh harmonics; and midpoint voltage imbalance, which generates low-frequency even harmonics. Furthermore, under the same hardware conditions, to further improve the power density of Vienna rectifiers, it is necessary to reduce the switching losses of power devices. In recent years, with the rapid development of microprocessors, the application of model predictive control (MPC) in electronic power has become increasingly popular. Based on the above analysis, this paper proposes an improved modulation method based on infinite-set MPC, called edge modulation. This method clamps two phases, retaining only one phase for modulation. This method can reduce the total harmonic distortion (THD) content of the current, reduce switching losses and computational burden, eliminate DC offset in the DC-side voltage, and minimize current zero-crossing distortion over the entire modulation range. Summary of the Invention

[0004] The purpose of the present invention is to provide a Vienna rectifier edge modulation method in order to solve the above problems.

[0005] The present invention achieves the above-mentioned purpose through the following technical solutions:

[0006] A Vienna rectifier edge modulation method comprises the following steps:

[0007] Step S1: collecting DC side data of Vienna rectifier;

[0008] Step S2: Perform coordinate transformation based on the DC side data to obtain a reference voltage vector uref and current vector i;

[0009] Step S3: Determine the current sector according to the current vector i and determine the reference voltage vector u ref In the region of the current sector, according to the reference voltage vector u ref The area where the adjacent triangle edges are located is determined by the reference voltage vector u ref Draw a perpendicular line from the vector vertex to the determined edge, and use the vector corresponding to the foot of the perpendicular as the actual output voltage vector u′ ref , so that the two-phase output voltage is clamped;

[0010] Step S4: injecting a differential mode voltage into the non-clamped phase to eliminate the DC offset of the midpoint voltage.

[0011] As a further optimization solution of the present invention, the DC side data of the Vienna rectifier is collected in step S1, and the DC side data includes the phase voltage e of the three-phase grid. x (x=a,b,c), the output phase voltage u of the three-phase rectifier x (x=a,b,c), three-phase current i x (x=a,b,c), DC side upper and lower capacitance u C1 and u C2 .

[0012] As a further optimization solution of the present invention, in step S2, coordinate transformation is performed based on the DC side data to obtain the reference voltage vector u ref And the current vector i is as follows:

[0013] Establish the coordinate transformation equation:

[0014]

[0015] The output phase voltage u x and the three-phase current i x Substituting into (1), we get the reference voltage vector u ref and current vector i.

[0016] As a further optimization solution of the present invention, in step S3, the current sector is determined according to the current vector i, and the reference voltage vector u is determined. ref In the region of the current sector, according to the reference voltage vector u ref The area where the triangle is located determines the side of the triangle, from the reference voltage vector u ref Draw a perpendicular line from the vector vertex to the determined edge, and use the vector corresponding to the foot of the perpendicular as the actual output voltage vector u′ ref , so that the two-phase output voltage is clamped, specifically including:

[0017] When u b,ref -u c,ref <u dc When the reference voltage vector u ref Located in the F3 triangle formed by the vectors [0,-1,0], [1,-1,0], [1,-1,2], and setting the line connecting the vectors [0,-1,0] and [1,-1,0] as l, the reference voltage vector u ref The distance of the perpendicular line to l is d, and the vector corresponding to the line connecting the origin and the foot of the perpendicular is u′ ref At this time, the vector [1,-1,1] is not available, the current zero-crossing distortion cannot be avoided, and the vector u′ ref That is, the reference voltage vector u ref The vector with the smallest error is u′ ref Instead of u ref It can ensure the minimum distortion of current zero crossing;

[0018] The expressions of the straight line l and the distance d in the αβ axis system are:

[0019]

[0020] will u′ ref Converted into the sum of two vectors, expressed as:

[0021] u′ ref =u ref +u err (3)

[0022] Among them, u err Indicates u ref and u′ ref The error vector between is expressed as:

[0023]

[0024] Substituting equation (4) into equation (3) and converting it to the ABC axis system, the actual output voltage of the ABC phase can be expressed as:

[0025]

[0026] To reduce switching losses, a common-mode voltage can be injected to clamp the BC phase output levels to -1 and 0 levels respectively. The final actual output voltage is:

[0027]

[0028] As a further optimization solution of the present invention, in step S3, the current sector is determined according to the current vector i, and the reference voltage vector u is determined. refIn the region of the current sector, according to the reference voltage vector u ref The area where the triangle is located determines the side of the triangle, from the reference voltage vector u ref Draw a perpendicular line from the vector vertex to the determined edge, and use the vector corresponding to the foot of the perpendicular as the actual output voltage vector u′ ref , so that the two-phase output voltage is clamped, specifically including:

[0029] When u b，ref -u c，ref ≥u dc When the reference voltage vector u ref Located in the hexagon Hexagon I, set the reference voltage vector u ref The voltage vector after subtracting the center voltage vector [1, 0, 0] of Hexagon I is u ref_1 , which can be expressed as:

[0030]

[0031] u ref_1 Located in the hexagon Hexagon 0, it satisfies the two-level modulation model. To reduce the switching loss and the synthetic error of a single control cycle, the two-phase output voltage is clamped and the one-phase output voltage is modulated, that is, the edges of the adjacent small triangles are selected to be aligned with u. ref_1 The nearest vector u′ ref_1 Instead of u ref_1 ;

[0032] Set vector u ref_1 Located in the triangle A1 formed by the vectors [0,0,-1], [0,0,0] and [1,0,0], set the three sides of the triangle A1 to be l1, l2 and l3 respectively, and from the vector u ref_1 Draw perpendicular lines from the end vertex of l1, l2 and l3, with distances of d1, d2 and d3 respectively. The vectors from the origin to the perpendicular lines are u′ ref_1_1 、u′ ref_1_2 and u′ ref_1_3 ;

[0033] The expressions of the lines l1, l2 and l3 and the distances d1, d2 and d3 in the αβ axis system are:

[0034]

[0035] Among them, d min = min(d1, d2, d3) corresponding vector u′ ref_1_min for u ref_1 The edges of adjacent small triangles are connected to u ref_1 The nearest vector; u′ ref_1_minConverted into the sum of two vectors, expressed as:

[0036] u′ ref_1 =u′ ref_1_min =u ref_1 +u err (9)

[0037] Among them, u′ ref_1 It represents the actual output voltage vector modulated by the improved infinite set model predictive control under the two-level model, and the error vector u is calculated based on the closest distances to l1, l2 and l3. err ;

[0038] Thus, we can get u′ when the distances to l1, l2 and l3 are closest respectively. ref_1 ;

[0039] The reference voltage vector u ref When located inside Hexagon I, the actual output voltage vector u′ using infinite set model predictive control is ref Equal to u′ ref_1 Adding (7) and subtracting the center voltage vector, it can be expressed as:

[0040]

[0041] As a further optimization solution of the present invention, injecting a differential mode voltage into the non-clamped phase in step S4 to eliminate the DC offset of the midpoint voltage specifically includes:

[0042] The non-clamped phase can be adjusted to flow into the midpoint of the capacitor as follows:

[0043] Δi NP =Δu NP ·sign(i c )·sign(-u′ c,ref ) (13)

[0044] Where Δu NP represents the differential mode voltage injected into the unclamped phase, Δi NP Indicates the injection Δu NP Regulated midpoint current;

[0045] From the above formula, the differential mode voltage that eliminates the DC offset of the midpoint voltage is:

[0046] Δu NP =K(u C1 -u C2 )·sign(i c )·sign(-u′ c,ref ) (14)

[0047] Where K is the proportional coefficient for eliminating the DC offset of the midpoint voltage;

[0048] When u C1 >u C2 , at this time i c >0,u′ c,ref >0, inject negative differential mode voltage -Δu into phase C NP , so that the 0-level action time is increased to eliminate the DC offset of the midpoint voltage; when u C1 C2 , inject a positive differential mode voltage +Δu into phase C NP , which shortens the action time of the 0 level and eliminates the DC offset of the midpoint voltage.

[0049] The beneficial effects of the present invention are:

[0050] 1. The present invention still controls the grid-side current to be in phase with the grid voltage, without reducing the power factor of the rectifier;

[0051] 2. The present invention can eliminate or minimize current zero-crossing distortion within the full modulation range, thereby improving the grid-side current quality and reducing harmonic pollution of the Vienna rectifier to the grid.

[0052] 3. The present invention significantly reduces the switching loss of the Vienna rectifier from the perspective of the modulation method, does not require any additional peripherals, is low in cost, and greatly improves the working efficiency of the Vienna rectifier. BRIEF DESCRIPTION OF THE DRAWINGS

[0053] Figure 1 is a flow chart of the method of the present invention;

[0054] Figure 2 This is the main circuit diagram of Vienna rectifier;

[0055] Figure 3 The space vector diagram decomposition of Vienna rectifier;

[0056] Figure 4a The diagram below shows the modulation of Vienna rectifier that can eliminate current zero-crossing distortion.

[0057] Figure 4b The modulation diagram of Vienna rectifier can minimize the current zero-crossing distortion;

[0058] Figure 5a The switching sequence diagram of Vienna rectifier using SVPWM modulation;

[0059] Figure 5b This is a switching sequence diagram of a Vienna rectifier using the modulation method proposed in the present invention;

[0060] ​ Figure 6a Injecting negative common-mode voltage into the Vienna rectifier controls the switching sequence of the midpoint voltage;

[0061] Figure 6b Injecting positive common-mode voltage into the Vienna rectifier controls the switching sequence of the midpoint voltage;

[0062] Figure 7 A comparison chart of switching losses using different methods for Vienna rectifiers.

[0063] Figure 8a The waveform of the SVPWM modulation method is used when the modulation index is equal to 0.6;

[0064] Figure 8b The waveform of the modulation method proposed by the present invention when the modulation index is equal to 0.6;

[0065] Figure 9a The waveform of the SVPWM modulation method is used when the modulation index is equal to 0.76;

[0066] Figure 9b The waveform of the modulation method proposed by the present invention when the modulation index is equal to 0.76;

[0067] Figure 10a The waveform of the SVPWM modulation method is used when the modulation index is equal to 1.10;

[0068] Figure 10b The waveform of the modulation method proposed in the present invention is used when the modulation index is equal to 1.10. DETAILED DESCRIPTION

[0069] The present application is described in further detail below in conjunction with the accompanying drawings. It is necessary to point out that the following specific implementation methods are only used to further illustrate the present application and cannot be understood as limiting the scope of protection of the present application. Technicians in this field can make some non-essential improvements and adjustments to the present application based on the above application content.

[0070] Example 1

[0071] This example shows a control process of a Vienna rectifier using the control method of the present invention, in which the technical parameters are shown in Table 1. The present invention will be described in detail below with reference to the accompanying drawings.

[0072]

[0073] Table 1

[0074] The main circuit structure of the Vienna rectifier controlled by the control method of the present invention is as follows: Figure 2 As shown, where e x(x=a,b,c) is the phase voltage of the three-phase grid, u x is the output phase voltage of the three-phase rectifier, i x is the three-phase current; L s and R s are the inductance and resistance of the three-phase AC input inductor respectively; C1 and C2 are the upper and lower capacitors of the DC side respectively; when the capacitor voltage is balanced, u C1 =u C2 =u dc , the DC bus voltage is 2u dc ; R L is the DC side load.

[0075] Switching function S x (x=a,b,c) represents the state of the inner tube. When the inner tube is conducting, S x =1; when the inner tube is turned off, S x = 0. In S x =1, regardless of whether the current is positive or negative, the phase is connected to point O, and the state is defined as 0 level. x = 0, if the current is positive, the current flows through the diode D x1 Connected to the positive bus, the state is defined as level 1; if the current is negative, the current passes through the diode D x2 Connected to the negative bus, this state is defined as -1 level. The output level of the bridge arm x phase can be determined by the relationship shown in Table 2.

[0076]

[0077] Table 2

[0078]

[0079] Where k is a vector and j is a complex operator;

[0080] Substituting the output voltage of the three-phase Vienna rectifier into equation (1), we can get 27 basic voltage vectors. Each vector is represented by the three-dimensional ordered array corresponding to the vector. For example, [1, 0, 0] means that the A-phase bridge arm outputs level 1, and the B and C-phase bridge arms output level 0, as shown in Figure 3 As shown. The Vienna rectifier does not have vectors [1, 1, 1] and [-1, -1, -1]. There are 25 available vectors in total. According to the modulus length of the vector, it can be divided into 6 large vectors, 6 medium vectors, 12 small vectors and 1 zero vector. In this paper, the length of the small vector is defined as 1. The rectifier output phase voltage u x and three-phase current i x Substituting into (1), we can obtain the reference voltage vector u ref And current vector i. According to the three-phase current i xThe symbol can be divided into 6 sectors (I, ..., VI), such as i a >0、i b <0 and i c <0 (current state 1), the azimuth angle of the current vector i is θ i ∈[-π / 6,π / 6], located in sector I. Phase A is allowed to output 1, 0 levels; phase B and phase C are allowed to output 0, -1 levels. Figure 3 As shown, when the current vector i is located in sector I, it can be used to synthesize the reference voltage vector u ref The basic voltage vectors form a small hexagon Hexagon I.

[0081] Ignoring the voltage drop of the inductor parasitic resistance, the continuous mathematical model of the Vienna rectifier in the αβ axis system is:

[0082]

[0083] In one control cycle, the Euler difference method is used to discretize Equation (2) to obtain:

[0084]

[0085] Where n represents the current control cycle and n+1 represents the next control cycle. The model predicted current can be expressed as:

[0086]

[0087] in, and They represent the voltage corresponding to the kth basic voltage vector in the candidate set under the αβ axis system when the finite set model predictive control is adopted, and Represents the current generated when the kth basic voltage vector acts.

[0088] The current error generated by the kth voltage vector in the candidate set can be expressed as:

[0089]

[0090] Assuming there are j candidate basic voltage vectors, let k = 1, ..., j, calculate the current error corresponding to each basic voltage vector in turn, and select the basic voltage vector with the smallest current error for modulation.

[0091] Assuming that there are j alternative basic voltage vectors in the device selection set, when the modulation is performed using the model prediction method based on the minimum current error, the number of predicted current calculations is 2*j, and the number of error current calculations is equal to j. When there are many alternative vectors, the calculation burden is heavy.

[0092] Formula (5) is the performance criterion for each basic voltage vector and cannot be omitted. In order to reduce the computational burden of finite set model prediction, the number of operations in Formula (4) needs to be reduced.

[0093] Formula (3) can be expressed as:

[0094]

[0095] Substituting the kth basic voltage vector into equation (6), it can be transformed into:

[0096]

[0097] Substituting (6) into (7) we can obtain:

[0098]

[0099] Substituting (8) into (5) yields:

[0100]

[0101] Comparing (5) and (9), we can get g u,k and g i,k The same solution for the minimum value means that minimizing the current error and minimizing the voltage error are equivalent. Assuming there are j candidate basic voltage vectors in the device selection set, using the model prediction method based on minimizing the voltage error requires only two voltage prediction calculations and only j error voltage calculations, which reduces the computational burden to a certain extent.

[0102] When the current is in state 1, according to the analysis in Section 1, all the available basic voltage vectors of the Vienna rectifier are located in the hexagon I, u ref The position can be divided into two situations: one is u ref Located in the F3 triangle; the second is u ref Located in Hexagon I. According to the geometric relationship, u ref The boundary conditions between Hexagon I and F3 are:

[0103]

[0104] The following will discuss these two situations:

[0105] Case 1: u ref Located in the F3 triangle. Define the line connecting the vectors [0, -1, 0] and [1, -1, 0] as l, u ref The distance of the perpendicular line to l is d, and the vector corresponding to the line connecting the origin and the foot of the perpendicular is u′ refAs shown in Figure 4(a), the vector [1,-1,1] is not available at this time, and the current zero-crossing distortion cannot be avoided. The vector u′ ref That is, with u ref The vector with the smallest error is u′ ref Instead of u ref This ensures that the current zero-crossing distortion is minimal.

[0106] In the αβ axis system, the expressions of the straight line l and the distance d are:

[0107]

[0108] However, the vector u′ ref It is difficult to solve directly, but u′ ref can be converted into the sum of two vectors, expressed as:

[0109] u′ ref =u ref +u err (12)

[0110] Among them, u err Indicates u ref and u′ ref The error vector between can be expressed as:

[0111]

[0112] Substituting equation (13) into equation (12) and converting it to the ABC axis system, the actual output voltage of the ABC phase can be expressed as:

[0113]

[0114] To reduce switching losses, a common-mode voltage can be injected to clamp the BC phase output levels to -1 and 0 levels respectively. The final actual output voltage is:

[0115]

[0116] Case 2: u ref Located inside Hexagon I. Define u ref The voltage vector after subtracting the center voltage vector [1, 0, 0] of Hexagon I is u ref_1 , which can be expressed as:

[0117]

[0118] Obviously u ref_1 Located in Figure 3The two-level modulation model is satisfied within the hexagon Hexagon 0 shown in the figure. In order to reduce the switching loss and the synthetic error of a single control cycle, the two-phase output voltage can be clamped and the one-phase output voltage can be modulated, that is, the edges of the adjacent small triangles are selected to be connected to u ref_1 The nearest vector u′ ref_1 Instead of u ref_1 .

[0119] As shown in Figure 4(b), suppose that the vector u ref_1 Located in triangle A1, the three sides of triangle A1 are defined as l1, l2 and l3. From vector u ref_1 Draw perpendicular lines from the end vertex of l1, l2 and l3, with distances of d1, d2 and d3 respectively. The vectors from the origin to the perpendicular lines are u′ ref_1_1 、u′ ref_1_2 and u′ ref_1_3 .

[0120] In the αβ axis system, the expressions of the straight lines l1, l2 and l3 and the distances d1, d2 and d3 are:

[0121]

[0122] d min = min(d1, d2, d3) corresponding vector u′ ref_1_min It's u ref_1 The edges of adjacent small triangles are connected to u ref_1 The closest vector. However, vector u′ ref_1_min It is difficult to solve directly, but u′ ref_1_min can be converted into the sum of two vectors, expressed as:

[0123] u′ ref_1 =u′ ref_1_min =u ref_1 +u err (18)

[0124] Among them, u′ ref_1 It represents the actual output voltage vector of the two-level model using the improved infinite set MPC modulation, with u ref_1 Taking the closest distance l1 as an example, the error vector can be expressed as:

[0125]

[0126] According to the method of case 1, we can get u′ ref_1 The expression is:

[0127]

[0128] u ref_1The results of the triangle located at A1 closest to l2 or l3 are shown in Table 3.

[0129]

[0130] Table 3

[0131] u ref When located inside Hexagon I, the actual output voltage vector u′ using infinite set MPC ref Equal to u′ ref_1 Adding (16) and subtracting the center voltage vector, it can be expressed as:

[0132]

[0133] When the improved infinite set MPC modulation is used, at any time, there are always two phases of output voltage clamped and one phase of output voltage modulated. ref Located in triangle A3, and u ref_1 When the distance to l1 is the closest, u ref and u′ ref The switching sequences are shown in Figure 5(a) and Figure 5(b) respectively.

[0134] Still taking the situations shown in Figures 5(a) and 5(b) as an example, phases AB are clamped, and only phase C can regulate the current flowing into the midpoint of the capacitor, which can be expressed as:

[0135] Δi NP =Δu NP ·sign(i c )·sign(-u′ c,ref ) (twenty two)

[0136] Where Δu NP represents the differential mode voltage injected into the unclamped phase, Δi NP Indicates the injection Δu NP Regulated midpoint current.

[0137] The differential mode voltage that can eliminate the DC offset of the midpoint voltage is:

[0138] Δu NP =K(u C1 -u C2 )·sign(i c )·sign(-u′ c,ref ) (twenty three)

[0139] Where K is the proportional coefficient for eliminating DC offsets in the midpoint voltage, and its value is related to the DC-side capacitor value. Infinite-set MPC modulation cannot guarantee constant midpoint potential balance, but it can eliminate DC offsets in the midpoint voltage by injecting a differential-mode voltage into the unclamped phase.

[0140] If u C1 >u C2 , it is necessary to increase the current flowing into the midpoint of the capacitor, and at this time i c >0,u′ c,ref >0, a negative differential mode voltage needs to be injected into phase C to increase the 0 level action time, as shown in Figure 6(a); conversely, if u C1 C2 , a positive differential mode voltage needs to be injected into phase C to shorten the action time of the 0 level, as shown in Figure 6(b).

[0141] In order to verify the control performance of the modulation method proposed in the present invention, this example compares the modulation method proposed in the present invention with the traditional SVPWM modulation method.

[0142] The switching loss of the SVPWM modulation method is defined as the benchmark value, denoted as P _SL_SVPWM , then the switching loss of other modulation methods can be expressed as:

[0143]

[0144] Figure 7 Figure 2 shows the switching loss curve for the proposed method. It can be seen that the proposed modulation method can clamp two phases at any modulation index, meaning that the proposed modulation method consistently reduces switching losses by at least 50%. When m is around 0.58, the proposed modulation method can simultaneously clamp both the maximum current phase and the intermediate current phase in certain regions, reducing switching losses by 82%. When m reaches its maximum value of 1.15, the switching loss reduction is still 55%.

[0145] The present invention compares SVPWM modulation with the modulation method proposed in this paper. Figures 8(a) and (b), Figures 9(a) and (b), and Figures 10(a) and (b) show the experimental waveforms with rated load for the three modulation methods at modulation indices of 0.60, 0.86, and 1.10, respectively.

[0146] By comparing Figures 8(a) and (b), Figures 9(a) and (b), and Figures 10(a) and (b), it can be seen that under the three modulation indices, the traditional SVPWM modulation method has current zero-crossing distortion, and the 5th and 7th harmonics of the current are relatively high; the modulation method proposed in the present invention significantly reduces the current zero-crossing distortion under the three modulation indices, and the 5th and 7th harmonics of the current are relatively low.

[0147] ​The above-described embodiments merely illustrate several implementations of the present invention. While the descriptions are relatively specific and detailed, they should not be construed as limiting the scope of the present invention. It should be noted that a person skilled in the art would be able to make numerous variations and improvements without departing from the spirit of the present invention, and all such variations and improvements fall within the scope of protection of the present invention.

Claims

1. A Vienna rectifier edge modulation method, characterized in that: The following steps are involved: Step S1: collecting DC side data of Vienna rectifier; Step S2: Perform coordinate transformation based on the DC side data to obtain a reference voltage vector u ref and current vector i; Step S3: Determine the current sector according to the current vector i and determine the reference voltage vector u ref In the region of the current sector, according to the reference voltage vector u ref The area where the adjacent triangle edges are located is determined by the reference voltage vector u ref Draw a perpendicular line from the vector vertex to the determined edge, and use the vector corresponding to the foot of the perpendicular as the actual output voltage vector u′ ref , so that the two-phase output voltage is clamped; Step S4: injecting a differential mode voltage into the non-clamped phase to eliminate the DC offset of the midpoint voltage.

2. The Vienna rectifier edge modulation method according to claim 1, characterized in that: In step S1, the DC side data of the Vienna rectifier is collected, and the DC side data includes the phase voltage e of the three-phase grid. x (x=a,b,c), the output phase voltage u of the three-phase rectifier x (x=a,b,c), three-phase current i x (x=a,b,c), DC side upper and lower capacitance u C1 and u C2 .

3. The Vienna rectifier edge modulation method according to claim 2, characterized in that: In step S2, coordinate transformation is performed based on the DC side data to obtain a reference voltage vector u ref And the current vector i is as follows: Establish the coordinate transformation equation: The output phase voltage u x and the three-phase current i x Substituting into (1), we get the reference voltage vector u ref and current vector i.

4. The Vienna rectifier edge modulation method according to claim 2, characterized in that: In step S3, the current sector is determined according to the current vector i, and the reference voltage vector u is determined. ref In the region of the current sector, according to the reference voltage vector u ref The area where the triangle is located determines the side of the triangle, from the reference voltage vector u ref Draw a perpendicular line from the vector vertex to the determined edge, and use the vector corresponding to the foot of the perpendicular as the actual output voltage vector u′ ref , so that the two-phase output voltage is clamped, specifically including: When u b,ref -u c,ref <u dc When the reference voltage vector u ref Located in the F3 triangle formed by the vectors [0,-1,0], [1,-1,0], [1,-1,2], and setting the line connecting the vectors [0,-1,0] and [1,-1,0] as l, the reference voltage vector u ref The distance of the perpendicular line to l is d, and the vector corresponding to the line connecting the origin and the foot of the perpendicular is u′ ref At this time, the vector [1,-1,1] is not available, the current zero-crossing distortion cannot be avoided, and the vector u′ ref That is, the reference voltage vector u ref The vector with the smallest error is u′ ref Instead of u ref It can ensure the minimum distortion of current zero crossing; The expressions of the straight line l and the distance d in the αβ axis system are: will u′ ref Converted into the sum of two vectors, expressed as: in' ref =in ref +in err (3) Among them, u err Indicates u ref and u′ ref The error vector between is expressed as: Substituting equation (4) into equation (3) and converting it to the ABC axis system, the actual output voltage of the ABC phase can be expressed as: To reduce switching losses, a common-mode voltage is injected to clamp the output levels of the BC phases to -1 and 0 levels, respectively. The actual output voltage is:

5. The Vienna rectifier edge modulation method according to claim 2, characterized in that: In step S3, the current sector is determined according to the current vector i, and the reference voltage vector u is determined. ref In the region of the current sector, according to the reference voltage vector u ref The area where the triangle is located determines the side of the triangle, from the reference voltage vector u ref Draw a perpendicular line from the vector vertex to the determined edge, and use the vector corresponding to the foot of the perpendicular as the actual output voltage vector u′ ref , so that the two-phase output voltage is clamped, specifically including: When u b，ref -u c，ref ≥u dc When the reference voltage vector u ref Located in the hexagon Hexagon I, set the reference voltage vector u ref The voltage vector after subtracting the center voltage vector [1, 0, 0] of Hexagon I is u ref_1 , which can be expressed as: u ref_1 Located in the hexagon Hexagon 0, it satisfies the two-level modulation model. To reduce the switching loss and the synthetic error of a single control cycle, the two-phase output voltage is clamped and the one-phase output voltage is modulated, that is, the edges of the adjacent small triangles are selected to be aligned with u. ref_1 The nearest vector u′ ref_1 Instead of u ref_1 ; Set vector u ref_1 Located in the triangle A1 formed by the vectors [0,0,-1], [0,0,0] and [1,0,0], set the three sides of the triangle A1 to be l1, l2 and l3 respectively, and from the vector u ref_1 Draw perpendicular lines from the end vertex of l1, l2 and l3, with distances d1, d2 and d3 respectively. The vectors from the origin to the perpendicular foot are u′ ref_1_1 、u′ ref_1_2 and u′ ref_1_3 ; The expressions of the lines l1, l2 and l3 and the distances d1, d2 and d3 in the αβ axis system are: Among them, d min = min(d1, d2, d3) corresponding vector u′ ref_1_min for u ref_1 The edges of adjacent small triangles are connected to u ref_1 The nearest vector; u′ ref_1_min Converted into the sum of two vectors, expressed as: in' ref_1 =u′ ref_1_min =in ref_1 +in err (9) Among them, u′ ref_1 It indicates that the actual output voltage vector of the modulation under the two-level model is predicted by using the improved infinite set model, and the error vector u is calculated based on the closest distances to l1, l2 and l3. err ; Thus, we can get u′ when the distances to l1, l2 and l3 are closest respectively. ref_1 ; The reference voltage vector u ref When located inside Hexagon I, the actual output voltage vector u′ using infinite set model predictive control is ref Equal to u′ ref_1 Adding (7) and subtracting the center voltage vector, it can be expressed as:

6. The Vienna rectifier edge modulation method according to claim 4 or 5, characterized in that: In step S4, injecting a differential mode voltage into the non-clamped phase to eliminate the DC offset of the midpoint voltage specifically includes: The non-clamped phase can be adjusted to flow into the midpoint of the capacitor as follows: Δi NP =Δu NP ·sign(i c )·sign(-u' c,ref ) (13) Where Δu NP represents the differential mode voltage injected into the unclamped phase, Δi NP Indicates the injection Δu NP Regulated midpoint current; sign(x) is the sign function; From the above formula, the differential mode voltage that eliminates the DC offset of the midpoint voltage is: Δu NP =K(in C1 -in C2 )·sign(i c )·sign(-u' c,ref ) (14) Where K is the proportional coefficient for eliminating the DC offset of the midpoint voltage; When u C1 >u C2 , at this time i c >0,u′ c,ref >0, inject negative differential mode voltage -Δu into phase C NP , so that the 0-level action time is increased to eliminate the DC offset of the midpoint voltage; when u C1 C2 , inject a positive differential mode voltage +Δu into phase C NP , which shortens the action time of the 0 level and eliminates the DC offset of the midpoint voltage.​

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