A pixel driving circuit, a display panel and a driving method of a display panel

Abstract

The present application discloses a pixel driving circuit, a display panel and a driving method of the display panel. The pixel driving circuit includes a driving transistor, a light emitting device, a first light emitting control module, a data writing module, an adjustment module and a second light emitting control module. The pixel driving circuit, the display panel and the driving method of the display panel provided by the present application, by setting an adjustment module at the first node, the adjustment module adjusts the potential of the second node based on the potential of the first node, thereby reducing the potential difference between the first node and the second node, ensuring that the conduction angle of the driving transistor changes little, and then the light emitting device emits light stably, which can effectively solve the flicker problem and improve the display effect.

Description

Technical Field

[0001] The present application relates to the field of display technology, and in particular to a pixel driving circuit, a display panel, and a driving method for a display panel. Background Art

[0002] Organic Light-Emitting Diode (OLED) display panels have the characteristics of self-luminescence, wide viewing angle, high contrast, fast response speed, low power consumption, and ultra-lightness, and are widely used.

[0003] However, with the continuous changes in OLED display technology, the design of OLED display panels has become more diversified, and consumers have higher and higher quality requirements for OLED display panels. Flicker is an important factor that restricts the display effect of OLED display panels. It characterizes the flickering of the brightness of the display panel. Due to the different process conditions of each panel manufacturer, there are certain differences in the severity of flicker. However, almost all OLED display panels have flicker in low-frequency state. Among them, excessive change in display brightness within a frame is one of the important reasons for excessive flicker. Summary of the invention

[0004] The present application provides a pixel driving circuit, a display panel and a driving method for the display panel, which solves the problem of flickering caused by gate leakage of the driving transistor, resulting in an increase in the potential of the first node, and a decrease in the conduction angle of the driving transistor.

[0005] In a first aspect, the present application provides a pixel driving circuit, comprising:

[0006] a driving transistor, wherein a gate of the driving transistor is electrically connected to the first node, a first electrode of the driving transistor is electrically connected to the second node, and a second electrode of the driving transistor is electrically connected to the third node;

[0007] a light emitting device, wherein a first terminal of the light emitting device is electrically connected to the fourth node, and a second terminal of the light emitting device is electrically connected to the first power supply terminal;

[0008] a first light-emitting control module, the first light-emitting control module receiving a first light-emitting control signal and being electrically connected to the fifth node and the second power supply terminal, respectively, and the first light-emitting control module being used for outputting a second voltage signal provided by the second power supply terminal to the fifth node under the control of the first light-emitting control signal;

[0009] a data writing module, the data writing module receiving a data signal and a writing control signal, and being electrically connected to the first node, the second node, the third node and the second power supply terminal respectively, the data writing module being used to output the data signal to the first node under the control of the writing control signal;

[0010] an adjusting module, the adjusting module being electrically connected to the first node, the second node and the fifth node respectively, and the adjusting module being used to adjust the potential of the second node based on the potential of the first node, wherein the second node is electrically connected to the fifth node;

[0011] The second light-emitting control module is connected to the second light-emitting control signal and is electrically connected to the third node and the fourth node respectively. The second light-emitting control module is used to output the potential of the third node to the fourth node under the control of the second light-emitting control signal.

[0012] In the pixel driving circuit provided in the present application, the regulating module includes a first transistor;

[0013] A gate of the first transistor is electrically connected to the first node, a first electrode of the first transistor is electrically connected to the second node, and a second electrode of the first transistor is electrically connected to the fifth node.

[0014] In the pixel driving circuit provided in the present application, the first transistor is an N-type transistor.

[0015] In the pixel driving circuit provided in the present application, the first light emitting control module includes a second transistor;

[0016] The gate of the second transistor is connected to the first light emitting control signal, the first electrode of the second transistor is electrically connected to the second power supply terminal, and the second electrode of the second transistor is electrically connected to the fifth node.

[0017] In the pixel driving circuit provided in the present application, the data writing module includes a third transistor, a fourth transistor and a storage capacitor;

[0018] The gate of the third transistor is connected to the write control signal, the first electrode of the third transistor is connected to the data signal, and the second electrode of the third transistor is electrically connected to the second node;

[0019] The gate of the fourth transistor is connected to the write control signal, the first electrode of the fourth transistor is electrically connected to the first node, and the second electrode of the fourth transistor is electrically connected to the third node;

[0020] The first end of the storage capacitor is electrically connected to the first node, and the second end of the storage capacitor is electrically connected to the second power supply end.

[0021] In the pixel driving circuit provided in the present application, the second light emitting control module includes a fifth transistor;

[0022] The gate of the fifth transistor is connected to the second light emitting control signal, the first electrode of the fifth transistor is electrically connected to the third node, and the second electrode of the fifth transistor is electrically connected to the fourth node.

[0023] In the pixel driving circuit provided in the present application, the pixel driving circuit further includes a sixth transistor and a seventh transistor;

[0024] The gate of the sixth transistor is connected to a reset control signal, the first electrode of the sixth transistor is connected to a reset signal, and the second electrode of the sixth transistor is electrically connected to the fourth node;

[0025] The gate of the seventh transistor is connected to the reset control signal, the first electrode of the seventh transistor is connected to the reset signal, the second electrode of the seventh transistor is electrically connected to a sixth node, wherein the sixth node is electrically connected to the first node.

[0026] In the pixel driving circuit provided in the present application, the regulating module includes a dual-gate transistor;

[0027] The first gate of the dual-gate transistor is electrically connected to the first node, the second gate of the dual-gate transistor is electrically connected to the sixth node, the first electrode of the dual-gate transistor is electrically connected to the second node, and the second electrode of the dual-gate transistor is electrically connected to the fifth node.

[0028] In a second aspect, the present application further provides a display panel, comprising:

[0029] A data line, the data line is used to provide a data signal;

[0030] A first scan line, wherein the first scan line is used to provide a first light emitting control signal;

[0031] a second scan line, the second scan line being used to provide a second light emitting control signal;

[0032] A third scan line, the third scan line is used to provide a write control signal; and

[0033] As described above, the pixel driving circuit is electrically connected to the data line, the first scan line, the second scan line and the third scan line.

[0034] In a third aspect, the present application further provides a method for driving a display panel, comprising:

[0035] In the data writing stage, the data writing module provides the data signal to the first node;

[0036] In the light-emitting stage, the data writing module stops providing the data signal to the first node, the first light-emitting control module outputs the second voltage signal to the fifth node, the regulating module outputs the second voltage signal to the second node based on the potential of the first node, and the driving transistor maintains the on state; and when the potential of the first node rises, the regulating module adjusts the potential of the second node based on the potential of the first node.

[0037] The pixel driving circuit, display panel and display panel driving method provided in the present application set an adjustment module at the first node, and the adjustment module adjusts the potential of the second node based on the potential of the first node, so that the potential difference between the first node and the second node is reduced, thereby the conduction angle of the driving transistor changes little, the driving current of the light-emitting device is less affected, and the light-emitting device emits light stably, effectively solving the flicker problem and improving the display effect. BRIEF DESCRIPTION OF THE DRAWINGS

[0038] Figure 1 A schematic diagram of a first structure of a pixel driving circuit provided in an embodiment of the present application;

[0039] Figure 2 A first circuit diagram of a pixel driving circuit provided in an embodiment of the present application;

[0040] Figure 3 for Figure 2 A timing diagram of the pixel driving circuit shown;

[0041] Figure 4 for Figure 2 The pixel driving circuit shown in Figure 3 A schematic diagram of a data writing path in the driving timing shown;

[0042] Figure 5 for Figure 2 The pixel driving circuit shown in Figure 3 A schematic diagram of the path of the light-emitting stage under the driving timing shown;

[0043] Figure 6 For application Figure 2 The brightness variation diagram detected by the pixel driving circuit shown;

[0044] Figure 7 A second structural schematic diagram of a pixel driving circuit provided in an embodiment of the present application;

[0045] Figure 8 A second circuit diagram of a pixel driving circuit provided in an embodiment of the present application;

[0046] Fig. 9 for Figure 8 A timing diagram of the pixel driving circuit shown;

[0047] Fig.10 for Figure 8 The pixel driving circuit shown in Fig. 9 A schematic diagram of the path of the reset phase under the driving timing shown;

[0048] Fig.11 for Figure 8 The pixel driving circuit shown in Fig. 9 A schematic diagram of a data writing path in the driving timing shown;

[0049] Fig.12 for Figure 8 The pixel driving circuit shown in Fig. 9 A schematic diagram of the path of the light-emitting stage under the driving timing shown;

[0050] Fig.13 A third circuit schematic diagram of a pixel driving circuit provided in an embodiment of the present application;

[0051] Fig.14 A schematic diagram of the structure of a display panel provided in an embodiment of the present application;

[0052] Fig.15 A schematic diagram of a process flow of a method for driving a display panel provided in an embodiment of the present application; DETAILED DESCRIPTION

[0053] The technical solutions in the embodiments of the present application will be described clearly and completely below in conjunction with the drawings in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, rather than all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by those skilled in the art without creative work are within the scope of protection of the present application.

[0054] In addition, the terms "first", "second", etc. in the specification and claims of the present application are used to distinguish different objects rather than to describe a specific order. The terms "including" and "having" and any variations thereof are intended to cover non-exclusive inclusions. Since the first and second poles of the transistors used in the present application are symmetrical, the first and second poles thereof are interchangeable. According to the form in the accompanying drawings, the middle end of the transistor is defined as the gate, the signal input end is defined as one of the first and second poles, and the output end is defined as the other of the first and second poles.

[0055] In the process of working, the gate of the driving transistor of the existing pixel driving circuit has the problem of unstable potential. Since all mini light emitting diodes, micro light emitting diodes, and organic light emitting diodes are current-type light emitting devices, the current flowing through the light emitting device is provided by the driving transistor, and the current output by the driving transistor is greatly affected by the potential of its own gate. When there is a leakage path in the gate of the driving transistor, it is easy to cause the gate potential of the driving transistor to be unstable, thereby causing the display brightness of the light emitting device to change, resulting in flickering problems and affecting the display effect. Based on this, the present application proposes a new pixel driving circuit.

[0056] See also Figure 1 , Figure 1 This is a schematic diagram of the first structure of the pixel driving circuit provided in the embodiment of the present application. Figure 1 As shown, the pixel driving circuit 100 provided in the embodiment of the present application includes a driving transistor DT, a light-emitting device D, a first light-emitting control module 10 , a data writing module 20 , an adjustment module 30 , and a second light-emitting control module 40 .

[0057] The gate of the driving transistor DT is electrically connected to the first node Q, the first electrode of the driving transistor DT is electrically connected to the second node A, and the second electrode of the driving transistor DT is electrically connected to the third node C.

[0058] The first end of the light emitting device D is electrically connected to the fourth node S, and the second end of the light emitting device D is electrically connected to the first power supply terminal VSS. It is worth mentioning that the light emitting device D can be a mini light emitting diode, a micro light emitting diode or an organic light emitting diode.

[0059] The first light emitting control module 10 receives the first light emitting control signal EM1 and is electrically connected to the fifth node B and the second power supply terminal VDD respectively.

[0060] The data writing module 20 receives the data signal DA and the writing control signal S1 , and is electrically connected to the first node Q, the second node A, the third node C and the second power supply terminal VDD.

[0061] The regulating module 30 is respectively electrically connected to the first node Q, the second node A and the fifth node B. It should be noted that, in this embodiment, the fifth node B and the second node A are electrically connected.

[0062] The second light emitting control module 40 receives the second light emitting control signal EM2 and is electrically connected to the third node C and the fourth node S respectively.

[0063] Specifically, the first light-emitting control module 10 is used to output the second voltage signal provided by the second power supply terminal VDD to the fifth node B under the control of the first light-emitting control signal EM1. The data writing module 20 is used to output the data signal DA to the first node Q under the control of the writing control signal S1. The regulating module 30 is used to adjust the potential of the second node A based on the potential of the first node Q. The driving transistor DT is used to output the potential of the second node A to the third node C based on the potential of the first node Q. The second light-emitting control module 40 is used to output the potential of the third node C to the fourth node S under the control of the second light-emitting control signal EM2, so that the potential of the fourth node S is increased to a preset potential, so that the light-emitting device D emits light based on the preset potential.

[0064] It should be noted that the first power supply terminal VSS and the second power supply terminal VDD are both used to output a preset voltage value. In addition, in the embodiment provided in the present application, the potential of the first power supply terminal VSS is less than the potential of the second power supply terminal VDD. Specifically, the potential of the first power supply terminal VSS can be the potential of the ground terminal. Of course, the potential of the first power supply terminal VSS can also be other potentials.

[0065] In the pixel driving circuit 100 provided in the embodiment of the present application, when there is a leakage problem in the gate of the driving transistor DT and the first node Q rises, the potential of the second node A is adjusted based on the potential of the first node Q by the adjustment module 30, that is, the adjustment module 30 adjusts the potential of the second node A according to the potential change of the first node Q, so that the potential difference between the first node Q and the second node A is reduced, so that the conduction angle of the driving transistor DT changes less, and the driving current of the light-emitting device D is less affected by the change of the conduction angle of the driving transistor DT, which is beneficial to provide a stable driving current for the light-emitting device D, so that the light-emitting device D can emit light stably, so as to solve the flicker problem caused by excessive display brightness changes within a frame and improve the display effect.

[0066] In some embodiments, see Figure 2 , Figure 2 This is a first circuit diagram of a pixel driving circuit provided in an embodiment of the present application. Figure 1 , Figure 2 As shown, the first light emitting control module 10 includes a second transistor T2. The gate of the second transistor T2 is connected to the first light emitting control signal EM1, the first electrode of the second transistor T2 is electrically connected to the second power supply terminal VDD, and the second electrode of the second transistor T2 is electrically connected to the fifth node B. Therefore, the conduction or cutoff of the second transistor T2 is controlled by the first light emitting control signal EM1. When the second transistor T2 is in the conduction state, the second voltage signal provided by the second power supply terminal VDD is output to the fifth node B.

[0067] In some embodiments, please refer to Figure 1 and Figure 2 The data writing module 20 includes a third transistor T3, a fourth transistor T4 and a storage capacitor Cst.

[0068] The gate of the third transistor T3 is connected to the write control signal S1, the first electrode of the third transistor T3 is connected to the data signal DA, and the second electrode of the third transistor T3 is electrically connected to the second node A. Therefore, the conduction or cutoff of the third transistor T3 is controlled by the write control signal S1. When the third transistor T3 is in the on state, the third transistor T3 outputs the data signal DA to the second node A.

[0069] The gate of the fourth transistor T4 is connected to the write control signal S1, the first electrode of the fourth transistor T4 is electrically connected to the first node Q, and the second electrode of the fourth transistor T4 is electrically connected to the third node C. Therefore, the conduction or cutoff of the fourth transistor T4 is controlled by the write control signal S1, and when the fourth transistor T4 is in the on state, the potential of the third node C is output to the first node Q.

[0070] The first end of the storage capacitor Cst is electrically connected to the first node Q, and the second end of the storage capacitor Cst is electrically connected to the second power supply terminal VDD. The storage capacitor Cst is used to store the potential of the first node Q, that is, the potential of the gate of the storage driving transistor DT.

[0071] In some embodiments, please refer to Figure 1 and Figure 2 The regulating module 30 includes a first transistor T1. The gate of the first transistor T1 is electrically connected to the first node Q, the first electrode of the first transistor T1 is electrically connected to the second node A, and the second electrode of the first transistor T1 is electrically connected to the fifth node B. Based on the change in the potential of the first node Q, the conduction angle of the first transistor T1 changes. At this time, the first transistor T1 can be regarded as a variable resistor. Based on the change in the conduction angle of the first transistor T1, the potential of the second node A is adjusted to control the change in the potential difference between the first node Q and the second node A, thereby reducing the change in the conduction angle of the driving transistor DT, which is conducive to the stable light emission of the light-emitting device D.

[0072] In some embodiments, please refer to Figure 1 and Figure 2 , the second light emitting control module 40 includes a fifth transistor T5. The gate of the fifth transistor T5 is connected to the second light emitting control signal EM2, the first electrode of the fifth transistor T5 is electrically connected to the third node C, and the second electrode of the fifth transistor T5 is electrically connected to the fourth node S. Therefore, the conduction or cutoff of the fifth transistor T5 is controlled by the second light emitting control signal EM2. When the fifth transistor T5 is in the on state, the fifth transistor T5 outputs the potential of the third node C to the fourth node S.

[0073] The pixel driving circuit 100 provided in the embodiment of the present application adopts a 6T1C (6 transistors and 1 capacitor) structure to control the light-emitting device D, so that the light-emitting device D is less affected by the gate leakage problem of the driving transistor DT, thereby ensuring that the light-emitting device emits light stably, effectively solving the flickering phenomenon, and improving the display effect.

[0074] In some embodiments, please refer to Figure 2 The driving transistor DT, the second transistor T2, the third transistor T3, the fourth transistor T4 and the fifth transistor T5 are all P-type transistors. Of course, the driving transistor DT, the second transistor T2, the third transistor T3, the fourth transistor T4 and the fifth transistor T5 may also be N-type transistors.

[0075] It should be noted that, in order to increase the potential of the first node Q, the regulating module 30 can also increase the potential of the second node A accordingly, so as to reduce the potential difference between the first node Q and the second node A. Therefore, the first transistor T1 provided in the embodiment of the present application is an N-type transistor. When the first transistor T1 is an N-type transistor, the increase in the potential of the second node A increases the conduction angle of the first transistor T1, so that the resistance value of the equivalent resistor corresponding to the first transistor T1 decreases. Since the impedance of other circuits in the pixel driving circuit is a constant value, and the first transistor T1 is in a parallel relationship with the second node A and the fifth node B, the resistance value of the equivalent resistor formed in parallel decreases, so that the potential of the second node A increases, and the potential difference between the first node Q and the second node A decreases.

[0076] See also Figure 3 , Figure 3 for Figure 2 The timing diagram of the pixel driving circuit shown in FIG. The first light-emitting control signal EM1, the second light-emitting control signal EM2 and the write control signal S1 are combined to correspond to the data writing stage t1 and the light-emitting stage t2. That is, within one frame time, the driving control timing of the pixel driving circuit 100 provided in the embodiment of the present application at least includes the data writing stage t1 and the light-emitting stage t2.

[0077] In some embodiments, in the data writing phase t1 , the first light emitting control signal EM1 and the second light emitting control signal EM2 are both at high levels, and the writing control signal S1 is at a low level.

[0078] In some embodiments, in the light emitting stage t2 , the first light emitting control signal EM1 and the second light emitting control signal EM2 are both at low levels, and the write control signal S1 is at high levels.

[0079] For details, please refer to Figure 3 as well as Figure 4 , Figure 4 for Figure 2The pixel driving circuit shown in Figure 3 Schematic diagram of the path of the data writing stage under the driving timing shown. In the data writing stage t1, the data signal DA is at a low potential, and the third transistor T3 and the fourth transistor T4 are turned on under the low potential control of the write control signal S1. At this time, the driving transistor DT is turned on, so that the data signal DA is output to the first node Q through the third transistor T3, the driving transistor DT and the fourth transistor T4. At this time, the first light-emitting control signal EM1 is at a high potential, and the second transistor T2 is turned off under the high potential control of the first light-emitting control signal EM1. The second light-emitting control signal EM2 is also at a high potential, and the fifth transistor T5 is turned off under the high potential control of the second light-emitting control signal EM2.

[0080] For details, please refer to Figure 3 as well as Figure 5 , Figure 5 for Figure 2 The pixel driving circuit shown in Figure 3 Schematic diagram of the path of the light-emitting stage under the driving timing shown. In the light-emitting stage t2, the first light-emitting control signal EM1 is at a low potential, and the second transistor T2 is turned on under the low potential control of the first light-emitting control signal EM1. The second light-emitting control signal EM2 is at a low potential, and the fifth transistor T5 is turned on under the low potential control of the second light-emitting control signal EM2. At this time, the gate of the driving transistor DT maintains an on state based on the voltage stored in the storage capacitor Cst. At this time, the write control signal S1 is at a high potential, and the third transistor T3 and the fourth transistor T4 are turned off under the high potential control of the write control signal S1.

[0081] Specifically, in the light-emitting stage t2, if there is a leakage problem in the gate of the driving transistor DT, which causes the potential of the first node Q to change, the first transistor T1 will adjust the conduction angle based on the change in the potential of the first node Q. At this time, the first transistor T1 can be equivalent to a variable resistor Ry, and the impedance between the second node A and the fifth node B can be equivalent to a resistor Rx, and Ry and Rx are in a parallel relationship. 并 =Rx*Ry / (Rx+Ry)=1 / (1 / Rx+1 / Ry). Since the impedance between the first node A and the fifth node B is constant, the resistance value of the resistor Rx is constant. 并 Therefore, by changing the conduction angle of the first transistor T1 to adjust the resistance of Ry, the parallel resistor R 并 Furthermore, due to the parallel resistance R 并When the resistance value becomes smaller, the potential of the second node A rises, so that the potential of the first node Q rises and the potential of the second node rises synchronously, so that the potential difference between the first node Q and the second node A decreases, so that the conduction angle of the driving transistor DT is less affected by the change of the potential difference between the first node Q and the second node A, and the driving transistor DT can provide a stable driving current for the light-emitting device D, and the light-emitting device D emits light stably, thereby effectively solving the flickering problem of the display screen.

[0082] See also Figure 6 , Figure 6 For application Figure 2 The brightness change diagram detected by the pixel driving circuit shown in FIG. Figure 6 As shown, the horizontal axis represents time and the vertical axis represents the brightness of the display device. In one frame display, the change amount of the brightness curve detected by the pixel driving circuit 100 provided by this embodiment is smaller than the change amount of the brightness curve detected by the existing pixel driving circuit, so that the flicker phenomenon caused by the large brightness change of the display device can be effectively solved.

[0083] In some embodiments, see Figure 7 , Figure 7 Schematic diagram of the second structure of the pixel driving circuit provided in the embodiment of the present application. Figure 1 Compared with the first structural schematic diagram of the pixel driving circuit shown in FIG. 1 , the difference is that: in the pixel driving circuit 200 provided in this embodiment, a reset module 50 is further included. The reset module 50 receives the reset signal VI and the reset control signal S2, and is electrically connected to the fourth node S and the sixth node R respectively. Among them, the sixth node R is electrically connected to the first node Q.

[0084] Specifically, the reset module 50 is used to output the reset signal VI to the fourth node S and the sixth node R under the control of the reset control signal S2.

[0085] In the pixel driving circuit 200 provided in the embodiment of the present application, a reset module 50 is additionally provided to reset the first node Q and the fourth node S to prevent the residual signal of the previous frame image from affecting the display of the current frame image.

[0086] In some embodiments, see Figure 8 , Figure 8 A second circuit diagram of a pixel driving circuit provided in an embodiment of the present application. Figure 7 , Figure 8 As shown, compared to Figure 2The pixel driving circuit 100 shown in the figure, the pixel driving circuit 200 provided in the present embodiment further includes a reset module 50. Specifically, the reset module 50 includes a sixth transistor T6 and a seventh transistor T7. For the convenience of describing the pixel driving circuit 200 in the present embodiment, the driving transistor DT, the second transistor T2, the third transistor T3, the fourth transistor T4, the fifth transistor T5, the sixth transistor T6 and the seventh transistor T7 are all P-type transistors, and the first transistor T1 is an N-type transistor.

[0087] The gate of the sixth transistor T6 is connected to the reset control signal S2, the first electrode of the sixth transistor T6 is connected to the reset signal VI, and the second electrode of the sixth transistor T6 is electrically connected to the fourth node S. Therefore, the conduction or cutoff of the sixth transistor T6 is controlled by the reset control signal S2, and when the sixth transistor T6 is in the on state, the reset signal VI is output to the fourth node S to reset the fourth node S, thereby initializing the light emitting device D and preventing the residual current of the light emitting device D in the previous frame from affecting the display of the current frame image.

[0088] The gate of the seventh transistor T7 is also connected to the reset control signal S2, the first electrode of the seventh transistor T7 is connected to the reset signal VI, and the second electrode of the seventh transistor T7 is electrically connected to the sixth node R. Therefore, the conduction or cutoff of the seventh transistor T7 is controlled by the reset control signal S2. When the seventh transistor T7 is in the on state, the reset signal VI is output to the sixth node S. Since the first node Q is electrically connected to the sixth node S, the sixth node S and the first node Q can be reset to avoid the residual signal of the previous frame from affecting the display of the current frame image.

[0089] See also Fig. 9 , Fig. 9 for Figure 8 The timing diagram of the pixel driving circuit shown in FIG. The first light-emitting control signal EM1, the second light-emitting control signal EM2, the write control signal S1 and the reset control signal S2 are combined to correspond to the reset stage t0, the data write stage t1 and the light-emitting stage t2. That is, within one frame time, the driving control timing of the pixel driving circuit 200 provided in the embodiment of the present application at least includes the reset stage t0, the data write stage t1 and the light-emitting stage t2.

[0090] In some embodiments, in the reset stage t0 , the reset control signal S2 is at a low level, and the first light emitting control signal EM1 , the second light emitting control signal EM2 , and the write control signal S1 are all at high levels.

[0091] In some embodiments, during the data writing phase t1 , the write control signal S1 is at a low level, and the first light emitting control signal EM1 , the second light emitting control signal EM2 , and the reset control signal S2 are all at high levels.

[0092] In some embodiments, during the light-emitting stage t2, both the first light-emitting control signal EM1 and the second light-emitting control signal EM2 are at a low potential, and both the write control signal S1 and the reset control signal S2 are at a high potential.

[0093] Specifically, please refer to Fig. 9 and Fig.10 , Fig.10 is Figure 8 the schematic diagram of the path during the reset stage of the pixel driving circuit shown in Fig. 9 the driving timing shown. During the reset stage t0, the reset control signal S2 is at a low potential, and the sixth transistor T6 and the seventh transistor T7 are turned on under the control of the low potential of the reset control signal S2.

[0094] At this time, the sixth transistor T6 outputs the reset signal VI to the fourth node S to reset the fourth node S. Since the light-emitting device D is electrically connected to the fourth node S, resetting the fourth node S can initialize the light-emitting device D and prevent the residual current of the light-emitting device D in the previous frame from affecting the display of the current frame image.

[0095] Meanwhile, the seventh transistor T7 outputs the reset signal VI to the sixth node R to reset the sixth node R. Since the sixth node R is electrically connected to the first node Q, resetting the sixth node R can reset the first node Q. Since the first node Q is electrically connected to the first end of the storage capacitor Cst, resetting the sixth node R can reset the first end of the storage capacitor Cst and prevent the residual image signal of the previous frame from remaining in the storage capacitor Cst and affecting the display of the current frame image.

[0096] It should be noted that at the same time, the gate of the driving transistor DT is electrically connected to the first node Q, so the potential Vg of the gate of the driving transistor is VI, and the potential of the first pole Vs of the driving transistor DT is VDD. Then, the gate-source voltage difference Vgs of the driving transistor DT = VI - VDD, and VI - VDD < Vth, so the driving transistor DT is turned on and the first transistor T1 is turned off. Where Vth is the threshold voltage of the driving transistor DT.

[0097] In this stage, since the first light-emitting control signal EM1, the second light-emitting control signal EM2, and the write control signal S1 are all at a high potential, the second transistor T2, the third transistor T3, the fourth transistor T4, and the fifth transistor T5 are all turned off.

[0098] Specifically, please refer to Fig. 9 and Fig.11 , Fig.11 is Figure 8 the pixel driving circuit shown in Fig. 9 Schematic diagram of the path of the data writing stage under the driving timing shown. In the data writing stage t1, the data signal DA is at a low potential, and the third transistor T3 and the fourth transistor T4 are turned on under the low potential control of the write control signal S1. At this time, the driving transistor DT is turned on, so that the data signal DA is output to the first node Q through the third transistor T3, the driving transistor DT and the fourth transistor T4. At this time, the first transistor T1 is turned off. At this time, the first light-emitting control signal EM1 is at a high potential, and the second transistor T2 is turned off under the high potential control of the first light-emitting control signal EM1. The second light-emitting control signal EM2 is also at a high potential, and the fifth transistor T5 is turned off under the high potential control of the second light-emitting control signal EM2. The reset control signal S2 is also at a high potential, and the sixth transistor T6 and the seventh transistor T7 are turned off under the high potential control of the reset control signal VI.

[0099] For details, please refer to Fig. 9 as well as Fig.12 , Fig.12 for Figure 8 The pixel driving circuit shown in Fig. 9 Schematic diagram of the path of the light-emitting stage under the driving timing shown. In the light-emitting stage t2, the first light-emitting control signal EM1 is at a low potential, and the second transistor T2 is turned on under the low potential control of the first light-emitting control signal EM1. The second light-emitting control signal EM2 is at a low potential, and the fifth transistor T5 is turned on under the low potential control of the second light-emitting control signal EM2. At this time, the gate of the driving transistor DT maintains an on state based on the voltage stored in the storage capacitor Cst. At this time, the write control signal S1 is at a high potential, and the third transistor T3 and the fourth transistor T4 are turned off under the high potential control of the write control signal S1; the reset control signal S2 is at a high potential, and the sixth transistor T6 and the seventh transistor T7 are turned off under the high potential control of the reset control signal S2.

[0100] Specifically, in the light-emitting stage t2, if there is a leakage problem in the gate of the driving transistor DT and the potential of the first node Q changes, the first transistor T1 will adjust the conduction angle based on the change in the potential of the first node Q, so that the potential difference between the first node Q and the second node A is reduced, so that the conduction angle of the driving transistor DT is less affected by the change in the potential difference between the first node Q and the second node A, and the driving transistor DT can provide a stable driving current for the light-emitting device D, and the light-emitting device D emits light stably, thereby effectively solving the flickering problem of the display screen.

[0101] In some embodiments, see Fig.13 , Fig.13 300 is a third circuit diagram of a pixel driving circuit provided in an embodiment of the present application. Figure 8The difference of the pixel driving circuit 200 shown is that the regulating module 30 includes a dual-gate transistor T11. The first gate of the dual-gate transistor T11 is electrically connected to the first node Q, the second gate of the dual-gate transistor T11 is electrically connected to the sixth node R, the first electrode of the dual-gate transistor T11 is electrically connected to the second node A, and the second electrode of the dual-gate transistor T11 is electrically connected to the fifth node B.

[0102] In the pixel driving circuit 300 provided in this embodiment, by electrically connecting the first gate of the dual-gate transistor T11 to the first node Q and the second gate to the sixth node R, it is possible to shield the influence of the impedance between the first node Q and the sixth node R on the adjustment module 30, so as to better adjust the potential of the second node A, which is beneficial to the stable light emission of the light-emitting device D, avoid the flickering phenomenon, and improve the display effect.

[0103] See also Fig.14 , Fig.14 A schematic diagram of the structure of a display panel provided in an embodiment of the present application. This embodiment also provides a display panel 1000, which includes a data line 1001, a first scan line 1002, a second scan line 1003, a third scan line 1004 and the above-mentioned pixel driving circuit 100 / 200 / 300. Among them, the data line 1001 is used to provide a data signal. The first scan line 1002 is used to provide a first light-emitting control signal. The second scan line 1003 is used to provide a second light-emitting control signal. The third scan line 1004 is used to provide a write control signal. The pixel driving circuit 100 / 200 / 300 is connected to the data line 1001, the first scan line 1002, the second scan line 1003 and the third scan line 1004. The pixel driving circuit 100 / 200 / 300 can be specifically referred to the above description of the pixel driving circuit, which will not be repeated here.

[0104] It should be noted that in the pixel circuit driving circuit 100 / 200 / 300 provided in the aforementioned embodiments of the present application, since the control timing of the first light-emitting control signal and the second light-emitting control signal are consistent, the first light-emitting control signal and the second light-emitting control signal can be connected to the same scan line, thereby saving the layout space of the pixel driving circuit.

[0105] The display panel 1000 provided in this embodiment is based on the setting of the adjustment module in the pixel driving circuit 100 / 200 / 300, thereby effectively solving the flicker problem and improving the display quality.

[0106] See also Fig.15 , Fig.15 A schematic diagram of a method for driving a display panel provided in an embodiment of the present application. Fig.15 As shown, the following steps are included:

[0107] Step S01: In the data writing phase, a data writing module provides a data signal to a first node.

[0108] Specifically, in the data writing stage, the data writing module first provides the data signal to the second node. At this time, the driving transistor is in the on state, so that the data signal is output by the driving transistor to the third node, and then the data writing module outputs the data signal at the third node to the first node.

[0109] Step S02: During the light-emitting stage, the data writing module stops providing the data signal to the first node, the first light-emitting control module outputs the second voltage signal to the fifth node, the regulating module outputs the second voltage signal to the second node based on the potential of the first node, and the driving transistor maintains the on state; and when the potential of the first node rises, the regulating module adjusts the potential of the second node based on the potential of the first node.

[0110] Specifically, in the light-emitting stage, if the potential of the first node rises due to a leakage problem, the adjustment module adjusts the change of the second node accordingly based on the change of the potential of the first node to reduce the change of the potential difference between the first node and the second node, so that the conduction angle of the driving transistor is less affected by the leakage at the first node, and then the driving transistor provides a stable driving current for the light-emitting device. The light-emitting device emits light based on the stable driving current, thereby solving the flicker problem and improving the display quality.

[0111] The above are merely embodiments of the present application and are not intended to limit the patent scope of the present application. Any equivalent structure or equivalent process transformation made using the contents of the present application specification and drawings, or directly or indirectly applied in other related technical fields, are also included in the patent protection scope of the present application.

Claims

1. A pixel driving circuit, characterized in that: include: a driving transistor, wherein a gate of the driving transistor is electrically connected to the first node, a first electrode of the driving transistor is electrically connected to the second node, and a second electrode of the driving transistor is electrically connected to the third node; a light emitting device, wherein a first terminal of the light emitting device is electrically connected to the fourth node, and a second terminal of the light emitting device is electrically connected to the first power supply terminal; a first light-emitting control module, the first light-emitting control module receiving a first light-emitting control signal and being electrically connected to the fifth node and the second power supply terminal, respectively, and the first light-emitting control module being used for outputting a second voltage signal provided by the second power supply terminal to the fifth node under the control of the first light-emitting control signal; a data writing module, the data writing module receiving a data signal and a writing control signal, and being electrically connected to the first node, the second node, the third node and the second power supply terminal respectively, the data writing module being used to output the data signal to the first node under the control of the writing control signal; an adjusting module, the adjusting module being electrically connected to the first node, the second node and the fifth node respectively, and the adjusting module being used to adjust the potential of the second node based on the potential of the first node, wherein the second node is electrically connected to the fifth node; a second light-emitting control module, the second light-emitting control module receiving a second light-emitting control signal and being electrically connected to the third node and the fourth node respectively, the second light-emitting control module being used for outputting the potential of the third node to the fourth node under the control of the second light-emitting control signal; Wherein, the regulating module includes a first transistor; the gate of the first transistor is electrically connected to the first node, the first pole of the first transistor is electrically connected to the second node, the second pole of the first transistor is electrically connected to the fifth node, the second node is a connection point from the second power supply end to the first pole of the driving transistor, and the fifth node is another connection point from the second power supply end to the first pole of the driving transistor.

2. The pixel driving circuit according to claim 1, characterized in that: The first transistor is an N-type transistor.

3. The pixel driving circuit according to claim 1, characterized in that: The first light emitting control module includes a second transistor; The gate of the second transistor is connected to the first light emitting control signal, the first electrode of the second transistor is electrically connected to the second power supply terminal, and the second electrode of the second transistor is electrically connected to the fifth node.

4. The pixel driving circuit according to claim 1, characterized in that: The data writing module includes a third transistor, a fourth transistor and a storage capacitor; The gate of the third transistor is connected to the write control signal, the first electrode of the third transistor is connected to the data signal, and the second electrode of the third transistor is electrically connected to the second node; The gate of the fourth transistor is connected to the write control signal, the first electrode of the fourth transistor is electrically connected to the first node, and the second electrode of the fourth transistor is electrically connected to the third node; The first end of the storage capacitor is electrically connected to the first node, and the second end of the storage capacitor is electrically connected to the second power supply end.

5. The pixel driving circuit according to claim 1, characterized in that: The second light emitting control module includes a fifth transistor; The gate of the fifth transistor is connected to the second light emitting control signal, the first electrode of the fifth transistor is electrically connected to the third node, and the second electrode of the fifth transistor is electrically connected to the fourth node.

6. The pixel driving circuit according to claim 1, characterized in that: The pixel driving circuit further includes a sixth transistor and a seventh transistor; The gate of the sixth transistor is connected to a reset control signal, the first electrode of the sixth transistor is connected to a reset signal, and the second electrode of the sixth transistor is electrically connected to the fourth node; The gate of the seventh transistor is connected to the reset control signal, the first electrode of the seventh transistor is connected to the reset signal, the second electrode of the seventh transistor is electrically connected to a sixth node, wherein the sixth node is electrically connected to the first node.

7. The pixel driving circuit according to claim 6, characterized in that: The regulating module includes a dual-gate transistor; The first gate of the dual-gate transistor is electrically connected to the first node, the second gate of the dual-gate transistor is electrically connected to the sixth node, the first electrode of the dual-gate transistor is electrically connected to the second node, and the second electrode of the dual-gate transistor is electrically connected to the fifth node.

8. A display panel, characterized in that: include: A data line, the data line is used to provide a data signal; A first scan line, wherein the first scan line is used to provide a first light emitting control signal; a second scan line, the second scan line being used to provide a second light emitting control signal; a third scan line, the third scan line being used to provide a write control signal; as well as, The pixel driving circuit according to any one of claims 1 to 7, wherein the pixel driving circuit is electrically connected to the data line, the first scan line, the second scan line, and the third scan line.

9. A method for driving a display panel as claimed in claim 8, characterized in that: include: In the data writing stage, the data writing module provides the data signal to the first node; In the light emitting stage, the data writing module stops providing the data signal to the first node, the first light emitting control module outputs the second voltage signal to the fifth node, the regulating module outputs the second voltage signal to the second node based on the potential of the first node, and the driving transistor maintains the on state; And when the potential of the first node rises, the regulating module regulates the potential of the second node based on the potential of the first node.

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