Power consumption prediction method, device, equipment and storage medium

Abstract

This application provides a power consumption prediction method, apparatus, device, and storage medium that can be applied to device memory power consumption prediction. The method includes: obtaining instruction data for the device memory in a target scenario, the instruction data being used to indicate the state changes of the memory within a preset time period; determining the power consumption corresponding to each state of the memory within the preset time period based on the instruction data; determining the average power consumption of the memory within the preset time period based on the power consumption corresponding to each state of the memory within the preset time period; and using the average power consumption as the predicted power consumption of the memory. This prediction scheme improves the accuracy and reliability of the prediction results.

Description

Technical Field

[0001] The present application relates to the field of semiconductor technology, and in particular to a power consumption prediction method, apparatus, device, and storage medium. Background Art

[0002] Currently, dynamic random access memory (DRAM) power consumption data is determined based on the current (IDD) values ​​under different application modes defined in Jedec specifications. For example, Jedec defines IDD0 as the current value of frequently switching a memory cell (bank). However, in real-world applications, such an application mode does not exist, and the sequence of instructions sent by the device processor to the memory is random and unpredictable. Therefore, how to achieve reliable prediction of device memory power consumption is an urgent problem. Summary of the Invention

[0003] The embodiments of the present application provide a power consumption prediction method, apparatus, device, and storage medium, which improve the accuracy and reliability of prediction results.

[0004] A first aspect of an embodiment of the present application provides a power consumption prediction method, including:

[0005] Acquire instruction data of a device memory in a target scenario, where the instruction data is used to indicate a state change of the memory within a preset time period;

[0006] determining, according to the instruction data, the power consumption corresponding to each state of the memory within the preset time period;

[0007] determining an average power consumption of the memory within the preset time period according to the power consumption corresponding to each state of the memory within the preset time period;

[0008] The average power consumption is used as the predicted power consumption of the memory.

[0009] In an optional embodiment of the first aspect of the present application, the instruction data includes an instruction sequence sent by the device processor to the memory within the preset time period, and a duration of the memory state corresponding to each instruction in the instruction sequence;

[0010] The obtaining of instruction data from a device memory in a target scenario includes:

[0011] Acquire the instruction sequence of the device memory in the target scenario from a protocol analyzer.

[0012] In an optional embodiment of the first aspect of the present application, determining the power consumption corresponding to each state of the memory within the preset time period according to the instruction data includes:

[0013] Acquire a first state corresponding to a first instruction in the instruction data and a duration of the first state; the first instruction is any instruction in the instruction sequence, and the first state includes a state of at least one storage unit in the memory;

[0014] Obtaining a first predicted current value of the memory in the first state;

[0015] A first predicted power consumption corresponding to the first state is determined according to the first predicted current value, the duration of the first state, and a preset voltage value.

[0016] In an optional embodiment of the first aspect of the present application, obtaining a first predicted current value of the memory in the first state includes:

[0017] Obtaining a first preset current formula corresponding to the first state;

[0018] A first predicted current value of the memory in the first state is obtained through the first preset current formula.

[0019] In an optional embodiment of the first aspect of the present application, the state of any storage unit in the memory includes any one of the following:

[0020] Close state, open state, refresh state.

[0021] In an optional embodiment of the first aspect of the present application, the method further includes:

[0022] Obtaining a first measured current value of the memory in the first state;

[0023] By comparing the first measured current value and the first predicted current value, it is verified whether the first preset current formula corresponding to the first state is reasonable.

[0024] In an optional embodiment of the first aspect of the present application, verifying whether the first preset current formula corresponding to the first state is reasonable by comparing the first measured current value with the first predicted current value includes:

[0025] If the absolute value of the difference between the first measured current value and the first predicted current value is less than a threshold, it is determined that the first preset current formula is reasonable; or

[0026] If the absolute value of the difference between the first measured current value and the first predicted current value is greater than or equal to the threshold, it is determined that the first preset current formula is unreasonable.

[0027] In an optional embodiment of the first aspect of the present application, obtaining a first measured current value of the memory in the first state includes:

[0028] collecting, by a detection device, a current value of a device power supply during a period corresponding to the first state;

[0029] The current value of the device power supply during the period corresponding to the first state is used as the first measured current value.

[0030] In an optional embodiment of the first aspect of the present application, determining the average power consumption of the memory within the preset period according to the power consumption corresponding to each state of the memory within the preset period includes:

[0031] determining the total power consumption of the memory within the preset period according to the power consumption corresponding to each state of the memory within the preset period;

[0032] The average power consumption of the memory during the preset time period is determined according to the total power consumption and the total duration of the preset time period.

[0033] In an optional embodiment of the first aspect of the present application, the method further includes: obtaining a ratio of power consumption corresponding to each state of the memory in the preset time period to the total power consumption of the memory in the preset time period;

[0034] Determining a state power consumption distribution diagram of the memory according to a ratio of the power consumption corresponding to each state to the total power consumption;

[0035] The state power consumption distribution diagram is displayed, and the state power consumption distribution diagram is used to guide testers to improve the power consumption of the device.

[0036] In an optional embodiment of the first aspect of the present application, the target scenario includes any one of the following:

[0037] Standby, video playback, audio playback, text display, game execution.

[0038] A second aspect of an embodiment of the present application provides a power consumption prediction device, including:

[0039] An acquisition module, configured to acquire instruction data of a device memory in a target scenario, wherein the instruction data is used to indicate a state change of the memory within a preset time period;

[0040] a processing module, configured to determine, according to the instruction data, the power consumption corresponding to each state of the memory within the preset time period;

[0041] determining an average power consumption of the memory within the preset time period according to the power consumption corresponding to each state of the memory within the preset time period;

[0042] The average power consumption is used as the predicted power consumption of the memory.

[0043] In an optional embodiment of the second aspect of the present application, the instruction data includes an instruction sequence sent by the device processor to the memory within the preset time period, and a duration of the memory state corresponding to each instruction in the instruction sequence;

[0044] The acquisition module is used to acquire the instruction sequence of the device memory in the target scenario from a protocol analyzer.

[0045] In an optional embodiment of the second aspect of the present application, the acquisition module is configured to acquire a first state corresponding to a first instruction in the instruction data and a duration of the first state; the first instruction is any instruction in the instruction sequence, and the first state includes a state of at least one storage unit in the memory;

[0046] The acquisition module is configured to acquire a first predicted current value of the memory in the first state;

[0047] The processing module is configured to determine a first predicted power consumption corresponding to the first state according to the first predicted current value, a duration of the first state, and a preset voltage value.

[0048] In an optional embodiment of the second aspect of the present application, the acquisition module is configured to:

[0049] Obtaining a first preset current formula corresponding to the first state;

[0050] A first predicted current value of the memory in the first state is obtained through the first preset current formula.

[0051] In an optional embodiment of the second aspect of the present application, the state of any storage unit in the memory includes any one of the following:

[0052] Close state, open state, refresh state.

[0053] In an optional embodiment of the second aspect of the present application, the acquisition module is used to acquire a first measured current value of the memory in the first state;

[0054] The processing module is used to verify whether a first preset current formula corresponding to the first state is reasonable by comparing the first measured current value with the first predicted current value.

[0055] In an optional embodiment of the second aspect of the present application, the processing module is configured to:

[0056] If the absolute value of the difference between the first measured current value and the first predicted current value is less than a threshold, it is determined that the first preset current formula is reasonable; or

[0057] If the absolute value of the difference between the first measured current value and the first predicted current value is greater than or equal to the threshold, it is determined that the first preset current formula is unreasonable.

[0058] In an optional embodiment of the second aspect of the present application, the acquisition module is configured to:

[0059] collecting, by a detection device, a current value of a device power supply during a period corresponding to the first state;

[0060] The current value of the device power supply during the period corresponding to the first state is used as the first measured current value.

[0061] In an optional embodiment of the second aspect of the present application, the processing module is configured to:

[0062] determining the total power consumption of the memory within the preset period according to the power consumption corresponding to each state of the memory within the preset period;

[0063] The average power consumption of the memory during the preset time period is determined according to the total power consumption and the total duration of the preset time period.

[0064] In an optional embodiment of the second aspect of the present application, the power consumption prediction device further includes: a display module.

[0065] The acquisition module is configured to acquire a ratio of the power consumption corresponding to each state of the memory within the preset time period to the total power consumption of the memory within the preset time period;

[0066] The processing module is configured to determine a state power consumption distribution diagram of the memory according to a ratio of the power consumption corresponding to each state to the total power consumption;

[0067] The display module is used to display the state power consumption distribution diagram, and the state power consumption distribution diagram is used to guide testers to improve the power consumption of the device.

[0068] In an optional embodiment of the second aspect of the present application, the target scenario includes any one of the following:

[0069] Standby, video playback, audio playback, text display, game execution.

[0070] A third aspect of the embodiments of the present application provides an electronic device, including:

[0071] Memory;

[0072] processor; and

[0073] computer programs;

[0074] The computer program is stored in the memory and is configured to be executed by the processor to implement the method as described in any one of the first aspects.

[0075] A fourth aspect of an embodiment of the present application provides a computer-readable storage medium having a computer program stored thereon, wherein the computer program is executed by a processor to implement the method as described in any one of the first aspects.

[0076] A fifth aspect of the embodiments of the present application provides a computer program product, including a computer program, which implements any one of the methods in the first aspect when executed by a processor.

[0077] Embodiments of the present application provide a power consumption prediction method, apparatus, device, and storage medium applicable to device memory power consumption prediction. The method comprises: obtaining instruction data for the device memory in a target scenario, the instruction data being used to indicate changes in the memory state within a preset time period; determining the power consumption corresponding to each state of the memory within the preset time period based on the instruction data; determining the average power consumption of the memory within the preset time period based on the power consumption corresponding to each state of the memory within the preset time period; and using the average power consumption as the predicted power consumption of the memory. This prediction scheme improves the accuracy and reliability of the prediction results. BRIEF DESCRIPTION OF THE DRAWINGS

[0078] In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, a brief introduction will be given below to the drawings required for use in the embodiments or the description of the prior art. Obviously, the drawings described below are some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative labor.

[0079] Figure 1 A schematic diagram of a memory structure provided in an embodiment of the present application;

[0080] Figure 2 A flowchart of a power consumption prediction method provided in an embodiment of the present application;

[0081] Figure 3 A schematic diagram of instruction sequences corresponding to different currents provided in an embodiment of the present application;

[0082] Figure 4 A flowchart of a power consumption prediction method provided in an embodiment of the present application;

[0083] Figure 5 A state power consumption distribution diagram provided in an embodiment of the present application;

[0084] Figure 6 A schematic diagram of the structure of a power consumption prediction device provided in an embodiment of the present application;

[0085] Figure 7 A schematic diagram of the structure of a power consumption prediction device provided in an embodiment of the present application;

[0086] Figure 8 A hardware structure diagram of an electronic device provided in an embodiment of the present application.

[0087] The above drawings illustrate specific embodiments of the present application, which will be described in more detail below. These drawings and the textual description are not intended to limit the scope of the present application in any way, but rather to illustrate the concepts of the present application to those skilled in the art by reference to specific embodiments. DETAILED DESCRIPTION

[0088] To make the purpose, technical solutions, and advantages of the embodiments of this application more clear, the technical solutions in the embodiments of this application will be clearly and completely described below in conjunction with the drawings in the embodiments of this application. Obviously, the described embodiments are part of the embodiments of this application, not all of the embodiments. Based on the embodiments in this application, all other embodiments obtained by ordinary technicians in this field without making creative efforts are within the scope of protection of this application.

[0089] The terms "first," "second," and the like in the description, claims, and accompanying drawings of the embodiments of the present application are used to distinguish similar objects and are not necessarily used to describe a particular order or precedence. It should be understood that the terms used in this manner are interchangeable where appropriate, such that the embodiments of the present application described herein can be practiced in an order other than that illustrated or described herein.

[0090] It should be understood that the terms "include" and "have" and any variations thereof as used herein are intended to cover non-exclusive inclusions. For example, a process, method, system, product or apparatus that includes a series of steps or elements is not necessarily limited to those steps or elements expressly listed, but may include other steps or elements not expressly listed or inherent to such process, method, product or apparatus.

[0091] In the description of the embodiments of the present application, the term "corresponding" may indicate a direct or indirect correspondence between the two, or an association relationship between the two, or a relationship between indication and being indicated, configuration and being configured, etc.

[0092] Before introducing the technical solutions provided by the embodiments of the present application, a brief description of the relevant contents and professional terms involved in the embodiments of the present application is first given.

[0093] 1) Memory is a crucial component of electronic devices, also known as internal memory or main memory. It temporarily stores computational data within the CPU and data exchanged with external storage devices such as hard drives. It serves as a bridge between external memory and the CPU. All programs within the device run in memory, and memory performance impacts the overall performance of the device. As soon as the device begins operating, the system transfers the required data from memory to the CPU for computation. Once the computation is complete, the CPU transmits the result. Memory performance determines the overall speed of the device. Memory can be categorized into the following types: random access memory (RAM), read-only memory (ROM), dynamic random access memory (DRAM), static random access memory (SRAM), programmable read-only memory (PROM), EPROM (electrically programmable read-only memory), EEPROM (electrically programmable / erasable read-only memory), and flash memory (FLASH).

[0094] 2) Dynamic random access memory (DRAM) is a type of semiconductor memory that uses the amount of charge stored in a capacitor to represent whether a binary bit is 1 or 0. Because transistors in reality leak current, the amount of charge stored on the capacitor is insufficient to accurately determine the data, resulting in data corruption. Therefore, periodic charging is an unavoidable requirement for DRAM. This requirement for periodic refreshes earns it the name "dynamic" memory. In contrast, static random access memory (SRAM) maintains data storage even without refreshing once data is stored.

[0095] 3) Basic Structure of a DRAM Device: Each DRAM memory cell consists of a MOS transistor, a capacitor, a word line (row), and a bit line (column). The memory array of a DRAM device includes multiple of these memory cells, and the memory array generally accounts for 50-65% of the total DRAM device area. The remaining area is primarily occupied by peripheral circuitry. In each memory cell, the MOS transistor is controlled by the word line, acting as a switch to control the read, write, and update of the memory cell. During a write operation, charge flows from the bit line and is stored in the capacitor; during a read operation, charge flows from the capacitor and is fed back to the bit line. The peripheral circuitry of a DRAM device includes a row address decoder, a column address decoder, a row input buffer (X input buffer), a column input buffer (Y input buffer), a write driver, an input / output (I / O) port, and a sense amplifier. The function of the row and column address decoders is to decode the row and column addresses in the external instructions when an external instruction is issued to perform a read / write operation on a certain storage unit to obtain the address of the internal storage array of the DRAM device, and then control the byte line and bit line to open them, so as to perform read / write operations on the specified storage unit.

[0096] 4) Protocol analyzer (PA) is a special test tool that monitors the data flow in a data communication system and verifies whether the data exchange is carried out reasonably in accordance with the provisions of the protocol.

[0097] 5) Precharge refers to rewriting the data of all storage cells in the working row in the memory, resetting the row address, and releasing the read amplifier to prepare for the work of the new row.

[0098] The embodiments of the present application relate to power consumption analysis / prediction of a system or device, and in particular to memory power consumption analysis / prediction under different application modes (states). Memory power consumption prediction is performed using a predefined memory preset current formula and DRAM IDDx test data, which can be used for system power consumption optimization and memory power consumption improvement.

[0099] For ease of understanding, the following Figure 1 Provides a brief description of the internal structure of device memory.

[0100] For example, Figure 1 A memory structure diagram provided in an embodiment of the present application. Figure 1As shown, the memory structure includes a core array circuit area and a peripheral logic circuit area, and the peripheral logic circuit area is connected to the core array circuit area through a data bus. The core array circuit area includes, for example, two groups of memory cells (banks), such as Figure 1 In BG (bankgroup) 0 and BG1, each group of storage cells includes 4 storage cells, such as Figure 1 BG0 includes banks 0 to 3, and BG1 includes banks 4 to 7. The peripheral logic circuit area is responsible for parsing instructions from the data bus, while the core array circuit area is responsible for data storage.

[0101] It should be noted that the above memory structure is only an example, and more storage units and external interfaces can be expanded according to actual application requirements, and this embodiment does not impose any limitation on this.

[0102] It should also be noted that the above memory structure has three power supply inputs, namely VDD1, VDD2 and VDDQ, which respectively power the core array circuit area, peripheral logic circuit area and interface area of ​​the memory structure.

[0103] Currently, memory power consumption data is determined based on the current values ​​under different application modes defined in the Jedec specification. The Jedec specification defines current values ​​under 15 different application modes as shown in Table 1, and each application mode corresponds to a DRAM memory (access) sequence. However, in actual applications, DRAM memory sequences are random and unpredictable. Therefore, the power consumption determined based on the current values ​​defined in the Jedec specification does not represent the actual device power consumption. Although the measured power consumption data can reflect the actual device power consumption results, this result cannot guide testers to optimize system power consumption and improve memory power consumption.

[0104] Table 1

[0105] Current symbol Application mode / status IDD0 Bank cycle open and close IDD2N Bank off, clock (CK) on, not in low power mode IDD2NS Bank off, CK off, not in low power mode IDD2P Bank closed, CK open, low power mode IDD2PS Bank off, CK off, low power mode IDD3N Bank on, CK on, not in low power mode IDD3NS Bank open, CK closed, not in low power mode IDD3P Bank open, CK open, low power mode IDD3PS Bank open, CK closed, low power mode IDD4R Bank is open and reading IDD4W The bank is open and writing IDD5 Continuous refresh of all banks IDD5AB Distributed all bank refresh IDD5PB Distributed single bank refresh IDD6 Self-refresh

[0106] In this regard, the purpose of the technical solution provided in the embodiment of the present application is to improve the dimensional difference between the definition of IDD in the Jedec specification and the actual power consumption results of the device, and determine the memory power consumption corresponding to each instruction in the DRAM memory sequence in actual application through the predefined preset current formula and the current value defined in the Jedec specification. It can not only obtain the total power consumption of the device, but also obtain the proportion of the memory power consumption corresponding to each instruction in the DRAM memory sequence to the total power consumption, thereby guiding testers to optimize system power consumption and improve memory power consumption.

[0107] The technical solutions provided by the embodiments of the present application are described in detail below through specific embodiments. It should be noted that the technical solutions provided by the embodiments of the present application may include part or all of the following contents, and the following specific embodiments may be combined with each other, and the same or similar concepts or processes may not be repeated in some embodiments.

[0108] Figure 2 This is a flow chart of a power consumption prediction method provided in an embodiment of the present application. Figure 2 As shown, the power consumption prediction method of this embodiment includes the following steps:

[0109] Step 201: Acquire instruction data of a device memory in a target scenario, where the instruction data is used to indicate a state change of the memory within a preset time period.

[0110] In an alternative embodiment of this embodiment, command data of the device memory in the target scenario is obtained from a protocol analyzer PA, wherein the PA is used to capture the communication process between the device processor and the memory and analyze the command sequence sent by the device processor to the memory within a preset time period.

[0111] Optionally, the instruction data includes an instruction sequence sent by the device processor to the memory within a preset time period, and the duration of the memory state corresponding to each instruction in the instruction sequence. The instruction sequence within the preset time period includes at least one instruction. After the processor sends an instruction to the memory, it usually waits for a period of time before sending another instruction. Accordingly, each instruction corresponds to a time length, which is the duration of the memory state corresponding to each instruction. The memory state can be understood as the state of at least one bank in the memory. Figure 3 Provides a graphical illustration of the instruction data.

[0112] For example, Figure 3 Schematic diagram of instruction sequences corresponding to different currents provided in the embodiment of the present application. Figure 3 As shown, the instruction sequence corresponding to current IDD0 includes an Act0 instruction and a Pre0 instruction, which instruct to open a bank, wait for a period of time, close the bank, and wait for a period of time. The instruction sequence corresponding to current IDD2P includes a PreAll instruction, which instructs the memory to enter low-power mode and maintain this state without any other state changes. The instruction sequence corresponding to current IDD2PS includes a PreAll instruction, which instructs the memory to enter low-power mode, stop the clock input, and maintain this state without any other state changes. The instruction sequence corresponding to current IDD2N includes a PreAll instruction, which instructs the memory to enter the pre-charge state and maintain this state without any other state changes.

[0113] Based on the above example, by analyzing each instruction in the read instruction data, it is possible to determine the memory state changes within a preset period of time, such as determining whether the memory opened and then closed a bank within the preset period. The acquired instruction data provides reliable measured data for subsequent power consumption analysis, thereby improving the accuracy of power consumption prediction.

[0114] Optionally, the target scenario includes any one of the following: standby, video playback, audio playback, text display, and game execution.

[0115] Step 202: Determine the power consumption corresponding to each state of the memory within a preset time period according to the instruction data.

[0116] For ease of description, the following uses any instruction in the instruction data, such as a first instruction, as an example. The first instruction corresponds to a first state of the memory, and the first state includes a state of at least one storage unit in the memory. The state of any storage unit in the memory includes any of the following: a closed state, an open state, and a refresh state.

[0117] The following describes how to determine the power consumption corresponding to the first state of the memory according to the first instruction in the instruction data. Specifically, determining the power consumption corresponding to the first state of the memory within a preset time period according to the instruction data may include the following steps:

[0118] Step 2021: Obtain a first state corresponding to a first instruction in the instruction data and a duration of the first state.

[0119] The duration of the first state corresponding to the first instruction is determined according to the time when the memory receives the first instruction and the time when another instruction after the first instruction is received.

[0120] Step 2022: Obtain a first predicted current value of the memory in the first state.

[0121] The first preset current value of the memory in the first state can be determined based on a first preset current formula corresponding to the first state. The first preset current formula corresponding to the first state is a predefined current formula including one or more currents shown in Table 1.

[0122] Exemplarily, the instruction corresponding to the first state is the processor sending a pair of bank (two bank) open and close instructions. Accordingly, the current consumed by the memory in the first state, i.e., the first preset current value Iact, can be determined based on a first preset current formula corresponding to the first state. The first preset current formula is defined as: Iact = IDD0–6 / 8*IDD2P-IDD2N+IDD2P. Therefore, it can be seen that the first preset current formula includes the three currents shown in Table 1, namely IDD0, IDD2P, and IDD2N.

[0123] The following describes the derivation process of the first preset current formula Iact=IDD0–6 / 8*IDD2P-IDD2N+IDD2P in the above example:

[0124] In step a, Jedec defines IDD0 as the current consumed by frequently switching a bank on and off. However, this application pattern doesn't exist in practice. Therefore, the inventors define IDD0 as the current consumed by sending a pair of bank open and close commands, Iact, the eight-bank standby current split into eight equal parts, Ipi, and the peripheral logic circuit current, Iper. This current combination better aligns with actual memory application patterns, scenarios, and states.

[0125] In step b, use the application mode current defined in step a to express the IDD current defined by Jedec, for example: IDD0 = Iact + 8*Ipi + Iper. The Jedec definition for IDD2N is the standby current, broken down by application mode into IDD2N = 8*Ipi + Iper. The Jedec definition for IDD2P is the low-power standby current, broken down by application mode into IDD2P = 8*Ipi. The current formulas for the other application modes shown in Table 1 are defined similarly.

[0126] In step c, reverse-substitute the application mode current into the IDD current defined by Jedec to form an interlocking formula. For example, the power consumption of a pair of bank open and close instructions is Iact = IDD0–6 / 8*IDD2P-IDD2N+IDD2P. The IDD2P current is introduced because the peripheral logic circuit consumes almost no power in low-power mode. The main contribution comes from the power consumption of the eight banks in the core array circuit area.

[0127] The above embodiment only describes the first preset current formula corresponding to the first state of the memory. Preset current formulas corresponding to other states of the memory can be defined in a similar manner.

[0128] The defined preset current formula includes the current defined by Jedec, which can link the IDDx defined in the Jedec data sheet with the current of the actual memory application model, thereby predicting memory power consumption based on DRAM IDDx test data and multiple preset current formulas.

[0129] Based on the above example, in actual applications, a certain state of a memory in a certain period of time generally includes states of multiple banks, and the states of the multiple banks coexist.

[0130] In an optional embodiment of this embodiment, a first preset current formula corresponding to the first state is obtained from a database; a first predicted current value of the memory in the first state is obtained using the first preset current formula. For example, the first preset current formula corresponding to the first state is Iact = IDD0 – 6 / 8 * IDD2P - IDD2N + IDD2P. Substituting the test data IDD0, IDD2P, and IDD2N into the formula, the first predicted current value Iact of the memory in the first state is obtained. The test data IDD0, IDD2P, and IDD2N are measured based on the Jedec specification provided by the DRAM manufacturer.

[0131] Step 2023: Determine a first predicted power consumption corresponding to the first state according to the first predicted current value, the duration of the first state, and the preset voltage value.

[0132] The first predicted power consumption W1 corresponding to the first state can be expressed as: W1=U×I1×t1, where U represents a preset voltage value, the preset voltage value is a fixed value, I1 represents a first preset current value, for example, I1 is Iact, and t1 represents the duration of the first state.

[0133] Step 203: Determine the average power consumption of the memory within the preset period according to the power consumption corresponding to each state of the memory within the preset period.

[0134] In an optional embodiment of this embodiment, the total power consumption of the memory in the preset period is determined according to the power consumption corresponding to each state of the memory in the preset period; and the average power consumption of the memory in the preset period is determined according to the total power consumption and the total duration of the preset period.

[0135] For example, assume that the processor sends three different instructions to the memory within a preset time period, and the durations of instructions 1, 2, and 3 are t1, t2, and t3 respectively. The memory state corresponding to instruction 1 is state 1, and the predicted current value of state 1 is recorded as I1. The memory state corresponding to instruction 2 is state 2, and the predicted current value of state 2 is recorded as I2. The memory state corresponding to instruction 3 is state 3, and the predicted current value of state 3 is recorded as I3. The power supply voltage of the memory is constant and is recorded as U. Then, the total power consumption of the memory within the preset time period is W = U×I1×t1+U×I2×t2+U×I3×t3, and the average power consumption of the memory within the preset time period is

[0136] Step 204: Use the average power consumption as the predicted power consumption of the memory.

[0137] Step 205: Output the predicted power consumption of the memory.

[0138] In an optional embodiment of this embodiment, the predicted power consumption of the memory is pushed to the terminal device of the tester, or the predicted power consumption of the memory is directly displayed on the display interface of the processing device.

[0139] The power consumption prediction method shown in the embodiment of the present application obtains instruction data of the device memory in the target scenario, and the instruction data is used to indicate the state change of the memory within a preset time period; determines the power consumption corresponding to each state of the memory within the preset time period based on the instruction data; determines the average power consumption of the memory within the preset time period based on the power consumption corresponding to each state of the memory within the preset time period; and uses the average power consumption as the predicted power consumption of the memory. The above scheme determines the actual state change of the memory within the preset time period by analyzing the instruction data sent by the processor to the memory, obtains the power consumption corresponding to each state within the preset time period, and obtains the overall power consumption of the memory within the preset time period by combining the length of the preset time period. The prediction result can represent the actual memory power consumption, thereby improving the accuracy and reliability of the prediction result.

[0140] The above embodiment shows a preset current formula for a memory state, such as a first preset current formula corresponding to the first state. The preset current formula is a predefined current formula, and before using the current formula to predict memory power consumption, the rationality of the current formula needs to be verified.

[0141] In one embodiment, a first measured current value of the memory in the first state is obtained, and by comparing the first measured current value with the first predicted current value, it is verified whether a first preset current formula corresponding to the first state is reasonable.

[0142] The first predicted current value is determined based on a first preset current formula corresponding to the first state.

[0143] Optionally, a detection device is used to collect a current value on the device power supply during a period corresponding to the first state; and the current value on the device power supply during the period corresponding to the first state is used as the first measured current value. Specifically, the first measured current value is obtained by collecting a current value on the VDD power supply of the device memory during the same period (i.e., the period during which the memory is in the first state). The detection device may be a multimeter.

[0144] In one possible case, if the absolute value of the difference between the first measured current value and the first predicted current value is less than a threshold value, it is determined that the first preset current formula is reasonable.

[0145] In one possible case, if the absolute value of the difference between the first measured current value and the first predicted current value is greater than or equal to a threshold, it is determined that the first preset current formula is unreasonable.

[0146] If the first preset current formula is unreasonable, the tester needs to check whether the formula derivation process is correct, whether the formula parameters (such as the number of device storage units, etc.) are set correctly, etc. After readjusting the formula, re-verify the formula until it meets the above requirements.

[0147] Based on the above embodiments, the following embodiment shows how to determine the power consumption distribution of different states of a memory within a preset time period.

[0148] Figure 4 This is a flow chart of a power consumption prediction method provided in an embodiment of the present application. Figure 4 As shown, the power consumption prediction method of this embodiment includes the following steps:

[0149] Step 401: Obtain a ratio of the power consumption corresponding to each state of the memory within a preset period of time to the total power consumption of the memory within the preset period of time.

[0150] The step of obtaining the power consumption corresponding to each state of the memory in the preset period in this step can refer to step 202 of the above embodiment. The total power consumption of the memory in the preset period in this step is the sum of the power consumption corresponding to each state of the memory in the preset period.

[0151] Step 402: Determine a state power consumption distribution diagram of the memory according to the ratio of the power consumption corresponding to each state to the total power consumption.

[0152] Step 403: Display a state power consumption distribution diagram, which is used to guide testers to improve the power consumption of the device.

[0153] For example, Figure 5 A state power consumption distribution diagram provided in an embodiment of the present application. Figure 5The power consumption distribution of the memory state within a preset time period is shown when the voltage of the memory is constant at U in the standby scenario. The power consumption corresponding to states 1 to 5 accounts for 75%, 4%, 11%, 3%, and 7%, respectively. Based on the state power consumption distribution diagram, testers can know that the memory state with the largest power consumption in the standby scenario is state 1. If the state corresponding to the expected maximum power consumption in the standby scenario is state 1, then it meets the test requirements of the standby scenario. If the state corresponding to the expected maximum power consumption in the standby scenario is state 4, then it does not meet the test requirements of the standby scenario. Testers can optimize the memory power consumption in a targeted manner based on the power consumption proportion data. For example, state 1 involves the opening and closing of two banks in the memory, and the power consumption corresponding to state 1 is too high. The performance of these two banks can be tested in a targeted manner to point out the direction for memory power consumption optimization and improve the optimization efficiency of memory power consumption.

[0154] The above describes the power consumption prediction method provided by the embodiment of the present application. The following describes the power consumption prediction device provided by the embodiment of the present application.

[0155] The embodiment of the present application can divide the power consumption prediction device into functional modules according to the above method embodiment. For example, each functional module can be divided corresponding to each function, or two or more functions can be integrated into one processing module. The above integrated modules can be implemented in the form of hardware or in the form of software functional modules. It should be noted that the division of modules in the embodiment of the present application is schematic and is only a logical functional division. There may be other division methods in actual implementation. The following is an example of dividing each functional module corresponding to each function.

[0156] Figure 6 This is a schematic diagram of the structure of a power consumption prediction device provided in an embodiment of the present application. Figure 6 As shown, the power consumption prediction device 600 provided in this embodiment includes: an acquisition module 601 and a processing module 602 .

[0157] An acquisition module 601 is configured to acquire instruction data of a device memory in a target scenario, wherein the instruction data is used to indicate a state change of the memory within a preset period of time;

[0158] A processing module 602 is configured to determine the power consumption corresponding to each state of the memory within the preset time period according to the instruction data;

[0159] determining an average power consumption of the memory within the preset time period according to the power consumption corresponding to each state of the memory within the preset time period;

[0160] The average power consumption is used as the predicted power consumption of the memory.

[0161] In an optional embodiment of this embodiment, the instruction data includes an instruction sequence sent by the device processor to the memory within the preset time period, and a duration of the memory state corresponding to each instruction in the instruction sequence;

[0162] The acquisition module 601 is configured to acquire, from a protocol analyzer, an instruction sequence stored in the device memory in the target scenario.

[0163] In an optional embodiment of this embodiment, the acquisition module 601 is configured to acquire a first state corresponding to a first instruction in the instruction data and a duration of the first state; the first instruction is any instruction in the instruction sequence, and the first state includes a state of at least one storage unit in the memory;

[0164] The acquisition module 601 is further configured to acquire a first predicted current value of the memory in the first state;

[0165] The processing module 602 is configured to determine a first predicted power consumption corresponding to the first state according to the first predicted current value, the duration of the first state, and a preset voltage value.

[0166] In an optional embodiment of this embodiment, the acquisition module 601 is used to:

[0167] Obtaining a first preset current formula corresponding to the first state;

[0168] A first predicted current value of the memory in the first state is obtained through the first preset current formula.

[0169] In an optional embodiment of this embodiment, the state of any storage unit in the memory includes any one of the following:

[0170] Close state, open state, refresh state.

[0171] In an optional embodiment of this embodiment, the acquisition module 601 is configured to acquire a first measured current value of the memory in the first state;

[0172] The processing module 602 is configured to verify whether a first preset current formula corresponding to the first state is reasonable by comparing the first measured current value with the first predicted current value.

[0173] In an optional embodiment of this embodiment, the processing module 602 is configured to:

[0174] If the absolute value of the difference between the first measured current value and the first predicted current value is less than a threshold, it is determined that the first preset current formula is reasonable; or

[0175] If the absolute value of the difference between the first measured current value and the first predicted current value is greater than or equal to the threshold, it is determined that the first preset current formula is unreasonable.

[0176] In an optional embodiment of this embodiment, the acquisition module 601 is used to:

[0177] collecting, by a detection device, a current value of a device power supply during a period corresponding to the first state;

[0178] The current value of the device power supply during the period corresponding to the first state is used as the first measured current value.

[0179] In an optional embodiment of this embodiment, the processing module 602 is configured to:

[0180] determining the total power consumption of the memory within the preset period according to the power consumption corresponding to each state of the memory within the preset period;

[0181] The average power consumption of the memory during the preset time period is determined according to the total power consumption and the total duration of the preset time period.

[0182] Figure 7 This is a schematic diagram of the structure of a power consumption prediction device provided in an embodiment of the present application. Figure 6 Based on the device shown, Figure 7 As shown, the power consumption prediction device 600 of this embodiment further includes: a display module 603.

[0183] An acquisition module 601 is configured to acquire a ratio of the power consumption corresponding to each state of the memory within the preset period to the total power consumption of the memory within the preset period;

[0184] The processing module 602 is configured to determine a state power consumption distribution diagram of the memory according to a ratio of the power consumption corresponding to each state to the total power consumption;

[0185] The display module 603 is used to display the state power consumption distribution diagram, and the state power consumption distribution diagram is used to guide testers to improve the power consumption of the device.

[0186] In an optional embodiment of this embodiment, the target scenario includes any one of the following:

[0187] Standby, video playback, audio playback, text display, game execution.

[0188] The power consumption prediction device provided in this embodiment can implement the technical solution of any of the above method embodiments. Its implementation principles and technical effects are similar and will not be repeated here.

[0189] Figure 8This is a hardware structure diagram of an electronic device provided in an embodiment of the present application. Figure 8 As shown, the electronic device 800 provided in this embodiment includes:

[0190] Memory 801;

[0191] Processor 802; and

[0192] computer programs;

[0193] Among them, the computer program is stored in the memory 801 and is configured to be executed by the processor 802 to implement the technical solution of any of the above method embodiments. Its implementation principles and technical effects are similar and will not be repeated here.

[0194] Optionally, the memory 801 can be independent or integrated with the processor 802. When the memory 801 is a device independent of the processor 802, the electronic device 800 further includes a bus 803 for connecting the memory 801 and the processor 802.

[0195] The embodiment of the present application further provides a computer-readable storage medium on which a computer program is stored. The computer program is executed by the processor 802 to implement the technical solution of any of the aforementioned method embodiments.

[0196] An embodiment of the present application provides a computer program product, including a computer program, which, when executed by a processor, implements the technical solution of any of the aforementioned method embodiments.

[0197] An embodiment of the present application further provides a chip, including: a processing module and a communication interface, wherein the processing module can execute the technical solution of any of the aforementioned method embodiments.

[0198] Furthermore, the chip also includes a storage module (such as a memory), the storage module is used to store instructions, the processing module is used to execute the instructions stored in the storage module, and the execution of the instructions stored in the storage module enables the processing module to execute the technical solution of any of the aforementioned method embodiments.

[0199] It should be understood that the processor described above may be a central processing unit (CPU), other general-purpose processors, digital signal processors (DSP), or application-specific integrated circuits (ASICs). A general-purpose processor may be a microprocessor or any conventional processor. The steps of the method disclosed in the present invention may be directly executed by a hardware processor or by a combination of hardware and software modules within the processor.

[0200] The memory may include a high-speed RAM memory, and may also include non-volatile storage NVM, such as at least one disk memory, and may also be a USB flash drive, a mobile hard disk, a read-only memory, a magnetic disk or an optical disk.

[0201] The bus can be an Industry Standard Architecture (ISA) bus, a Peripheral Component Interconnect (PCI) bus, or an Extended Industry Standard Architecture (EISA) bus. Buses can be classified into address buses, data buses, and control buses. For ease of illustration, the buses in the drawings of this application are not limited to just one bus or just one type of bus.

[0202] The storage medium may be implemented by any type of volatile or non-volatile memory device, or a combination thereof, such as static random access memory (SRAM), electrically erasable programmable read-only memory (EEPROM), erasable programmable read-only memory (EPROM), programmable read-only memory (PROM), read-only memory (ROM), magnetic storage, flash memory, magnetic disk, or optical disk. The storage medium may be any available medium that can be accessed by a general-purpose or special-purpose computer.

[0203] An exemplary storage medium is coupled to a processor so that the processor can read information from the storage medium and write information to the storage medium. Of course, the storage medium can also be an integral part of the processor. The processor and storage medium can be located in an application-specific integrated circuit (ASIC). Of course, the processor and storage medium can also exist as discrete components in an electronic device.

[0204] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present application, rather than to limit them. Although the present application has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that they can still modify the technical solutions described in the aforementioned embodiments, or replace some or all of the technical features therein with equivalents. However, these modifications or replacements do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments of the present application.

Claims

1. A power consumption prediction method, characterized in that: include: Acquire instruction data of a device memory in a target scenario, where the instruction data is used to indicate a state change of the memory within a preset time period; determining, according to the instruction data, the power consumption corresponding to each state of the memory within the preset time period; determining an average power consumption of the memory within the preset time period according to the power consumption corresponding to each state of the memory within the preset time period; The average power consumption is used as the predicted power consumption of the memory.

2. The method according to claim 1, characterized in that The instruction data includes an instruction sequence sent by the device processor to the memory within the preset time period, and a duration of the memory state corresponding to each instruction in the instruction sequence; The obtaining of instruction data from a device memory in a target scenario includes: Acquire the instruction sequence of the device memory in the target scenario from a protocol analyzer.

3. The method according to claim 2, characterized in that The determining, according to the instruction data, the power consumption corresponding to each state of the memory within the preset time period includes: Acquire a first state corresponding to a first instruction in the instruction data and a duration of the first state; the first instruction is any instruction in the instruction sequence, and the first state includes a state of at least one storage unit in the memory; Obtaining a first predicted current value of the memory in the first state; A first predicted power consumption corresponding to the first state is determined according to the first predicted current value, the duration of the first state, and a preset voltage value.

4. The method according to claim 3, characterized in that The obtaining of a first predicted current value of the memory in the first state includes: Obtaining a first preset current formula corresponding to the first state; A first predicted current value of the memory in the first state is obtained through the first preset current formula.

5. The method according to claim 3, characterized in that The state of any storage unit in the memory includes any of the following: Close state, open state, refresh state.

6. The method according to claim 3, characterized in that The method further comprises: Obtaining a first measured current value of the memory in the first state; By comparing the first measured current value and the first predicted current value, it is verified whether the first preset current formula corresponding to the first state is reasonable.

7. The method according to claim 6, characterized in that The verifying whether the first preset current formula corresponding to the first state is reasonable by comparing the first measured current value with the first predicted current value includes: If the absolute value of the difference between the first measured current value and the first predicted current value is less than a threshold, it is determined that the first preset current formula is reasonable; or If the absolute value of the difference between the first measured current value and the first predicted current value is greater than or equal to the threshold, it is determined that the first preset current formula is unreasonable.

8. The method according to claim 6, characterized in that The obtaining of a first measured current value of the memory in the first state includes: collecting, by a detection device, a current value of a device power supply during a period corresponding to the first state; The current value of the device power supply during the period corresponding to the first state is used as the first measured current value.

9. The method according to any one of claims 1 to 8, characterized in that The determining, according to the power consumption corresponding to each state of the memory within the preset time period, the average power consumption of the memory within the preset time period, includes: determining the total power consumption of the memory within the preset period according to the power consumption corresponding to each state of the memory within the preset period; The average power consumption of the memory during the preset time period is determined according to the total power consumption and the total duration of the preset time period.

10. The method according to any one of claims 1 to 8, characterized in that The method further includes: obtaining a ratio of the power consumption corresponding to each state of the memory within the preset period to the total power consumption of the memory within the preset period; Determining a state power consumption distribution diagram of the memory according to a ratio of the power consumption corresponding to each state to the total power consumption; The state power consumption distribution diagram is displayed, and the state power consumption distribution diagram is used to guide testers to improve the power consumption of the device.

11. The method according to any one of claims 1 to 8, characterized in that The target scenario includes any of the following: Standby, video playback, audio playback, text display, game execution.

12. A power consumption prediction device, characterized in that: include: An acquisition module, configured to acquire instruction data of a device memory in a target scenario, wherein the instruction data is used to indicate a state change of the memory within a preset time period; a processing module, configured to determine, according to the instruction data, the power consumption corresponding to each state of the memory within the preset time period; determining an average power consumption of the memory within the preset time period according to the power consumption corresponding to each state of the memory within the preset time period; The average power consumption is used as the predicted power consumption of the memory.

13. An electronic device, characterized in that: include: Memory; processor; as well as computer programs; The computer program is stored in the memory and configured to be executed by the processor to implement the method according to any one of claims 1 to 11.

14. A computer-readable storage medium, characterized in that A computer program is stored thereon, and the computer program is executed by a processor to implement the method according to any one of claims 1 to 11.

15. A computer program product, characterized in that The invention comprises a computer program, which implements the method according to any one of claims 1 to 11 when the computer program is executed by a processor.

Images