A high dynamic CMOS image sensor with high and low gain and logarithmic response and a timing control method and a reading method

Abstract

A high-dynamic CMOS image sensor with both high and low gain and logarithmic response and a timing control method and a reading method, belonging to the field of semiconductor photoelectric directional image sensors. The present invention utilizes the principle that the charge compensation element works in the cut-off region and the subthreshold region respectively under different light intensities: the charge compensation element is in the cut-off region under weak light and strong light, and there is no conduction current. At this time, the pixel structure of the present invention has the same function as the high-dynamic pixel technology with high and low gain structure, so it has a strong detection capability under weak light; under ultra-strong light or long integration time, the charge compensation element works in the subthreshold region, and the characteristic that the current and voltage of the transistor in the subthreshold region are in a logarithmic relationship is used to achieve compensation for the overflow photogenerated charge, so imaging can be achieved under ultra-high light intensity. The present invention can obtain multiple images with the same integration time under one exposure, corresponding to weak light, strong light and ultra-strong light, and multiple images can be synthesized into an image with an ultra-high dynamic range.

Description

Technical Field

[0001] The present invention belongs to the field of semiconductor photoelectric directional image sensors, and specifically relates to a high-dynamic CMOS image sensor having both high and low gain and logarithmic response, and a corresponding timing control method and reading mode. Background Art

[0002] Dynamic range is an important indicator for evaluating CMOS image sensors. It indicates the range of the maximum light intensity signal and the minimum light intensity signal that the CMOS image sensor can detect simultaneously in the same frame of the image. The larger the dynamic range, the higher the grayscale detail level of the obtained image. With the continuous development of integrated circuit technology, CMOS image sensors have been widely used in the field of image sensing. The dynamic range of ordinary CMOS image sensors can only reach 60-70dB. However, in the fields of automotive imaging, security monitoring, military, automated optical detection, etc., the range of ambient light can reach more than 100dB. Ordinary CMOS image sensors can no longer meet the requirements of actual scene imaging.

[0003] The widely used high dynamic range CMOS image sensors use a pixel structure with high and low gain, such as Figure 1 As shown in the figure. The pixel structure consists of a clamped photodiode 1, a charge transfer control transistor 2, a reset transistor 3, a high dynamic range transistor 4, a source follower 5, and a row selection transistor 6. 2-6 are all standard NMOS transistors. The working timing is shown in the figure. Figure 2 As shown, firstly, a reset operation is performed, and transistors 2, 3, and 4 are all turned on once; then the pixel enters the integration stage, and a reset operation is performed on the FD point before the integration ends, and the low gain reset value RST_L and the high gain reset value RST_H are read respectively; next, after the integration ends, the charge transfer control transistor 2 is turned on, and the photogenerated charge generated by the clamped photodiode 1 is transferred to the FD point to obtain the high gain signal voltage SIG_H; then the charge transfer control transistor 2 and the high dynamic range transistor 4 are turned on at the same time, and the low gain signal value SIG_L is read at this time. During the period when the high dynamic range transistor 4 is turned on, the FD point is connected to the FDL point, which is equivalent to increasing the capacitance of the FD point, which can accommodate more photogenerated charges from the clamped photodiode 1, thereby improving the dynamic range of the pixel. The method of obtaining high and low gains respectively through two charge transfers can expand the dynamic range of the pixel by 20 to 30 dB, so that the total dynamic range is close to or reaches 90 dB.

[0004] Although high dynamic pixels with high-low gain structures improve the dynamic range through two charge transfers, due to the limitations of pixel area and fill ratio, the clamped photodiode well capacity is limited. When the light intensity is too strong or the integration time is long, the clamped photodiode reaches a full well within the integration time and cannot accommodate more charge, thereby limiting the dynamic range of the image sensor.

[0005] In addition, there are ways to expand the dynamic range, such as using multi-level lateral overflow gates, dual photodiodes, and logarithmic modes of diode connection. The above methods have the disadvantages of requiring special processes to manufacture large capacitors, complex circuit structures, large pixel areas, and are not suitable for large-array image sensors, and have large dark currents and poor signal-to-noise ratios under weak light. Summary of the invention

[0006] The present invention relates to a high dynamic CMOS image sensor with both high and low gain and logarithmic response, as well as a corresponding timing control method and reading method. The purpose of the present invention is to perform an additional ion implantation on a reset transistor and a high dynamic range transistor on the basis of a traditional high dynamic pixel structure based on high and low gain, and adjust the threshold voltage of these two NMOS tubes to be lower than the normal value. These two transistors together constitute the charge compensation element proposed by the present invention. The charge compensation element operates in a subthreshold region under ultra-strong illumination or ultra-long integration time, and can inject charge into the FD point to compensate for the photogenerated charge overflowed from the clamped photodiode to the FD point, avoiding signal saturation caused by the clamped photodiode reaching a full well, thereby achieving an expanded dynamic range. The present invention utilizes the principle that the charge compensation element works in the cut-off region and the subthreshold region respectively under different light intensities: under a certain integration time (such as 10ms), the charge compensation element is in the cut-off region under weak light (0.0001lux to 0.1lux) and strong light (0.1lux~10lux), and there is no conduction current. At this time, the pixel structure of the present invention has the same function as the high dynamic pixel technology with high and low gain structure, so it has a strong detection ability under weak light; under ultra-strong light (more than 10lux), the charge compensation element works in the subthreshold region, and the characteristic that the current and voltage of the transistor in the subthreshold region are in a logarithmic relationship is used to realize the compensation of the photogenerated charge, so imaging can be performed under ultra-high light intensity. The present invention can obtain multiple images with the same integration time under one exposure, corresponding to weak light, strong light and ultra-strong light, and multiple images can be synthesized into an image with an ultra-high dynamic range. The present invention also utilizes the principle that the charge compensation element works in the cut-off region and the subthreshold region respectively under different integration times: when the pixel structure is under a certain light intensity (such as 10 lux), when the integration time is very short (such as 100 μs), the charge compensation element is in the cut-off region, and there is no conduction current. At this time, the pixel structure of the present invention has the same function as the aforementioned technology, so it still has a strong imaging capability when the integration time is short under a certain light intensity; when the integration time is very long (such as 10 ms), the clamped photodiode reaches a full well, and the charge compensation element works in the subthreshold region, and the current-voltage characteristic of the subthreshold region transistor is a logarithmic relationship to achieve compensation for the photogenerated charge. At this time, the output signal is proportional to the logarithm of the light intensity and has nothing to do with the integration time.

[0007] The technical solution of the present invention:

[0008] A high dynamic CMOS image sensor with both high and low gain and logarithmic response, the structure is as follows Figure 3 The pixel structure includes a clamped photodiode 1, a charge transfer control transistor 2, a novel reset transistor 7, a novel high dynamic range transistor 8, a source follower 5 and a row selection transistor 6. The novel reset transistor 7 and the novel high dynamic range transistor 8 together constitute the charge compensation element 9 of the present invention.

[0009] The clamped photodiode 1 is a photodetection element that can convert the received light signal into an electrical signal and accumulate photogenerated charges. The P terminal of the clamped photodiode 1 is connected to GND, and the N terminal is connected to the source of the charge transfer control transistor 2. The charge transfer control transistor 2 is used to transfer the photogenerated charges accumulated in the clamped photodiode 1 to the FD point. The control signal TX of the gate of the charge transfer control transistor 2 comes from the row control module in the image sensor system, and the drain is connected to the FD point. The charge compensation element 9 includes a new reset transistor 7 and a new high dynamic range transistor 8, wherein the drain of the new reset transistor 7 is connected to the Vpix potential, the source is connected to the drain of the new high dynamic range transistor 8, and the source of the new high dynamic range transistor 8 is connected to the FD point. The gate control signals RST and HDR of the charge compensation element 9 composed of the new reset transistor 7 and the new high dynamic range transistor 8 come from the row control module. The element works in the cutoff region under weak light and strong light, and works in the subthreshold region under ultra-strong light or ultra-long integration time, so as to increase the dynamic range of the image sensor. The source follower 5 and the row selection transistor 6 are used to output the pixel signal to the subsequent readout circuit. The gate of the source follower 5 is connected to the FD point, the drain is connected to VDD, and the source is connected to the drain of the row selection transistor 6. The control signal SEL at the gate end of the row selection transistor 6 comes from the row control module, and the source is connected to the column bus, which is used to output the pixel signal value to the subsequent readout circuit of the image sensor system.

[0010] The charge transfer control transistor 2, source follower 5 and row selection transistor 6 are all manufactured using a standard NMOS transistor process.

[0011] The novel reset transistor 7 and the novel high dynamic range transistor 8 are subjected to an additional ion implantation based on the standard process, which is used to adjust the threshold voltage of the transistor so that its threshold voltage is lower than the normal value, so the two together constitute the charge compensation element 9. This element works in the subthreshold region under ultra-strong light or during long-term integration, and can inject charge into the FD point to compensate for the photogenerated charge overflowed from the clamped photodiode 1 to the FD point, thereby avoiding signal saturation caused by the clamped photodiode reaching a full well. By utilizing the logarithmic relationship between the current and voltage of the subthreshold region transistor, a logarithmic response is obtained on the basis of the linear response of weak light and strong light, which greatly expands the dynamic range of the image sensor.

[0012] A timing control method and a reading method of a high dynamic CMOS image sensor having both high and low gain and logarithmic response are provided. Figure 4 As shown, the specific steps are as follows:

[0013] Step 1: Reset operation.

[0014] First, the pixel enters the reset state, the charge transfer control transistor 2 and the charge compensation element 9 are turned on once at the same time, the charge in the clamped photodiode 1 is cleared, and the voltage at the FD point is reset to Vpix.

[0015] Step 2: Integration operation.

[0016] After the reset operation is completed, the gate control signal voltages of the charge transfer control transistor 2 and the charge compensation element 9 drop to VTXL and VRL respectively, the pixel enters the integration stage, and the photogenerated charge begins to accumulate in the clamped photodiode 1.

[0017] 1) When the exposure time is not long enough under weak light or strong light, the photogenerated charge generated in the clamped photodiode 1 is less than or equal to the full well capacity of the clamped photodiode 1, and all the photogenerated charge is accumulated in the clamped photodiode 1. No excess photogenerated charge flows to the FD point through the charge transfer control transistor 2, so the voltage at the FD point will not change during the integration time. The gate-source voltage V of the charge compensation element 9 GS It is much smaller than the threshold voltage, so the charge compensation element 9 works in the cut-off region, and no current flows to the FD point.

[0018] 2) As the light intensity increases or the integration time lengthens, the photogenerated charge accumulated in the clamped photodiode 1 during the integration process will exceed its full well capacity, and the excess photogenerated charge will flow to the FD point through the charge transfer control transistor 2, forming an overflow current I OV , which is equal to the photocurrent I generated by the clamped photodiode 1 ph equal,

[0019] I OV =I ph =ηRP in

[0020] Among them, η, R, P in are the quantum efficiency, response rate and incident light power of the clamped photodiode 1 respectively; this current causes the voltage at the FD point to drop by a voltage change value of ΔV FD Proportional to the integration time t,

[0021] ΔV FD =ηRP in ·t

[0022] Since the light intensity is not large enough at this time, the photogenerated charge flowing to the FD point is limited within a certain integration time, and the voltage at the FD point will not drop much. Both transistors inside the charge compensation element 9 are in the off state, and the working state does not change. At this time, the voltage change at the FD point is proportional to the light intensity. The voltage value of FD is read out through the source follower 5, the row selection transistor 6 and the subsequent circuit as the linear signal value LOG_S1 in the logarithmic mode.

[0023] 3) When the light intensity is too strong or the integration time is too long, the photogenerated charge accumulated in the clamped photodiode 1 far exceeds its full well capacity. The excessive photogenerated charge will flow to the FD point through the charge transfer control transistor 2 and accumulate at the FD point, generating a continuous photogenerated overflow current I OV , causing the voltage at the FD point to continue to drop, making the V of the charge compensation element 9 GS Since the internal transistor of the charge compensation element 9 is subjected to an additional ion implantation based on the standard process, its threshold voltage is lower than the normal value. GS The value is close to the threshold voltage, so that the charge compensation element 9 enters the subthreshold working area from the cut-off region, resulting in a current flowing from Vpix into the FD point. This current can offset the overflow current I flowing from the clamped photodiode 1 to the FD point. OV , so it is called the charge compensation current I C If the light intensity is strong enough or the integration time is long enough, the light-generated overflow current I OV and the charge compensation current I C When the equilibrium state is reached, the voltage at point FD will no longer change with the integration time. At this time, the charge compensation element 9 operates in the subthreshold region, and the charge compensation current I C As follows:

[0024]

[0025] Among them, I S is a constant with the dimension of current, V RST is the gate voltage of the charge compensation element 9, V FD is the voltage at point FD, V TH is the threshold voltage of the charge compensation element 9, m is the subthreshold slope factor, V T is the thermal voltage.

[0026] After equilibrium, the charge compensation current is equal to the photogenerated overflow current.

[0027] I OV =I C =ηRP in

[0028] You can get V FD expression:

[0029]

[0030] According to the above formula, the voltage value change at the FD point is proportional to the logarithm of the incident light intensity. This voltage can be read out through the source follower 5, the row selection transistor 6 and the subsequent circuit as the signal value LOG_S2 in the logarithmic mode.

[0031] Before the integration is finished, the FD point is reset again, and the new reset transistor 7 and the new high dynamic range transistor 8 in the charge compensation element 9 are turned on respectively. When the gate control signal HDR of the new high dynamic range transistor 8 is at a high level VHDRH, the voltage at the FD point is used as the low gain reset value RST_L, which can be read out through the source follower 5, the row selection transistor 6 and the subsequent circuits; then the HDR signal voltage drops to VRL, and the voltage at the FD point is used as the high gain reset value RST_H, which can be read out through the source follower 5, the row selection transistor 6 and the subsequent circuits. At this point, the pixel circuit integration stage ends.

[0032] Step three, the first charge transfer process.

[0033] First, the charge transfer control transistor 2 is turned on, and under the action of the potential difference, the photogenerated charge accumulated in the clamped photodiode 1 is transferred to the FD point through the charge transfer control transistor 2. At this time, the high gain signal value SIG_H at the FD point is read, and this voltage can be read out through the source follower 5, the row selection transistor 6 and the subsequent circuits.

[0034] Step 4: The second charge transfer process.

[0035] After the first charge transfer, the new high dynamic range transistor 8 is turned on, and the FD and FDL points are short-circuited. During this period, the charge transfer control transistor 2 is turned on again, and the remaining photogenerated charges in the clamped photodiode 1 continue to be transferred to the FD and FDL points through the charge transfer control transistor 2. The voltage value at the FD point is read as a low-gain signal value SIG_L, which can be read out through the source follower 5, the row selection transistor 6 and subsequent circuits.

[0036] The high dynamic CMOS image sensor with both high and low gain and logarithmic response of the present invention has a relationship between the input light intensity and the output signal of the pixel as follows: Figure 5As shown. Under a certain integration time, according to the magnitude of the incident light intensity, the high dynamic pixel can be divided into four working states: State 1 (HG) and State 2 (LG) are linear regions. The difference between the two is that State 1 corresponds to the weakest input light intensity. At this time, since the new high dynamic range transistor 8 of the pixel is turned off, the FD point capacitance value is very small, and the CVG (charge-voltage conversion gain) of the pixel is large, so that a very high signal-to-noise ratio can be obtained under weak light. State 2 corresponds to strong light. At this time, the new high dynamic range transistor 8 is turned on, the CVG of the pixel is small, and the full well capacity is increased. State 3 is the transition part between State 2 and State 4. At this time, the output signal is still proportional to the light intensity. Under ultra-strong light, the pixel works in State 4, and the charge compensation element 9 works in the subthreshold region. The current flowing from the clamped photodiode to the FD is balanced with the compensation current formed by the charge compensation element 9, so that the output signal is proportional to the logarithm of the input light intensity, thereby expanding the dynamic range. Under a certain integration time (such as 10ms), the light intensity range corresponding to state 1 is 0.0001lux to 0.1lux, the light intensity range of state 2 is 0.1lux to 10lux, the light intensity range of state 3 is still maintained at 10lux, and the light intensity range of state 4 is 10lux to 10000lux or more. It can be seen that by using the charge compensation element 9 and the control timing and signal reading method described in the present invention, 4 pictures with the same exposure time can be output under one frame of imaging, respectively for weak light, strong light and super strong light. Compared with the traditional method of using high and low gains to improve the dynamic range, the present invention not only corresponds to state 1 and state 2 for weak light and strong light, but also adds states 3 and 4, where state 3 is a transition state, and the input light intensity changes by no more than 1 order of magnitude, and state 4 corresponds to ultra-strong light. At this time, since the charge compensation element 9 described in the present invention operates at a subthreshold, the pixel output signal is proportional to the logarithm of the light intensity, which greatly improves the dynamic range of the image sensor. On the basis of the traditional method of using high and low gains to improve the dynamic range, the dynamic range can be increased by at least 60dB.

[0037] Beneficial effects of the present invention:

[0038] (1) Compared with the conventional high-dynamic image sensor pixel structure based on high and low gain, the high-dynamic CMOS image sensor with both high and low gain and logarithmic response described in the present invention does not change the pixel circuit structure, but adds an additional ion injection through the charge compensation element to reduce the threshold voltage of the reset transistor and the high dynamic range transistor constituting the charge compensation element, so that the charge compensation element operates in the subthreshold region when the light intensity is too strong or the integration time is too long. At this time, the compensation current generated by the charge compensation element is exponentially related to the gate-source voltage, which will compensate for the photogenerated overflow current flowing to the FD point through the charge transfer control transistor. As the light intensity increases or the integration time increases, the two currents will reach a balance, and at this time the voltage at the FD point will no longer change with the integration time, and its voltage value is proportional to the logarithm of the incident light intensity, thereby greatly expanding the dynamic range of the image sensor.

[0039] (2) Compared with the existing methods of improving the dynamic range of image sensors, the high dynamic CMOS image sensor pixel structure with both high and low gain and logarithmic response described in the present invention has a simple circuit structure. Through threshold adjustment injection, the charge compensation element works in the sub-threshold region under ultra-strong light or long exposure, realizing the logarithmic response of input light intensity and output signal. Multiple images such as logarithmic mode, high gain, and low gain can be obtained for objects with different light intensity illumination in one frame. These images have the same exposure time, realizing the LED flicker effect that cannot be detected by high dynamic image sensors based on dual photodiodes combined with different integration time technologies.

[0040] (3) Compared with the conventional image sensor pixel structure for achieving high dynamic range, the high dynamic CMOS image sensor pixel structure having both high and low gain and logarithmic response described in the present invention has a linear response in weak light and strong light, and the signal-to-noise ratio is the same as that of the conventional 4T pixel structure based on clamped photodiodes, and has super strong weak light detection capability; at the same time, it has a logarithmic response in ultra-strong light, and the output signal does not saturate as the light intensity increases, and the dynamic range can be expanded by 3 to 4 orders of magnitude.

[0041] (4) Compared with the conventional image sensor pixel structure that realizes high dynamic range, the high dynamic CMOS image sensor pixel structure with both high and low gain and logarithmic response described in the present invention can be divided into four working states according to the incident light intensity range, namely linear high gain, linear low gain, logarithmic linear and logarithmic response, corresponding to weak light, strong light, strong light and ultra-strong light transition, and ultra-strong light respectively. After the subsequent readout circuit amplifies the signal and converts the analog-to-digital conversion, the digital output signals of the four states all contain sufficient information. By fusing the output results of these four states, a high dynamic range image that retains all the details of the image from weak light to ultra-strong light can be obtained. BRIEF DESCRIPTION OF THE DRAWINGS

[0042] Figure 1 It is a high-low gain and high dynamic pixel circuit structure;

[0043] Figure 2 It is the high and low gain high dynamic pixel working timing;

[0044] Figure 3 It is a high dynamic pixel circuit structure with both high and low gain and logarithmic response;

[0045] Figure 4 It is a high dynamic pixel working timing and reading method with both high and low gain and logarithmic response;

[0046] Figure 5 It is a high dynamic pixel input light intensity vs. output signal curve with both high and low gain and logarithmic response;

[0047] Figure 6 The working sequence and reading method of embodiment 1;

[0048] Figure 7 The working sequence and reading method of embodiment 2;

[0049] Figure 8 The high dynamic pixel circuit structure of embodiment 3 has both single-gain linear response and logarithmic response;

[0050] Fig. 9 The working sequence and reading method of embodiment 3;

[0051] In the figure: 1 clamped photodiode, 2 charge transfer control transistor, 3 reset transistor, 4 high dynamic range transistor, 5 source follower, 6 row selection transistor, 7 novel reset transistor, 8 novel high dynamic range transistor, 9 charge compensation element. DETAILED DESCRIPTION

[0052] Example 1

[0053] The high dynamic CMOS image sensor pixel circuit structure with both high and low gain and logarithmic response described in Example 1 is as follows Figure 3As shown. The pixel structure consists of a clamped photodiode 1, a charge transfer control transistor 2, a new reset transistor 7, a new high dynamic range transistor 8, a source follower 5, and a row selection transistor 6. The charge transfer control transistor 2, the source follower 5, and the row selection transistor 6 in the pixel are all manufactured using a standard NMOS transistor process. The new reset transistor 7 and the new high dynamic range transistor 8 together constitute the charge compensation element 9 described in the present invention, which is an additional ion implantation based on the standard process to adjust the threshold voltage of the transistor to -0.3V. The charge compensation element 9 operates in the subthreshold region under ultra-strong light or long-term integration, and injects charge into the FD point to compensate for the photogenerated charge overflowing from the well of the clamped photodiode 1 to the FD point, avoiding signal saturation caused by the clamped photodiode reaching a full well. Among them, the clamped photodiode 1 is used as a photodetection element, which can convert the received light signal into an electrical signal, with the P terminal connected to 0V and the N terminal connected to the source of the charge transfer control transistor 2. The control signal TX of the gate of the charge transfer control transistor 2 comes from the row control module in the image sensor system, and the drain is connected to the FD point. The charge compensation element 9 includes a new reset transistor 7 and a new high dynamic range transistor 8, wherein the drain of the new reset transistor 7 is connected to the Vpix potential 3.3V, the gate control signal RST comes from the row control module, the source is connected to the drain of the new high dynamic range transistor 8, the gate control signal HDR of the new high dynamic range transistor 8 comes from the row control module, and the source is connected to the FD point. The gate of the source follower 5 is connected to the FD point, the drain is connected to 3.3V, and the source is connected to the drain of the row selection transistor 6. The control signal SEL at the gate end of the row selection transistor 6 comes from the row control module, and the source is connected to the column bus for outputting the signal value of the pixel to the subsequent readout circuit of the image sensor system.

[0054] The specific timing control method and reading method of the high dynamic CMOS image sensor with high and low gain and logarithmic response of the present invention are as follows: Figure 4 As shown, the specific steps are as follows:

[0055] Step 1: Reset operation.

[0056] First, the pixel enters the reset state, the charge transfer control transistor 2 and the charge compensation element 9 are turned on once at the same time, the charge in the clamped photodiode 1 is cleared, and the FD point voltage is reset to 3.3V.

[0057] Step 2: Integration operation.

[0058] After the reset operation is completed, the gate control signal voltages of the charge transfer control transistor 2 and the charge compensation element 9 both drop to 0V, the pixel enters the integration phase, and the photogenerated charge begins to accumulate in the clamped photodiode 1 .

[0059] 1) When the exposure time is not long enough under weak light or strong light, the photogenerated charge generated in the clamped photodiode 1 is less than or equal to the full well capacity of the clamped photodiode 1, and all the photogenerated charge is accumulated in the clamped photodiode 1. No excess photogenerated charge will flow to the FD point through the charge transfer control transistor 2, so the voltage at the FD point will not change during the integration time. The gate-source voltage V of the charge compensation element 9 GS It is much smaller than the threshold voltage -0.3V, so the charge compensation element 9 works in the cut-off region and no current flows to the FD point.

[0060] 2) As the light intensity increases or the integration time is prolonged, the photogenerated charge accumulated in the clamped photodiode 1 during the integration process will fill its own well capacity, and the excess photogenerated charge will flow to the FD point through the charge transfer control transistor 2, forming an overflow current I OV , which is equal to the photocurrent I generated by the clamped photodiode 1 ph This current causes the voltage at point FD to drop, and the voltage change is proportional to the integration time.

[0061] Since the light intensity is not strong enough at this time, the photogenerated charge flowing to the FD point is limited within a certain integration time, and the voltage at the FD point will not drop much. Both transistors inside the charge compensation element are in the off state, and the working state does not change. At this time, the voltage at the FD point is proportional to the light intensity. The voltage value of the FD is read once before the integration ends, which is used as the linear signal value LOG_S1 in the logarithmic mode.

[0062] 3) When the light intensity is too strong or the integration time is too long, the photogenerated charge accumulated in the clamped photodiode 1 far exceeds its full well capacity. The excessive photogenerated charge will flow to the FD point through the charge transfer control transistor 2 and accumulate at the FD point, generating a continuous photogenerated overflow current I OV , causing the voltage at the FD point to continue to drop, making the V GS Since the threshold voltage of the two transistors in the charge compensation element 9 is adjusted to -0.3V, V GS The value is close to the threshold voltage, so that the two transistors enter the subthreshold working region from the cut-off region, resulting in a current flowing from Vpix into the FD point. This current can offset the photogenerated overflow current I flowing from the clamped photodiode 1 into the FD point. OV , so it is called the charge compensation current I C If the light intensity is strong enough or the integration time is long enough, the light-generated overflow current I OV and the charge compensation current I CWhen the equilibrium state is reached, the voltage at point FD will no longer change with the integration time. At this time, the charge compensation element 9 operates in the subthreshold region. After equilibrium, the charge compensation current is equal to the photogenerated overflow current. It can be obtained that the voltage value at point FD is proportional to the logarithm of the incident light intensity. This voltage can be read out through the source follower 5, the row selection transistor 6 and the subsequent circuit as the signal value LOG_S2 in the logarithmic mode.

[0063] Before the integration is finished, the FD point is reset again, and the internal transistors 7 and 8 of the charge compensation element are turned on respectively. When the gate control signal HDR of the new high dynamic range transistor 8 is at a high level of 4V, the image sensor readout circuit reads the low gain reset value RST_L, and then the HDR signal voltage drops to 0V, and the readout circuit of the image sensor reads the high gain reset value RST_H, and finally the gate control signal HDR of the new high dynamic range transistor 8 drops to a low level of 0V. At this point, the pixel circuit integration stage ends.

[0064] Step three, the first charge transfer process.

[0065] First, the charge transfer control transistor 2 is turned on, and under the action of the potential difference, the photogenerated charges accumulated in the clamp photodiode 1 are transferred to the FD point through the charge transfer control transistor 2. At this time, the high gain signal value SIG_H of the FD point is read.

[0066] Step 4: The second charge transfer process.

[0067] After the first charge transfer, the new high dynamic range transistor 8 is turned on, and the FD and FDL points are short-circuited. During this period, the charge transfer control transistor 2 is turned on again, and the remaining photogenerated charges in the clamped photodiode 1 continue to be transferred to the FD and FDL points through the charge transfer control transistor 2. The voltage value at the FD point is read as the low gain signal value SIG_L.

[0068] Example 2

[0069] The pixel circuit structure of the high dynamic range image sensor described in Example 2 is as follows: Figure 3 The timing and reading method of the high dynamic range CMOS image sensor pixel structure described in Example 2 are as shown in FIG. Figure 7 The working process of embodiment 2 is basically the same as that of embodiment 1, except that the gate voltage value of the charge compensation element is not reduced to 0V but to 1V during the integration process, in order to increase the source voltage of the charge compensation element, that is, the voltage at the FD point, so that it is easier to be processed and read by the readout circuit after the pixel in the image sensor.

[0070] Example 3

[0071] The charge compensation element in the high dynamic range CMOS image sensor pixel having both high and low gain and logarithmic response of the present invention is composed of two transistors. In this embodiment, the new reset transistor and the new high dynamic range transistor in the charge compensation element can also be combined into one transistor to form a high dynamic range pixel having both single gain linear response and logarithmic response. The circuit structure is as follows: Figure 8 shown.

[0072] The working sequence and reading method of the pixel circuit structure described in Example 3 are as follows: Fig. 9 As shown. The operation of the pixel circuit is still divided into the reset stage, the integration stage and the charge transfer stage. In the reset stage, the charge compensation element 9 and the charge transfer control transistor 2 are turned on once at the same time, the charge in the clamped photodiode 1 is cleared and the FD point is reset to 3.3V. Before the end of the integration, the readout circuit samples the logarithmic signal LOG_SIG once, and then performs a reset operation on the FD point. The readout circuit reads the linear reset signal value LIN_RST, and then the charge transfer control transistor 2 is turned on once, the photogenerated charge in the clamped photodiode 1 is transferred to the FD point, and the readout circuit reads the linear signal value LIN_SIG.

Claims

1. A high dynamic CMOS image sensor with both high and low gain and logarithmic response, characterized in that: The pixel structure includes a clamped photodiode (1), a charge transfer control transistor (2), a charge compensation element (9), a source follower (5) and a row selection transistor (6); The clamped photodiode (1) is a photodetection element capable of converting a received light signal into an electrical signal and accumulating photogenerated charges. The P terminal of the clamped photodiode (1) is connected to GND, and the N terminal is connected to the source of the charge transfer control transistor (2). The charge transfer control transistor (2) is used to transfer the photogenerated charges accumulated in the clamped photodiode (1) to the FD point. The control signal TX of the gate of the charge transfer control transistor (2) comes from the row control module in the image sensor system, and the drain is connected to the FD point. The charge compensation element (9) includes a new reset transistor (7) and a new high dynamic range transistor (8), wherein the drain of the new reset transistor (7) is connected to the Vpix potential, the source is connected to the drain of the new high dynamic range transistor (8), and the gate of the new high dynamic range transistor (8) is connected to the Vpix potential. The source is connected to the FD point; the gate control signals RST and HDR of the charge compensation element (9) composed of the new reset transistor (7) and the new high dynamic range transistor (8) are from the row control module. The element works in the cut-off region under weak light and strong light, and works in the sub-threshold region under ultra-strong light or ultra-long integration time, so as to increase the dynamic range of the image sensor; the source follower (5) and the row selection transistor (6) are used to output the pixel signal to the subsequent readout circuit, the gate of the source follower (5) is connected to the FD point, the drain is connected to VDD, and the source is connected to the drain of the row selection transistor (6); the control signal SEL of the gate end of the row selection transistor (6) comes from the row control module, and the source is connected to the column bus, so as to output the pixel signal value to the subsequent readout circuit of the image sensor system; The charge transfer control transistor (2), source follower (5) and row selection transistor (6) are all manufactured using a standard NMOS transistor process; The novel reset transistor (7) and the novel high dynamic range transistor (8) are subjected to an additional ion implantation on the basis of the standard process, so as to adjust the threshold voltage of the transistor so that the threshold voltage thereof is lower than the normal value, and the two together constitute the charge compensation element (9); the element operates in the subthreshold region under ultra-strong light or during long-term integration, and injects charge into the FD point to compensate for the photogenerated charge overflowed from the clamped photodiode (1) to the FD point, thereby avoiding signal saturation caused by the clamped photodiode (1) reaching a full well; the characteristic that the current and voltage of the transistor in the subthreshold region are in a logarithmic relationship is utilized, so as to obtain a logarithmic response on the basis of the linear response in weak light and strong light, thereby greatly expanding the dynamic range of the image sensor.

2. A timing control method and reading method of a high dynamic CMOS image sensor having both high and low gain and logarithmic response as claimed in claim 1, characterized in that: The specific steps are as follows: Step 1: reset operation; First, the pixel enters a reset state, the charge transfer control transistor (2) and the charge compensation element (9) are turned on at the same time, the charge in the clamped photodiode (1) is cleared, and the voltage at the FD point is reset to Vpix; Step 2: integration operation; After the reset operation is completed, the gate control signal voltages of the charge transfer control transistor (2) and the charge compensation element (9) drop to VTXL and VRL respectively, the pixel enters the integration phase, and the photogenerated charge begins to accumulate in the clamped photodiode (1); Step 3, the first charge transfer process; First, the charge transfer control transistor (2) is turned on, and under the action of the potential difference, the photogenerated charge accumulated in the clamped photodiode (1) is transferred to the FD point through the charge transfer control transistor (2); at this time, the high gain signal value SIG_H at the FD point is read, and the voltage is read out through the source follower (5), the row selection transistor (6) and the subsequent circuit; Step 4, the second charge transfer process; After the first charge transfer, the new high dynamic range transistor (8) is turned on, and the FD and FDL points are short-circuited. During this period, the charge transfer control transistor (2) is turned on again, and the remaining photogenerated charge in the clamped photodiode (1) continues to be transferred to the FD and FDL points through the charge transfer control transistor (2); the voltage value at the FD point is read as a low-gain signal value SIG_L, and the voltage is read out through the source follower (5), the row selection transistor (6) and subsequent circuits.

3. The timing control method and reading method of a high dynamic CMOS image sensor having both high and low gain and logarithmic response according to claim 2, characterized in that: Under a certain integration time, according to the magnitude of the incident light intensity, the high dynamic range pixel is divided into four working states: State 1-HG and State 2-LG are linear regions. The difference between the two is that State 1 corresponds to the weakest input light intensity. At this time, since the new high dynamic range transistor (8) of the pixel is turned off, the FD point capacitance value is very small, and the CVG of the pixel is large, so that a very high signal-to-noise ratio can be obtained under weak light; State 2 corresponds to strong light. At this time, the new high dynamic range transistor (8) is turned on, the CVG of the pixel is small, and the full well capacity is increased; State 3 is the transition part between State 2 and State 4. At this time, the output signal is still proportional to the light intensity; under ultra-strong light, the pixel works in State 4, and the charge compensation element (9) works in the subthreshold region, from the clamped light The current flowing from the diode (1) to the FD is balanced with the compensation current formed by the charge compensation element (9), so that the output signal is proportional to the logarithm of the input light intensity, thereby expanding the dynamic range; under a certain integration time, the light intensity range corresponding to state 1 is 0.0001 lux to 0.1 lux, the light intensity range of state 2 is 0.1 lux to 10 lux, the light intensity range of state 3 is still maintained at 10 lux, and the light intensity range of state 4 is 10 lux to above 10000 lux; the charge compensation element (9) and the control timing and signal reading method output four pictures with the same exposure time in one frame of imaging, respectively for weak light, strong light and super strong light.

4. A high dynamic CMOS image sensor with both high and low gain and logarithmic response according to claim 1, characterized in that: The charge compensation element (9) composed of the new reset transistor (7) and the new high dynamic range transistor (8) can be replaced by merging the new reset transistor (7) and the new high dynamic range transistor (8) in the charge compensation element (9) into one transistor, so as to form a high dynamic range pixel having both single gain linear response and logarithmic response. The operation of the pixel circuit is still divided into a reset phase, an integration phase and a charge transfer phase. In the reset phase, the charge compensation element (9) and the charge transfer control transistor (2) are simultaneously turned on once, the charge in the clamped photodiode (1) is cleared and the FD point is reset to Vpix. Before the integration ends, the readout circuit samples the logarithmic signal LOG_SIG once, and then performs a reset operation on the FD point. The readout circuit reads the linear reset signal value LIN_RST, and then the charge transfer control transistor (2) is turned on once, the photogenerated charge in the clamped photodiode (1) is transferred to the FD point, and the readout circuit reads the linear signal value LIN_SIG.

Images