High-precision BMS analog front-end circuit

Abstract

The application discloses a high-precision BMS analog front-end circuit, which comprises a battery pack, an analog front-end signal processor and an analog front-end signal communication module; a single battery is connected with a front-end voltage acquisition circuit, the front-end voltage acquisition circuit is connected with the analog front-end signal processor, the front-end voltage acquisition circuit is connected with a signal holding circuit, the signal holding circuit is connected with the analog front-end signal processor, and the analog front-end signal communication module is connected with the analog front-end signal processor; the signal holding circuit is arranged for each front-end voltage acquisition circuit, the signal holding circuit is used for holding and stabilizing the sampling voltage signal, so that the sampling voltage signal obtained by sampling can be reliably input to the analog front-end signal processor, the obtained sampling voltage signal is effectively prevented from being distorted due to external interference, the anti-interference performance of the sampling voltage signal in the conveying process is improved, and the management precision of the BMS battery management system is improved.

Description

TECHNICAL FIELD

[0001] The application relates to the technical field of battery management, in particular to a high-precision BMS analog front-end circuit. BACKGROUND

[0002] The BMS battery management system is commonly known as a battery guardian or a battery house, and is mainly used for intelligently managing and maintaining various battery units, preventing overcharging or overdischarging of the battery, prolonging the service life of the battery, and monitoring the state of the battery.

[0003] With the development of new energy electric vehicles, the BMS battery management system plays a vital role, and the BMS battery management system comprises a microcontroller unit (MCU) and an AFE analog front-end, the AFE analog front-end collects the voltage, temperature and current of the battery, so that the microcontroller unit can manage the battery.

[0004] However, since the collected voltage signal is an analog signal, it is extremely susceptible to external interference during transmission, resulting in distortion of the collected voltage signal, which is extremely unfavorable for accurate management of the BMS battery management system. SUMMARY

[0005] The application aims to overcome the above-mentioned defects and provide a high-precision BMS analog front-end circuit.

[0006] To achieve the above-mentioned purpose, the specific scheme of the application is as follows:

[0007] A high-precision BMS analog front-end circuit comprises a battery pack, an analog front-end signal processor and an analog front-end signal communication module.

[0008] The battery pack comprises a plurality of single batteries connected in sequence, each single battery is connected with a front-end voltage acquisition circuit, each front-end voltage acquisition circuit is connected with the analog front-end signal processor, each front-end voltage acquisition circuit is also connected with a signal holding circuit, the signal holding circuit is also connected with the analog front-end signal processor, and the analog front-end signal communication module is connected with the analog front-end signal processor.

[0009] Further, the front-end voltage acquisition circuit comprises a first MOS tube Q1, a second MOS tube Q2, a first resistor R1, a second resistor R2, an acquisition amplifier U1, a third MOS tube Q3 and a third resistor R3, the drain of the first MOS tube Q1 is connected with the positive pole of the single battery, the drain of the second MOS tube Q2 is connected with the negative pole of the single battery, the gates of the first MOS tube Q1 and the second MOS tube Q2 are respectively connected with PWM signals, the first MOS tube Q1 and the second MOS tube Q2 are alternately turned on, one end of the first resistor R1 is connected with the sources of the first MOS tube Q1 and the second MOS tube Q2, one end of the second resistor R2 is connected with the positive pole of the single battery, the other end of the second resistor R2 is connected with the other end of the first resistor R1 in parallel and then connected with the non-inverting input end of the acquisition amplifier U1, the inverting input end of the acquisition amplifier U1 is connected with the negative pole of the single battery, the non-inverting input end of the acquisition amplifier U1 is also connected with a signal holding circuit, the drain of the third MOS tube Q3 is connected with the other end of the first resistor R1, the gate of the third MOS tube Q3 is connected with the output end of the acquisition amplifier U1, one end of the third resistor R3 is connected with the source of the third MOS tube Q3, the other end of the third resistor R3 is grounded, and the source of the third MOS tube Q3 is also connected with an analog front-end signal processor.

[0010] Further, the resistance values of the first resistor R1 and the second resistor R3 are equal.

[0011] Further, the signal holding circuit comprises a first transistor Q4, a fourth resistor R4, a fifth resistor R5, a sixth resistor R6, a first zener diode Z1, a second zener diode Z2, a second transistor Q5 and an eighth resistor R8, one end of the fourth resistor R4 is connected with the base of the first transistor Q4, the other end of the fourth resistor R4 is grounded, the emitter of the first transistor Q4 is connected with the analog front-end signal processor, one end of the fifth resistor R5 connected with the first zener diode Z1 in series is connected with the collector of the first transistor Q4, the other end of the fifth resistor R5 connected with the first zener diode Z1 in series is connected with the base of the second transistor Q5, one end of the sixth resistor R6 and the second zener diode Z2 connected in parallel is connected between the fifth resistor R5 and the first zener diode Z1, the other end of the sixth resistor R6 and the second zener diode Z2 connected in parallel is grounded, the collector of the second transistor Q5 is connected with the emitter of the first transistor Q4, and the emitter of the second transistor Q5 is connected with the front-end voltage acquisition circuit through the eighth resistor R8.

[0012] Furthermore, the signal holding circuit of the present invention further includes a seventh resistor R7 and a first capacitor C1 connected in parallel, one end of which is connected to the emitter of the second transistor Q5, and the other end of the seventh resistor R7 and the first capacitor C1 connected in parallel is grounded.

[0013] The present invention further includes a front-end equalization circuit, the two ends of which are respectively connected to the battery pack and the analog front-end signal processor.

[0014] The present invention further includes a front-end current sampling circuit, the two ends of which are respectively connected to the battery pack and the analog front-end signal processor.

[0015] The present invention further includes a temperature acquisition circuit, the two ends of which are respectively connected to the battery pack and the analog front-end signal processor.

[0016] The beneficial effects of this invention are as follows: By setting a signal holding circuit for each front-end voltage acquisition circuit, the present invention uses the signal holding circuit to hold and stabilize the sampled voltage signal, thereby ensuring that the sampled voltage signal is reliably input to the analog front-end signal processor. This effectively avoids the sampled voltage signal from being distorted by external interference, improves the anti-interference capability of the sampled voltage signal during transmission, and helps to improve the management accuracy of the BMS battery management system. Attached Figure Description

[0017] Fig. 1 This is a circuit block diagram provided in an embodiment of the present invention;

[0018] Fig. 2 This is a circuit diagram of the front-end voltage acquisition circuit provided in an embodiment of the present invention;

[0019] Fig. 3 This is a circuit diagram of the signal holding circuit provided in an embodiment of the present invention;

[0020] Explanation of reference numerals in the attached diagram: 1. Battery pack; 2. Analog front-end signal processor; 3. Analog front-end signal communication module; 4. Front-end voltage acquisition circuit; 5. Signal holding circuit; 6. Front-end equalization circuit; 7. Front-end current sampling circuit; 8. Temperature acquisition circuit. Detailed Implementation

[0021] The present invention will be further described in detail below with reference to the accompanying drawings and specific embodiments, but this is not to limit the scope of the invention to this.

[0022] like Figs. 1 to 3 As shown in the figure, the high-precision BMS analog front-end circuit described in this embodiment includes a battery pack 1, an analog front-end signal processor 2, and an analog front-end signal communication module 3;

[0023] The battery pack 1 comprises a plurality of sequentially connected single batteries, each of which is connected with a front-end voltage acquisition circuit 4, each of the front-end voltage acquisition circuits 4 is connected with an analog front-end signal processor 2 respectively, each of the front-end voltage acquisition circuits 4 is further connected with a signal holding circuit 5 respectively, the signal holding circuit 5 is further connected with the analog front-end signal processor 2, and the analog front-end signal communication module 3 is connected with the analog front-end signal processor 2.

[0024] In actual use, each front-end voltage acquisition circuit 4 respectively samples the voltage signal of the corresponding single battery, and inputs the sampled voltage signal to the analog front-end signal processor 2, at the same time, the signal holding circuit 5 performs voltage signal holding and stabilizing processing on the voltage signal sampled by the front-end voltage acquisition circuit 4, then the analog front-end signal processor 2 performs analog-digital conversion on the sampled voltage signal to obtain a digital signal, and the obtained digital signal is transmitted to the BMS battery management system through the analog front-end signal communication module 3, so that the BMS battery management system monitors the state of each single battery to ensure the reliable work of each single battery.

[0025] In this embodiment, the signal holding circuit 5 is arranged for each front-end voltage acquisition circuit 4, and the signal holding circuit 5 is used to perform voltage signal holding and stabilizing processing, so as to ensure that the sampled voltage signal can be reliably input to the analog front-end signal processor 2, effectively avoid that the obtained sampled voltage signal is distorted due to external interference, improve the anti-interference performance of the sampled voltage signal in the transmission process, and facilitate to improve the management accuracy of the BMS battery management system.

[0026] In this embodiment, specifically, the front-end voltage acquisition circuit 4 includes a first MOS tube Q1, a second MOS tube Q2, a first resistor R1, a second resistor R2, an acquisition amplifier U1, a third MOS tube Q3, and a third resistor R3. The drain of the first MOS tube Q1 is connected to the positive electrode of the single battery, the drain of the second MOS tube Q2 is connected to the negative electrode of the single battery, the gates of the first MOS tube Q1 and the second MOS tube Q2 are respectively connected to a PWM signal, the PWM signal is provided by an external microcontroller unit, the first MOS tube Q1 and the second MOS tube Q2 are alternately turned on, one end of the first resistor R1 is connected to the sources of the first MOS tube Q1 and the second MOS tube Q2, one end of the second resistor R2 is connected to the positive electrode of the single battery, the other end of the second resistor R2 is connected in parallel to the other end of the first resistor R1, and then connected to the non-inverting input terminal of the acquisition amplifier U1, the inverting input terminal of the acquisition amplifier U1 is connected to the negative electrode of the single battery, the non-inverting input terminal of the acquisition amplifier U1 is also connected to the signal holding circuit 5, so that the sampling voltage signal can be stably amplified, avoiding signal distortion and affecting the pipeline accuracy of the BMS battery management system, the drain of the third MOS tube Q3 is connected to the other end of the first resistor R1, the gate of the third MOS tube Q3 is connected to the output terminal of the acquisition amplifier U1, one end of the third resistor R3 is connected to the source of the third MOS tube Q3, the other end of the third resistor R3 is grounded, and the source of the third MOS tube Q3 is also connected to the analog front-end signal processor 2.

[0027] Based on the above embodiment, preferably, the resistance values of the first resistor R1 and the second resistor R3 are equal.

[0028] In this embodiment, the first MOS tube Q1 and the second MOS tube Q2 are alternately turned on, so that the non-inverting input terminal of the acquisition amplifier can be alternately connected to the positive and negative electrodes of the single battery through the first resistor R1, thereby solving the voltage drop change of the third resistor R3 during sampling, and through the alternately turned-on mode of the first MOS tube Q1 and the second MOS tube Q2, the offset or low-frequency noise influence of the acquisition amplifier U1 on the sampling voltage signal during signal amplification can also be eliminated, and the sampling precision is high.

[0029] Further based on the above embodiment, the signal holding circuit 5 further comprises a first transistor Q4, a fourth resistor R4, a fifth resistor R5, a sixth resistor R6, a first voltage stabilizing diode Z1, a second voltage stabilizing diode Z2, a second transistor Q5, and an eighth resistor R8, one end of the fourth resistor R4 is connected to the base of the first transistor Q4, the other end of the fourth resistor R4 is grounded, the emitter of the first transistor Q4 is connected to the analog front-end signal processor 2, the analog front-end signal processor 2 provides input voltage for the first transistor Q4 to drive the signal holding circuit 5 to work, one end of the fifth resistor R5 connected in series with the first voltage stabilizing diode Z1 is connected to the collector of the first transistor Q4, the other end of the fifth resistor R5 connected in series with the first voltage stabilizing diode Z1 is connected to the base of the second transistor Q5, one end of the sixth resistor R6 and the second voltage stabilizing diode Z2 connected in parallel is connected between the fifth resistor R5 and the first voltage stabilizing diode Z1, the other end of the sixth resistor R6 and the second voltage stabilizing diode Z2 connected in parallel is grounded, the collector of the second transistor Q5 is connected to the emitter of the first transistor Q4, the emitter of the second transistor Q5 is connected to the front-end voltage collecting circuit 4 through the eighth resistor R8, specifically, the emitter of the second transistor Q5 is connected to the non-inverting input terminal of the collecting amplifier U1 through the eighth resistor R8.

[0030] In the embodiment, the signal holding circuit 5 further comprises the seventh resistor R7 and the first capacitor C1 connected in parallel, one end of the seventh resistor R7 and the first capacitor C1 connected in parallel is connected to the emitter of the second transistor Q5, and the other end of the seventh resistor R7 and the first capacitor C1 connected in parallel is grounded. In the embodiment, the seventh resistor R7 and the first capacitor C1 are further provided to perform voltage stabilizing and filtering, thereby further ensuring the precision of the sampling voltage signal.

[0031] In the embodiment, the signal holding circuit 5 further comprises the seventh resistor R7 and the first capacitor C1 connected in parallel, one end of the seventh resistor R7 and the first capacitor C1 connected in parallel is connected to the emitter of the second transistor Q5, and the other end of the seventh resistor R7 and the first capacitor C1 connected in parallel is grounded. In the embodiment, the seventh resistor R7 and the first capacitor C1 are further provided to perform voltage stabilizing and filtering, thereby further ensuring the precision of the sampling voltage signal.

[0032] In the embodiment, the front-end equalization circuit 6 is connected with the battery pack 1 and the analog front-end signal processor 2. The front-end equalization circuit 6 is used to equalize each single battery, so as to prolong the service life of the battery. In the embodiment, the front-end current sampling circuit 7 is connected with the battery pack 1 and the analog front-end signal processor 2. The front-end current sampling circuit 7 is used to monitor the working current of the battery pack 1, so as to control the working state of the battery pack 1 in real time. In the embodiment, the temperature acquisition circuit 8 is connected with the battery pack 1 and the analog front-end signal processor 2. The temperature acquisition circuit 8 is used to monitor the temperature environment of the battery pack 1, so as to ensure that the battery pack 1 works in a reliable temperature environment.

[0033] In the embodiment, the front-end equalization circuit 6, the front-end current sampling circuit 7 and the temperature acquisition circuit 8 are all existing circuits, which will not be described herein.

[0034] The above is only one preferred embodiment of the present application, and equivalent changes or modifications made according to the structure, features and principles described in the patent application of the present application are included in the protection scope of the patent application of the present application.

Claims

1. A high-precision BMS analog front-end circuit, characterized in that, The battery pack (1), the analog front-end signal processor (2) and the analog front-end signal communication module (3) are included. The battery pack (1) includes a plurality of single batteries connected in sequence, each of which is connected with a front-end voltage acquisition circuit (4), each of which is connected with an analog front-end signal processor (2), and each of which is also connected with a signal holding circuit (5), which is also connected with an analog front-end signal processor (2), and the analog front-end signal communication module (3) is connected with an analog front-end signal processor (2). The front-end voltage acquisition circuit (4) includes a first MOS tube Q1, a second MOS tube Q2, a first resistor R1, a second resistor R2, an acquisition amplifier U1, a third MOS tube Q3 and a third resistor R3, the drain of the first MOS tube Q1 is connected with the positive electrode of the single battery, the drain of the second MOS tube Q2 is connected with the negative electrode of the single battery, the gates of the first MOS tube Q1 and the second MOS tube Q2 are respectively connected with PWM signals, the first MOS tube Q1 and the second MOS tube Q2 are alternately turned on, one end of the first resistor R1 is connected with the sources of the first MOS tube Q1 and the second MOS tube Q2, one end of the second resistor R2 is connected with the positive electrode of the single battery, the other end of the second resistor R2 is connected with the other end of the first resistor R1 in parallel and then connected with the non-inverting input terminal of the acquisition amplifier U1, the inverting input terminal of the acquisition amplifier U1 is connected with the negative electrode of the single battery, the non-inverting input terminal of the acquisition amplifier U1 is also connected with the signal holding circuit (5), the drain of the third MOS tube Q3 is connected with the other end of the first resistor R1, the gate of the third MOS tube Q3 is connected with the output terminal of the acquisition amplifier U1, one end of the third resistor R3 is connected with the source of the third MOS tube Q3, the other end of the third resistor R3 is grounded, and the source of the third MOS tube Q3 is also connected with the analog front-end signal processor (2); the resistance values of the first resistor R1 and the second resistor R3 are equal. The signal holding circuit (5) comprises a first transistor Q4, a fourth resistor R4, a fifth resistor R5, a sixth resistor R6, a first voltage stabilizing diode Z1, a second voltage stabilizing diode Z2, a second transistor Q5 and an eighth resistor R8, one end of the fourth resistor R4 is connected with the base of the first transistor Q4, the other end of the fourth resistor R4 is grounded, the emitter of the first transistor Q4 is connected with the analog front-end signal processor (2), one end of the fifth resistor R5 connected with the first voltage stabilizing diode Z1 in series is connected with the collector of the first transistor Q4, the other end of the fifth resistor R5 connected with the first voltage stabilizing diode Z1 in series is connected with the base of the second transistor Q5, one end of the sixth resistor R6 and the second voltage stabilizing diode Z2 in parallel is connected between the fifth resistor R5 and the first voltage stabilizing diode Z1, the other end of the sixth resistor R6 and the second voltage stabilizing diode Z2 in parallel is grounded, the collector of the second transistor Q5 is connected with the emitter of the first transistor Q4, the emitter of the second transistor Q5 is connected with the front-end voltage acquisition circuit (4) through the eighth resistor R8.

2. The high-precision BMS analog front-end circuit of claim 1, wherein, The signal holding circuit (5) further comprises a seventh resistor R7 and a first capacitor C1, one end of the seventh resistor R7 and the first capacitor C1 in parallel is connected with the emitter of the second transistor Q5, the other end of the seventh resistor R7 and the first capacitor C1 in parallel is grounded.

3. The high-precision BMS analog front-end circuit according to claim 1 or 2, characterized in that, It further comprises a front-end equalization circuit (6), two ends of the front-end equalization circuit (6) are respectively connected with the battery pack (1) and the analog front-end signal processor (2).

4. The high-precision BMS analog front-end circuit according to claim 1 or 2, characterized in that, It further comprises a front-end current sampling circuit (7), two ends of the front-end current sampling circuit (7) are respectively connected with the battery pack (1) and the analog front-end signal processor (2).

5. The high-precision BMS analog front-end circuit according to claim 1 or 2, characterized in that, It further comprises a temperature acquisition circuit (8), two ends of the temperature acquisition circuit (8) are respectively connected with the battery pack (1) and the analog front-end signal processor (2). It further comprises a temperature acquisition circuit (8), two ends of the temperature acquisition circuit (8) are respectively connected with the battery pack (1) and the analog front-end signal processor (2).

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