A dual-frequency GNSS receiver capable of real-time estimation of satellite decimal cycle deviations

Abstract

The invention discloses a dual-frequency GNSS receiver capable of estimating satellite fractional cycle deviations in real time, and the dual-frequency GNSS receiver estimates the satellite fractional cycle deviations in real time, comprising: an antenna interface, a radio frequency module, a baseband and data processing module, a communication module, and a power supply and clock module; the device enables the satellite FCB to be directly output in real time by an independent receiver; different correlation spacings are used to simultaneously track the same satellite, so that five mutually independent pseudo-range observations of the same satellite can be obtained, thereby increasing the number of pseudo-range and carrier phase observations of the satellite; and the cost of existing FCB estimation is reduced, providing a basis for real-time rapid compensation of satellite FCB and rapid fixation of PPP ambiguity.

Description

Technical Field

[0001] The present invention relates to the field of detection instruments and equipment, and in particular to a dual-frequency GNSS receiver capable of estimating satellite fractional cycle bias (FCB) in real time. Background Art

[0002] GNSS receiver is the abbreviation of Global Navigation Satellite System. There are many types of GNSS receivers, which can be divided into navigation receivers, surveying receivers and timing receivers. GNSS receivers usually include the following parts: antenna, RF front end, baseband processing, positioning solution and receiver housing.

[0003] FCB is generated by the hardware signal delay between the receiver and the satellite, and is included in the carrier phase observation output by the receiver. In GNSS PPP, it is necessary to eliminate FCB to fix the integer ambiguity of the carrier phase. For undifferenced ambiguity estimation, FCB will be absorbed by the undifferenced observation, and the integer characteristics of the ambiguity will be destroyed. There are currently two commonly used FCB methods, one is the FCB estimation method alone; the second is the FCB estimation method based on satellite seed difference. The FCB estimation method alone first applies the IF combination to separate the wide lane FCB (WL-FCB) and the narrow lane FCB (NL-FCB), and then applies the inter-satellite single difference method to estimate the FCB alone. The satellite seed difference-based method uses the integer characteristics of the satellite clock difference to estimate the satellite NL-FCB and the satellite seed difference together, including the integer clock method and the decoupled clock difference method. The integer clock method uses the fixed NL ambiguity to absorb the NL-FCB into the clock difference during the clock difference estimation process to form an integer phase clock. The decoupled clock difference method restores the integer characteristics of the ambiguity by estimating the pseudorange clock difference and the phase clock difference parameters separately. Existing receivers do not have the real-time output function of satellite FCB. Satellite FCB is achieved through post-processing of multi-receiver data and has a delay of at least 24 hours. Summary of the invention

[0004] The present invention aims at the problem that the existing receiver cannot directly output the satellite FCB, and proposes a dual-frequency GNSS receiver capable of estimating the satellite fractional cycle deviation (FCB) in real time. Since the existing satellite FCB products are provided by IGS or Wuhan University and have a delay of at least 24 hours, that is, they require very high costs and are not real-time, which restricts the application of satellite FCB. In order to solve the problem that satellite FCB estimation requires multi-receiver data and has poor real-time performance, the present invention proposes a dual-frequency GNSS receiver capable of estimating the satellite fractional cycle deviation (FCB) in real time, which specifically includes: an antenna interface connected to an antenna, a radio frequency module, a baseband and data processing module, a communication module, and a power supply and clock module, wherein the antenna interface is connected to the radio frequency module, the radio frequency module is connected to the baseband and data processing module, the baseband and data processing module is connected to the communication module, and the power supply and clock module is connected to the radio frequency module, the baseband and data processing module, and the communication module. The baseband and data processing module includes a baseband processing module, a data processing MW combined ambiguity estimation module, a data processing IF combined ambiguity estimation module, a WL-FCB estimation module and a NL-FCB estimation module; the communication module encodes and outputs the FCB calculated by the data processing through the serial port. The power supply and clock module provides a power supply reference clock for other modules, and the clock includes a local crystal oscillator and an external clock interface;

[0005] The radio frequency module is used to receive the high frequency signal of the antenna, perform down-conversion and analog-to-digital conversion to obtain a digital intermediate frequency signal, and send the intermediate frequency signal to the baseband and data processing module;

[0006] The baseband processing module uses multiple groups of different correlation intervals to perform signal tracking to obtain multiple groups of dual-frequency observations and satellite navigation messages of all satellites, and sends the multiple groups of dual-frequency observations to the data processing MW combined ambiguity estimation module and the data processing IF combined ambiguity estimation module; the data processing MW combined ambiguity estimation module calculates the MW combined ambiguities of multiple groups of correlation interval observations respectively, and sends the multiple groups of MW combined ambiguities to the WL-FCB estimation module; the data processing IF combined ambiguity estimation module calculates the IF combined ambiguities of multiple groups of correlation interval observations respectively, and sends the multiple groups of IF combined ambiguities to the NL-FCB estimation module; the WL-FCB estimation module estimates the wide lane integer ambiguity and the satellite wide lane fractional cycle deviation, and sends the wide lane integer ambiguity to the NL-FCB estimation module, and sends the satellite wide lane fractional cycle deviation to the communication module; the NL-FCB estimation module estimates the satellite narrow lane fractional cycle deviation and sends it to the communication module;

[0007] The communication module is used to receive the precise ephemeris file, precise clock file, receiver coordinates, and DCB file sent by the host computer and to receive the positioning result of the baseband and data processing module and to encode the positioning result through the serial port technology and then output it.

[0008] The power supply and clock module is used to provide power supply and clock reference for the RF module, baseband and data processing module, and communication module. The clock module can use a local temperature compensated crystal oscillator to provide clock for other modules and has an external clock interface. It can connect an external high-stability clock to provide a clock reference for other modules.

[0009] In order to achieve the above-mentioned purpose and solve the problems existing in the prior art, the technical solution adopted by the present invention is: a dual-frequency GNSS receiver capable of estimating satellite fractional cycle bias (FCB) in real time. The working process of the receiver is divided into the following steps:

[0010] Step 1. Connect the antenna and receiver. Power on the receiver and the receiver starts working. The power supply and clock module provide the receiver with a clock reference and a stable power supply. The RF front end receives the high-frequency data transmitted by the antenna.

[0011] Step 2: The RF module receives the antenna signal, performs down-conversion and analog-to-digital conversion on the antenna signal to obtain a digital intermediate frequency signal;

[0012] Step 3, the communication module receives all the precise ephemeris files, precise clock files, receiver coordinates and DCB files sent by the host computer;

[0013] Step 4: The baseband processing and data processing module receives the digital intermediate frequency signal and performs baseband signal processing and data processing;

[0014] Step 4.1, the baseband processing module uses multiple sets of related spacing to independently track all satellites, and obtains multiple sets of dual-frequency pseudoranges, multiple sets of carrier phase observations and a set of satellite navigation messages for all satellites;

[0015] Step 4.2, data processing: the MW combined ambiguity estimation module uses multiple sets of satellite pseudoranges and carrier phase observations to calculate the MW combined ambiguities respectively and sends them to the WL-FCB estimation module;

[0016] Step 4.3, data processing IF combined ambiguity estimation module uses multiple sets of satellite pseudorange and carrier phase observations to calculate IF combined ambiguity respectively, and sends it to NL-FCB estimation module;

[0017] Step 4.4, the WL-FCB estimation module applies multiple groups of MW combined ambiguities to calculate multiple groups of WL integer ambiguities and satellite wide lane fractional cycle biases respectively, sends the WL integer ambiguities to the NL-FCB estimation module, proceeds to step 4.5, sends the wide lane fractional cycle biases to the communication module, and proceeds to step 5;

[0018] Step 4.5, the NL-FCB estimation module uses multiple groups of IF combined ambiguities and WL integer ambiguities to estimate the satellite NL-FCB and sends it to the communication module, and then proceeds to step 5;

[0019] Step 5: Output the satellite wide lane fractional cycle deviation (WL-FCB) and narrow lane fractional cycle deviation (NL-FCB). The communication module outputs the current reference spacing position information, pseudorange correction information, flow spacing differential position information and time information through the RS232 serial port. The output data starts the encoding of the data message with the agreed frame header, and the data message to be sent is encoded in the form of each data content occupying 4 bytes. Finally, the data check bit is used as the tail frame. The check method uses the serial port parity check mode to complete the data encoding and send it through the serial port.

[0020] The beneficial effects of the present invention are:

[0021] First, a dual-frequency GNSS receiver of the present invention is capable of estimating satellite fractional cycle bias (FCB) in real time, so that the satellite FCB can be directly output in real time by an independent receiver;

[0022] Second, the present invention uses different correlation intervals to simultaneously track the same satellite, and can obtain five mutually independent pseudo-range observations of the same satellite, thereby increasing the number of pseudo-range and carrier phase observations of the satellite;

[0023] Third, the dual-frequency GNSS receiver of the present invention, which can estimate the satellite fractional cycle bias (FCB) in real time, reduces the cost of existing FCB estimation and provides a basis for real-time rapid compensation of satellite FCB and rapid fixation of PPP ambiguity.

[0024] ,Figure Description

[0025] In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments recorded in the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative work.

[0026] Figure 1 A schematic diagram of the structure of a dual-frequency GNSS receiver capable of estimating satellite fractional cycle bias (FCB) in real time according to the present invention;

[0027] Figure 2 A hardware structure diagram of a dual-frequency GNSS receiver capable of estimating satellite fractional cycle bias (FCB) in real time according to the present invention;

[0028] Figure 3 A schematic diagram of the dual-frequency GNSS receiver capable of estimating satellite fractional cycle bias (FCB) in real time according to the present invention;

[0029] Figure 4 A schematic diagram of the appearance of a dual-frequency GNSS receiver capable of estimating satellite fractional cycle bias (FCB) in real time according to the present invention. DETAILED DESCRIPTION

[0030] In order to make the technical solutions and advantages of the present invention more clear, the technical solutions in the embodiments of the present invention are clearly and completely described below in conjunction with the accompanying drawings in the embodiments of the present invention:

[0031] Figure 1 A schematic diagram of the structure of a dual-frequency GNSS receiver capable of estimating satellite fractional cycle bias (FCB) in real time is provided for an embodiment of the present invention. The receiver is suitable for navigation and mapping. The receiver includes an antenna interface 101 connected to an antenna, a radio frequency module 102, a baseband and data processing module 103, a communication module 104 and a clock module 105. The antenna interface 101 is connected to the radio frequency module 102, the radio frequency module 102 is connected to the baseband and data processing module 103, the baseband and data processing module 103 is connected to the communication module 104, and the clock module 105 is connected to the radio frequency module 102, the baseband and data processing module 103, and the communication module 104. The baseband and data processing chip 103 includes a baseband processing module, a data processing MW (Melbourne-Wubbena, MW) combined ambiguity estimation module, a data processing ionosphere-free (Ionosphere Free, IF) combined ambiguity estimation module, a wide-lane FCB (WL-FCB) estimation module and a narrow-lane FCB (NL-FCB) estimation module;

[0032] The RF module 102 is used to receive the high frequency signal of the antenna, and perform down-conversion and analog-to-digital conversion to obtain a digital intermediate frequency signal, and send the intermediate frequency signal to the baseband and data processing module 103. The RF front end can receive the L1 frequency and L2 frequency data of the GPS system to perform dual-frequency data down-conversion and analog-to-digital conversion;

[0033] The baseband and data processing module 103 is used to process digital intermediate frequency signals. The baseband processing module applies five groups of different correlation intervals to perform signal tracking, obtains five groups of dual-frequency observations and satellite navigation messages of all satellites, and sends the five groups of dual-frequency observations to the data processing MW combined ambiguity estimation module and the data processing IF combined ambiguity estimation module; the data processing MW combined ambiguity estimation module calculates the MW combined ambiguities of the five groups of correlation interval observations respectively, and sends the five groups of MW combined ambiguities to the WL-FCB estimation module; the data processing IF combined ambiguity estimation module calculates the IF combined ambiguities of the five groups of correlation interval observations respectively, and sends the five groups of IF combined ambiguities to the NL-FCB estimation module; the WL-FCB estimation module estimates the WL integer ambiguity and the satellite WL-FCB, and sends the WL integer ambiguity to the NL-FCB estimation module, and sends the satellite WL-FCB to the communication module 104; the NL-FCB estimation module estimates the satellite NL-FCB and sends it to the communication module 104.

[0034] The communication module 104 is used to receive the precise ephemeris file, precise clock file, receiver coordinates, DCB file sent by the computer and to receive the positioning result of the baseband and data processing module 103 and encode the positioning according to a preset encoding method, and output the encoded positioning result through serial port technology.

[0035] The power supply and clock module 105 is used to provide power supply and clock reference for the RF module 102, the baseband and data processing module 103, and the communication module 104. The clock module 105 can use the local temperature compensated crystal oscillator to provide clocks for other modules, and has an external clock interface, which can be connected to an external high-stability clock to provide clock references for other modules.

[0036] Figure 2 The hardware structure diagram of the single-frequency differential GNSS receiver for different related spacing pseudorange observations in this application is as described above. The antenna interface is an SMA reverse-polarity male connector. The RF front-end chip is two Max2771s with built-in analog-to-digital conversion functions, which receive GPS L1 frequency and L2 frequency signals respectively. The baseband and data processing module is the ZYNQ-7020 chip of Xilinx. The FPGA logic gate circuit of ZYNQ-7020 performs baseband processing, including a reference spacing baseband processing module and a mobile spacing baseband processing module. The ARM core of ZYNQ-7020 performs reference spacing data processing and mobile spacing data processing. The communication module is an RS232 serial port, the clock module is a 10MHz temperature-compensated crystal oscillator, and the power supply is a 3.3V DC power supply stabilized by an LM117 chip.

[0037] The RF module in the specific example of the present invention uses two Max2771 chips to down-convert the high-frequency satellite signals received by the L1 frequency and L2 frequency antennas of the GPS system into analog intermediate frequency signals, and then performs analog-to-digital conversion on the analog intermediate frequency signals, and outputs 16.4MHz in-phase (I) branch and orthogonal (Q) branch 3-bit sampling digital intermediate frequency signals to the ZYNQ7020 chip of the baseband and data processing module.

[0038] The ZYNQ7020 chip in the example of the present invention includes a field programmable logic gate circuit (FPGA) and a RISC (reduced instruction set computer) microprocessor (ARM) core, wherein the FPGA is used for base spacing and flow spacing baseband processing, and the ARM core is used for base spacing data processing, flow spacing data processing and ambiguity resolution.

[0039] The RS232 serial port tool in the example of the present invention receives the positioning result of the ZYNQ7020 chip, encodes the output data starting with an agreed header frame, encodes the sent data message in the form of each data content occupying 4 bytes, and finally uses the data check bit as the tail frame. The check method uses the serial port parity check mode to complete the data encoding and send it through the serial port.

[0040] The 10MHz temperature-compensated crystal oscillator in the example of the present invention provides a reference local clock for the receiver, and the LM117 voltage regulator chip provides a DC regulated power supply for other modules.

[0041] Combine the following Figure 3 The working process of a single-frequency GNSS receiver capable of fixing RTK ambiguity is further introduced. Figure 3 The principle structure diagram of the receiver of the present invention is shown in FIG. 1 . The receiver of the present invention works according to the following steps:

[0042] Step 1: Connect the antenna and receiver, power on the receiver, and the receiver starts working. The power supply and clock module provide the receiver with a clock reference and a stable power supply, and the RF front end receives the high-frequency data transmitted by the antenna.

[0043] Step 2: The RF module receives the antenna signal, performs down-conversion and analog-to-digital conversion on the antenna signal to obtain a digital intermediate frequency signal;

[0044] Step 3, the communication module receives the precise ephemeris file, precise clock file, receiver coordinates and DCB file sent by the computer;

[0045] Step 4: The baseband and data processing module receives the digital intermediate frequency signal and performs baseband signal processing and data processing;

[0046] Step 4.1, the baseband processing module uses five sets of related spacing to independently track all satellites, and obtains five sets of dual-frequency pseudoranges, five sets of carrier phase observations and one set of satellite navigation messages of all satellites;

[0047] Step 4.2, data processing: The MW combined ambiguity estimation module uses five sets of satellite pseudoranges and carrier phase observations to calculate the MW combined ambiguities respectively and sends them to the WL-FCB estimation module;

[0048] Step 4.3, data processing IF combined ambiguity estimation module uses five sets of satellite pseudorange and carrier phase observations to calculate IF combined ambiguity respectively and send it to NL-FCB estimation module;

[0049] Step 4.4, the WL-FCB estimation module applies five groups of MW combined ambiguities to calculate five groups of WL integer ambiguities and satellite WL-FCBs respectively, sends the WL integer ambiguities to the NL-FCB estimation module, proceeds to step 4.5, sends the WL-FCB to the communication module, and proceeds to step 5;

[0050] Step 4.5, the NL-FCB estimation module uses five groups of IF combined ambiguities and WL integer ambiguities to estimate the satellite NL-FCB and sends it to the communication module, and then proceeds to step 5;

[0051] Step 5: Output the satellite wide lane fractional cycle deviation (WL-FCB) and narrow lane fractional cycle deviation (NL-FCB). The communication module outputs the current reference spacing position information, pseudorange correction information, flow spacing differential position information and time information through the RS232 serial port. The output data starts the encoding of the data message with the agreed frame header, and the data message to be sent is encoded in the form of each data content occupying 4 bytes. Finally, the data check bit is used as the tail frame. The check method uses the serial port parity check mode to complete the data encoding and send it through the serial port.

[0052] Figure 4 A physical schematic diagram of a receiver provided for an example of the present invention, the receiver includes a receiver housing, a power interface, a communication interface, an external clock interface and an antenna interface.

[0053] The above description is only a preferred specific implementation manner of the present invention, but the protection scope of the present invention is not limited thereto. Any technician familiar with the technical field can make equivalent replacements or changes according to the technical scheme and inventive concept of the present invention within the technical scope disclosed by the present invention, which should be covered by the protection scope of the present invention.

Claims

1. A dual-frequency GNSS receiver capable of real-time estimation of satellite fractional cycle deviations, characterized in that: Real-time estimation of satellite fractional cycle deviation, including: antenna interface, RF module, baseband and data processing module, communication module, power supply and clock module; The antenna interface is connected to the antenna; The radio frequency module is used to receive the high frequency signal of the antenna, perform down-conversion and analog-to-digital conversion to obtain a digital intermediate frequency signal, and transmit the intermediate frequency signal to the baseband and data processing module; The baseband and data processing module processes the digital intermediate frequency signal, and the baseband and data processing module includes a baseband processing module, a data processing MW combined ambiguity estimation module, a data processing IF combined ambiguity estimation module, a WL-FCB estimation module and a NL-FCB estimation module; The baseband processing module uses multiple groups of different correlation intervals to perform signal tracking to obtain multiple groups of dual-frequency observations and satellite navigation messages of all satellites, and sends the multiple groups of dual-frequency observations to the data processing MW combined ambiguity estimation module and the data processing IF combined ambiguity estimation module; the data processing MW combined ambiguity estimation module calculates the MW combined ambiguities of multiple groups of correlation interval observations respectively, and sends the multiple groups of MW combined ambiguities to the WL-FCB estimation module; the data processing IF combined ambiguity estimation module calculates the IF combined ambiguities of multiple groups of correlation interval observations respectively, and sends the multiple groups of IF combined ambiguities to the NL-FCB estimation module; the WL-FCB estimation module estimates the wide lane integer ambiguity and the satellite wide lane fractional cycle deviation, and sends the wide lane integer ambiguity to the NL-FCB estimation module, and sends the satellite wide lane fractional cycle deviation to the communication module; the NL-FCB estimation module estimates the satellite narrow lane fractional cycle deviation and sends it to the communication module; The communication module receives the precise ephemeris file, precise clock file, receiver coordinates, DCB file sent by the host computer, and receives the positioning result transmitted by the baseband and data processing module, and encodes and outputs the positioning result through the serial port technology; The power supply and clock module provides power supply and clock reference for the dual-frequency GNSS receiver.

2. The dual-frequency GNSS receiver capable of real-time estimation of satellite decimal cycle deviation according to claim 1, characterized in that: The baseband processing module uses multiple sets of related spacings to respectively track all satellites to obtain multiple sets of dual-frequency pseudo-range observations, dual-frequency carrier phase observations and satellite navigation messages.

3. The dual-frequency GNSS receiver capable of real-time estimation of satellite decimal cycle deviation according to claim 1, characterized in that: The data processing MW combined ambiguity estimation module calculates corresponding MW combined observation quantities and MW combined ambiguities for multiple groups of observation quantities respectively.

4. The dual-frequency GNSS receiver capable of real-time estimation of satellite decimal cycle deviation according to claim 1, characterized in that: The data processing IF combined ambiguity estimation module calculates corresponding ionospheric-free combined observation quantities and ionospheric-free combined ambiguities for multiple groups of observation quantities respectively.

5. The dual-frequency GNSS receiver capable of real-time estimation of satellite decimal cycle deviation according to claim 3, characterized in that: The WL-FCB estimation module applies the MW combined ambiguities to estimate the WL integer ambiguities and satellite wide lane fractional cycle biases.

6. The dual-frequency GNSS receiver capable of real-time estimation of satellite decimal cycle deviation according to claim 4, characterized in that: The NL-FCB estimation module estimates the narrow lane fractional cycle biases of visible satellites using ionospheric-free combined ambiguities and WL integer ambiguities.

7. The dual-frequency GNSS receiver capable of real-time estimation of satellite decimal cycle deviation according to claim 6, characterized in that: The communication module encodes and outputs the satellite fractional cycle deviation estimated by the receiver.

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