An integrated boost switched-capacitor multilevel inverter and its control method

Abstract

The present invention discloses an integrated boost switched-capacitor multilevel inverter and its control method. The inverter is composed of a DC power supply U in , an inductor L, three capacitors C1 to C3, eight switching tubes S1 to S8, and two diodes D1 to D2. By controlling the duty cycles of S5 and S6 to be equal, the charging and discharging times of the inductor L can be made symmetrical, so that the voltage of the capacitor C1 is equal to the voltage of the DC power supply U in . Then, by controlling the drive control logic of all the switching tubes, the capacitor C1 and the DC power supply can be connected in series to charge the capacitors C2 and C3 respectively, and finally the inverter can generate a voltage gain of 4 times and output levels of ±4U in , ±3U in , ±2U in , ±U in and 0. Compared with the existing multilevel inverters, the integrated boost switched-capacitor multilevel inverter of the present invention has a simpler circuit structure, fewer switching tubes, higher boost ability, and capacitor voltage self-balancing ability.

Description

Technical Field

[0001] The present invention relates to the technical field of multilevel inverters, and particularly to an integrated boost-type switched-capacitor multilevel inverter and its control method. Background Art

[0002] Compared with traditional two-level inverters, multilevel inverters have the advantages of low total harmonic distortion rate of output, less loss, and low electromagnetic interference because their output waveforms are closer to sine waves. In recent years, they have been widely used in the fields of new energy power generation, motor drive, and high-frequency AC power distribution systems.

[0003] Existing multilevel inverter topologies mainly include: diode-clamped type, flying-capacitor type, cascaded H-bridge type, and switched-capacitor type. Diode-clamped and flying-capacitor multilevel inverters contain more switching tubes and energy storage elements, have a complex structure, poor capacitor voltage self-balancing ability, and no boost capability. The cascaded H-bridge multilevel inverter realizes multilevel output through the series connection of the output terminals of multiple H-bridge inverters, is easy to modularly expand, and has no capacitor voltage imbalance problem, but it requires multiple independent DC power supplies and actually has no boost capability. The switched-capacitor multilevel inverter generates multilevel output by switching the series and parallel connections of switched capacitors and DC power supplies, can achieve capacitor voltage self-balancing, but requires a large number of switching tubes, and the number will increase rapidly with the increase of the number of output levels of the inverter, resulting in a relatively complex topology structure. Summary of the Invention

[0004] The present invention provides an integrated boost-type switched-capacitor multilevel inverter to solve the problems of complex structure, large number of switching tubes, poor boost and capacitor voltage self-balancing capabilities existing in existing multilevel inverters.

[0005] To solve the above technical problems, the technical solution of the present invention is as follows:

[0006] An integrated boost-type switched-capacitor multilevel inverter includes a DC power supply U in , an inductor L, a capacitor C 1 , a capacitor C 2 , a capacitor C 3 , a diode D 1 , a diode D 2 , a switching tube S 1 , a switching tube S 2 , a switching tube S 3 , a switching tube S 4 , a switching tube S 5 , a switching tube S 6 , a switching tube S 7 , a switching tube S 8 ; the second pole of the switching tube S 1 , the switching tube S 2The first pole of is connected to the first node, and the diode D 1 The positive electrode of, the switching tube S 1 The first pole of, the switching tube S 5 The first poles of are all connected to the first end of the capacitor C 1 The first end of the inductor L, the second end of the capacitor C 1 The second end of, the switching tube S 3 The first poles of are all connected to the positive electrode of the DC power supply U in The positive electrode of the diode D 2 The negative electrode of, the switching tube S 2 The second pole of, the switching tube S 6 The second poles of are all connected to the negative electrode of the DC power supply U in The negative electrode of the switching tube S 3 The second pole of the switching tube S and the switching tube S 4 The second pole of are connected; the second end of the inductor L, the switching tube S 4 The first pole of, the switching tube S 5 The second pole of, the switching tube S 6 The first pole of, the second end of the capacitor C 2 The first end of the capacitor C 3 The first end of are connected; the negative electrode of the diode D 1 The negative electrode of, the switching tube S 7 The first poles of are all connected to the first end of the capacitor C 2 The negative electrode of the diode D 2 The positive electrode of, the switching tube S 8 The second poles of are all connected to the second end of the capacitor C 3 The second end of are connected; the second pole of the switching tube S 7 The second pole of the switching tube S and the first pole of the switching tube S 8 Are connected to the second node. The first node is the negative voltage output terminal of the five-level inverter, and the second node is the positive voltage output terminal of the five-level inverter; the switching tube S 1 The switching tube S 2 The switching tube S 3 The switching tube S 4 The switching tube S 5 The switching tube S 6 The switching tube S 7 The switching tube S 8 The third pole of is connected to the control signal.

[0007] An integrated boost-type switched-capacitor multilevel inverter control method is applied to an integrated boost-type switched-capacitor multilevel inverter. The inverter has the following 10 operating modes, namely:

[0008] Mode 1: The switching tubes S 2 The switching tubes S 3 The switching tubes S 5 And the switching tube S 7Turn on, and turn off the other switching tubes; the inductor L passes through the switching tube S 5 in parallel with the capacitor C 1 to release energy at both ends, and the current i L decreases linearly; the DC power supply U in and the capacitor C 1 are connected in series and then pass through the switching tube S 5 and the diode D 2 to charge the capacitor C 3 ; the turn-on of the switching tube S 5 makes the diode D 1 reverse-biased; the DC power supply U in and the capacitor C 1 and C 2 are connected in series through the switching tube S 2 , the switching tube S 5 and the switching tube S 7 to supply power to the load, and the output voltage u of the inverter o = 4U in ;

[0009] Mode 2: The switching tubes S 2 , the switching tubes S 3 , the switching tubes S 4 and the switching tubes S 7 are turned on, and the other switching tubes are turned off; the inductor L passes through the switching tubes S 3 and the switching tubes S 4 to be short-circuited, and the current i L remains unchanged; the capacitors C 1 and C 3 are open-circuited, and the voltage remains unchanged; since u C2 > u C1 , u C3 > U in , so the diodes D 1 and D 2 are reverse-biased; the DC power supply U in and the capacitor C 2 are connected in series through the switching tubes S 2 , the switching tubes S 3 , the switching tubes S 4 and the switching tubes S 7 to supply power to the load, and the output voltage u of the inverter o = 3U in ;

[0010] Mode 3: The switching tubes S 2 , the switching tubes S 4 , the switching tubes S 6 and the switching tubes S 7 are turned on, and the other switching tubes are turned off; the inductor L passes through the switching tube S 6 in parallel with the DC power supply U inEnergy storage is carried out at both ends, and the current is i L Increases linearly; the DC power supply is U in Is connected in series with the capacitor C 1 And then passes through the diode D 1 And the switching tube S 6 To charge the capacitor C 2 The capacitor C 3 Is open-circuited and the voltage remains unchanged; the switching tube S 6 Turning on makes the diode D 2 Reverse cut-off; if the inverter output current is i o >0, the DC power supply U in Is connected in series with the capacitor C 1 And then passes through the switching tube S 2 The switching tube S 7 And the diode D 1 To supply power to the load, and the inverter output voltage u o = 2U in ; if i o <0, the capacitor C 2 Passes through the switching tube S 2 The switching tube S 6 And the switching tube S 7 To supply power to the load, and it is still u o = 2U in ;

[0011] Mode 4: The switching tubes S 1 The switching tubes S 3 The switching tubes S 4 And the switching tube S 7 Are turned on, and the rest of the switching tubes are turned off; the inductor L is short-circuited through the switching tubes S 3 And the switching tube S 4 The current i L Remains unchanged; the capacitor C 3 Is open-circuited and the voltage remains unchanged; since u C2 > u C1 , u C3 > U in , so the diodes D 1 And D 2 Are reverse cut-off; the capacitors C 1 And C 2 Pass through the switching tubes S 1 The switching tubes S 3 The switching tubes S 4 And the switching tube S 7 Are reversely connected in series to supply power to the load, and the inverter output voltage u o = U in ;

[0012] Mode 5: The switching tubes S 1 The switching tubes S4 1. The switching transistor S 6 and the switching transistor S 7 turn on, and the other switching transistors turn off; the inductor L stores energy by being connected in parallel with the DC power supply U 6 across its two ends, and the current i in increases linearly; the DC power supply U L is connected in series with the capacitor C in and then charges the capacitor C 1 through the diode D 1 and the switching transistor S 6 ; the capacitor C 2 is open-circuited and the voltage remains unchanged; the turn-on of the switching transistor S 3 makes the diode D 6 reverse-biased; if the inverter output current i 2 > 0, the output terminal of the inverter is short-circuited through the switching transistor S o , the switching transistor S 1 , and the diode D 7 , and the inverter output voltage u 1 = 0; if i o < 0, the DC power supply U o is connected in series with the capacitor C in and then supplies power to the load through the switching transistor S 1 , the switching transistor S 1 , the switching transistor S 6 , and the switching transistor S 7 connected in reverse series with the capacitor C 2 , and still u o = 0;

[0013] Mode 6: The switching transistors S 2 , S 3 , S 5 , and S 8 turn on, and the other switching transistors turn off; the inductor L releases energy by being connected in parallel with the capacitor C 5 across its two ends, and the current i 1 decreases linearly; the DC power supply U L is connected in series with the capacitor C in and then charges the capacitor C 1 through the switching transistor S 5 and the diode D 2 ; the capacitor C 3 is open-circuited and the voltage remains unchanged; the turn-on of the switching transistor S 2 makes the diode D 5 reverse-biased; if the inverter output current i 1 < 0, the output terminal of the inverter is short-circuited through the switching transistor S o , the switching transistor S 2 , and the diode D 8 ; 2Short circuit, inverter output voltage u o =0; if i o >0, DC power supply U in With capacitor C 1 After connecting in series, it passes through the switch tube S 2 , switch tube S 5 And switch tube S 8 With capacitor C 3 After reverse series connection, the load is powered, still u o =0;

[0014] Mode 7: Switching tube S 2 , switch tube S 3 , switch tube S 4 And switch tube S 8 The inductor L is turned on through the switch tube S 3 And switch tube S 4 Short circuit, current i L Remain unchanged; capacitance C 1 and C 2 Open circuit, the voltage remains unchanged; due to u C2 >u C1 ,u C3 >U in , so the diode D 1 and D 2 Reverse cutoff; DC power supply U in With capacitor C 3 Through the switch tube S 2 , switch tube S 3 , switch tube S 4 And switch tube S 8 After reverse series connection, the load is reversely powered, and the inverter output voltage u o =-U in ;

[0015] Mode 8: Switching tube S 1 , switch tube S 3 , switch tube S 5 And switch tube S 8 The inductor L is turned on through the switch tube S 5 Connected in parallel with capacitor C 1 Energy is released at both ends, and the current i L Linear decrease; DC power supply U in With capacitor C 1 After connecting in series, the switch tube S 5 and diode D 2 is the capacitance C 3 Charging; Capacitor C 2 Open circuit, the voltage remains unchanged; switch tube S 5 The diode D1 Reverse cut-off; if the inverter output current i o < 0, the DC power supply U in is connected in series with the capacitor C 1 and then supplies reverse power to the load through the switching tube S 1 and the switching tube S 8 and the diode D 1 The inverter output voltage u o =-2U in ; if i o > 0, the capacitor C 3 supplies reverse power to the load through the switching tube S 1 and the switching tube S 5 and the switching tube S 8 The output voltage is still u o =-2U in ;

[0016] Mode 9: The switching tubes S 1 and the switching tubes S 3 and the switching tubes S 4 and the switching tubes S 8 are turned on, and the rest of the switching tubes are turned off; the inductor L is short-circuited through the switching tubes S 3 and the switching tubes S 4 The current i L remains unchanged; the capacitor C 2 is open, and the voltage remains unchanged; since u C2 > u C1 , u C3 > U in , so the diodes D 1 and D 2 are reverse cut-off; the capacitor C 1 and C 3 are connected in series through the switching tubes S 1 and the switching tubes S 3 and the switching tubes S 4 and the switching tubes S 8 to supply reverse power to the load, and the inverter output voltage u o =-3U in ;

[0017] Mode 10: The switching tubes S 1 and the switching tubes S 4 and the switching tubes S 6 and the switching tubes S 8 are turned on, and the rest of the switching tubes are turned off; the inductor L is connected in parallel across the DC power supply U 6 to store energy, and the current i in increases linearly; the DC power supply U L is connected in series with the capacitor C in and then passes through the diode D 1 ​1 and the switching transistor S 6 is the capacitor C 2 charges; the switching transistor S 6 turning on causes the diode D 2 to be reverse cut-off; the DC power supply U in and the capacitor C 1 and C 3 are connected in series through the switching transistor S 1 、the switching transistor S 6 and the switching transistor S 8 to supply reverse power to the load in series, and the output voltage u of the inverter o =-4U in ;

[0018] wherein, u C1 、u C2 and u C3 are respectively the voltages across the capacitors C 1 、C 2 and C 3 ; i L is the current flowing through the inductor L; i o is the output current of the inverter.

[0019] Furthermore, when the output voltage of the inverter is 2U in 、0 and -4U in , the inductor L stores energy, and the voltage across it is the DC power supply voltage U in ; when the output voltage of the inverter is 4U in 、0 and -2U in , the inductor L releases energy, and the voltage across it is the average value U 1 of the voltage of the capacitor C C1 .

[0020] Furthermore, according to the symmetry of the positive and negative half-cycles of the inverter output voltage and the volt-second balance principle of the inductor, it can be obtained that

[0021] U C1 =U in (7)

[0022] When the output voltage of the inverter is 4U in 、0 and -2U in , the DC power supply U in and the capacitor C 1 are connected in series and pass through the switching transistor S 5 and the diode D 2 to charge the capacitor C 3 ; when the output voltage of the inverter is 2U in 、0 and -4U in , the DC power supply U in and the capacitor C 1 are connected in series and pass through the diode D1 and the switching transistor S 6 is the capacitor C 2 is charged; thus, the average voltage of the capacitor C 2 and C 3 is 2U in .

[0023] Furthermore, when the switching transistor S 6 is turned on, the inductor L stores energy through the DC power supply U in ; when the switching transistor S 5 is turned on, the inductor L is connected in parallel with the capacitor C 1 and energy is released.

[0024] Furthermore, the duty cycles of the switching transistor S 5 and the switching transistor S 6 are equal.

[0025] Furthermore, the inverter adopts the nearest level approximation as the modulation strategy for the multilevel inverter.

[0026] Furthermore, the nearest level approximation modulation strategy uses a sine wave u r with an amplitude of A r whose frequency and phase are the same as the fundamental wave of the inverter output voltage as a reference, and rounds the ratio of the instantaneous value of u r to the interval voltage U in between the levels of the inverter output to obtain the number of levels that the inverter needs to output; then, according to the switching logic corresponding to each level, control signals for each switching transistor are generated.

[0027] Furthermore, the calculation formula for each phase angle of the inverter is

[0028]

[0029] It can be obtained that the Fourier series expression of the inverter output voltage u o is:[[]]

[0030]

[0031] where ω o = 2π / T o is the output angular frequency of the inverter.

[0032] Furthermore, the inverter mainly supplies power to the load through the fundamental wave, and the fundamental wave effective value expression of the output voltage u o is

[0033]

[0034] When θ 1 -θ 4 are all zero, Uo1 The maximum value is

[0035]

[0036] Then the modulation index M of the inverter can be defined as I as

[0037]

[0038] Compared with the prior art, the beneficial effects of the technical solution of the present invention are as follows:

[0039] Compared with the existing multilevel inverters, the circuit structure of the integrated boost-type switched-capacitor multilevel inverter of the present invention is simpler, with fewer switching devices, higher boost capability, and capacitor voltage self-balancing ability. BRIEF DESCRIPTION OF THE DRAWINGS

[0040] The drawings are only for illustrative purposes and should not be construed as limiting the present invention;

[0041] To better illustrate this embodiment, some components in the drawings are omitted, enlarged, or reduced, and do not represent the dimensions of the actual product;

[0042] For those skilled in the art, it is understandable that some well-known structures and their descriptions in the drawings may be omitted.

[0043] Figure 1 Topological schematic diagram of the integrated boost-type switched-capacitor multilevel inverter provided by the embodiment of the present invention;

[0044] Figures 2a - 2j Schematic diagrams of equivalent circuits of working modes 1 - 10 corresponding to nine output levels of the inverter provided by the embodiment of the present invention;

[0045] Figure 3 Schematic diagram of the main working waveforms of the inverter provided by the embodiment of the present invention;

[0046] Figure 4 Schematic diagram of the nearest level approximation modulation provided by the embodiment of the present invention;

[0047] Figure 5 Schematic diagram of the driving control signal waveforms of switching devices S 1 - S 8 of the inverter provided by the embodiment of the present invention;

[0048] Figure 6 Schematic diagram of the main working waveforms of the inverter with a resistive load provided by the embodiment of the present invention;

[0049] Figure 7It is a schematic diagram of the output voltage and output current waveforms when the inverter in the embodiment of the present invention is connected to an inductive load. Detailed implementation manners

[0050] To make the objectives, technical solutions and advantages of the embodiments of the present invention clearer, the technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are some, but not all, of the embodiments of the present invention. All other embodiments obtained by those of ordinary skill in the art based on the embodiments of the present invention without creative efforts are within the scope of protection of the present invention.

[0051] Embodiment 1

[0052] For ease of understanding, please refer to Figure 1 , an embodiment of an integrated boost-type switched-capacitor multilevel inverter provided by the present invention, including a DC power supply U in , an inductor L, a capacitor C 1 , a capacitor C 2 , a capacitor C 3 , a diode D 1 , a diode D 2 , a switching transistor S 1 , a switching transistor S 2 , a switching transistor S 3 , a switching transistor S 4 , a switching transistor S 5 , a switching transistor S 6 , a switching transistor S 7 , a switching transistor S 8 ; the second pole of the switching transistor S 1 , the first pole of the switching transistor S 2 are connected to a first node, the positive electrode of the diode D 1 , the first pole of the switching transistor S 1 , the first pole of the switching transistor S 5 are all connected to the first end of the capacitor C 1 ; the first end of the inductor L, the second end of the capacitor C 1 , the first pole of the switching transistor S 3 are all connected to the positive electrode of the DC power supply U in ; the negative electrode of the diode D 2 , the second pole of the switching transistor S 2 , the second pole of the switching transistor S 6 are all connected to the negative electrode of the DC power supply U in ; the second pole of the switching transistor S 3 is connected to the second pole of the switching transistor S 4 ; the second end of the inductor L, the first pole of the switching transistor S 4 , the first pole of the switching transistor S 5The second pole of, switch tube S 6 The first pole of, capacitor C 2 The second terminal of, capacitor C 3 The first terminal is connected; Diode D 1 The negative electrode of, switch tube S 7 The first poles of all are connected to capacitor C 2 The first terminal, diode D 2 The positive electrode of, switch tube S 8 The second poles of all are connected to capacitor C 3 The second terminal; Switch tube S 7 The second pole of, switch tube S 8 The first pole is connected to the second node, the first node is the negative voltage output terminal of the five-level inverter, and the second node is the positive voltage output terminal of the five-level inverter; Switch tube S 1 , Switch tube S 2 , Switch tube S 3 , Switch tube S 4 , Switch tube S 5 , Switch tube S 6 , Switch tube S 7 , Switch tube S 8 The third pole is connected to the control signal.

[0053] The switch tubes used in the present invention can be IGBT tubes or MOS tubes. The inverter is composed of 1 DC power supply U in , 1 inductor L, 3 capacitors C 1 ~C 3 , 8 switch tubes S 1 ~S 8 and 2 diodes D 1 ~D 2 ; U in is the DC power supply voltage of the inverter, u o is the output voltage of the inverter; When switch tube S 6 is turned on, the inductor L stores energy through the DC power supply; When S 5 is turned on, the inductor L is connected in parallel with capacitor C 1 and energy is released; By controlling the duty cycles of S 5 and S 6 to be equal, the charging and discharging times of the inductor L can be made symmetric, so that the voltage of capacitor C 1 is equal to the DC power supply voltage; Then, by controlling the drive control logic of all the switch tubes, capacitor C 1 can be connected in series with the DC power supply and then charge capacitors C 2 and C 3 respectively, and finally make the inverter generate a voltage gain of 4 times and amplitudes of ±4U in , ±3U in , ±2Uin , ±U in and the nine-level output of 0.

[0054] Embodiment 2

[0055] Specifically, on the basis of Embodiment 1, the solution is described in combination with specific implementation examples to further reflect the technical effects of the solution. Specifically:

[0056] An integrated boost-type switched-capacitor multilevel inverter control method. The working modes and equivalent circuits corresponding to the output levels of the inverter are shown in Figure 2, where u C1 , u C2 and u C3 are the voltages across capacitors C 1 , C 2 and C 3 respectively; i L is the current flowing through inductor L; i o is the inverter output current; the working principles of each working mode are analyzed as follows:

[0057] 1) Mode 1: As shown in Figure 2(a); switches S 2 , switch S 3 , switch S 5 and switch S 7 are turned on, and the rest of the switches are turned off; inductor L is connected in parallel across capacitor C 5 through switch S 1 to release energy, and current i L decreases linearly; DC power supply U in is connected in series with capacitor C 1 and charges capacitor C 5 through switch S 2 and diode D 3 ; the turn-on of switch S 5 makes diode D 1 reverse-biased; the DC power supply and capacitors C 1 and C 2 supply power to the load in series through switches S 2 , switch S 5 and switch S 7 , and the inverter output voltage u o = 4U in ;

[0058] 2) Mode 2: As shown in Figure 2(b); switches S 2 , switch S 3 , switch S 4 and switch S 7 are turned on, and the rest of the switches are turned off; inductor L is connected in parallel across capacitor C 3and the switching transistor S 4 is short - circuited, and the current i L remains unchanged; the capacitor C 1 and C 3 is open - circuited, and the voltage remains unchanged; since u C2 >u C1 and u C3 >U in , the diodes D 1 and D 2 are reverse - cut - off; the DC power supply and the capacitor C 2 are connected in series through the switching transistor S 2 , the switching transistor S 3 , the switching transistor S 4 and the switching transistor S 7 to supply power to the load, and the output voltage u o = 3U in ;

[0059] 3) Mode 3: As shown in Fig. 2(c); the switching transistors S 2 , the switching transistors S 4 , the switching transistors S 6 and the switching transistor S 7 are turned on, and the other switching transistors are turned off; the inductor L is connected in parallel across the DC power supply U 6 through the switching transistor S in to store energy, and the current i L increases linearly; the DC power supply U in and the capacitor C 1 are connected in series and then supply power to the capacitor C 1 through the diode D 6 and the switching transistor S 2 ; the capacitor C 3 is open - circuited, and the voltage remains unchanged; the turning on of the switching transistor S 6 makes the diode D 2 reverse - cut - off; if the output current i o of the inverter > 0, the DC power supply and the capacitor C 1 are connected in series and then supply power to the load through the switching transistor S 2 , the switching transistor S 7 and the diode D 1 , and the output voltage u o = 2U in ; if i o < 0, the capacitor C 2 supplies power to the load through the switching transistor S 2 , the switching transistor S 6 and the switching transistor S 7 , and it is still u o = 2U in ;

[0060] 4) Mode 4: As shown in Fig. 2(d); switch S 1 switch S 3 switch S 4 and switch S 7 turn on, and the rest of the switches turn off; inductor L is short-circuited through switch S 3 and switch S 4 , and current i L remains unchanged; capacitor C 3 is open-circuited and the voltage remains unchanged; since u C2 >u C1 , u C3 >U in , so diodes D 1 and D 2 are reverse-biased; capacitors C 1 and C 2 are connected in reverse series through switches S 1 , switch S 3 , switch S 4 and switch S 7 to supply power to the load, and the output voltage u o of the inverter = U in ;

[0061] 5) Mode 5: As shown in Fig. 2(e); switch S 1 switch S 4 switch S 6 and switch S 7 turn on, and the rest of the switches turn off; inductor L is connected in parallel across the DC power supply U 6 through switch S in to store energy, and current i L increases linearly; the DC power supply U in and capacitor C 1 are connected in series and then charge capacitor C 1 through diode D 6 and switch S 2 ; capacitor C 3 is open-circuited and the voltage remains unchanged; the turn-on of switch S 6 makes diode D 2 reverse-biased; if the output current i o >0 of the inverter, the output terminal of the inverter is short-circuited through switch S 1 , switch S 7 and diode D 1 , and the output voltage u o of the inverter = 0; if i o <0, the DC power supply U in and capacitor C 1 are connected in series and then through switch S 1 switch S6 and the switching transistor S 7 and the capacitor C 2 are connected in reverse series to supply power to the load, and still u o = 0;

[0062] 6) Mode 6: As shown in Fig. 2(f); the switching transistors S 2 , the switching transistor S 3 , the switching transistor S 5 and the switching transistor S 8 are turned on, and the other switching transistors are turned off; the inductor L is connected in parallel with the capacitor C 5 through the switching transistor S 1 to release energy, and the current i L decreases linearly; the DC power supply U in and the capacitor C 1 are connected in series and then supply power to the capacitor C 5 through the switching transistor S 2 and the diode D 3 to charge; the capacitor C 2 is open-circuited, and the voltage remains unchanged; the turning on of the switching transistor S 5 makes the diode D 1 reverse-biased; if the inverter output current i o < 0, the output terminal of the inverter is short-circuited through the switching transistor S 2 , the switching transistor S 8 and the diode D 2 , and the inverter output voltage u o = 0; if i o > 0, the DC power supply U in and the capacitor C 1 are connected in series and then connected in reverse series with the capacitor C 2 through the switching transistor S 5 and the switching transistor S 8 to supply power to the load, and still u 3 = 0; o = 0;

[0063] 7) Mode 7: As shown in Fig. 2(g); the switching transistors S 2 , the switching transistor S 3 , the switching transistor S 4 and the switching transistor S 8 are turned on, and the other switching transistors are turned off; the inductor L is short-circuited through the switching transistor S 3 and the switching transistor S 4 , and the current i L remains unchanged; the capacitors C 1 and C 2 are open-circuited, and the voltage remains unchanged; since u C2 > u C1 , u C3 > U in, so diode D 1 and D 2 are reverse cutoff; DC power supply U in and capacitor C 3 are reversely connected in series through switching transistor S 2 , switching transistor S 3 , switching transistor S 4 and switching transistor S 8 to supply reverse power to the load, and the output voltage u o of the inverter is = -U in ;

[0064] 8) Mode 8: As shown in Fig. 2(h); switching transistors S 1 , switching transistors S 3 , switching transistors S 5 and switching transistors S 8 are turned on, and the rest of the switching transistors are turned off; inductor L is connected in parallel across capacitor C 5 through switching transistor S 1 to release energy, and the current i L decreases linearly; DC power supply U in and capacitor C 1 are connected in series and then supply power to capacitor C 5 through switching transistor S 2 and diode D 3 ; capacitor C 2 is open-circuited and the voltage remains unchanged; the turning on of switching transistor S 5 makes diode D 1 reverse cutoff; if the output current i o of the inverter < 0, DC power supply and capacitor C 1 are connected in series and then supply reverse power to the load through switching transistor S 1 , switching transistor S 8 and diode D 1 , and the output voltage u o of the inverter is = -2U in ; if i o > 0, capacitor C 3 supplies reverse power to the load through switching transistor S 1 , switching transistor S 5 and switching transistor S 8 , and it is still u o = -2U in ;

[0065] 9) Mode 9: As shown in Fig. 2(i); switching transistors S 1 , switching transistors S 3 , switching transistors S 4 and switching transistors S 8 are turned on, and the rest of the switching transistors are turned off; inductor L is connected through switching transistor S 3 and switching transistor S 4Short circuit, current i L Remains unchanged; capacitor C 2 Open circuit, voltage remains unchanged; since u C2 >u C1 ,u C3 >U in ,so diode D 1 and D 2 Are reverse cut-off; capacitor C 1 and C 3 Are connected in series through switch tube S 1 、switch tube S 3 、switch tube S 4 and switch tube S 8 to supply reverse power to the load, and the inverter output voltage u o =-3U in ;

[0066] 10) Mode 10: As shown in Figure 2(j); switch tube S 1 、switch tube S 4 、switch tube S 6 and switch tube S 8 Turn on, and the rest of the switch tubes turn off; inductor L is connected in parallel across the DC power supply U 6 through switch tube S in to store energy, and the current i L Increases linearly; the DC power supply U in and capacitor C 1 Are connected in series and charge capacitor C 1 through diode D 6 and switch tube S 2 ; the turn-on of switch tube S 6 makes diode D 2 Reverse cut-off; the DC power supply and capacitor C 1 and C 3 Are connected in series through switch tube S 1 、switch tube S 6 and switch tube S 8 to supply reverse power to the load, and the inverter output voltage u o =-4U in ; where, u C1 、u C2 and u C3 Are the voltages across capacitors C 1 、C 2 and C 3 respectively; i L is the current flowing through inductor L; i o is the inverter output current.

[0067] It can be seen from Figure 2 that: (1) The inverter output voltage is 2U in 、0 and -4Uin When, the inductor L stores energy, and the voltage across its two ends is the DC power supply voltage U in ; (2) The output voltage of the inverter is 4U in , 0 and -2U in When, the inductor L releases energy, and the voltage across its two ends is the average value U of the voltage of the capacitor C 1 ; According to the symmetry of the positive and negative half - cycles of the inverter output voltage and the volt - second balance principle of the inductor, it can be obtained that C1 ; According to the symmetry of the positive and negative half - cycles of the inverter output voltage and the volt - second balance principle of the inductor, it can be obtained that

[0068] U C1 =U in (13)

[0069] The output voltage of the inverter is 4U in , 0 and -2U in When, the DC power supply and the capacitor C 1 are connected in series and pass through the switching tube S 5 and the diode D 2 to charge the capacitor C 3 ; When the output voltage is 2U in , 0 and -4U in When, the DC power supply and the capacitor C 1 are connected in series and pass through the diode D 1 and the switching tube S 6 to charge the capacitor C 2 ; Therefore, the average value of the voltages of the capacitors C 2 and C 3 should be 2U in ; The above analysis results verify the boost capacity and the capacitor voltage self - balancing capacity of the multilevel inverter of the present invention.

[0070] Common modulation strategies for multilevel inverters include space vector modulation, carrier modulation, specific harmonic elimination, and nearest level approximation modulation, etc.; The nearest level approximation is adopted as the modulation strategy of the multilevel inverter of the present invention; Under the nearest level approximation modulation, the main working waveforms of the multilevel inverter of the present invention are as Figure 3 shown. In the figure, θ 1 , θ 2 , θ 3 and θ 4 respectively represent the phase angles of U in , 2U in , 3U in and 4U in , and 0 ≤ θ 1 ≤ θ 2 ≤ θ 3 ≤ θ 4 ≤ π / 2; T o is the output period of the inverter.

[0071] The schematic diagram of the nearest level approximation modulation for the multilevel inverter of the present invention is as follows Figure 4 shown; the modulation strategy uses a sine wave u r with the same frequency and phase as the fundamental wave of the inverter output voltage and an amplitude of A r as a reference. The ratio of the instantaneous value of u r to the interval voltage U in between each level of the inverter output is rounded to obtain the number of levels that the inverter needs to output; then, according to the switching logic corresponding to each level in Figure 2, the control signals of each switch tube are generated; according to Figure 4 it can be obtained that the calculation formula for each phase angle of the inverter is

[0072]

[0073] According to Figure 3 , the Fourier series expression of the inverter output voltage u o can be obtained as

[0074]

[0075] In the formula, ω o = 2π / T o is the output angular frequency of the inverter; the multilevel inverter mainly supplies power to the load through the fundamental wave, then the fundamental wave effective value expression of the output voltage u o is

[0076]

[0077] When θ 1 -θ 4 are all zero, the maximum value of U o1 is

[0078]

[0079] Then the modulation index M I of the inverter can be defined as

[0080]

[0081] Embodiment 3

[0082] Specifically, on the basis of Embodiment 1, the scheme is described in combination with specific implementation examples to further reflect the technical effects of the present scheme. Specifically:

[0083] To verify the feasibility and superiority of the multilevel inverter of the present invention, a multilevel inverter simulation model is built on the Matlab / Simulink simulation platform for simulation verification; the simulation parameters are: the DC power supply voltage U in = 50V, the capacitor C 1= C 2 = C 3 = 680 μF, inductance L = 5 mH, inverter output frequency f o = 500 Hz, the inverter load is a resistive-inductive load of 100 Ω + 10 mH;

[0084] Figure 5 Shown is the drive control signal of switch tube S 1 - switch tube S 8 ; It can be seen that switch tube S 1 and switch tube S 2 are complementary, switch tube S 3 and switch tube S 6 are complementary, switch tube S 4 and switch tube S 5 are complementary, switch tube S 7 and switch tube S 8 are complementary, which is consistent with the theoretical analysis;

[0085] Figure 6 Shown are the main working waveforms when the inverter is loaded with a resistive load (100 Ω); It can be seen that both the output voltage and current of the inverter are nine-level waveforms, the voltage and current are in the same phase, the frequency is 500 Hz, which is consistent with the theoretical value; The current waveform of inductor L is also basically consistent with the theoretical analysis; In addition, the amplitude of the inverter output voltage is about 200 V, which is 4 times the DC power supply voltage, and the average values of the voltages of capacitors C 1 、C 2 and C 3 are about 49.7 V, 99.4 V and 100 V respectively, which is basically consistent with the theoretical analysis, verifying the boost capacity and capacitor voltage self-balancing characteristics of the multi-level inverter of the present invention;

[0086] Figure 7 Shown are the output voltage and output current waveforms when the inverter is loaded with an inductive load (100 Ω - 10 mH); It can be seen that the output voltage of the inverter is still a nine-level waveform, while the output current becomes a sine wave under the filtering action of the load inductor and lags behind the output voltage by a certain phase, indicating that the multi-level inverter of the present invention can supply power to inductive loads.

[0087] Obviously, the above embodiments of the present invention are merely examples for clearly illustrating the present invention, rather than limitations on the implementation manners of the present invention. For those of ordinary skill in the art, other different forms of changes or modifications can be made based on the above description. It is not necessary and impossible to enumerate all the implementation manners here. Any modifications, equivalent replacements, and improvements made within the spirit and principle of the present invention shall be included in the protection scope of the claims of the present invention.

Claims

1. An integrated boost switched-capacitor multilevel inverter, Characterized in that, including a DC power supply U in , an inductor L, and capacitors C 1 , capacitor C 2 , capacitor C 3 , a diode D 1 , diode D 2 , a switching transistor S 1 , switching transistor S 2 , switching transistor S 3 , switching transistor S 4 , switching transistor S 5 , switching transistor S 6 , switching transistor S 7 , switching transistor S 8 ; switching transistor S 1 's second pole, and switching transistor S 2 's first pole are connected to the first node. The positive pole of diode D 1 , switching transistor S 1 's first pole, and switching transistor S 5 's first pole are all connected to the first end of capacitor C 1 . The first end of inductor L, the second end of capacitor C 1 , and switching transistor S 3 's first pole are all connected to the positive pole of DC power supply U in . The negative pole of diode D 2 , switching transistor S 2 's second pole, and switching transistor S 6 's second pole are all connected to the negative pole of DC power supply U in . The second pole of switching transistor S 3 is connected to the second pole of switching transistor S 4 . The second end of inductor L, switching transistor S 4 's first pole, switching transistor S 5 's second pole, switching transistor S 6 's first pole, and the second end of capacitor C 2 are all connected to the first end of capacitor C 3 . The negative pole of diode D 1 , and switching transistor S 7 's first pole are all connected to the first end of capacitor C 2 . The positive pole of diode D 2 , and switching transistor S 8 's second pole are all connected to the second end of capacitor C 3 . The second pole of switching transistor S 7 , and switching transistor S 8 's first pole are connected to the second node. The first node is the negative voltage output terminal of this multi-level inverter, and the second node is the positive voltage output terminal of this multi-level inverter; switching transistor S 1 , switching transistor S 2 , switching transistor S 3 and the third pole of switch tube S 4 and the third pole of switch tube S 5 and the third pole of switch tube S 6 and the third pole of switch tube S 7 and the third pole of switch tube S 8 is connected to a control signal.

2. A control method for an integrated boost switched-capacitor multilevel inverter, applied to the integrated boost switched-capacitor multilevel inverter described in claim 1, Characterized in that, The inverter is controlled to have the following 10 operating modes, namely: Mode 1: Switching transistor S 2 , switching transistor S 3 , switching transistor S 5 and switching transistor S 7 are turned on, and the remaining switching transistors are turned off; The inductor L is connected to the switch S 5 in parallel with the capacitor C 1 to release energy at both ends, and the current i L decreases linearly; the DC power supply U in is connected in series with the capacitor C 1 and then passes through the switch S 5 and the diode D 2 to charge the capacitor C 3 ; when the switch S 5 is turned on, the diode D 1 is reverse cut off; the DC power supply U in is connected in series with the capacitor C 1 and C 2 and supplies power to the load through the switch S 2 , the switch S 5 and the switch S 7 , and the output voltage u of the inverter o = 4U in ; Mode 2: Switching transistor S 2 , switching transistor S 3 , switching transistor S 4 and switching transistor S 7 turn on, and the rest of the switching transistors turn off; The inductor L is connected through the switching transistor S 3 and the switching transistor S 4 is short-circuited, and the current i L remains unchanged; the capacitors C 1 and C 3 are open-circuited, and the voltage remains unchanged; since u C2 > u C1 , u C3 > U in , so the diodes D 1 and D 2 are reverse cut-off; the DC power supply U in and the capacitor C 2 are connected in series through the switching transistor S 2 , the switching transistor S 3 , the switching transistor S 4 and the switching transistor S 7 to supply power to the load, and the output voltage u o of the inverter = 3U in ; Mode 3: Switching transistor S 2 and switching transistor S 4 and switching transistor S 6 and switching transistor S 7 turn on, and the rest of the switching transistors turn off; the inductor L is connected in parallel with the DC power supply U 6 across both ends for energy storage, and the current i in increases linearly; the DC power supply U L is connected in series with the capacitor C in and then charges the capacitor C through the diode D 1 and the switching transistor S 1 ; the capacitor C 6 is open-circuited and the voltage remains unchanged; the turn-on of the switching transistor S 2 makes the diode D 3 reverse-biased; if the inverter output current i 6 > 0, the DC power supply U 2 is connected in series with the capacitor C o and supplies power to the load through the switching transistor S in , the switching transistor S 1 and the diode D 2 , and the inverter output voltage u 7 = 2U 1 ; if i o < 0, the capacitor C in supplies power to the load through the switching transistor S o , the switching transistor S 2 , the switching transistor S 2 and the switching transistor S 6 , and it is still u 7 = 2U o ; in ; Mode 4: Switching transistor S 1 , switching transistor S 3 , switching transistor S 4 and switching transistor S 7 turn on, and the remaining switching transistors turn off; The inductor L is connected through the switching transistor S 3 and the switching transistor S 4 is short-circuited, and the current i L remains unchanged; the capacitor C 3 is open-circuited, and the voltage remains unchanged; since u C2 >u C1 , u C3 >U in , so the diodes D 1 and D 2 are reverse cut-off; the capacitors C 1 and C 2 are connected in reverse series through the switching transistor S 1 , the switching transistor S 3 , the switching transistor S 4 and the switching transistor S 7 to supply power to the load, and the output voltage u o of the inverter is equal to U in ; Mode 5: Switching transistor S 1 The switching transistor S 4 The switching transistor S 6 and the switching transistor S 7 turn on, and the rest of the switching transistors turn off; The inductor L is connected in parallel with the DC power supply U 6 across both ends for energy storage, and the current i in increases linearly; The DC power supply U L is connected in series with the capacitor C in and then charges the capacitor C through the diode D 1 and the switching transistor S 1 ; The capacitor C 6 is open-circuited and the voltage remains unchanged; The turn-on of the switching transistor S 2 makes the diode D 3 reverse-biased; If the inverter output current i 6 > 0, the output terminal of the inverter is short-circuited through the switching transistor S 2 , the switching transistor S o and the diode D 1 , the switching transistor S 7 and the diode D 1 , and the inverter output voltage u o = 0; If i o < 0, the DC power supply U in is connected in series with the capacitor C 1 and then supplies power to the load through the switching transistor S 1 , the switching transistor S 6 and the switching transistor S 7 in reverse series with the capacitor C 2 , and still u o = 0; Mode 6: Switching transistor S 2 and switching transistor S 3 and switching transistor S 5 and switching transistor S 8 turn on, and the remaining switching transistors turn off; The inductor L is connected through the switching transistor S 5 in parallel with the capacitor C 1 to release energy at both ends, and the current i L decreases linearly; the DC power supply U in is connected in series with the capacitor C 1 and then passes through the switching transistor S 5 and the diode D 2 to charge the capacitor C 3 ; when the capacitor C 2 is open-circuited, the voltage remains unchanged; when the switching transistor S 5 is turned on, the diode D 1 is reverse-biased; if the inverter output current i o <0, the output terminal of the inverter is short-circuited through the switching transistor S 2 , the switching transistor S 8 and the diode D 2 , and the inverter output voltage u o = 0; if i o >0, the DC power supply U in is connected in series with the capacitor C 1 and then passes through the switching transistor S 2 , the switching transistor S 5 and the switching transistor S 8 and is connected in reverse series with the capacitor C 3 to supply power to the load, and still u o = 0; Mode 7: Switching transistor S 2 and switching transistor S 3 and switching transistor S 4 and switching transistor S 8 are turned on, and the remaining switching transistors are turned off; The inductor L is connected through the switching transistor S 3 and the switching transistor S 4 is short-circuited, and the current i L remains unchanged; the capacitor C 1 and C 2 is open-circuited, and the voltage remains unchanged; since u C2 >u C1 , u C3 >U in , so the diode D 1 and D 2 is reversely cut off; the DC power supply U in and the capacitor C 3 are reversely connected in series through the switching transistor S 2 , the switching transistor S 3 , the switching transistor S 4 and the switching transistor S 8 to supply power reversely to the load, and the output voltage u o =-U in ; Mode 8: Switching transistor S 1 and switching transistor S 3 and switching transistor S 5 and switching transistor S 8 turn on, and the rest of the switching transistors turn off; The inductor L is connected in parallel with the capacitor C through the switching transistor S 5 to release energy at both ends, and the current i 1 decreases linearly; the DC power supply U L is connected in series with the capacitor C in and then charges the capacitor C through the switching transistor S 1 and the diode D 5 ; when the capacitor C is open-circuited, the voltage remains unchanged; when the switching transistor S 2 is turned on, the diode D 3 is reverse-biased; if the inverter output current i 2 < 0, the DC power supply U 5 is connected in series with the capacitor C 1 and then supplies reverse power to the load through the switching transistor S o <0, and the inverter output voltage u in = -2U 1 ; if i o > 0, the capacitor C 3 supplies reverse power to the load through the switching transistor S 1 and the inverter output voltage u 8 is still u 1 = -2U 1 ; 5 ; 8 ; o ; in ; 1 ; 3 ; Mode 9: Switching transistor S 1 and switching transistor S 3 and switching transistor S 4 and switching transistor S 8 turn on, and the remaining switching transistors turn off; The inductor L is connected through the switching transistor S 3 and the switching transistor S 4 is short-circuited, and the current i L remains unchanged; the capacitor C 2 is open-circuited, and the voltage remains unchanged; since u C2 >u C1 , u C3 >U in , so the diodes D 1 and D 2 are reverse cut-off; the capacitors C 1 and C 3 are connected in series through the switching transistor S 1 , the switching transistor S 3 , the switching transistor S 4 and the switching transistor S 8 to supply reverse power to the load, and the output voltage u o of the inverter is = -3U in ; Mode 10: Switching transistor S 1 The switching transistor S 4 The switching transistor S 6 and the switching transistor S 8 turn on, and the rest of the switching transistors turn off; the inductor L is connected in parallel with the DC power supply U 6 across both ends for energy storage, and the current i in increases linearly; the DC power supply U L is connected in series with the capacitor C in and then charges the capacitor C through the diode D 1 and the switching transistor S 1 ; the turn-on of the switching transistor S 6 makes the diode D 2 reverse-biased; the DC power supply U 6 is connected in series with the capacitor C 2 and C in and supplies reverse power to the load through the switching transistor S 1 , the switching transistor S 3 , and the switching transistor S 1 , and the inverter output voltage u 6 =-4U 8 ; o =-4U in ; where, u C1 , u C2 and u C3 are the voltages across capacitors C 1 , C 2 and C 3 respectively; i L is the current flowing through inductor L; i o is the output current of the inverter.

3. According to the control method for an integrated boost switched-capacitor multilevel inverter described in claim 2, Characterized in that, The output voltage of the inverter is 2U in , 0, and -4U in When this occurs, the inductor L stores energy, and the voltage across its two ends is the DC power supply voltage U in ; when the output voltage of the inverter is 4U in , 0, and -2U in When this occurs, the inductor L releases energy, and the voltage across its two ends is the average value U 1 of the voltage of the capacitor C C1 .

4. According to the control method for an integrated boost switched-capacitor multilevel inverter described in claim 3, Characterized in that, According to the symmetry of the positive and negative half-cycles of the inverter output voltage and the volt-second balance principle of the inductor, it can be obtained that U C1 = U in (1) The output voltage of the inverter is 4U in , 0, and -2U in When the DC power supply U in is connected in series with the capacitor C 1 and then charges the capacitor C through the switching transistor S 5 and the diode D 2 ; when the output voltage of the inverter is 2U 3 , 0, and -4U in When the DC power supply U in is connected in series with the capacitor C in and then charges the capacitor C through the diode D 1 and the switching transistor S 1 ; therefore, the average voltage of the capacitors C 6 and C 2 is 2U 2 . 3 . in .

5. According to the control method for an integrated boost switched-capacitor multilevel inverter described in claim 2, Characterized in that, Switching transistor S 6 When it is turned on, inductor L stores energy through DC power supply U in When switching transistor S 5 is turned on, inductor L is connected in parallel with capacitor C 1 and energy is released.

6. According to the control method for an integrated boost switched-capacitor multilevel inverter described in claim 2, Characterized in that, Switching transistor S 5 and the switching transistor S 6 have equal duty cycles.

7. According to the control method for an integrated boost switched-capacitor multilevel inverter described in claim 2, Characterized in that, The inverter adopts the nearest level approximation as the modulation strategy of the multilevel inverter.

8. According to the control method for an integrated boost switched-capacitor multilevel inverter described in claim 7, Characterized in that, The recent level approximation modulation strategy uses a sine wave u with the same frequency and phase as the fundamental wave of the inverter output voltage and an amplitude of A r as a reference. The ratio of the instantaneous value of u r to the interval voltage U between the levels of the inverter output is rounded to obtain the number of levels that the inverter needs to output. Then, control signals for each switch tube are generated according to the switching logic corresponding to each level. r The instantaneous value of u is compared with the interval voltage U between the levels of the inverter output. The ratio is rounded to obtain the number of levels that the inverter needs to output. Then, control signals for each switch tube are generated according to the switching logic corresponding to each level. in The ratio of the instantaneous value of u to the interval voltage U between the levels of the inverter output is rounded to obtain the number of levels that the inverter needs to output. Then, control signals for each switch tube are generated according to the switching logic corresponding to each level.

9. According to the control method for an integrated boost switched-capacitor multilevel inverter described in claim 8, Characterized in that, The calculation formula for each phase angle of the inverter is The output voltage u of the inverter can be obtained o and its Fourier series expression is as follows: where ω o = 2π / T o is the output angular frequency of the inverter, and θ 1 , θ 2 , θ 3 and θ 4 represent the phase angles of U in , 2U in , 3U in and 4U in respectively, and 0 ≤ θ 1 ≤ θ 2 ≤ θ 3 ≤ θ 4 ≤ π / 2, and T o represents the output period of the inverter.

10. According to the control method for an integrated boost switched-capacitor multilevel inverter described in claim 9, Characterized in that, The inverter mainly supplies power to the load through the fundamental wave, and the fundamental wave effective value expression of the output voltage u o is When θ 1 -θ 4 are both zero, U o1 has a maximum value of The modulation index M of the inverter can then be defined I as

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