Display substrate and manufacturing method thereof, display device and mask

Abstract

A display substrate comprises a substrate, and a circuit structure layer, a light-emitting device layer, and an encapsulation layer sequentially disposed on one side of the substrate. The encapsulation layer is configured to encapsulate the circuit structure layer and the light-emitting device layer on the substrate, and a portion of the encapsulation layer is recessed toward the substrate to form at least one recess. The display substrate further comprises a filling layer that fills the at least one recess.

Description

Technical Field

[0001] The present disclosure relates to the field of display technology, and in particular to a display substrate and a manufacturing method thereof, a display device, and a mask. Background Art

[0002] With the continuous development of touch technology, most display devices such as mobile phones and tablets have touch functions. In these display devices, the touch function layer is usually manufactured using the FMLOC (Flexible Multi-Layer On Cell) process. For example, a metal mesh structure is directly fabricated on the encapsulation layer of the display device to achieve touch function. Summary of the Invention

[0003] In one aspect, a display substrate is provided. The display substrate comprises: a substrate; and a circuit structure layer, a light-emitting device layer, and an encapsulation layer sequentially disposed on one side of the substrate. The encapsulation layer is configured to encapsulate the circuit structure layer and the light-emitting device layer on the substrate, with a portion of the encapsulation layer being recessed toward the substrate to form at least one recess. The display substrate further comprises a filling layer that fills the at least one recess.

[0004] In some embodiments, the display substrate has a display area and a peripheral area located on at least one side of the display area. The circuit structure layer includes: a first metal layer and a first insulating layer. The first metal layer includes at least two first metal wires located in the peripheral area, and the at least two first metal wires extend in a direction parallel to the interface between the display area and the peripheral area, and the at least two first metal wires are arranged in sequence in a direction away from the display area. The first insulating layer includes at least two first insulating parts located in the peripheral area, each of the first insulating parts covers one of the first metal wires, and a first sub-opening is provided between two adjacent first insulating parts. The area corresponding to the first sub-opening in the encapsulation layer is recessed toward the side close to the substrate to form a first pit in the at least one pit, and the filling layer includes a first filling part filled into the first pit.

[0005] In some embodiments, the circuit structure layer further includes: a second metal layer and a second insulating layer. The second metal layer includes at least two second metal wires located in the peripheral region, each second metal wire being disposed on a surface of the first insulating portion away from the substrate. The second insulating layer includes at least two second insulating portions located in the peripheral region, each second insulating portion covering a second metal wire, and a second sub-opening exposing the first sub-opening is located between two adjacent second insulating portions. The regions of the encapsulation layer corresponding to the second sub-opening and the first sub-opening are recessed toward the substrate to form the first pit.

[0006] In some embodiments, the peripheral region includes a bending region located on one side of the display region. The circuit structure layer further includes: a third metal layer and a third insulating layer located in the bending region and sequentially disposed on one side of the substrate; the third metal layer includes at least one conductive connection portion; the third insulating layer covers the at least one conductive connection portion, and the third insulating layer is provided with at least two first vias exposing the at least one conductive connection portion. The second metal layer further includes at least two third metal wire segments located in the bending region, each extending away from the display region and spaced apart from each other in the direction away from the display region, with two adjacent third metal wire segments electrically connected to one conductive connection portion via two first vias in the third insulating layer. The second insulating layer further includes at least two third insulating portions, each covering a third metal wire segment, with a second opening defined between two adjacent third insulating portions. The region of the encapsulation layer corresponding to the second opening is recessed toward the substrate to form a second recess within the at least one recess, and the filling layer includes a second filling portion that fills the second recess.

[0007] In some embodiments, the third insulating layer includes at least two fourth insulating portions, one of which covers one of the conductive connecting portions, with a groove formed between two adjacent fourth insulating portions. The first insulating layer also includes at least two fifth insulating portions, one of which covers one of the grooves and portions of two adjacent fourth insulating portions near the groove. The fifth insulating portion is provided with two second vias, each exposing two of the first vias. Each segment of the third metal wire is located on a surface of a fifth insulating portion away from the substrate, and each segment of the third metal wire is connected to two of the conductive connecting portions via two second vias and two first vias.

[0008] In some embodiments, the display substrate has a display area and a peripheral area located on at least one side of the display area; the peripheral area includes a bending area located on one side of the display area. The circuit structure layer includes: a third metal layer and a third insulating layer located in the bending area and arranged in sequence on one side of the substrate; the third metal layer includes at least one conductive connection portion; the third insulating layer covers the at least one conductive connection portion, and the third insulating layer is provided with at least two first vias exposing the at least one conductive connection portion; a second metal layer includes at least two sections of third metal wires located in the bending area, the at least two sections of third metal wires both extend in a direction away from the display area, and the at least two sections of third metal wires are arranged in sequence in the direction away from the display area, and two adjacent sections of third metal wires are electrically connected to a conductive connection portion through two first vias on the third insulating layer; the second insulating layer includes at least two third insulating parts, each third insulating part covers a section of the third metal wire, and a second opening is provided between two adjacent third insulating parts; wherein the area corresponding to the second opening in the encapsulation layer is recessed toward the side close to the substrate to form a second pit in the at least one pit, and the filling layer includes a second filling part filled into the second pit.

[0009] In some embodiments, the third insulating layer includes at least two fourth insulating portions, one of which covers one of the conductive connecting portions, with a groove formed between two adjacent fourth insulating portions and the substrate. The circuit structure layer further includes: a first insulating layer including at least two fifth insulating portions, one of which covers one of the grooves and portions of two adjacent fourth insulating portions proximate to the groove; the fifth insulating portion is provided with two second vias, each exposing two of the first vias; each segment of the third metal wire is located on a surface of the fifth insulating portion facing away from the substrate, and each segment of the third metal wire is connected to two of the conductive connecting portions via two of the second vias and two of the first vias.

[0010] In some embodiments, each third insulating portion further covers one of the fifth insulating portions.

[0011] In some embodiments, the display substrate has two second openings, and two areas in the encapsulation layer corresponding to the two second openings are respectively recessed toward the side close to the substrate to form two second pits, and the filling layer includes two second filling parts filled into the two second pits.

[0012] In some embodiments, the display substrate comprises a display area, an aperture area at least partially surrounded by the display area, and a partition area between the aperture area and the display area. The display substrate further comprises: a first barrier dam located in the partition area and between the substrate and the encapsulation layer, the first barrier dam being disposed around the aperture area; and a second barrier dam located in the partition area and between the substrate and the encapsulation layer, the second barrier dam being disposed around the aperture area and between the first barrier dam and the aperture area. A region of the encapsulation layer located on a side of the second barrier dam closer to the aperture area is recessed toward the substrate to form a third pit in the at least one pit, and the filling layer includes a third filling portion that fills the third pit. Furthermore, a region of the encapsulation layer located on a side of the second barrier dam closer to the display area is recessed toward the substrate to form a fourth pit in the at least one pit, and the filling layer includes a fourth filling portion that fills the fourth pit.

[0013] In some embodiments, a surface of the filling layer remote from the substrate is flush or substantially flush with a surface of the encapsulation layer remote from the substrate.

[0014] In some embodiments, the display substrate further includes: a first wiring layer covering at least a portion of a surface of the filling layer away from the substrate and at least a portion of a surface of the encapsulation layer away from the substrate.

[0015] In some embodiments, the first wiring layer includes: a plurality of first touch electrodes and a plurality of touch sub-electrodes among a plurality of second touch electrodes, each of the plurality of first touch electrodes being an integral structure, the plurality of touch sub-electrodes being arranged in an array, and two adjacent touch sub-electrodes within a second touch electrode being separated by a first touch electrode. The display substrate further includes: a fourth insulating layer having a plurality of third vias thereon; a second wiring layer including a plurality of connecting portions, each connecting portion electrically connecting two adjacent touch sub-electrodes within a second touch electrode through at least two third vias, the connecting portion having an intersection region between its orthographic projection on the substrate and its orthographic projection on the substrate. The first wiring layer further includes: a plurality of touch leads, each touch lead being electrically connected to a first touch electrode or a second touch electrode; and at least one of the plurality of first touch electrodes, the plurality of touch sub-electrodes, and the plurality of touch leads covering at least a portion of the surface of the filling layer on a side away from the substrate.

[0016] In another aspect, a display device is provided, comprising: a display substrate as described in any one of the above embodiments.

[0017] In another aspect, a mask for making a filling layer in a display substrate as described in any of the above embodiments is provided. The mask comprises: a mask body; and at least one light-transmitting portion disposed on the mask body, each light-transmitting portion being configured to transmit light into at least one recess in the display substrate.

[0018] In yet another aspect, a method for manufacturing a display substrate is provided. The method comprises: providing a substrate; sequentially forming a circuit structure layer, a light-emitting device layer, and an encapsulation layer on one side of the substrate, wherein the encapsulation layer encapsulates the circuit structure layer and the light-emitting device layer on the substrate, and a portion of the encapsulation layer is recessed toward the substrate to form at least one pit; placing a filling material into the at least one pit; and exposing and developing the filling material using a mask as described in any of the above embodiments to form a filling layer.

[0019] In some embodiments, the manufacturing method further includes: forming a touch function layer on the surface of the filling layer and the packaging layer as a whole away from the substrate, and the touch function layer includes a first wiring layer, a fourth insulating layer and a second wiring layer which are sequentially away from the substrate. BRIEF DESCRIPTION OF THE DRAWINGS

[0020] To more clearly illustrate the technical solutions of the present disclosure, the following briefly introduces the drawings required for use in some embodiments of the present disclosure. Obviously, the drawings described below are only drawings of some embodiments of the present disclosure, and those skilled in the art can also derive other drawings based on these drawings. Furthermore, the drawings described below are schematic diagrams and are not intended to limit the actual dimensions of the products, actual processes of the methods, actual timing of signals, and the like involved in the embodiments of the present disclosure.

[0021] Figure 1 is a structural diagram of a display substrate according to some embodiments;

[0022] Figure 2 Based on Figure 1 The cross-sectional view of the substrate in the AA′ direction is shown in FIG.

[0023] Figure 3 Based on Figure 1 A cross-sectional view of the substrate in the BB′ direction is shown in FIG.

[0024] Figure 4 Based on Figure 1 Another cross-sectional view of the substrate in the BB′ direction is shown in FIG.

[0025] Figure 5 Based on Figure 1 A cross-sectional view of the substrate in the CC′ direction is shown in FIG.

[0026] Figure 6 Based on Figure 1 Another cross-sectional view of the substrate in the CC′ direction is shown in FIG.

[0027] Figure 7 Based on Figure 1 The cross-sectional view of the substrate in the DD′ direction is shown in FIG.

[0028] Figure 8 is a structural diagram of another display substrate according to some embodiments;

[0029] Figure 9 is a top view of another display substrate according to some embodiments;

[0030] Figure 10 Based on Figure 9 The cross-sectional view of the substrate in the EE′ direction is shown in FIG.

[0031] Figure 11 is a structural diagram of a mask according to some embodiments;

[0032] Figure 12 is a flow chart of a method for manufacturing a display substrate according to some embodiments;

[0033] Figure 13 is a flow chart of another method for manufacturing a display substrate according to some embodiments;

[0034] Figure 14 is a structural diagram of a display device according to some embodiments. DETAILED DESCRIPTION

[0035] The following will be combined with the accompanying drawings to clearly and completely describe the technical solutions in some embodiments of the present disclosure. Obviously, the embodiments described are only some embodiments of the present disclosure, not all embodiments. Based on the embodiments provided by the present disclosure, all other embodiments obtained by ordinary technicians in this field are within the scope of protection of the present disclosure.

[0036] Unless the context requires otherwise, throughout the specification and claims, the term "comprise" and its other forms, such as the third person singular form "comprises" and the present participle form "comprising", are to be interpreted as open and inclusive, that is, "including, but not limited to". In the description of the specification, the terms "one embodiment", "some embodiments", "exemplary embodiments", "example", "specific example" or "some examples" are intended to indicate that the particular features, structures, materials or characteristics associated with the embodiment or example are included in at least one embodiment or example of the present disclosure. The schematic representation of the above terms does not necessarily refer to the same embodiment or example. In addition, the particular features, structures, materials or characteristics may be included in any one or more embodiments or examples in any appropriate manner.

[0037] In the following, the terms "first" and "second" are used for descriptive purposes only and should not be understood to indicate or imply relative importance or implicitly specify the number of the technical features indicated. Therefore, a feature defined as "first" or "second" may explicitly or implicitly include one or more of the features. In the description of the embodiments of the present disclosure, unless otherwise specified, "plurality" means two or more.

[0038] When describing some embodiments, the expressions "coupled" and "connected" and their derivatives may be used. For example, when describing some embodiments, the term "connected" may be used to indicate that two or more components are in direct physical or electrical contact with each other. For another example, when describing some embodiments, the term "coupled" may be used to indicate that two or more components are in direct physical or electrical contact. However, the term "coupled" or "communicatively coupled" may also refer to two or more components that are not in direct contact with each other, but still cooperate or interact with each other. The embodiments disclosed herein are not necessarily limited to the contents of this document.

[0039] “At least one of A, B and C” has the same meaning as “at least one of A, B or C” and both include the following combinations of A, B and C: A only, B only, C only, the combination of A and B, the combination of A and C, the combination of B and C, and the combination of A, B and C.

[0040] “A and / or B” includes the following three combinations: A only, B only, and a combination of A and B.

[0041] As used herein, "about" includes the stated value and the average value that is within an acceptable range of deviation from the particular value, as determined by one of ordinary skill in the art taking into account the measurements in question and errors associated with measurement of the particular quantity (i.e., limitations of the measurement system).

[0042] In this article, "same-layer arrangement" refers to a layer structure formed by using the same film-forming process to form a specific pattern, followed by a single patterning process using the same mask. Depending on the specific pattern, the same patterning process may include multiple exposure, development, or etching steps, and the specific pattern in the resulting layer structure may be continuous or discontinuous, and these specific patterns may also be at different heights or have different thicknesses.

[0043] Exemplary embodiments are described herein with reference to cross-sectional and / or plan views that are idealized exemplary drawings. In the drawings, the thicknesses of layers and regions are exaggerated for clarity. Therefore, variations in shape relative to the drawings due to, for example, manufacturing techniques and / or tolerances are contemplated. Therefore, the exemplary embodiments should not be construed as limited to the shapes of the regions shown herein, but rather include deviations in shape due to, for example, manufacturing. For example, an etched region shown as a rectangle will typically have curved features. Therefore, the regions shown in the drawings are schematic in nature, and their shapes are not intended to illustrate the actual shape of regions of the device and are not intended to limit the scope of the exemplary embodiments.

[0044] Figure 1 A structural diagram of a display substrate provided in some embodiments of the present disclosure is shown. Figure 2 for Figure 1 FIG. 3 shows a cross-sectional view of the substrate at position AA′ (ie, a sub-pixel position).

[0045] See also Figure 1 and Figure 2 Some embodiments of the present disclosure provide a display substrate 100 , which includes a substrate 10 and a circuit structure layer 20 , a light-emitting device layer 30 , an encapsulation layer 40 and a filling layer 50 sequentially arranged on one side of the substrate 10 .

[0046] The material of the substrate 10 can be polyimide, glass, silicon substrate, etc.

[0047] Exemplarily, the light emitting device layer 30 includes a plurality of light emitting devices located in the display area DA, such as Figure 2 As shown, the light-emitting device in each sub-pixel includes an anode 31, a light-emitting functional layer 32, and a cathode 33, which are sequentially arranged away from the substrate 10. The cathode 33 of the multiple light-emitting devices can be a whole layer structure or a block structure, which is not limited in the present disclosure.

[0048] On this basis, the light-emitting device layer 30 may further include a pixel defining layer 34, the pixel defining layer 34 includes a plurality of opening areas, and the light-emitting functional layer 32 of a light-emitting device may be correspondingly arranged in one opening area. In some examples, the light-emitting functional layer 32 includes a light-emitting layer. In other examples, in addition to the light-emitting layer, the light-emitting functional layer 32 also includes an electron transport layer (ETL), an electron injection layer (EIL), a hole transport layer (HTL), and a hole injection layer (HIL). One or more layers.

[0049] For example, the circuit structure layer 20 includes a plurality of pixel circuits, such as Figure 2 As shown, each pixel circuit includes at least one driving transistor 201. The driving transistor 201 includes a gate 2011, an active layer 2012, a source 2013, and a drain 2014. In addition, in some examples, such as Figure 2 As shown, the circuit structure layer 20 further includes a gate insulating layer 202 separating the gate electrode 2011 from the active layer 2012, and a planar layer 203 covering the source electrode 2013 and the drain electrode 2014. The planar layer is provided with vias, and the anode 31 of the light-emitting device is electrically connected to the drain electrode 2014 through the vias in the planar layer 203, thereby driving the light-emitting functional layer 32 to emit light through the pixel circuit.

[0050] Continue to see Figure 1 and Figure 2 The encapsulation layer 40 is configured to encapsulate the circuit structure layer 20 and the light-emitting device layer 30 on the substrate 10 , and a portion of the encapsulation layer 40 is recessed toward a side close to the substrate 10 to form at least one pit 4 .

[0051] The filling layer 50 is filled in at least one pit 4. The filling layer 50 can be divided into the same number of filling parts according to the number of pits 4 to be filled, and each filling part is filled in one pit 4. For example, Figure 1 In the example, the first filling portion 51 is filled in the first pit 41 , the second filling portion 52 is filled in the second pit 42 , the third filling portion 53 is filled in the third pit 43 , and the fourth filling portion 54 is filled in the fourth pit 44 .

[0052] The aforementioned "pits 4 to be filled" may be all the pits 4 in the display substrate 100, or may be a portion of all the pits 4 (e.g., one or more than two pits 4 in all the pits 4). Therefore, the shape and number of the filling portions may be flexibly adjusted according to the specific locations and number of the pits 4 to be filled.

[0053] The material of the filling layer 5 may be an organic insulating material, such as polyimide.

[0054] It is worth noting that in the process of making a wiring layer on the packaging layer 40, it is necessary to first make a metal film on the packaging layer, and then make a layer of photoresist on the metal film. Through exposure and development, the part of the photoresist corresponding to the part that needs to be etched and removed in the metal film can be removed. However, the inventors of the present disclosure have found through research that when the part of the photoresist corresponding to the part that needs to be etched and removed in the metal film is located above the pit 4, this part of the photoresist may not be sufficiently exposed and developed. Therefore, it may cause the part of the metal film that needs to be etched and removed to be insufficiently etched. This will produce metal residue, resulting in a short circuit between adjacent metal wires in the wiring layer produced.

[0055] In the display substrate 100 provided in some embodiments of the present disclosure, a filling layer 50 can be used to fill at least one recess 4 on the encapsulation layer 40. For example, the surface of the filling layer 50 away from the substrate 10 and the portion of the surface of the encapsulation layer 40 away from the substrate 10 that is not covered by the filling layer 50 (hereinafter referred to as the bearing surface) can form a plane. In this way, in the subsequent process of fabricating a wiring layer (such as a touch line in a touch function layer) on the encapsulation layer 40, the problem of insufficient etching of the portion of the metal film located in the recess 4 is unlikely to occur, and metal residue is unlikely to be generated there, which is unlikely to cause a short circuit between adjacent metal lines in the fabricated wiring layer. Therefore, it is beneficial to improve the yield of the display substrate 100.

[0056] In some examples, the surface of the filling layer 50 away from the substrate 10 is flush with the surface of the encapsulation layer 40 away from the substrate 10, which is not covered by the filling layer 50. That is, in this example, the filling layer 50 can fill at least one pit 4, for example, it can form the above-mentioned plane. In this way, after the above-mentioned metal wire is formed, short circuit is not likely to occur. In other examples, the surface of the filling layer 50 away from the substrate 10 is roughly flush with the surface of the encapsulation layer 40 away from the substrate 10, which is not covered by the filling layer 50. Here, roughly flush means that the height difference between the two surfaces is within an acceptable error range, for example, the height difference is less than a preset value, and the preset value can range from about 0.8μm to about 1μm, for example, the preset value can be 0.8μm, 0.9μm, or 1μm, etc. In this way, after the above-mentioned metal wire is formed, short circuit is not likely to occur.

[0057] In some examples, the filling layer 50 fills all of the recesses 4 in the display substrate 100. Filling all of the recesses 4 in the display substrate 100 with the filling layer 50 can make the surface of the display substrate 100 used to support the metal film smoother, thereby further helping to alleviate the problem of metal wire short circuits in the wiring layer. Furthermore, in other examples, the filling layer 50 fills some of the recesses 4 in the display substrate 100. In this case, the number and location of the filling portions can be set based on the layout of the metal wires in the wiring layer, thereby specifically improving the problem of short circuits between adjacent metal wires caused by metal residue.

[0058] In some embodiments, as Figure 1 As shown, the display substrate 100 includes a display area DA and a peripheral area PA located on at least one side of the display area DA. Exemplarily, the peripheral area PA is located on all four sides of the display area DA to completely surround the display area DA. Furthermore, the peripheral area PA may be located on any one side, any two sides, or any three sides of the display area DA. The display area DA may be substantially rectangular, circular, polygonal, or other shapes, and is not limited herein.

[0059] On this basis, if Figure 3 As shown, the circuit structure layer 20 includes a first metal layer 21 and a first insulating layer 22 .

[0060] The first metal layer 21 includes at least two first metal lines 211 located in the peripheral area PA. The at least two first metal lines 211 are respectively arranged along a direction parallel to the interface between the display area DA and the peripheral area PA (i.e. Figure 3 The at least two first metal lines 211 extend in a direction away from the display area DA (ie, a direction perpendicular to the paper). Figure 3 In the direction from the left to the right or from the right to the left) they are arranged in sequence.

[0061] The first metal line 211 may be a voltage signal line. Figure 2 The gate 2011 is provided in the same layer as the first metal line 211. In this case, the material of the first metal line 211 is the same as that of the gate 2011. Of course, in other examples, the first metal line 211 can also be provided in the same layer as other film layers, and the present disclosure is not limited thereto.

[0062] The first insulating layer 22 includes at least two first insulating portions 221 located in the peripheral area PA. Each first insulating portion 221 covers one first metal line 211 , and a first sub-opening 611 is defined between two adjacent first insulating portions 221 .

[0063] The first insulating layer 22 can be provided in the same layer as the gate insulating layer 202. In this case, the material of the first insulating layer 22 is the same as that of the gate insulating layer 202. Of course, in other examples, the first insulating layer 22 can also be made in the same layer as other film layers, and this disclosure is not limited to this.

[0064] The region 401 of the encapsulation layer 40 corresponding to the first sub-opening 611 is recessed toward the side closer to the substrate 10 to form a first pit 41 of the at least one pit 4. The filling layer 50 includes a first filling portion 51 that fills the first pit 41. The number of first pits 41 is not limited, that is, the number of first pits 41 can be one, two, or more; accordingly, the number of first filling portions 51 can also be one, two, or more.

[0065] This arrangement, on the one hand, prevents moisture from seeping from the side of the first sub-opening 611 away from the display area DA toward the side of the first sub-opening 611 closer to the display area DA, thereby reducing the risk of water and oxygen corrosion to the circuit structure in the display substrate 100. On the other hand, because the first filling portion 51 fills the first recess 41, the supporting surface of the display substrate 100 in the peripheral area PA is relatively flat, effectively reducing the problem of short circuits between adjacent metal lines in the wiring layer caused by insufficient etching after the wiring layer is formed.

[0066] Based on some of the above embodiments, for example, Figure 4 As shown, the circuit structure layer 20 further includes a second metal layer 23 and a second insulating layer 24 .

[0067] The second metal layer 23 includes at least two second metal lines 231 located in the peripheral area PA. Each second metal line 231 is disposed on a surface of the first insulating portion 221 away from the substrate 10 .

[0068] The second metal line 231 can also be a voltage signal line. In this case, the second metal line 231 can be electrically connected to the first metal line 211 through the via hole on the first insulating portion 221 to form a double-layer structure of the voltage signal line, which is beneficial to reduce the resistance on the voltage signal line. Figure 2 The source 2013 and the drain 2014 are provided in the same layer. In this case, the material of the second metal line 231 is the same as that of the source 2013 and the drain 2014. Of course, in other examples, the second metal line 231 can also be provided in the same layer as other film layers, and this disclosure is not limited to this.

[0069] The second insulating layer 24 includes at least two second insulating portions 241 located in the peripheral area PA. Each second insulating portion 241 covers one second metal line 231. A second sub-opening 612 is defined between two adjacent second insulating portions, exposing the first sub-opening 611. In some examples, the sum of the depths of the first sub-opening 611 and the second sub-opening 612 in a direction perpendicular to the substrate 10 can be approximately 4 μm.

[0070] The second insulating layer 24 can be provided in the same layer as the planar layer 203. In this case, the material of the second insulating layer 24 is the same as that of the planar layer 203. Of course, in other examples, the second insulating layer 24 can also be made in the same layer as other film layers, which is not limited in this disclosure.

[0071] The area of ​​the packaging layer 40 corresponding to the second sub-opening 612 and the first sub-opening 611 (ie Figure 4 The region 401 and the region 402 in the substrate 10 are recessed toward the side close to the substrate 10 to form a first pit 41. Figure 3 For example, the first cavity 41 may be filled with the first filling portion 51 having a larger volume, so that the supporting surface of the display substrate 100 in the peripheral area PA is relatively flat.

[0072] This arrangement, on the one hand, prevents moisture from seeping from the side of the first and second sub-openings 611, 612, farther from the display area DA, toward the side of the first and second sub-openings 611, 612, closer to the display area DA, thereby reducing the risk of water and oxygen corrosion to the circuit structures in the display substrate 100. Furthermore, because the first filling portion 51 fills the first recess 41, the supporting surface of the display substrate 100 in the peripheral area PA is relatively flat, effectively reducing the problem of short circuits between adjacent metal lines in the wiring layer caused by insufficient etching after the wiring layer is formed.

[0073] In some embodiments, as Figure 1As shown, the peripheral area PA includes a bending area BA located on one side of the display area DA. For example, the bending area BA may be a portion of the peripheral area PA away from the display area DA. The portion of the display substrate 100 located in the bending area BA can be used to bind a flexible printed circuit board. Furthermore, by bending the portion of the display substrate 100 located in the bending area BA, the bezel of the display device manufactured using the display substrate 100 can be reduced.

[0074] On this basis, if Figure 5 As shown, the circuit structure layer 20 further includes: a third metal layer 25 and a third insulating layer 26 located in the bending area BA and sequentially arranged on one side of the substrate 10 .

[0075] The third metal layer 25 includes at least one conductive connection portion 251 . The third insulating layer 26 covers the at least one conductive connection portion 251 , and is provided with at least two first via holes 2611 exposing the at least one conductive connection portion 251 .

[0076] The second metal layer 23 also includes at least two third metal lines 232 located in the bending area BA. The at least two third metal lines 232 extend in a direction away from the display area DA. The at least two third metal lines 232 are sequentially spaced apart in the direction away from the display area DA. Two adjacent third metal lines 232 are electrically connected to a conductive connection portion 251 through two first vias 2611 in the third insulating layer 26. In this way, the alternating third metal lines 232 and the conductive connection portion 251 are connected to form a signal line, which can be used to transmit data voltage signals or scan voltage signals.

[0077] Second insulating layer 24 further includes at least two third insulating portions 242, each of which covers a section of third metal line 232. A second opening 62 is defined between two adjacent third insulating portions 242. In some examples, the depth of second opening 62 in a direction perpendicular to substrate 10 can be approximately 4 μm.

[0078] The region 403 of the encapsulation layer 40 corresponding to the second opening 62 is recessed toward the side closer to the substrate 10 to form a second pit 42 in the at least one pit 4. The filling layer 50 includes a second filling portion 52 that fills the second pit 42. The number of second pits 42 is not limited, that is, the number of second pits 42 can be one, two, or more; accordingly, the number of second filling portions 52 can also be one, two, or more.

[0079] This arrangement, on the one hand, reduces the bending stress to which the bending area BA is subjected when bending due to the provision of the second opening 62, thus having the advantages of being easy to bend and the various film layers here being less likely to break after bending. Furthermore, since the third metal wire 232 and the conductive connection portion 251 are alternately connected to form a signal line, the signal line here is even less likely to break. On the other hand, it can prevent water vapor from seeping from the side of the second opening 62 away from the display area DA to the side of the second opening 62 close to the display area DA, thereby reducing the risk of water and oxygen corrosion to the circuit structure in the display substrate 100. On the other hand, since the second filling portion 52 is filled in the second pit 42, the bearing surface of the display substrate 100 in the bending area BA can be made relatively flat, thereby effectively reducing the problem of short circuits between adjacent metal wires in the wiring layer caused by insufficient etching after the wiring layer is made.

[0080] On this basis, for example, Figure 6 As shown, the third insulating layer 26 includes at least two fourth insulating portions 261. Each fourth insulating portion 261 covers one conductive connection portion 251, and a groove 262 is formed between two adjacent fourth insulating portions 261. The provision of the groove 262 can make the portion of the display substrate 100 located in the bending area BA easier to bend.

[0081] The first insulating layer 22 further includes at least two fifth insulating portions 222. Each fifth insulating portion 222 covers a groove 262 and portions of two adjacent fourth insulating portions 261 proximate to the groove 262. The fifth insulating portion 222 is provided with two second vias 2221, each exposing two first vias 2611. Each third metal wire 232 segment is located on a surface of the fifth insulating portion 222 facing away from the substrate 10. Each third metal wire 232 segment is connected to two conductive connection portions 251 via the two second vias 2221 and the two first vias 2611.

[0082] In this example, by providing the fifth insulating portion 222 , the surface used to support each section of the third metal wire 232 is made flatter, which is beneficial to improving the quality of the third metal wire 232 and further beneficial to improving the signal transmission quality of the third metal wire 232 .

[0083] For example, Figure 6 As shown, each third insulating portion 242 also covers a fifth insulating portion 222. This helps prevent moisture from penetrating into the third metal wire 232, thereby protecting the third metal wire 232.

[0084] For example, Figure 6As shown, the display substrate 100 has two second openings 62. This arrangement allows the bending axis to be located between the two second openings 62. In this case, after the portion of the display substrate 100 located in the bending area BA is bent, the stress at both ends can be released through the two second openings 62, thereby improving the stability of the display substrate 100 during and after the bending process.

[0085] On this basis, the two regions 403 corresponding to the two second openings 62 in the encapsulation layer 40 are respectively recessed toward the substrate side to form two second recesses 42, and the filling layer 50 includes two second filling portions 52 that fill the two second recesses 42. In this way, the supporting surface of the display substrate 100 located in the bending area BA is relatively flat, thereby effectively reducing the problem of short circuits between adjacent metal lines in the wiring layer caused by insufficient etching after the wiring layer is formed.

[0086] In some embodiments, as Figure 1 As shown, the display substrate 100 includes a display area DA, an aperture area OA at least partially surrounded by the display area DA, and a partition area MA located between the aperture area OA and the display area DA. The aperture area OA may be completely surrounded by the display area DA; alternatively, the aperture area OA may be located at the edge of the display area DA and partially surrounded by the display area DA. Furthermore, the aperture area OA may be shaped in a circular, elliptical, semicircular, semi-elliptical, star-shaped, diamond-shaped, polygonal, or other manner, without limitation herein.

[0087] like Figure 7 As shown, the display substrate 100 further includes a first barrier dam 71 and a second barrier dam 72 .

[0088] The first barrier dam 71 is located in the separation area MA and between the substrate 10 and the encapsulation layer 40 . The first barrier dam 71 is disposed around the opening area OA.

[0089] The second barrier dam 72 is located in the separation area MA and between the substrate 10 and the encapsulation layer 40 . The second barrier dam 72 is disposed around the opening area OA and is located between the first barrier dam 71 and the opening area OA.

[0090] In which, the area of ​​the encapsulation layer 40 located on the side of the second blocking dam 72 close to the opening area OA is recessed toward the side close to the substrate 10 to form a third pit 43 in at least one pit 4, and the filling layer 50 includes a third filling portion 53 filled in the third pit 43; and / or, the area of ​​the encapsulation layer 40 located on the side of the second blocking dam 72 close to the display area DA is recessed toward the side close to the substrate 10 to form a fourth pit 44 in at least one pit 4, and the filling layer 50 includes a fourth filling portion 54 filled in the fourth pit 44.

[0091] This arrangement makes the supporting surface of the display substrate 100 located in the separation area MA relatively flat, thereby effectively reducing the problem of short circuit between adjacent metal wires in the wiring layer caused by insufficient etching after the wiring layer is manufactured.

[0092] In some examples, in a direction perpendicular to substrate 10 , the depth of third pit 43 and the depth of fourth pit 44 may both be approximately 4 μm.

[0093] For example, Figure 7 As shown, the encapsulation layer 40 includes a first inorganic encapsulation layer 410, an organic encapsulation layer 411, and a second inorganic encapsulation layer 412 that are stacked. Based on this example, the areas in the encapsulation layer 40 located within the first pit 41, the second pit 42, and the third pit 43 may only include the first inorganic encapsulation layer 410 and the second inorganic encapsulation layer 412 that are stacked. The area in the encapsulation layer 40 located within the fourth pit 44 may only include the first inorganic encapsulation layer 410 and the second inorganic encapsulation layer 412 that are stacked, or may include the first inorganic encapsulation layer 410, the organic encapsulation layer 411, and the second inorganic encapsulation layer 412 that are stacked. For example, in Figure 7 In the example, the area in the encapsulation layer 40 located in the fourth pit 44 includes a first area close to the second blocking dam 72 and a second area away from the second blocking dam, wherein the first area only includes the first inorganic encapsulation layer 410 and the second inorganic encapsulation layer 412 stacked together, and the second area includes the first inorganic encapsulation layer 410, the organic encapsulation layer 411 and the second inorganic encapsulation layer 412 stacked together.

[0094] In some embodiments of the present disclosure, Figure 8 As shown, the display substrate 100 further includes a first wiring layer 81. The first wiring layer 81 covers at least a portion of the surface of the filling layer 50 away from the substrate and at least a portion of the surface of the encapsulation layer 40 away from the substrate.

[0095] It should be noted that the first wiring layer 81 may be a wiring layer in the touch function layer. Because the display substrate 100 provided in some embodiments of the present disclosure has a relatively flat supporting surface, the problem of adjacent metal wires in the first wiring layer 81 being easily short-circuited due to insufficient etching after the first wiring layer 81 is formed is effectively improved.

[0096] The touch function layer can be manufactured using the FMLOC process. There are many structural forms of the touch function layer, including but not limited to the following examples:

[0097] In some examples, such as Figure 8 As shown, the first wiring layer 81 includes a plurality of touch electrodes 801 and a plurality of touch leads 802 , and each touch electrode 801 is electrically connected to at least one touch lead 802 .

[0098] In other examples, such as Figure 9 As shown, the first wiring layer 81 includes: multiple first touch electrodes 91 and multiple touch sub-electrodes 921 in multiple second touch electrodes 92, each first touch electrode 91 in the multiple first touch electrodes 91 is an integrated structure, and the multiple touch sub-electrodes 921 are distributed in an array, and two adjacent touch sub-electrodes 921 located in a second touch electrode 92 are separated by a first touch electrode 91.

[0099] On this basis, the display substrate 100 further includes a fourth insulating layer 82 and a second wiring layer 83. The fourth insulating layer 82 has a plurality of third via holes 821. The second wiring layer 83 includes a plurality of connecting portions 922. Figure 10 As shown, each connecting portion 922 electrically connects two adjacent touch sub-electrodes 921 in a second touch electrode 92 through at least two third vias 821 , and an orthographic projection of the connecting portion 922 on the substrate and an orthographic projection of the first touch electrode 91 on the substrate have an intersection area.

[0100] Among them, such as Figure 9 As shown, the first wiring layer 81 also includes: a plurality of touch leads 93, each touch lead 93 is electrically connected to a first touch electrode 91 or a second touch electrode 92. During the implementation of the touch function, since two adjacent touch sub-electrodes 921 separated by the first touch electrode 91 are connected to a connecting portion 922 through at least two third vias 821 on the fourth insulating layer 82, there is an overlapping area between the first touch electrode 91 and the connecting portion 922. Since the first touch electrode 91 and the connecting portion 922 are insulated from each other, a capacitor is formed in the area where the first touch electrode 91 and the connecting portion 922 intersect. When a conductor (such as a finger) touches the intersection area, the original capacitance of the area is changed. By detecting the change in capacitance, the position of the touch point can be obtained.

[0101] Illustratively, at least one of the plurality of first touch electrodes 91, the plurality of touch sub-electrodes 92, and the plurality of touch leads 93 covers at least a portion of the surface of the filling layer on the side away from the substrate. This alleviates the problem of short circuits between adjacent metal lines in the first wiring layer 81 caused by insufficient etching, thereby improving the stability of the touch function.

[0102] It should be noted that in Figure 9 In the figure, the middle dotted-line box area is the touch area, which corresponds to the display area DA of the display substrate 100. The peripheral area outside the dotted-line box area is the non-touch area, which corresponds to the peripheral area PA of the display substrate 100. The bending area BA is located in the non-touch area.

[0103] Depend on Figure 9 It can be seen that the plurality of first touch electrodes 91 and the plurality of touch sub-electrodes 921 can all be located in the touch area, and the plurality of touch leads 303 can all be located in the non-touch area of ​​the display substrate 100. When the plurality of touch leads connected to the first touch electrodes 91 and the touch sub-electrodes 921 are led out from one side or both sides of the touch area (for example, Figure 9 The touch leads connected to the first touch electrodes 91 are all from Figure 9 The touch leads connected to the touch sub-electrode 921 are all drawn from the right side of Figure 9 When the lower side is led out), it is located on the other side ( Figure 9 The pits corresponding to the non-touch areas (on the left and top sides of the substrate) do not need to be filled, because the pits on the other sides do not need to be arranged with touch leads. Therefore, in some embodiments of the present disclosure, the specific shape, position, and number of the filling layer can also be set according to the layout position of the first wiring layer.

[0104] For example, the position with the pit in the bending area BA where the touch lead passes is also filled with the filling layer 5, which can reduce the risk of short circuit of the touch lead 303 due to insufficient etching.

[0105] It should be noted that Figure 9 The areas corresponding to the opening area OA and the partition area MA of the display substrate 100 are not shown. When the display substrate 100 has the opening area OA and the partition area MA, the touch area may also include a portion corresponding to the partition area MA. In this case, because the filling layer can fill the recess in the partition area MA, the first touch electrode 91 and / or touch sub-electrode 921 located in the partition area MA can also be fabricated on a relatively flat supporting surface, which helps improve the yield of the first touch electrode 91 and / or touch sub-electrode 921.

[0106] like Figure 11 As shown, some embodiments of the present disclosure provide a mask plate 200 for producing the filling layer 50 in the above-mentioned display substrate 100, wherein the mask plate 200 includes a mask body 2100 and at least one light-transmitting portion 2200 arranged on the mask body 2100, and each light-transmitting portion 2200 is configured to allow light to be transmitted into at least one pit 4 in the display substrate 100.

[0107] For example, in Figure 11 In the example of FIG, the first light-transmitting portion 2210, the second light-transmitting portion 2220 and the third light-transmitting portion 2230 may be included. The first light-transmitting portion 2210 is configured to transmit light to the Figure 1 The first pit 41 in the first pit 41 is solidified to form the first filling portion 51; the second light-transmitting portion 2220 is configured to transmit light to Figure 1The second pit 42 in the second pit 42 is solidified to form the second filling portion 52; the third light-transmitting portion 2230 is configured to transmit light to Figure 1 The third and fourth recesses 43 and 44 are filled with water to solidify the filling layer material in the third and fourth recesses 43 and 44 to form a third filling portion 53 and a fourth filling portion 54 .

[0108] Therefore, the mask 200 in some embodiments of the present disclosure can realize the production of the filling layer in the above-mentioned display substrate by adjusting the shape, size and position of each light-transmitting portion 2200.

[0109] like Figure 12 As shown, some embodiments of the present disclosure provide a method for manufacturing a display substrate, which includes steps S10 to S30.

[0110] See also Figure 1 、 Figure 2 and Figure 12 , in this production method:

[0111] S10, providing a substrate 10. The substrate 10 may be made of polyimide, glass, silicon substrate, etc.

[0112] S20. A circuit structure layer 20, a light-emitting device layer 30 and an encapsulation layer 40 are sequentially formed on one side of the substrate 10. The encapsulation layer 40 encapsulates the circuit structure layer 20 and the light-emitting device layer 30 on the substrate 10, and a partial area in the encapsulation layer 40 is recessed toward the side close to the substrate 10 to form at least one pit 4.

[0113] S30 , placing a filling material into the at least one pit 4 .

[0114] S40 , exposing and developing the filling material using the mask 200 to form a filling layer 50 .

[0115] In the method for manufacturing a display substrate provided by some embodiments of the present disclosure, the display substrate 100 manufactured can use a filling layer 50 to fill at least one pit 4 on the encapsulation layer 40. For example, the surface of the filling layer 50 away from the substrate 10 and the portion of the surface of the encapsulation layer 40 away from the substrate 10 that is not covered by the filling layer 50 (i.e., the bearing surface) can form a plane. In this way, in the subsequent process of manufacturing a wiring layer (such as the touch line in the touch function layer) on the encapsulation layer 40, it is less likely to cause insufficient etching of the portion of the metal film located in the pit 4, and thus it is less likely to generate metal residue there, which is less likely to cause a short circuit between adjacent metal lines in the manufactured wiring layer. Therefore, it is beneficial to improve the yield of the display substrate 100.

[0116] In some embodiments, see Figure 8 、 Figure 9 、 Figure 10 and Figure 13 , the method for manufacturing the display substrate further includes:

[0117] S50: A touch function layer 8 is formed on the surface of the filling layer 50 and the encapsulation layer 40 as a whole, which is away from the substrate 10. The touch function layer 8 includes a first wiring layer 81, a fourth insulating layer 82, and a second wiring layer 83, which are sequentially away from the substrate. The arrangement of the first wiring layer 81, the fourth insulating layer 82, and the second wiring layer 83 has been described in detail above and will not be repeated here.

[0118] Such a design enables the display substrate 100 to realize the touch function. Moreover, since the filling layer 50 fills at least one pit 4 on the encapsulation layer 40, it can also improve the problem of adjacent metal wires in the touch function layer 8 being easily short-circuited due to insufficient etching, thereby helping to improve the stability of the touch function.

[0119] See also Figure 14 , some embodiments of the present disclosure provide a display device 300, such as Figure 1 As shown, the display device 300 includes a display substrate 100, which may be an electroluminescent display substrate. The electroluminescent display substrate may be an organic light-emitting diode (OLED) display substrate or a quantum dot light-emitting diode (QLED) display substrate.

[0120] The display device 300 provided in some embodiments of the present disclosure may be a display, a television, a digital camera, a mobile phone, a tablet computer, an electronic photo frame, or other product or component having any touch and display functions.

[0121] Continue to refer to Figure 1 The structure of the display device 300 may further include a housing 101 , a cover plate 102 , a circuit board 103 , and the like.

[0122] In which, the longitudinal cross-section of the shell 101 can be U-shaped, the display substrate 100, the circuit board 103 and other accessories are all arranged in the shell 101, the circuit board 103 is arranged on one side of the display substrate 100, and the cover plate 102 is arranged on the other side of the display substrate 100, that is, the cover plate 102 is arranged on the side of the display substrate 100 away from the circuit board 103.

[0123] Illustratively, the display substrate 100 may include the touch function layer 8 described above. The provision of the touch function layer 8 may enable the display device to implement a touch function.

[0124] The display device 300 provided in some embodiments of the present disclosure has the aforementioned display substrate 100 and thus has the same beneficial effects as the display substrate 100 , which will not be described in detail here.

[0125] The above description is merely a specific embodiment of the present disclosure, but the scope of protection of the present disclosure is not limited thereto. Any changes or substitutions that a person skilled in the art can conceive within the technical scope disclosed in the present disclosure should be included within the scope of protection of the present disclosure. Therefore, the scope of protection of the present disclosure should be based on the scope of protection of the claims.

Claims

1. A display substrate, characterized in that: The display substrate has a display area and a peripheral area located on at least one side of the display area; the display substrate includes: substrate; The circuit structure layer, the light emitting device layer and the packaging layer are sequentially arranged on one side of the substrate, The circuit structure layer includes: a first metal layer comprising at least two first metal lines located in the peripheral area, the at least two first metal lines extending in a direction parallel to an interface between the display area and the peripheral area, and the at least two first metal lines being sequentially spaced apart in a direction away from the display area; a first insulating layer comprising at least two first insulating portions located in the peripheral region, each of the first insulating portions covering one of the first metal lines, and a first sub-opening being defined between two adjacent first insulating portions; The encapsulation layer is configured to encapsulate the circuit structure layer and the light-emitting device layer on the substrate, and a portion of the encapsulation layer is recessed toward a side close to the substrate to form at least one pit; A filling layer is filled in at least one pit, wherein the area of ​​the encapsulation layer corresponding to the first sub-opening is recessed toward the side close to the substrate to form a first pit in the at least one pit, and the filling layer includes a first filling portion filled into the first pit.

2. The display substrate according to claim 1, wherein: The circuit structure layer further includes: a second metal layer comprising at least two second metal lines located in the peripheral region, each second metal line being disposed on a surface of the first insulating portion away from the substrate; a second insulating layer comprising at least two second insulating portions located in the peripheral region, each second insulating portion covering one second metal line, and a second sub-opening exposing the first sub-opening being defined between two adjacent second insulating portions; The area of ​​the packaging layer corresponding to the second sub-opening and the first sub-opening is recessed toward the side close to the substrate to form the first pit.

3. The display substrate according to claim 2, wherein: The peripheral area includes a bending area located on one side of the display area; The circuit structure layer further includes: a third metal layer and a third insulating layer located in the bending region and sequentially arranged on one side of the substrate; the third metal layer includes at least one conductive connection portion; the third insulating layer covers the at least one conductive connection portion, and the third insulating layer is provided with at least two first vias exposing the at least one conductive connection portion; The second metal layer further includes at least two third metal wires located in the bending region, the at least two third metal wires extending in a direction away from the display region, and the at least two third metal wires are sequentially spaced apart in the direction away from the display region, and two adjacent third metal wires are electrically connected to a conductive connection portion through two first vias in the third insulating layer; The second insulating layer further includes at least two third insulating portions, each of which covers a section of the third metal line, and a second opening is defined between two adjacent third insulating portions; A region of the encapsulation layer corresponding to the second opening is recessed toward a side close to the substrate to form a second pit in the at least one pit, and the filling layer includes a second filling portion filled into the second pit.

4. The display substrate according to claim 3, wherein: The third insulating layer includes at least two fourth insulating parts, one fourth insulating part covers one conductive connecting part, and a groove is formed between two adjacent fourth insulating parts; The first insulating layer also includes at least two fifth insulating parts, one fifth insulating part covers one of the grooves and parts of the two fourth insulating parts adjacent to the groove that are close to the groove; two second vias are provided on the fifth insulating part, respectively exposing two first vias, each section of the third metal wire is located on a side surface of a fifth insulating part away from the substrate, and each section of the third metal wire is connected to the two conductive connection parts through two second vias and two first vias.

5. The display substrate according to claim 4, wherein: Each third insulating portion further covers one of the fifth insulating portions.

6. The display substrate according to any one of claims 3 to 4, wherein: The display substrate has two second openings, and two areas of the encapsulation layer corresponding to the two second openings are respectively recessed toward the side close to the substrate to form two second pits. The filling layer includes two second filling parts filled into the two second pits.

7. The display substrate according to any one of claims 1 to 5, wherein: The display substrate comprises a display area, an opening area at least partially surrounded by the display area, and a separation area between the opening area and the display area; The display substrate further includes: a first barrier dam located in the separation area and between the substrate and the encapsulation layer, wherein the first barrier dam is disposed around the opening area; a second barrier dam located in the separation area and between the substrate and the encapsulation layer, the second barrier dam being disposed around the opening area and between the first barrier dam and the opening area; In which, the area of ​​the encapsulation layer located on the side of the second blocking dam close to the opening area is recessed toward the side close to the substrate to form a third pit in the at least one pit, and the filling layer includes a third filling portion filled into the third pit; and / or, the area of ​​the encapsulation layer located on the side of the second blocking dam close to the display area is recessed toward the side close to the substrate to form a fourth pit in the at least one pit, and the filling layer includes a fourth filling portion filled into the fourth pit.

8. The display substrate according to any one of claims 1 to 5, wherein: A surface of the filling layer away from the substrate is flush or substantially flush with a surface of the encapsulation layer away from the substrate.

9. The display substrate according to any one of claims 1 to 5, wherein: The display substrate further includes a first wiring layer covering at least a portion of a surface of the filling layer on a side away from the substrate and at least a portion of a surface of the encapsulation layer on a side away from the substrate.

10. The display substrate according to claim 9, wherein: The first wiring layer includes: a plurality of first touch electrodes and a plurality of touch sub-electrodes in the plurality of second touch electrodes, wherein each of the plurality of first touch electrodes is an integral structure, the plurality of touch sub-electrodes are arranged in an array, and two adjacent touch sub-electrodes in one second touch electrode are separated by one of the first touch electrodes; The display substrate further includes: a fourth insulating layer, wherein the fourth insulating layer has a plurality of third via holes; a second wiring layer comprising a plurality of connecting portions, each connecting portion electrically connecting two adjacent touch sub-electrodes in one of the second touch electrodes through at least two third vias, wherein an orthographic projection of the connecting portion on the substrate and an orthographic projection of the first touch electrode on the substrate have an intersection area; Among them, the first wiring layer also includes: multiple touch leads, each touch lead is electrically connected to a first touch electrode or a second touch electrode; at least one of the multiple first touch electrodes, the multiple touch sub-electrodes and the multiple touch leads covers at least a portion of the surface of the filling layer on the side away from the substrate.

11. A display substrate, characterized in that: The display substrate comprises a display area and a peripheral area located at least on one side of the display area; the peripheral area comprises a bending area located on one side of the display area; The display substrate comprises: substrate; The circuit structure layer, the light emitting device layer and the packaging layer are sequentially arranged on one side of the substrate, The circuit structure layer includes: a third metal layer and a third insulating layer located in the bending region and sequentially disposed on one side of the substrate; the third metal layer comprising at least one conductive connection portion; the third insulating layer covering the at least one conductive connection portion, and the third insulating layer being provided with at least two first vias exposing the at least one conductive connection portion; a second metal layer comprising at least two third metal wires located in the bending region, the at least two third metal wires extending in a direction away from the display region, and the at least two third metal wires being sequentially spaced apart in the direction away from the display region, and two adjacent third metal wires being electrically connected to a conductive connection portion through two first vias in the third insulating layer; The second insulating layer includes at least two third insulating portions, each of which covers a section of the third metal line, and a second opening is defined between two adjacent third insulating portions; The encapsulation layer is configured to encapsulate the circuit structure layer and the light-emitting device layer on the substrate, and a portion of the encapsulation layer is recessed toward a side close to the substrate to form at least one pit; A filling layer is filled in at least one pit; wherein, the area corresponding to the second opening in the encapsulation layer is recessed toward the side close to the substrate to form a second pit in the at least one pit, and the filling layer includes a second filling portion filled into the second pit.

12. The display substrate according to claim 11, wherein: The third insulating layer includes at least two fourth insulating portions, one fourth insulating portion covers one conductive connecting portion, and a groove is formed between two adjacent fourth insulating portions and the substrate; The circuit structure layer further includes: The first insulating layer includes at least two fifth insulating parts, one fifth insulating part covers one of the grooves and parts of the two fourth insulating parts adjacent to the groove that are close to the groove; two second vias are provided on the fifth insulating part, respectively exposing two first vias; each section of the third metal wire is located on a side surface of a fifth insulating part away from the substrate, and each section of the third metal wire is connected to the two conductive connection parts through two second vias and two first vias.

13. The display substrate according to claim 12, wherein: Each third insulating portion further covers one of the fifth insulating portions.

14. The display substrate according to any one of claims 11 to 12, wherein: The display substrate has two second openings, and two areas of the encapsulation layer corresponding to the two second openings are respectively recessed toward the side close to the substrate to form two second pits. The filling layer includes two second filling parts filled into the two second pits.

15. A display device, characterized in that: include: The display substrate according to any one of claims 1 to 14.

16. A mask for making a filling layer in a display substrate according to any one of claims 1 to 14, characterized in that: include: Mask body, At least one light-transmitting portion is provided on the mask body, and each light-transmitting portion is configured to transmit light into at least one pit in the display substrate.

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