Address translation method, memory system, electronic device, and storage medium

Abstract

One or more embodiments of the present specification provide an address conversion method, a memory system, an electronic device and a storage medium. The method is applied to a storage controller connected with a memory through one or more physical channels, the memory includes one or more storage modules corresponding to the physical channels one by one, and the storage module includes a plurality of storage pages; the method includes: receiving a read / write request sent by a processor, the read / write request carrying a logical address; performing conversion operation on the logical address according to a preset conversion operation mode and the number of physical channels to obtain a target storage module relative to a starting physical address and a target storage page in the target storage module; and determining a physical address corresponding to the logical address according to the target storage module relative to the starting physical address, the target storage page and the starting physical address. The address conversion can be performed without a mapping table.

Description

Technical Field

[0001] This specification relates to the field of memory technology, and more particularly to an address translation method, memory system, electronic device, and storage medium. Background Technology

[0002] In related technologies, to achieve the conversion between logical addresses and physical addresses, a mapping table between logical and physical addresses is typically maintained in the device. This mapping table allows for a direct conversion between the two address types. However, as memory capacity increases and addressing granularity becomes finer, the mapping table also expands, increasing storage overhead and maintenance complexity. Summary of the Invention

[0003] In view of the above, one or more embodiments of this specification provide an address translation method, a memory system, an electronic device, and a storage medium.

[0004] To achieve the above objectives, one or more embodiments of this specification provide the following technical solutions:

[0005] According to a first aspect of one or more embodiments of this specification, an address translation method is provided, applied to a storage controller, the storage controller being connected to a memory via one or more physical channels, the memory including one or more storage modules, each storage module corresponding one-to-one with a physical channel, and each storage module including a plurality of storage pages; the method includes:

[0006] Receive read / write requests sent by the processor, the read / write requests carrying logical addresses;

[0007] The logical address is converted according to a preset conversion operation mode and the number of physical channels to obtain the target storage module relative to the starting physical address and the target storage page in the target storage module; wherein, the target storage page obtained based on different logical address conversion operations is different;

[0008] The physical address corresponding to the logical address is determined based on the target storage module relative to the starting physical address, the target storage page, and the starting physical address.

[0009] Optionally, the storage controller includes a conversion component, and the storage controller is pre-configured with configuration files for multiple conversion operation modes;

[0010] Before the read / write request sent by the receiving processor, the following is also included:

[0011] Receive a configuration request sent by the processor, the configuration request indicating a first conversion operation mode applicable to a first application that the processor is about to execute;

[0012] The conversion component is configured according to the configuration file of the first conversion operation mode; wherein, if the read / write request comes from the first application, the configured conversion component is used to perform conversion operation on the logical address according to the first conversion operation mode and the number of physical channels.

[0013] Optionally, it also includes:

[0014] The processor receives a configuration switching request, which indicates the second conversion operation mode applicable to the second application that the processor is about to execute after completing the first application.

[0015] The conversion component is reset according to the configuration switching request, and the conversion component is configured based on the configuration file of the second conversion operation mode; the reset process includes restoring the conversion component to its initial state;

[0016] If the read / write request comes from the second application, the configured conversion component is used to perform conversion operations on the logical address according to the second conversion operation mode and the number of physical channels.

[0017] Optionally, the storage controller is pre-configured with multiple conversion operation modes and mode correspondences, wherein the mode correspondences indicate the conversion operation modes applicable to different applications;

[0018] The read / write request also carries a program identifier, which indicates the application currently being executed by the processor;

[0019] The step of performing a conversion operation on the logical address according to a preset conversion operation mode and the number of physical channels includes:

[0020] The target conversion operation mode is determined based on the correspondence between the program identifier and the mode.

[0021] The logical address is converted according to the target conversion operation mode and the number of physical channels.

[0022] Optionally, the conversion operation mode includes a modulo operation and a division rounding operation;

[0023] The step of performing a conversion operation on the logical address according to a preset conversion operation mode and the number of physical channels includes:

[0024] The modulo operation is performed at least based on the logical address and the number of physical channels to obtain the target storage module relative to the starting physical address; and the integer division operation is performed at least based on the logical address and the number of physical channels to obtain the target storage page in the target storage module; wherein, in the modulo operation and the integer division operation, the logical address is used as the dividend or a part of the dividend, and the number of physical channels is used as the divisor or a part of the divisor.

[0025] Optionally, the conversion operation mode includes a sequential operation mode and at least one random operation mode;

[0026] The sequential operation mode indicates that: the target storage module relative to the starting physical address is obtained by taking the remainder of the logical address by the number of physical channels, and the target storage page in the target storage module is obtained by dividing the logical address by the number of physical channels and rounding down.

[0027] The random operation mode indicates that at least one of the logical address and the number of physical channels is adjusted, and the adjusted logical address and / or the adjusted number of physical channels are used to participate in the modulo operation and the division rounding operation.

[0028] Optionally, each of the storage pages has a corresponding flag bit, which indicates whether data is stored in the storage page;

[0029] After determining the physical address corresponding to the logical address, the method further includes:

[0030] Obtain the flag bit of the target storage page indicated by the physical address;

[0031] If a read request is received from the processor and the flag indicates that the target memory page contains data, the data in the target memory page is read and returned to the processor; otherwise, an error is reported to the processor.

[0032] If a write request is received from the processor and the flag indicates that the target storage page does not contain data, the data carried in the write request is written to the target storage page; otherwise, an acknowledgment instruction is sent to the processor to confirm whether to perform an overwrite operation.

[0033] According to a second aspect of one or more embodiments of this specification, a memory system is provided, including a memory and a memory controller;

[0034] The memory includes one or more storage modules, and each storage module includes a plurality of storage pages;

[0035] The storage controller is connected to the memory through one or more physical channels, and the storage module corresponds one-to-one with the physical channel; the storage controller is used to execute the method described in any one of the first aspects.

[0036] According to a third aspect of one or more embodiments of this specification, an electronic device is provided, including the memory system and processor described in the second aspect;

[0037] The processor is at least used to send read / write requests to the memory controller in the memory system.

[0038] According to a fourth aspect of one or more embodiments of this specification, a computer-readable storage medium is provided that stores computer instructions thereon, which, when executed by a processor, implement the steps of the method as described in any of the first aspects.

[0039] This specification provides an address translation method that does not require a storage mapping table. When a storage controller receives a read / write request from a processor, it can perform a translation operation on the logical address carried by the read / write request using a preset translation operation mode and the number of physical channels. This yields a target storage module relative to the starting physical address and a target storage page within that module, thus obtaining the physical address corresponding to the logical address. This eliminates the need for a storage mapping table, thereby reducing storage overhead. Furthermore, since different logical address translation operations result in different target storage pages, the accuracy of the logical address to physical address translation is ensured. Attached Figure Description

[0040] Figure 1 This is a schematic diagram of the structure of a memory system provided in an exemplary embodiment.

[0041] Figure 2 This is a flowchart illustrating an address translation method provided in an exemplary embodiment.

[0042] Figure 3 This is a schematic diagram illustrating logical address and physical address translation in sequential operation mode, provided by an exemplary embodiment.

[0043] Figure 4 and Figure 5 This is a schematic diagram illustrating logical address and physical address translation under two different random operation modes, provided by an exemplary embodiment.

[0044] Figure 6 This is a schematic diagram of the structure of another memory system provided in an exemplary embodiment.

[0045] Figure 7 This is a schematic diagram of the structure of an electronic device provided in an exemplary embodiment. Detailed Implementation

[0046] Exemplary embodiments will now be described in detail, examples of which are illustrated in the accompanying drawings. When the following description relates to the drawings, unless otherwise indicated, the same numerals in different drawings denote the same or similar elements. The embodiments described in the following exemplary embodiments do not represent all embodiments consistent with one or more embodiments of this specification. Rather, they are merely examples of apparatuses and methods consistent with some aspects of one or more embodiments of this specification as detailed in the appended claims.

[0047] It should be noted that the steps of the corresponding methods are not necessarily performed in the order shown and described in this specification in other embodiments. In some other embodiments, the methods may include more or fewer steps than described in this specification. Furthermore, a single step described in this specification may be broken down into multiple steps in other embodiments; and multiple steps described in this specification may be combined into a single step in other embodiments.

[0048] In related technologies, address indexes for read / write requests are managed by maintaining a mapping table between logical addresses and physical addresses within the device. For example, the smallest read / write unit in memory is a memory page. The size of the smallest addressing granularity of the memory depends on the size of a memory page; for instance, if a memory page is 32 bits, then the smallest addressing granularity can be 32 bits. Each time the memory controller writes a memory page at the smallest addressing granularity, it generates a new mapping relationship. This mapping relationship is added to (first write) or modified (overwrite write) the mapping table. When a memory page needs to be read, the memory controller looks up the corresponding physical address in the mapping table based on the given logical address, and then accesses the memory to read the memory page pointed to by that physical address. Most memory systems include onboard DRAM, which is used to store the aforementioned mapping table. For other memory systems that do not include onboard DRAM, when such memory is operating, most of the mapping table is stored in memory, and a small remaining portion is stored on on-chip RAM.

[0049] In another example, suppose a memory has a storage capacity of 256GB and a memory page is 4KB. Then there are a total of 64MB (256GB / 4KB) memory pages. Assuming all memory pages contain data, this means a 64MB mapping table is needed. It's clear that as memory capacity increases or addressing granularity becomes finer, the number of memory pages increases, meaning the mapping table needs to store more mapping relationships. This further increases the storage space required for the mapping table, potentially exceeding the onboard limits, increasing storage overhead and maintenance complexity.

[0050] To address the problems in related technologies, this specification provides an address translation method that does not require a storage mapping table. When a storage controller receives a read / write request from a processor, it can perform a translation operation on the logical address carried by the read / write request using a preset translation operation mode and the number of physical channels, thereby obtaining the physical address corresponding to the logical address. This eliminates the need for a storage mapping table, thus reducing storage overhead. Furthermore, since different logical address translation operations result in different target storage pages, this helps ensure the accuracy of the logical address to physical address translation.

[0051] In some embodiments, please refer to Figure 1 , Figure 1 A structural diagram of a memory system is shown, comprising a memory controller 10 and a memory 20. The memory controller 10 is connected to the memory 20 via one or more physical channels 30. The memory 20 includes one or more memory modules 21, each corresponding one-to-one with a physical channel 30. Multiple physical channels enable high-concurrency read and write operations, improving read and write efficiency. Each memory module 21 includes several memory pages, which can be further divided into one or more memory cells. A memory cell is the smallest unit of storage in the memory, and a memory page is the smallest unit of read / write operation in the memory. That is, if data in a memory cell within a memory page needs to be read, the entire page must be read. In some applications, such as phase-change memory, a memory cell can store 1 bit of data, and the read / write unit of a memory page can be 32 bits.

[0052] It is understood that there may be other hierarchical divisions between the storage module and the storage page, and this embodiment does not impose any restrictions on this. In one example, such as in NAND flash memory, a storage module can be divided into one or more dies (cores), a die (core) includes one or more planes, a plane (plane) includes one or more blocks, and a block (block) includes one or more pages. In another example, such as in DDR memory, a storage module can be divided into one or more ranks, a rank includes one or more chips / dies, a chip (die) includes one or more banks, and a bank includes one or more pages.

[0053] In some embodiments, please refer to Figure 2 , Figure 2 This is a flowchart illustrating an address translation method provided in an embodiment of this specification. The method is applied to, for example... Figure 1 The memory controller in the illustrated memory system. The method includes:

[0054] In step S101, a read / write request sent by the processor is received, the read / write request carrying a logical address.

[0055] In step S102, the logical address is converted according to a preset conversion operation mode and the number of physical channels to obtain the target storage module relative to the starting physical address and the target storage page in the target storage module; wherein, the target storage page obtained based on different logical address conversion operations is different.

[0056] In step S103, the physical address corresponding to the logical address is determined based on the target storage module relative to the starting physical address, the target storage page, and the starting physical address.

[0057] In some embodiments, the memory system is communicatively connected to the processor. The processor can send read / write requests to the memory system as needed to read / write data from the memory via the memory controller. The read / write requests carry logical addresses. The memory controller has a preset conversion operation mode. By executing this mode, the logical address can be converted to a physical address. The conversion operation mode instructs the conversion process to be performed based on the number of physical channels and the logical address. For example, it uses preset operation logic (such as addition, subtraction, multiplication, division, modulo, and integer operations) to perform operations on at least the number of physical channels and the logical address, thereby obtaining the target storage module relative to the starting physical address and the target storage page in that target storage module. Then, based on the target storage module relative to the starting physical address, the target storage page, and the starting physical address, the physical address corresponding to the logical address can be determined. This achieves the conversion between logical and physical addresses without a storage mapping table, thus reducing storage overhead.

[0058] Wherein, the same conversion operation mode has the same conversion operation logic for different logical addresses, then the target storage module and the target storage page obtained based on the same logical address conversion operation are the same, thus obtaining a unique physical address, while the target storage pages obtained based on different logical address conversion operations are different, that is, each logical address has a unique corresponding physical address, and different logical addresses correspond to different physical addresses, which helps to ensure the accuracy of logical address to physical address conversion.

[0059] It is understood that the conversion process between logical addresses and physical addresses can be implemented in software or hardware. The implementation logic of both is the same, and the specific choice can be made according to the actual application scenario. This embodiment does not impose any restrictions on this.

[0060] In one possible implementation, the storage controller includes a conversion component that can be configured using a configuration file of the conversion operation mode. This allows the conversion component to perform the conversion between logical and physical addresses. For example, after receiving a read / write request from the processor, the storage controller can input the logical address carried by the read / write request into the conversion component. The conversion component then performs a conversion operation on the logical address according to a preset conversion operation mode and the number of physical channels to obtain a target storage module relative to the starting physical address and a target storage page within that target storage module. Based on the target storage module relative to the starting physical address, the target storage page, and the starting physical address, the storage controller determines the physical address corresponding to the logical address. Thus, the storage controller can perform read / write operations on the memory based on the physical address obtained by the conversion component.

[0061] In some embodiments, different applications are used to provide different services. Considering that a single conversion operation mode may not be applicable to all service scenarios, such as some service scenarios being suitable for sequential writing while others may be suitable for random writing, in order to be applicable to different service scenarios, multiple conversion operation modes can be built into the storage controller, and the conversion operation mode suitable for the application currently being processed by the processor can be adopted to perform the conversion between logical address and physical address.

[0062] In one possible implementation, the storage controller includes a conversion component, and the storage controller has pre-configured configuration files for multiple conversion operation modes. Before the processor sends a read / write request to the storage controller, it can specify the conversion operation mode applied by the storage controller according to the application it is about to execute. For example, during the initialization phase, the storage controller can receive a configuration request sent by the processor, which indicates a first conversion operation mode applicable to a first application that the processor is about to execute; then, it reads the corresponding configuration file according to the first conversion operation mode to configure the conversion component. After configuration is complete, the storage controller can send a configuration completion instruction to the processor, thereby informing the processor that the configuration is complete. During the execution of the first application, the processor can send read / write requests to the storage controller as needed. The configured conversion component is used to perform conversion operations on the logical address carried by the read / write request according to the first conversion operation mode and the number of physical channels, obtaining the target storage module relative to the starting physical address and the target storage page in the target storage module. Then, based on the target storage module relative to the starting physical address, the target storage page, and the starting physical address, the physical address corresponding to the logical address is determined. In this embodiment, the applicable conversion operation mode is configured based on the application's needs.

[0063] After executing the first application, the processor is about to execute the second application. If the conversion operation mode applicable to the second application differs from that of the first application, the processor can send a configuration switch request to the storage controller. This request indicates the second conversion operation mode applicable to the second application that the processor will execute after executing the first application. The storage controller can reset the conversion component according to the configuration switch request. The reset process includes restoring the conversion component to its initial state and then reading the corresponding configuration file based on the second conversion operation mode to configure the conversion component. During the execution of the second application, the processor can send read / write requests to the storage controller as needed. The configured conversion component performs conversion operations on the logical address carried by the read / write request according to the second conversion operation mode and the number of physical channels, obtaining the target storage module relative to the starting physical address and the target storage page within that module. Then, based on the target storage module relative to the starting physical address, the target storage page, and the starting physical address, the physical address corresponding to the logical address is determined. This embodiment implements configuration of the applicable conversion operation mode based on application needs.

[0064] Similarly, after the processor finishes executing the second application, it will execute the third application. If the conversion operation mode applicable to the third application is different from that applicable to the second application, the processor can send a configuration switching request to the storage controller so that the storage controller can reset and reconfigure the conversion component.

[0065] In another possible implementation, the storage controller may have multiple preset conversion operation modes and mode correspondences, where the mode correspondences indicate the conversion operation modes applicable to different applications. The read / write requests sent by the processor also carry a program identifier, which indicates the application currently being executed by the processor. The storage controller can determine the target conversion operation mode based on the program identifier and the mode correspondences. Then, it performs conversion operations on the logical address according to the target conversion operation mode and the number of physical channels to obtain the target storage module relative to the starting physical address and the target storage page in the target storage module. Furthermore, based on the target storage module relative to the starting physical address, the target storage page, and the starting physical address, it determines the physical address corresponding to the logical address. This embodiment can use applicable conversion operation modes to convert between logical and physical addresses for different applications, thereby providing read / write physical addresses suitable for different applications and improving read / write efficiency.

[0066] For example, the storage controller includes a conversion component, and the various conversion operation modes and mode correspondences can be preset in the conversion component.

[0067] In some embodiments, the operational logic in the conversion operation mode includes at least a modulo operation and a division-and-round operation. During the conversion operation of the logical address according to a preset conversion operation mode and the number of physical channels, the storage controller performs a modulo operation based on the logical address and the number of physical channels to obtain the target storage module relative to the starting physical address. In the modulo operation, the logical address is used as the dividend or a part of the dividend, and the number of physical channels is used as the divisor or a part of the divisor. Furthermore, the storage controller performs a division-and-round operation based on the logical address and the number of physical channels to obtain the target storage page in the target storage module. In the division-and-round operation, the logical address is used as the dividend or a part of the dividend, and the number of physical channels is used as the divisor or a part of the divisor. The operational logic in the conversion operation mode also includes an addition operation. The storage controller performs an addition operation based on the target storage module relative to the starting physical address, the target storage page, and the starting physical address to obtain the physical address corresponding to the logical address. In this embodiment, the conversion between logical address and physical address is achieved through modulo operation, division and integer operation, and addition operation, eliminating the need to store a mapping table, which helps to reduce storage consumption.

[0068] In some embodiments, the conversion operation mode includes a sequential operation mode. The sequential operation mode indicates: obtaining the target storage module relative to the starting physical address by taking the logical address modulo the number of physical channels, and obtaining the target storage page in the target storage module by dividing the logical address by the number of physical channels and rounding down. In the sequential operation mode, for multiple consecutive logical addresses, the converted physical addresses are also consecutive; that is, multiple data to be written corresponding to multiple consecutive logical addresses are written sequentially.

[0069] For example, assuming that the conversion between physical address and logical address is performed using the sequential operation mode, the operation logic of the sequential operation mode is pba = base addr + lba%channel number + lba / channel number, where base addr represents the initial physical address, lba represents the logical address, pba represents the physical address, channel number represents the number of physical channels, "%" represents the modulo operation, and " / " represents the division and rounding operation.

[0070] In one example, please refer to Figure 3Assuming channel number = 3, meaning there are 3 storage modules 21, and baseaddr = 0; logical addresses are represented by logical numbers, starting from 0; the smallest addressing granularity is one storage page 22, meaning one physical address (logical address) points to one storage page 22. Figure 3 One cell in the diagram represents a storage page 22. An example is provided where a storage module 21 includes 16 storage pages 22. For a storage address with logical number 0, following the sequential operation logic, the physical address pba = 0 + 0 + 0, pointing to the first storage page in the first storage module; for a storage address with logical number 1, the physical address pba = 0 + 1 + 0, pointing to the first storage page in the second storage module; for a storage address with logical number 2, the physical address pba = 0 + 2 + 0, pointing to the first storage page in the third storage module; for a storage address with logical number 3, the physical address pba = 0 + 0 + 1, pointing to the second storage page in the first storage module; for a storage address with logical number 4, the physical address pba = 0 + 1 + 1, pointing to the second storage page in the second storage module, and so on. By converting consecutive logical addresses into consecutive physical addresses using the sequential operation mode, sequential writing is achieved.

[0071] In other embodiments, the conversion operation mode further includes at least one random operation mode. The random operation mode indicates that at least one of the logical address and the number of physical channels is adjusted, and the adjusted logical address and / or the adjusted number of physical channels are used in modulo and integer division operations. In the random operation mode, for multiple consecutive logical addresses, the converted physical addresses may be randomly distributed.

[0072] For ease of understanding, the logical address before adjustment will be referred to as the original logical address, and the number of physical channels before adjustment will be referred to as the original number of physical channels. For example, the modulo operation and the integer division operation can be any two of the following four: (1) the dividend can be the original logical address and the divisor is also the original number of physical channels; (2) the dividend can be the adjusted logical address and the divisor is the original number of physical channels; (3) the dividend can be the original logical address and the divisor is the adjusted number of physical channels; or (4) the dividend can be the adjusted logical address and the divisor is also the adjusted number of physical channels. Among them, when the dividend is the adjusted logical address, the adjusted logical address is obtained by operating on the original logical address and the preset adjustment coefficient, that is, the original logical address is a part of the dividend. When the divisor is the adjusted number of physical channels, the adjusted number of physical channels includes the number obtained by operating on the original number of physical channels and the preset adjustment coefficient, that is, the original number of physical channels is a part of the divisor.

[0073] For example, at least one of the logical address and the number of physical channels can be adjusted using an adjustment coefficient and a preset adjustment method. The adjustment coefficient and preset adjustment method in the modulo operation and the division rounding operation can be the same or different. It is understood that this embodiment does not impose any restrictions on the adjustment coefficient and adjustment method, and can be specifically set according to the actual application scenario. For example, a preset value can be added to or multiplied by a preset coefficient to the logical number indicated by the logical address, or a preset value can be subtracted from or divided by a preset coefficient to the number of physical channels.

[0074] For example, suppose the operation logic for the random operation mode is pba = base addr + (lba + 2) % channelnumber + lba / channel number. See one example. Figure 4 Assuming channel number = 3, meaning there are 3 storage modules 21, and base address = 0; logical addresses are represented by logical numbers, starting from 0; the smallest addressing granularity is one storage page 22, meaning one physical address (logical address) points to one storage page 22. Figure 4 One cell in the diagram represents a storage page 22. An example is provided where a storage module 21 includes 16 storage pages 22. For a storage address with logical number 0, following the random operation logic, the physical address pba = 0 + 2 + 0, pointing to the first storage page in the third storage module; for a storage address with logical number 1, the physical address pba = 0 + 0 + 1, pointing to the second storage page in the first storage module; for a storage address with logical number 2, the physical address pba = 0 + 1 + 1, pointing to the second storage page in the second storage module; for a storage address with logical number 3, the physical address pba = 0 + 2 + 1, pointing to the second storage page in the third storage module; and so on.

[0075] For example, suppose the operation logic for the random operation mode is pba = base addr + lba%(channelnumber-1) + lba / (channel number-1). See one example. Figure 5Assuming channel number = 3 (i.e., 3 storage modules) and base address = 0; logical addresses are represented by logical numbers starting from 0; the smallest addressing granularity is one storage page, meaning one physical address (logical address) points to one storage page. For the storage address with logical number 0, following the random operation logic, physical address pba = 0 + 0 + 0, pointing to the first storage page in the first storage module; for the storage address with logical number 1, physical address pba = 0 + 1 + 0, pointing to the first storage page in the second storage module; for the storage address with logical number 2, physical address pba = 0 + 0 + 1, pointing to the second storage page in the first storage module; for the storage address with logical number 3, physical address pba = 0 + 1 + 1, pointing to the second storage page in the second storage module; for the storage address with logical number 4, physical address pba = 0 + 0 + 2, pointing to the third storage page in the first storage module; and so on.

[0076] In some embodiments, if the determined target memory module and / or target memory page is not within the range of memory modules and pages contained in the memory—for example, the memory module may only include 4 memory modules, but the calculated target memory module indicates the 5th memory module; or a memory module may only include 128 memory pages, but the calculated target memory page indicates the 130th memory page—it is clear that the logical address given by the processor exceeds the physical capacity. An error can be reported to the processor, thereby helping the processor to troubleshoot errors and improving troubleshooting efficiency. For example, the memory controller can determine the range of logical address values ​​based on the memory's storage vector and feed it back to the processor, so that the processor can allocate logical addresses according to the range of logical address values, thereby reducing the occurrence of the above-mentioned errors and improving read / write efficiency.

[0077] In some embodiments, after determining the physical address corresponding to the logical address, the storage control can read data from the storage page indicated by the physical address of the memory according to a read request, and write data carried by a write request into the storage page indicated by the physical address of the memory to read data.

[0078] In one possible implementation, for read / write accuracy, each storage page corresponds to a flag bit indicating whether data is stored in the storage page. For example, the flag bit may be a first preset value indicating that data is stored in the storage page; or a second preset value indicating that no data is stored in the storage page. For instance, one of the first and second preset values ​​could be 0, and the other could be 1.

[0079] After determining the physical address corresponding to the logical address, the storage controller obtains the flag bit of the target storage page indicated by the physical address; if it receives a read request from the processor and the flag bit indicates that the target storage page stores data, it reads the data in the target storage page and returns it to the processor; if it receives a read request from the processor and the flag bit indicates that the target storage page does not store data, it may be that the logical address specified by the processor is incorrect, and it can report an error to the processor, thereby helping the processor to troubleshoot errors and improve troubleshooting efficiency.

[0080] If the processor sends a write request and the flag indicates that the target storage page does not contain data, the storage controller can write the data carried in the write request to the target storage page. If the processor sends a write request and the flag indicates that the target storage page contains data, the controller can send an acknowledgment instruction to the processor. The acknowledgment instruction is used to confirm with the processor whether to perform an overwrite operation. If the processor confirms the instruction, the controller performs an overwrite operation on the target storage page, thereby avoiding accidental deletion of the data originally stored on the target storage page.

[0081] In some embodiments, please refer to Figure 1 This specification also provides a memory system, including a memory 20 and a memory controller 10;

[0082] The memory 20 includes one or more storage modules 21, and each storage module 21 includes a plurality of storage pages;

[0083] The storage controller 10 is connected to the memory 20 through one or more physical channels, and each storage module 21 corresponds to one of the physical channels; the storage controller 10 is used for:

[0084] Receive read / write requests sent by the processor, the read / write requests carrying logical addresses;

[0085] The logical address is converted according to a preset conversion operation mode and the number of physical channels to obtain the target storage module relative to the starting physical address and the target storage page in the target storage module; wherein, the target storage page obtained based on different logical address conversion operations is different;

[0086] The physical address corresponding to the logical address is determined based on the target storage module relative to the starting physical address, the target storage page, and the starting physical address.

[0087] In some embodiments, please refer to Figure 6The storage controller 10 includes a conversion component 11, and the storage controller 10 is pre-configured with configuration files for multiple conversion operation modes. The storage controller 10 is further configured to: receive a configuration request sent by the processor, the configuration request indicating a first conversion operation mode applicable to a first application to be executed by the processor; configure the conversion component 11 according to the configuration file of the first conversion operation mode; wherein, if the read / write request originates from the first application, the configured conversion component 11 is used to perform conversion operations on the logical address according to the first conversion operation mode and the number of physical channels.

[0088] In some embodiments, the storage controller 10 is further configured to: receive a configuration switching request sent by the processor, the configuration switching request indicating a second conversion operation mode applicable to a second application that the processor is about to execute after executing the first application; reset the conversion component 11 according to the configuration switching request, and configure the conversion component 11 based on the configuration file of the second conversion operation mode; the reset process includes restoring the conversion component 11 to its initial state; wherein, if the read / write request comes from the second application, the configured conversion component 11 is used to perform conversion operations on the logical address according to the second conversion operation mode and the number of physical channels.

[0089] In some embodiments, the storage controller 10 is pre-configured with multiple conversion operation modes and mode correspondences, wherein the mode correspondences indicate the conversion operation modes applicable to different applications; the read / write request also carries a program identifier, which indicates the application currently being executed by the processor. The storage controller 10 is further configured to: determine a target conversion operation mode based on the program identifier and the mode correspondences; and perform conversion operations on the logical address according to the target conversion operation mode and the number of physical channels.

[0090] In some embodiments, the conversion operation mode includes a modulo operation and a division rounding operation; the storage controller 10 is further configured to: perform a modulo operation based at least on the logical address and the number of physical channels to obtain a target storage module 21 relative to the starting physical address; and perform a division rounding operation based at least on the logical address and the number of physical channels to obtain a target storage page in the target storage module; wherein, in the modulo operation and the division rounding operation, the logical address is used as the dividend or a part of the dividend, and the number of physical channels is used as the divisor or a part of the divisor.

[0091] In some embodiments, the conversion operation mode includes a sequential operation mode and at least one random operation mode; the sequential operation mode indicates: obtaining the target storage module relative to the starting physical address by taking the remainder of the logical address by the number of physical channels, and obtaining the target storage page in the target storage module by dividing the logical address by the number of physical channels and rounding it down; the random operation mode indicates: adjusting at least one of the logical address and the number of physical channels, and using the adjusted logical address and / or the adjusted number of physical channels to participate in the remainder operation and the division rounding operation.

[0092] In some embodiments, each storage page corresponds to a flag bit, which indicates whether data is stored in the storage page; after determining the physical address corresponding to the logical address, the storage controller 10 is further configured to: obtain the flag bit of the target storage page indicated by the physical address; if a read request is received from the processor and the flag bit indicates that the target storage page stores data, read the data in the target storage page and return it to the processor; otherwise, report an error to the processor; if a write request is received from the processor and the flag bit indicates that the target storage page does not store data, write the data carried by the write request to the target storage page; otherwise, send an acknowledgment instruction to the processor, which is used to confirm with the processor whether to perform an overwrite operation.

[0093] Please see Figure 7 This specification also provides an electronic device, including the memory system 100 and processor 200 described above;

[0094] The processor 200 is used to send read / write requests to the storage controller 10 in the memory system 100.

[0095] In some embodiments, the processor 200 is further configured to send a configuration request to the storage controller 10 in the memory system 100, the configuration request being configured to instruct the storage controller 10 to configure the conversion component 11 according to a configuration file of a first conversion operation mode applicable to a first application to be executed by the processor.

[0096] In some embodiments, the processor is also configured to send a configuration switching request to the storage controller 10 in the memory system 100, the configuration switching request being configured to instruct the storage controller 10 to reset and reconfigure the conversion component 11 according to a second conversion operation mode applicable to a second application program to be executed by the processor.

[0097] The processor 200 can be a Central Processing Unit (CPU), or other general-purpose processors, digital signal processors (DSPs), application-specific integrated circuits (ASICs), field-programmable gate arrays (FPGAs), or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components, etc. The general-purpose processor can be a microprocessor or any conventional processor.

[0098] The electronic device can be a smartphone / mobile phone, tablet computer, personal digital assistant (PDA), laptop computer, desktop computer, media content player, video game console / system, virtual reality system, augmented reality system, wearable device (e.g., watch, glasses, gloves, headwear (e.g., hat, helmet, virtual reality headset, augmented reality headset, head-mounted device (HMD), headband), pendant, armband, leg ring, shoes, vest), remote control, or any other type of device. The device may include, but is not limited to, processor 200 and memory system 100. Those skilled in the art will understand that... Figure 7 This is merely an example of an electronic device and does not constitute a limitation on the electronic device. It may include more or fewer components than illustrated, or combine certain components, or different components. For example, the device may also include input / output devices, network access devices, buses, etc.

[0099] The specific implementation process of the functions and roles of each unit in the above-mentioned equipment can be found in the implementation process of the corresponding steps in the above-mentioned method, and will not be repeated here.

[0100] In an exemplary embodiment, a non-transitory computer-readable storage medium including instructions is also provided, such as a memory including instructions that can be executed by a processor of the device to perform the described method. For example, the non-transitory computer-readable storage medium may be a ROM, random access memory (RAM), CD-ROM, magnetic tape, floppy disk, and optical data storage device, etc.

[0101] A non-transitory computer-readable storage medium that, when instructions in the storage medium are executed by a terminal's processor, enables the terminal to perform the methods described above.

[0102] The systems, devices, modules, or units described in the above embodiments can be implemented by computer chips or entities, or by products with certain functions. A typical implementation device is a computer, which can take the form of a personal computer, laptop computer, cellular phone, camera phone, smartphone, personal digital assistant, media player, navigation device, email sending and receiving device, game console, tablet computer, wearable device, or any combination of these devices.

[0103] In a typical configuration, a computer includes one or more processors (CPU), input / output interfaces, network interfaces, and memory.

[0104] Memory may include non-persistent storage in computer-readable media, such as random access memory (RAM) and / or non-volatile memory, such as read-only memory (ROM) or flash RAM. Memory is an example of computer-readable media.

[0105] Computer-readable media, including both permanent and non-permanent, removable and non-removable media, can store information using any method or technology. Information can be computer-readable instructions, data structures, modules of programs, or other data. Examples of computer storage media include, but are not limited to, phase-change memory (PRAM), static random access memory (SRAM), dynamic random access memory (DRAM), other types of random access memory (RAM), read-only memory (ROM), electrically erasable programmable read-only memory (EEPROM), flash memory or other memory technologies, CD-ROM, digital versatile optical disc (DVD) or other optical storage, magnetic tape, disk storage, quantum memory, graphene-based storage media or other magnetic storage devices, or any other non-transferable medium that can be used to store information accessible by a computing device. As defined herein, computer-readable media does not include transient computer-readable media, such as modulated data signals and carrier waves.

[0106] It should also be noted that the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes said element.

[0107] The foregoing has described specific embodiments of this specification. Other embodiments are within the scope of the appended claims. In some cases, the actions or steps recited in the claims may be performed in a different order than that shown in the embodiments and may still achieve the desired result. Furthermore, the processes depicted in the drawings do not necessarily require the specific or sequential order shown to achieve the desired result. In some embodiments, multitasking and parallel processing are possible or may be advantageous.

[0108] The terminology used in one or more embodiments of this specification is for the purpose of describing particular embodiments only and is not intended to limit the scope of one or more embodiments of this specification. The singular forms “a,” “described,” and “the” used in one or more embodiments of this specification and in the appended claims are also intended to include the plural forms unless the context clearly indicates otherwise. It should also be understood that the term “and / or” as used herein refers to and includes any or all possible combinations of one or more associated listed items.

[0109] It should be understood that although the terms first, second, third, etc., may be used to describe various information in one or more embodiments of this specification, such information should not be limited to these terms. These terms are only used to distinguish information of the same type from one another. For example, first information may also be referred to as second information without departing from the scope of one or more embodiments of this specification, and similarly, second information may also be referred to as first information. Depending on the context, the word "if" as used herein may be interpreted as "when," "in response to a determination," or "when," or "in the event of a determination."

[0110] The above description is merely a preferred embodiment of one or more embodiments of this specification and is not intended to limit the scope of one or more embodiments of this specification. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of one or more embodiments of this specification should be included within the protection scope of one or more embodiments of this specification.

Claims

1. An address translation method applied to a storage controller, the storage controller being connected to a memory via one or more physical channels, the memory including one or more storage modules, each storage module corresponding one-to-one with a physical channel, and each storage module including a plurality of storage pages; the method comprising: Receive read / write requests sent by the processor, the read / write requests carrying logical addresses; The logical address is converted according to a preset conversion operation mode and the number of physical channels to obtain a target storage module relative to the starting physical address and a target storage page in the target storage module; wherein, the target storage page obtained based on different logical address conversion operations is different; the conversion operation mode includes a modulo operation and a division rounding operation; the conversion operation of the logical address according to the preset conversion operation mode and the number of physical channels includes: performing a modulo operation based at least on the logical address and the number of physical channels to obtain a target storage module relative to the starting physical address; and performing a division rounding operation based at least on the logical address and the number of physical channels to obtain a target storage page in the target storage module; wherein, in the modulo operation and the division rounding operation, the logical address is used as the dividend or a part of the dividend, and the number of physical channels is used as the divisor or a part of the divisor; The physical address corresponding to the logical address is determined based on the target storage module relative to the starting physical address, the target storage page, and the starting physical address.

2. The method according to claim 1, wherein the storage controller includes a conversion component, and the storage controller is pre-configured with configuration files for multiple conversion operation modes; Before the read / write request sent by the receiving processor, the following is also included: Receive a configuration request sent by the processor, the configuration request indicating a first conversion operation mode applicable to a first application that the processor is about to execute; The conversion component is configured according to the configuration file of the first conversion operation mode; wherein, if the read / write request comes from the first application, the configured conversion component is used to perform conversion operation on the logical address according to the first conversion operation mode and the number of physical channels.

3. The method according to claim 2, further comprising: The processor receives a configuration switching request, which indicates the second conversion operation mode applicable to the second application that the processor is about to execute after completing the first application. The conversion component is reset according to the configuration switching request, and the conversion component is configured based on the configuration file of the second conversion operation mode; the reset process includes restoring the conversion component to its initial state; If the read / write request comes from the second application, the configured conversion component is used to perform conversion operations on the logical address according to the second conversion operation mode and the number of physical channels.

4. The method according to claim 1, wherein the storage controller is preset with multiple conversion operation modes and mode correspondences, wherein the mode correspondences indicate the conversion operation modes applicable to different applications; The read / write request also carries a program identifier, which indicates the application currently being executed by the processor; The step of performing a conversion operation on the logical address according to a preset conversion operation mode and the number of physical channels includes: The target conversion operation mode is determined based on the correspondence between the program identifier and the mode. The logical address is converted according to the target conversion operation mode and the number of physical channels.

5. The method according to claim 1, wherein the conversion operation mode includes a sequential operation mode and at least one random operation mode; The sequential operation mode indicates that: the target storage module relative to the starting physical address is obtained by taking the remainder of the logical address by the number of physical channels, and the target storage page in the target storage module is obtained by dividing the logical address by the number of physical channels and rounding down. The random operation mode indicates that at least one of the logical address and the number of physical channels is adjusted, and the adjusted logical address and / or the adjusted number of physical channels are used to participate in the modulo operation and the division rounding operation.

6. The method according to claim 1, wherein each storage page corresponds to a flag bit, the flag bit indicating whether data is stored in the storage page; After determining the physical address corresponding to the logical address, the method further includes: Obtain the flag bit of the target storage page indicated by the physical address; If a read request is received from the processor and the flag indicates that the target memory page contains data, the data in the target memory page is read and returned to the processor; otherwise, an error is reported to the processor. If a write request is received from the processor and the flag indicates that the target storage page does not contain data, the data carried in the write request is written to the target storage page; otherwise, an acknowledgment instruction is sent to the processor to confirm whether to perform an overwrite operation.

7. A memory system, comprising a memory and a memory controller; The memory includes one or more storage modules, and each storage module includes a plurality of storage pages; The storage controller is connected to the memory through one or more physical channels, and the storage modules correspond one-to-one with the physical channels; the storage controller is used to execute the method according to any one of claims 1 to 6.

8. An electronic device comprising the memory system and processor as described in claim 7; The processor is at least used to send read / write requests to the memory controller in the memory system.

9. A computer-readable storage medium having stored thereon computer instructions that, when executed by a processor, implement the steps of the method as claimed in any one of claims 1 to 6.

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