A control method, device and system for master-slave switching communication

Abstract

The present invention provides a control method, device, and system for master-slave switching communication. The method is applied to a master-slave switching communication system comprising a first controller and a second controller, the states of which switch between master and slave. The method comprises: when the first controller is the master and the second controller is the slave, if the first controller determines that data transmission is complete, then after a first delay, controlling the state of the first controller to switch from master to slave, so that the second controller can send a data query instruction to the first controller; and when the first controller is the slave and the second controller is the master, if the first controller receives a data query instruction sent by the second controller, controlling the state of the first controller to switch from slave to master, so that the first controller can transmit data requested by the data query instruction to the second controller. The present invention can improve the communication efficiency between a DSP and a single-chip microcomputer.

Description

Technical Field

[0001] The present invention relates to the field of communication technology, and in particular to a method, device and system for controlling master-slave switching communication. Background Art

[0002] During the development and upgrade of an uninterruptible power supply (UPS), it is necessary to add an LCD display to a model that does not have an LCD. The DSP of the UPS and the microcontroller of the LCD can communicate using the SPI protocol.

[0003] SPI communication is half-duplex and operates in two modes: master mode and slave mode. The master device controls the communication, sending clock, data, and chip select signals to the slave device. The slave device uses the clock signal from the master to determine when to receive data.

[0004] However, the communication between the UPS's DSP and the LCD's microcontroller involves a large amount of display content and data transfer. The slave device takes time to prepare data, and during this time, the host device cannot detect when the data is ready. Therefore, it must continuously send clock signals to the slave device to ensure proper communication. The LCD's microcontroller, acting as a slave, often experiences display lag, resulting in low communication efficiency. Therefore, when data transfer between the DSP and microcontroller is high, the fixed SPI master-slave mode is inefficient, resulting in a poor user experience. Summary of the Invention

[0005] The present invention provides a control method, device and system for master-slave switching communication, which can realize master-slave switching communication between DSP and single-chip microcomputer when the data transmission volume between the DSP and the single-chip microcomputer is large, thereby improving the communication efficiency between the DSP and the single-chip microcomputer.

[0006] In the first aspect, the present invention provides a control method for master-slave switching communication, which is applied to a master-slave switching communication system, wherein the master-slave switching communication system includes a first controller and a second controller, and the states of the first controller and the second controller are switched between the host and the slave, and the host sends data to the slave for data transmission; the control method includes: when the first controller is the host and the second controller is the slave, if the first controller determines that the data transmission is completed, then after a first delay, the state of the first controller is controlled to switch from the host to the slave, so that the second controller sends a data query instruction to the first controller; when the first controller is the slave and the second controller is the host, if the first controller receives the data query instruction sent by the second controller, then the state of the first controller is controlled to switch from the slave to the host, so that the first controller transmits the data queried by the data query instruction to the second controller.

[0007] The present invention provides a control method for master-slave switching communication. When a first controller is a master and a second controller is a slave, if the first controller determines that data transmission is complete, then after a first delay, the state of the first controller is controlled to switch from master to slave, so that the second controller can send a data query instruction to the first controller; when the first controller is a slave and the second controller is a master, if the first controller receives a data query instruction sent by the second controller, the state of the first controller is controlled to switch from slave to master, so that the first controller can transmit data queried by the data query instruction to the second controller. By periodically switching the states of the first and second controllers between master and slave, the present invention allows the master to know the transmission progress of the slave data, ensures stability when the data transmission volume is large, and improves transmission efficiency during the data transmission process.

[0008] In one possible implementation, the data transmission pin of the first controller is connected to the data transmission pin of the second controller, and the status control pin of the first controller is connected to the status control pin of the second controller; the control method also includes: when the first controller is a host and the second controller is a slave, the first controller outputs a first chip select signal to the second controller through the status control pin to instruct the second controller to receive data based on the first chip select signal; the first chip select signal is low during data transmission, and is high before and after data transmission; when the second controller is a host and the first controller is a slave, the first controller receives the second chip select signal output by the second controller through the status control pin, and based on the second chip select signal, receives the data sent by the second controller through the data transmission pin; the second chip select signal is low during data transmission, and is high before and after data transmission.

[0009] In one possible implementation, the first data length of data received by the first controller in a single time is greater than the second data length of data sent by the second controller in a single time; the control method also includes: when the first controller is a slave and the second controller is a host, for each transmission process; step one: the first controller receives a first data packet sent by the second controller; step two: the first controller stores the first N bits of data in the first data packet in an interrupt buffer, where N is the second data length; step three: the first controller verifies the data in the interrupt buffer, and if the verification is successful, copies the data in the interrupt buffer to the main buffer, and clears the interrupt buffer; step four: the first controller stores the first N bits of data of the remaining data in the first data packet in the interrupt buffer; step five, repeating steps three and four until the first data packet is split, thereby ending the transmission process of the first data packet.

[0010] In a second aspect, an embodiment of the present invention provides a control method for master-slave switching communication, which is applied to a master-slave switching communication system, wherein the master-slave switching communication system includes a first controller and a second controller, and the states of the first controller and the second controller are switched between the master and the slave, and the host sends data to the slave for data transmission; the control method includes: when the first controller is the master and the second controller is the slave, the second controller records the duration of the second controller as the slave, and when the duration is greater than the second duration, controls the state of the second controller to switch from the slave to the master, so that the second controller sends a data query instruction to the first controller; wherein the second duration is greater than the data transmission duration for the first controller to transmit data to the second controller; when the first controller is the slave and the second controller is the master, the second controller sends a data query instruction to the first controller, and after a delay of a third duration, controls the state of the second controller to switch from the master to the slave, so that the first controller transmits the data queried by the data query instruction to the second controller.

[0011] The present invention provides a control method for master-slave switching communication. By periodically switching the states of a first controller and a second controller between a host and a slave, the host can learn the transmission progress of the slave data, thereby ensuring stability when the data transmission volume is large and improving the transmission efficiency during the data transmission process.

[0012] In one possible implementation, the data transmission pin of the first controller is connected to the data transmission pin of the second controller, and the status control pin of the first controller is connected to the status control pin of the second controller; the control method also includes: when the first controller is a host and the second controller is a slave, the second controller receives a first chip select signal output by the first controller through the status control pin, and based on the first chip select signal, receives data sent by the first controller through the data transmission pin; the first chip select signal is low during data transmission, and is high before and after data transmission; when the second controller is a host and the first controller is a slave, the second controller outputs a second chip select signal to the first controller through the status control pin to instruct the first controller to receive data based on the second chip select signal; the second chip select signal is low during data transmission, and is high before and after data transmission.

[0013] In a possible implementation, the control method further includes: when the first controller is a host and the second controller is a slave, the second controller sets a status control pin to a low level and receives data sent by the first controller through a data transmission pin.

[0014] In one possible implementation, the first data length of data received by the first controller in a single time is greater than the second data length of data sent by the second controller in a single time; the control method also includes: when the first controller is a host and the second controller is a slave, for each transmission process; step one: the second controller receives the second data packet sent by the first controller bit by bit according to the data bit, and stores it in the interrupt buffer; step two: the second controller judges the number of data bits of the data stored in the interrupt buffer, if the number of data bits is greater than or equal to the second data length, execute step three; if the number of data bits is less than the second data length, execute step one; step three: verify the data stored in the interrupt buffer, if the verification is successful, copy the stored data to the main buffer, and clear the interrupt buffer; step four: repeat steps one, two and three until the second data packet is received, and end the transmission process of the second data packet.

[0015] In a third aspect, an embodiment of the present invention provides a control device for master-slave switching communication, which is applied to a master-slave switching communication system. The master-slave switching communication system includes a first controller and a second controller, and the states of the first controller and the second controller are switched between the master and the slave, and the host sends data to the slave for data transmission; the control device includes: a communication module and a processing module; when the first controller is the master and the second controller is the slave, the processing module is used to control the state of the first controller to switch from the master to the slave after a first delay if it is determined that the data transmission is completed, so that the second controller can transmit data to the first controller; when the first controller is the slave and the second controller is the master, the communication module is used to receive a data query instruction sent by the second controller; the processing module is also used to control the state of the first controller to switch from the slave to the master if a data query instruction sent by the second controller is received, so that the first controller can transmit the data queried by the data query instruction to the second controller.

[0016] In a fourth aspect, an embodiment of the present invention provides a control device for master-slave switching communication, characterized in that it is applied to a master-slave switching communication system, the master-slave switching communication system including a first controller and a second controller, the states of the first controller and the second controller switching between the master and the slave, and the host sending data to the slave for data transmission; the control device includes: a communication module and a processing module; when the first controller is the master and the second controller is the slave, the processing module is used to record the duration of the second controller being the slave, and when the duration is greater than the second duration, control the state of the second controller to switch from the slave to the master, so that the second controller sends a data query instruction to the first controller; wherein the second duration is greater than the data transmission duration for the first controller to transmit data to the second controller; when the first controller is the slave and the second controller is the master, the communication module is used to send a data query instruction to the first controller; the processing module is also used to control the state of the second controller to switch from the master to the slave after a delay of a third duration, so that the first controller transmits data queried by the data query instruction to the second controller.

[0017] In the fifth aspect, an embodiment of the present invention provides a master-slave switching communication system, characterized in that the master-slave switching communication system includes a first controller and a second controller, the states of the first controller and the second controller are switched between the master and the slave, and the host sends data to the slave for data transmission; the first controller is used to execute the method described in the first aspect and any possible implementation method of the first aspect; the second controller is used to execute the method described in the second aspect and any possible implementation method of the second aspect.

[0018] In the sixth aspect, an embodiment of the present invention provides an electronic device, characterized in that the electronic device includes a memory and a processor, the memory stores a computer program, and the processor is used to call and run the computer program stored in the memory to perform the steps of the method described in the first aspect and any possible implementation method of the first aspect.

[0019] In the seventh aspect, an embodiment of the present invention provides another electronic device, characterized in that the electronic device includes a memory and a processor, the memory stores a computer program, and the processor is used to call and run the computer program stored in the memory to perform the steps of the method described in the second aspect and any possible implementation method of the second aspect.

[0020] In an eighth aspect, an embodiment of the present invention provides a computer-readable storage medium, wherein the computer-readable storage medium stores a computer program, and is characterized in that when the computer program is executed by a processor, it implements the steps of the method described in the above-mentioned first aspect and any possible implementation method of the first aspect, and the above-mentioned second aspect and any possible implementation method of the second aspect.

[0021] The technical effects brought about by any implementation method of the above-mentioned third to eighth aspects can be referred to the technical effects brought about by the first aspect, the second aspect and the corresponding implementation methods of the first and second aspects, and will not be repeated here. BRIEF DESCRIPTION OF THE DRAWINGS

[0022] In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the following briefly introduces the drawings required for use in the embodiments or the description of the prior art. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative work.

[0023] Figure 1 1 is a schematic structural diagram of a master-slave switching communication system provided by an embodiment of the present invention;

[0024] Figure 2 This is a flow chart of a method for controlling master-slave switching communication provided by an embodiment of the present invention;

[0025] Figure 3 This is a basic timing diagram of master-slave switching between a first controller and a second controller provided by an embodiment of the present invention;

[0026] Figure 4 1 is a flow chart of another method for controlling master-slave switching communication provided by an embodiment of the present invention;

[0027] Figure 5 1 is a flow chart of another method for controlling master-slave switching communication provided by an embodiment of the present invention;

[0028] Figure 6 1 is a flow chart of another method for controlling master-slave switching communication provided by an embodiment of the present invention;

[0029] Figure 7 1 is a schematic structural diagram of a control device for master-slave switching communication provided by an embodiment of the present invention;

[0030] Figure 8 It is a structural diagram of an electronic device provided by an embodiment of the present invention. DETAILED DESCRIPTION

[0031] In the following description, specific details such as particular system structures and techniques are provided for purposes of illustration, not limitation, to facilitate a thorough understanding of the embodiments of the present invention. However, it will be apparent to those skilled in the art that the present invention may be practiced in other embodiments without these specific details. In other cases, detailed descriptions of well-known systems, devices, circuits, and methods are omitted so as not to obscure the description of the present invention with unnecessary detail.

[0032] In the embodiments of this application, words such as "exemplary" or "for example" are used to indicate examples, illustrations, or descriptions. Any embodiment or design described as "exemplary" or "for example" in the embodiments of this application should not be construed as being preferred or advantageous over other embodiments or designs. Rather, the use of words such as "exemplary" or "for example" is intended to present the relevant concepts in a concrete manner to facilitate understanding.

[0033] As described in the background technology, when the data transmission volume between the DSP and the single-chip microcomputer is large, the fixed SPI master-slave mode communication efficiency is low, and the LCD liquid crystal single-chip microcomputer as a slave often has display hysteresis, resulting in a poor user experience.

[0034] In order to solve the above technical problems, an embodiment of the present invention provides a control method for master-slave switching communication, which is applied to a master-slave switching communication system. Figure 1 As shown, an embodiment of the present invention provides a schematic diagram of the structure of a master-slave switching communication system. The master-slave switching communication system includes a first controller and a second controller, the states of the first controller and the second controller are switched between the master and the slave, and the master sends data to the slave for data transmission.

[0035] In some embodiments, the first controller may be a DSP, and correspondingly, the second controller may be an STM8; or, the first controller may be an STM8, and correspondingly, the second controller may be a DSP. In the embodiments of the present invention, the technical solution of the present application is described by taking the first controller being a DSP and the second controller being an STM8 as an example.

[0036] In some embodiments, a data transmission pin of the first controller is connected to a data transmission pin of the second controller, and a status control pin of the first controller is connected to a status control pin of the second controller.

[0037] In some embodiments, the data transmission pin is used to transmit data. Figure 1As shown, the data transmission pins may include a master input slave output (MISO) pin and a master output slave input (MOSI) pin. For example, the first controller or the second controller may determine the data transmission direction according to the operating mode of the controller.

[0038] In some embodiments, the state control pin is used to determine the operating mode of the controller. Figure 1 As shown, the state control pin can be an STE (serial-to-ethernet) pin or an NSS (negative slave select) pin. A DSP can use the STE pin. An STM8 can use the NNS pin. The first controller or the second controller can determine the operating mode of the controller by changing the output level of the STE pin or the NSS pin.

[0039] In some embodiments, the first controller or the second controller may further include a clock signal pin, i.e., a CLK pin. The clock signal pin is used to output a clock signal. For example, the host may send a clock signal to the slave, and after the slave receives the clock signal, the host begins a data transmission process to the slave.

[0040] It should be noted that DSP and STM8 can communicate via SPI protocol. SPI communication between DSP and STM8 requires connecting data transmission pins, status control pins and clock signal pins. Figure 1 As shown in the figure, the DSP's MISO pin is connected to the STM8's MISO pin. The DSP's MOSI pin is connected to the STM8's MOSI pin. The DSP's CLK (clock) pin is connected to the STM8's CLK pin. The DSP's STE pin is connected to the STM8's NSS pin.

[0041] Figure 2 A flow chart of a method for controlling master-slave switching communication provided by an embodiment of the present invention includes steps S101-S102.

[0042] S101. When the first controller is a master and the second controller is a slave, if the first controller determines that data transmission is completed, then after a first delay, the state of the first controller is switched from master to slave, so that the second controller can send a data query instruction to the first controller.

[0043] S102. When the first controller is a slave and the second controller is a master, if the first controller receives a data query instruction sent by the second controller, the state of the first controller is controlled to switch from a slave to a master, so that the first controller transmits the data queried by the data query instruction to the second controller.

[0044] It should be noted that if Figure 3 As shown in Figure 1, an embodiment of the present invention provides a basic timing diagram for master-slave switching between a first controller and a second controller. Since the main function of the STM8 is to query data, receive data sent by the DSP, and display it, the SPI communication on the STM8 side is in slave mode most of the time, waiting to receive data from the host, which takes about 130ms. After the timing time is up, it switches to master mode, sends a data query command with a 5ms delay, and then immediately switches to slave mode.

[0045] In some embodiments, when the second controller is a slave, the second controller can record the duration of the second controller being a slave, and when the duration is greater than the second duration, control the state of the second controller to switch from a slave to a host, so that the second controller can send data query instructions to the first controller.

[0046] In some embodiments, when the second controller is the host, the second controller sends a data query instruction to the first controller, and after a third delay, controls the state of the second controller to switch from host to slave, so that the first controller can transmit the data queried by the data query instruction to the second controller.

[0047] It should be noted that if Figure 3 As shown in the figure, the main function of DSP is to send data to STM8. The premise of sending data is to receive the data query instruction sent by STM8. Therefore, DSP is in slave mode most of the time, waiting for STM8 to send query instructions.

[0048] In some embodiments, when the first controller is the host, the first controller sends data to the second controller. If the first controller determines that the data transmission is completed, after a first delay, the state of the first controller is controlled to switch from host to slave, so that the second controller can send a data query instruction to the first controller.

[0049] In some embodiments, when the first controller is a slave, if the first controller receives a data query instruction sent by the second controller, the first controller controls the state of the first controller to switch from a slave to a master, so that the first controller can transmit the data queried by the data query instruction to the second controller.

[0050] In some embodiments, the first duration is the delay duration of the first controller after the data transmission is completed. For example, the second duration can be 30ms or 40ms, which is not limited in this application.

[0051] In some embodiments, the second time duration is the time duration during which the second controller is in the slave state. For example, the second time duration may be 130ms or 140ms, which is not limited in this application.

[0052] In some embodiments, the third time duration is the delay time duration after the second controller sends the data query instruction. Exemplarily, the second time duration can be 5ms or 6ms, which is not limited in this application.

[0053] It should be noted that the second time period is greater than the data transmission time period for the first controller to transmit data to the second controller, so as to ensure normal data transmission from the first controller to the second controller.

[0054] In some embodiments, the data query instruction is used to query the data that the second controller requests the first controller to send.

[0055] Exemplarily, the data query instruction may include identification information of the data requested to be queried by the second controller. The data requested to be queried by the second controller may include information such as historical records, user logs, and setting items.

[0056] To align with other communication methods in the DSP and improve code readability, SPI communication in the display software and DSP software is also implemented using a state machine. The SPI communication state machine in the STM8 display software is used as an example. The SPI communication state machine can include five states: idle, transmit ready, transmit wait, receive ready, and receive. Table 1 shows the states and corresponding operations in the SPI communication state machine.

[0057] Table 1

[0058]

[0059] It should be noted that when the STM8 performs SPI communication, the requirements for the status control pins vary in different SPI operating modes. The control modes of the status control pins are divided into hardware mode and software mode.

[0060] For example, when STM8 is the host, in hardware mode, STM8 needs to set the status control pin to a high level during data transmission; in software mode, STM8 needs to use the SSI bit in the internal CSR register instead. At this time, the NSS pin is a normal IO pin and has nothing to do with SPI communication.

[0061] As another example, when STM8 is a slave, in hardware mode, STM8 needs to set the status control pin to a low level during data transmission; in software mode, STM8 needs to replace it with the SSM bit in the internal CR2 register, and the SSI bit in the CSR register needs to be cleared. At this time, the NSS pin is a normal IO pin and has nothing to do with SPI communication.

[0062] It should be noted that when the DSP performs SPI communication, the status control pin outputs a low level as a valid signal. Whether the DSP is operating in master mode or slave mode, the status control pin is required to output a low level during data transmission and a high level before and after data transmission.

[0063] For example, when the DSP is the host, the state control pin of the DSP is automatically set to a high level before data transmission, set to a low level during data transmission, and set to a high level after data transmission is completed.

[0064] As another example, when the DSP is a slave, the state control pin of the DSP is automatically set to a high level before data transmission, set to a low level during data transmission, and set to a high level after data transmission is completed.

[0065] Based on the above description, the embodiment of the present invention can output different chip select signals by controlling the state control pin to complete the master-slave switching communication between the first controller and the second controller.

[0066] Optionally, when the first controller is a host and the second controller is a slave, the first controller may output a first chip select signal to the second controller through a status control pin to instruct the second controller to receive data based on the first chip select signal.

[0067] The first chip select signal is at a low level during data transmission and at a high level before and after data transmission.

[0068] Optionally, when the second controller is the host and the first controller is the slave, the first controller receives a second chip select signal output by the second controller through the status control pin, and based on the second chip select signal, receives data sent by the second controller through the data transmission pin.

[0069] The second chip select signal is at a low level during data transmission, and at a high level before and after data transmission.

[0070] The present invention provides a control method for master-slave switching communication. When a first controller is a master and a second controller is a slave, if the first controller determines that data transmission is complete, then after a first delay, the state of the first controller is controlled to switch from master to slave, so that the second controller can send a data query instruction to the first controller; when the first controller is a slave and the second controller is a master, if the first controller receives a data query instruction sent by the second controller, the state of the first controller is controlled to switch from slave to master, so that the first controller can transmit data queried by the data query instruction to the second controller. By periodically switching the states of the first and second controllers between master and slave, the present invention allows the master to know the transmission progress of the slave data, ensures stability when the data transmission volume is large, and improves transmission efficiency during the data transmission process.

[0071] In some embodiments, when STM8 acts as a host, the data sent is a data query instruction. The data length of the data query instruction does not exceed 20 bytes. The data length is short and will not disrupt the timing of the state machine and the main program. Therefore, STM8 sends data to be executed in the state machine.

[0072] In some embodiments, when the DSP acts as the host, since the DSP's SPI has a four-level transmit FIFO, it can effectively increase the data transmission rate and reduce CPU occupancy. Therefore, data transmission can be executed in the state machine without disrupting the timing of the main program.

[0073] In some embodiments, when the STM8 is used as a slave, the data received is the data queried by the data query instruction. The data queried by the data query instruction includes historical records, user logs, settings, and other information, and the data volume is large. If data reception is executed in the state machine, the timing of the SPI communication state machine will be disrupted, and thus the timing of the system main loop and each task slice will be disrupted. Therefore, when the STM8 is used as a slave for SPI communication, it is more appropriate to use interrupts to receive data.

[0074] In some embodiments, when the DSP acts as a slave, due to different data types, the DSP needs to process the data query instruction sent by the STM8. The processing takes a long time, so it is more appropriate to use an interrupt method to receive data.

[0075] It should be noted that since the data sent by the STM8 is all in the uint8 type, while the data received and sent by the DSP is in the uint16 type, the STM8 sends data twice, while the DSP only needs to receive it once. The DSP needs to split the received data into two uint8 data and store them in the receive buffer.

[0076] In some embodiments, a first data length of data received by the first controller in a single transaction is greater than a second data length of data sent by the second controller in a single transaction.

[0077] Optional, such as Figure 4 As shown, the control method for master-slave switching communication provided in the embodiment of the present application also includes the following steps one to five.

[0078] When the first controller is a slave and the second controller is a master, for each transmission process.

[0079] Step 1: The first controller receives a first data packet sent by the second controller.

[0080] Step 2: The first controller stores the first N bits of data in the first data packet in the interrupt buffer.

[0081] Wherein, N is the second data length.

[0082] Step 3: The first controller verifies the data in the interrupt buffer area. If the verification is successful, the first controller copies the data in the interrupt buffer area to the main buffer area and clears the interrupt buffer area.

[0083] Step 4: The first controller stores the first N bits of the remaining data in the first data packet in the interrupt buffer.

[0084] Step 5: Repeat steps 3 and 4 until the first data packet is split and the transmission process of the first data packet is ended.

[0085] It is understandable that the first controller needs to verify the first data packet when receiving it. The DSP uses an interrupt reception method to open two receive buffers. The DSP first stores the first bit data in the first data packet in the interrupt buffer, verifies the data in the interrupt buffer, and if the verification is successful, copies the data in the interrupt buffer to the main buffer. This enables interrupt reception of the first controller, solves the problem of microcontroller timing confusion caused by the inconsistent length of single-shot data transmission and reception between the DSP and STM8, and realizes master-slave switching communication between the DSP and STM8, while improving the stability of data transmission in the master-slave switching communication system.

[0086] like Figure 5 As shown, the embodiment of the present invention provides another control method for master-slave switching communication. Figure 1 The master-slave switching communication system shown in FIG.

[0087] S201. When the first controller is a master and the second controller is a slave, the second controller records the duration of the second controller being a slave, and when the duration is greater than a second duration, controls the state of the second controller to switch from a slave to a master, so that the second controller can send a data query instruction to the first controller.

[0088] The second duration is greater than a data transmission duration for the first controller to transmit data to the second controller.

[0089] S202. When the first controller is a slave and the second controller is a master, the second controller sends a data query instruction to the first controller, and after a third delay, controls the state of the second controller to switch from a master to a slave, so that the first controller transmits the data queried by the data query instruction to the second controller.

[0090] It should be noted that when the second controller is a slave, in order to realize the data transmission process of the master-slave switching communication system, the second controller can be implemented in software mode or hardware mode.

[0091] Optionally, when the first controller is the host and the second controller is the slave, the second controller receives the first chip select signal output by the first controller through the status control pin, and based on the first chip select signal, receives the data sent by the first controller through the data transmission pin; the first chip select signal is low during the data transmission process and is high before and after the data transmission.

[0092] Optionally, when the first controller is a host and the second controller is a slave, the second controller sets the state control pin to a low level and receives data sent by the first controller through the data transmission pin.

[0093] Optionally, when the second controller is the host and the first controller is the slave, the second controller outputs a second chip select signal to the first controller through the status control pin to instruct the first controller to receive data based on the second chip select signal; the second chip select signal is low during data transmission and high before and after data transmission.

[0094] It's important to note that because the data sent by the DSP is in the uint16 format, and the STM8 can only receive and send data in the uint8 format, the STM8 needs to receive data twice to fully receive the data after the DSP sends it once. After receiving the data twice, the two received data must be combined into a single uint16 value and stored in the receive buffer.

[0095] In some embodiments, a first data length of data received by the first controller in a single transaction is greater than a second data length of data sent by the second controller in a single transaction.

[0096] Optional, such as Figure 6 As shown, the control method for master-slave switching communication provided in the embodiment of the present application also includes the following steps one to four.

[0097] When the first controller is the host and the second controller is the slave, for each transmission process.

[0098] Step 1: The second controller receives the second data packet sent by the first controller bit by bit and stores the data packet in the interrupt buffer.

[0099] Step 2: The second controller determines the number of data bits of the data stored in the interrupt buffer. If the number of data bits is greater than or equal to the second data length, step 3 is executed; if the number of data bits is less than the second data length, step 1 is executed.

[0100] Step 3: Verify the data stored in the interrupt buffer. If the verification is successful, copy the stored data to the main buffer and clear the interrupt buffer.

[0101] Step 4: Repeat steps 1, 2, and 3 until the second data packet is received, thereby ending the transmission process of the second data packet.

[0102] It is understandable that because the first data length of the data received by the first controller is longer than the second data length of the data sent by the second controller, the second controller needs to verify the first data packet when receiving the second data packet and use interrupt reception to allocate two receive buffers. During the data reception process, the second controller may receive data but before it has time to verify and parse it, it may be overwritten by newly received data.

[0103] To address this issue, the present invention establishes two receive buffers in the second controller during SPI communication: an interrupt buffer and a main buffer. Data received during the interrupt is stored in the interrupt buffer. A frame header and frame length check is then performed on the data received in the interrupt buffer within the interrupt function. If the check succeeds, the frame is cut into the main buffer; otherwise, the interrupt buffer is cleared. This enables interrupt reception by the second controller, resolving issues such as microcontroller timing confusion and data overwriting caused by inconsistent single-shot data transmission and reception lengths between the DSP and STM8. This also enables master-slave switching communication between the DSP and STM8, while improving the stability of data transmission within the master-slave switching communication system.

[0104] It should be understood that the size of the serial numbers of the steps in the above embodiments does not mean the order of execution. The execution order of each process should be determined by its function and internal logic, and should not constitute any limitation on the implementation process of the embodiments of the present invention.

[0105] The following are device embodiments of the present invention. For details not fully described therein, reference may be made to the corresponding method embodiments described above.

[0106] Figure 7 A schematic diagram of the structure of a control device for master-slave switching communication provided by an embodiment of the present invention is shown. This control device 300 is applied to a master-slave switching communication system. The master-slave switching communication system includes a first controller and a second controller. The states of the first and second controllers switch between master and slave, and the master sends data to the slave for data transmission. This control device 300 includes a communication module 301 and a processing module 302.

[0107] When the control device 300 is applied to the first controller, the communication module 301 and the communication module 302 perform the following operations.

[0108] When the first controller is the host and the second controller is the slave, the processing module 302 is used to control the state of the first controller to switch from the host to the slave after a first delay if it is determined that the data transmission is completed, so that the second controller can transmit data to the first controller; when the first controller is the slave and the second controller is the host, the communication module 301 is used to receive a data query instruction sent by the second controller; the processing module 302 is also used to control the state of the first controller to switch from the slave to the host if a data query instruction is received from the second controller, so that the first controller can transmit the data queried by the data query instruction to the second controller.

[0109] In one possible implementation, the data transmission pin of the first controller is connected to the data transmission pin of the second controller, and the status control pin of the first controller is connected to the status control pin of the second controller; when the first controller is the host and the second controller is the slave, the communication module 301 is also used to output a first chip select signal to the second controller through the status control pin to instruct the second controller to receive data based on the first chip select signal; the first chip select signal is low during the data transmission process, and is high before and after the data transmission; when the second controller is the host and the first controller is the slave, the communication module 301 is also used to receive the second chip select signal output by the second controller through the status control pin, and based on the second chip select signal, receive the data sent by the second controller through the data transmission pin; the second chip select signal is low during the data transmission process, and is high before and after the data transmission.

[0110] In one possible implementation, the first data length of the data received by the first controller in a single time is greater than the second data length of the data sent by the second controller in a single time; the processing module 302 is also used for each transmission process when the first controller is a slave and the second controller is a host; step one: the first controller receives the first data packet sent by the second controller; step two: the first controller stores the first N bits of data in the first data packet in the interrupt buffer, where N is the second data length; step three: the first controller verifies the data in the interrupt buffer, and if the verification is successful, copies the data in the interrupt buffer to the main buffer, and clears the interrupt buffer; step four: the first controller stores the first N bits of data of the remaining data in the first data packet in the interrupt buffer; step five: repeat steps three and four until the first data packet is split, and the transmission process of the first data packet ends.

[0111] When the control device 300 is applied to the second controller, the communication module 301 and the communication module 302 perform the following operations.

[0112] When the first controller is a host and the second controller is a slave, the processing module 302 is used to record the duration of the second controller being a slave, and when the duration is greater than a second duration, control the state of the second controller to switch from a slave to a host, so that the second controller can send a data query instruction to the first controller; wherein the second duration is greater than the data transmission duration for the first controller to transmit data to the second controller; when the first controller is a slave and the second controller is a host, the communication module 301 is used to send a data query instruction to the first controller; the processing module 302 is also used to control the state of the second controller to switch from a host to a slave after a delay of a third duration, so that the first controller can transmit the data queried by the data query instruction to the second controller.

[0113] In one possible implementation, the data transmission pin of the first controller is connected to the data transmission pin of the second controller, and the status control pin of the first controller is connected to the status control pin of the second controller; when the first controller is the host and the second controller is the slave, the communication module 301 is also used to receive the first chip select signal output by the first controller through the status control pin, and based on the first chip select signal, receive the data sent by the first controller through the data transmission pin; the first chip select signal is low during the data transmission process, and is high before and after the data transmission; when the second controller is the host and the first controller is the slave, the communication module 301 is also used to output the second chip select signal to the first controller through the status control pin to instruct the first controller to receive data based on the second chip select signal; the second chip select signal is low during the data transmission process, and is high before and after the data transmission.

[0114] In a possible implementation, when the first controller is a master and the second controller is a slave, the processing module 302 is further configured to set the status control pin to a low level and receive data sent by the first controller through the data transmission pin.

[0115] In one possible implementation, the first data length of the data received by the first controller in a single time is greater than the second data length of the data sent by the second controller in a single time; the processing module 302 is also used for each transmission process when the first controller is the host and the second controller is the slave; step one: the second controller receives the second data packet sent by the first controller bit by bit according to the data bit, and stores it in the interrupt buffer; step two: the second controller judges the number of data bits of the data stored in the interrupt buffer, if the number of data bits is greater than or equal to the second data length, execute step three; if the number of data bits is less than the second data length, execute step one; step three: verify the data stored in the interrupt buffer, if the verification is successful, copy the stored data to the main buffer, and clear the interrupt buffer; step four: repeat steps one, two and three until the second data packet is received, and end the transmission process of the second data packet.

[0116] Figure 8 Schematic diagram of the structure of an electronic device provided by an embodiment of the present invention. Figure 8 As shown, the electronic device 400 of this embodiment includes: a processor 401, a memory 402, and a computer program 403 stored in the memory 402 and executable on the processor 401. When the processor 401 executes the computer program 403, the steps in the above-mentioned method embodiments are implemented, for example Figure 2 Alternatively, when the processor 401 executes the computer program 403, the functions of the modules / units in the above-mentioned device embodiments are realized, for example, Figure 7 The functions of the communication module 301 and the processing module 302 are shown.

[0117] Exemplarily, the computer program 403 may be divided into one or more modules / units, which are stored in the memory 402 and executed by the processor 401 to implement the present invention. The one or more modules / units may be a series of computer program instruction segments capable of implementing specific functions, which are used to describe the execution process of the computer program 403 in the electronic device 400. For example, the computer program 403 may be divided into Figure 7 The communication module 301 and the processing module 302 are shown.

[0118] The processor 401 may be a central processing unit (CPU), or other general-purpose processors, digital signal processors (DSP), application-specific integrated circuits (ASIC), field-programmable gate arrays (FPGA), or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components, etc. A general-purpose processor may be a microprocessor or any conventional processor.

[0119] The memory 402 may be an internal storage unit of the electronic device 400, such as a hard disk or memory of the electronic device 400. The memory 402 may also be an external storage device of the electronic device 400, such as a plug-in hard disk, a smart media card (SMC), a secure digital (SD) card, a flash card, etc. equipped on the electronic device 400. Furthermore, the memory 402 may include both an internal storage unit of the electronic device 400 and an external storage device. The memory 402 is used to store the computer program and other programs and data required by the terminal. The memory 402 may also be used to temporarily store data that has been output or is about to be output.

[0120] Those skilled in the art can clearly understand that, for the convenience and brevity of description, only the division of the above-mentioned functional units and modules is used as an example for illustration. In actual applications, the above-mentioned functions can be distributed and completed by different functional units and modules as needed, that is, the internal structure of the device can be divided into different functional units or modules to complete all or part of the functions described above. The functional units and modules in the embodiment can be integrated into one processing unit, or each unit can exist physically alone, or two or more units can be integrated into one unit. The above-mentioned integrated unit can be implemented in the form of hardware or in the form of software functional units. In addition, the specific names of the functional units and modules are only for the convenience of distinguishing each other, and are not used to limit the scope of protection of this application. The specific working process of the units and modules in the above-mentioned system can refer to the corresponding process in the aforementioned method embodiment, and will not be repeated here.

[0121] In the above embodiments, the description of each embodiment has its own focus. For parts that are not described or recorded in detail in a certain embodiment, reference can be made to the relevant description of other embodiments.

[0122] Those skilled in the art will appreciate that the units and algorithm steps of each example described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, or a combination of computer software and electronic hardware. Whether these functions are performed in hardware or software depends on the specific application and design constraints of the technical solution. Professionals and technicians can use different methods to implement the described functions for each specific application, but such implementation should not be considered beyond the scope of the present invention.

[0123] In addition, the functional units in the various embodiments of the present invention may be integrated into a single processing unit, each unit may exist physically separately, or two or more units may be integrated into a single unit. The aforementioned integrated units may be implemented in the form of hardware or software functional units.

[0124] If the integrated module / unit is implemented in the form of a software functional unit and sold or used as an independent product, it can be stored in a computer-readable storage medium. Based on this understanding, the present invention implements all or part of the process in the above-mentioned embodiment method, and can also be completed by instructing the relevant hardware through a computer program. The computer program can be stored in a computer-readable storage medium, and the computer program can implement the steps of the above-mentioned various method embodiments when executed by the processor. Among them, the computer program includes computer program code, and the computer program code can be in source code form, object code form, executable file or some intermediate form. The computer-readable medium may include: any entity or device that can carry the computer program code, recording medium, U disk, mobile hard disk, magnetic disk, optical disk, computer memory, read-only memory (ROM), random access memory (RAM), electric carrier signal, telecommunication signal and software distribution medium, etc.

[0125] The embodiments described above are only used to illustrate the technical solutions of the present invention, rather than to limit the same. Although the present invention has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that they can still modify the technical solutions described in the aforementioned embodiments, or make equivalent replacements for some of the technical features therein. These modifications or replacements do not deviate the essence of the corresponding technical solutions from the spirit and scope of the technical solutions of the various embodiments of the present invention, and should all be included in the scope of protection of the present invention.

Claims

1. A method for controlling master-slave switching communication, characterized in that: Applicable to a master-slave switching communication system, the master-slave switching communication system includes a first controller and a second controller, the states of the first controller and the second controller are switched between a master and a slave, and the master sends data to the slave for data transmission; The first controller receives data in a single transaction for a first data length greater than the second controller sends data in a single transaction for a second data length. The control method includes: When the first controller is a master and the second controller is a slave, if the first controller determines that data transmission is completed, it controls the state of the first controller to switch from master to slave after a first delay, so that the second controller can send a data query instruction to the first controller; When the first controller is a slave and the second controller is a master, if the first controller receives a data query instruction sent by the second controller, the first controller controls the state of the first controller to switch from a slave to a master, so that the first controller transmits the data queried by the data query instruction to the second controller; When the first controller is a slave and the second controller is a host, for each transmission process; step 1: the first controller receives a first data packet sent by the second controller; step 2: the first controller stores the first N bits of data in the first data packet in an interrupt buffer, where N is the second data length; step 3: the first controller verifies the data in the interrupt buffer, and if the verification is successful, copies the data in the interrupt buffer to the main buffer, and clears the interrupt buffer; step 4: the first controller stores the first N bits of data of the remaining data in the first data packet in the interrupt buffer; step 5, repeat steps 3 and 4 until the first data packet is split, thereby ending the transmission process of the first data packet.

2. The method for controlling master-slave switching communication according to claim 1, wherein: The data transmission pin of the first controller is connected to the data transmission pin of the second controller, and the state control pin of the first controller is connected to the state control pin of the second controller; The control method further includes: When the first controller is a master and the second controller is a slave, the first controller outputs a first chip select signal to the second controller through a status control pin to instruct the second controller to receive data based on the first chip select signal; When the second controller is the host and the first controller is the slave, the first controller receives a second chip select signal output by the second controller through the status control pin, and receives data sent by the second controller through the data transmission pin based on the second chip select signal.

3. A method for controlling master-slave switching communication, characterized in that: Applicable to a master-slave switching communication system, the master-slave switching communication system includes a first controller and a second controller, the states of the first controller and the second controller are switched between a master and a slave, and the master sends data to the slave for data transmission; The first controller receives data in a single transaction for a first data length greater than the second controller sends data in a single transaction for a second data length. The control method includes: When the first controller is a master and the second controller is a slave, the second controller records the duration of the second controller being a slave, and when the duration is greater than a second duration, controls the second controller to switch from a slave to a master, so that the second controller can send a data query instruction to the first controller; wherein the second duration is greater than the data transmission duration of the first controller to the second controller; When the first controller is a slave and the second controller is a master, the second controller sends a data query instruction to the first controller, and after a third delay, controls the state of the second controller to switch from master to slave, so that the first controller transmits the data queried by the data query instruction to the second controller; The control method also includes: when the first controller is a host and the second controller is a slave, for each transmission process; step 1: the second controller receives the second data packet sent by the first controller bit by bit according to the data bit, and stores it in the interrupt buffer; step 2: the second controller judges the number of data bits of the data stored in the interrupt buffer, if the number of data bits is greater than or equal to the second data length, execute step 3; if the number of data bits is less than the second data length, execute step 1; step 3: verify the data stored in the interrupt buffer, if the verification is successful, copy the stored data to the main buffer, and clear the interrupt buffer; step 4: repeat steps 1, 2 and 3 until the second data packet is received, and end the transmission process of the second data packet.

4. The method for controlling master-slave switching communication according to claim 3, wherein: The data transmission pin of the first controller is connected to the data transmission pin of the second controller, and the state control pin of the first controller is connected to the state control pin of the second controller; The control method further includes: When the first controller is a master and the second controller is a slave, the second controller receives a first chip select signal output by the first controller through the status control pin, and receives data sent by the first controller through the data transmission pin based on the first chip select signal; When the second controller is a host and the first controller is a slave, the second controller outputs a second chip select signal to the first controller through the status control pin to instruct the first controller to receive data based on the second chip select signal.

5. The method for controlling master-slave switching communication according to claim 3, wherein: The control method further includes: When the first controller is a host and the second controller is a slave, the second controller sets the state control pin to a low level and receives data sent by the first controller through the data transmission pin.

6. A control device for master-slave switching communication, characterized in that: Applicable to a master-slave switching communication system, the master-slave switching communication system includes a first controller and a second controller, the states of the first controller and the second controller are switched between a master and a slave, and the master sends data to the slave for data transmission; A first data length of data received by the first controller in a single transaction is greater than a second data length of data sent by the second controller in a single transaction; The control device includes: a communication module and a processing module; When the first controller is a master and the second controller is a slave, the processing module is configured to, if it is determined that the data transmission is completed, control the state of the first controller to switch from a master to a slave after a first delay, so that the second controller can transmit data to the first controller; When the first controller is a slave and the second controller is a master, the communication module is used to receive a data query instruction sent by the second controller; the processing module is further used to control the state of the first controller to switch from a slave to a master upon receiving the data query instruction sent by the second controller, so that the first controller can transmit the data queried by the data query instruction to the second controller; When the first controller is a slave and the second controller is a host, for each transmission process; step 1: the first controller receives a first data packet sent by the second controller; step 2: the first controller stores the first N bits of data in the first data packet in an interrupt buffer, where N is the second data length; step 3: the first controller verifies the data in the interrupt buffer, and if the verification is successful, copies the data in the interrupt buffer to the main buffer, and clears the interrupt buffer; step 4: the first controller stores the first N bits of data of the remaining data in the first data packet in the interrupt buffer; step 5, repeat steps 3 and 4 until the first data packet is split, thereby ending the transmission process of the first data packet.

7. A control device for master-slave switching communication, characterized in that: Applicable to a master-slave switching communication system, the master-slave switching communication system includes a first controller and a second controller, the states of the first controller and the second controller are switched between a master and a slave, and the master sends data to the slave for data transmission; A first data length of data received by the first controller in a single transaction is greater than a second data length of data sent by the second controller in a single transaction; The control device includes: a communication module and a processing module; When the first controller is a master and the second controller is a slave, the processing module is configured to record a duration during which the second controller is a slave, and when the duration is greater than a second duration, control the second controller to switch from a slave to a master, so that the second controller can send a data query instruction to the first controller; wherein the second duration is greater than a data transmission duration for data transmission from the first controller to the second controller; When the first controller is a slave and the second controller is a master, the communication module is used to send a data query instruction to the first controller; the processing module is further used to control the state of the second controller to switch from a master to a slave after a third delay, so that the first controller transmits the data queried by the data query instruction to the second controller; When the first controller is the host and the second controller is the slave, for each transmission process; step 1: the second controller receives the second data packet sent by the first controller bit by bit according to the data bit, and stores it in the interrupt buffer; step 2: the second controller judges the number of data bits of the data stored in the interrupt buffer, if the number of data bits is greater than or equal to the second data length, execute step 3; if the number of data bits is less than the second data length, execute step 1; step 3: verify the data stored in the interrupt buffer, if the verification is successful, copy the stored data to the main buffer, and clear the interrupt buffer; step 4: repeat steps 1, 2 and 3 until the second data packet is received, and end the transmission process of the second data packet.

8. A master-slave switching communication system, characterized in that: The master-slave switching communication system includes a first controller and a second controller, the states of the first controller and the second controller are switched between the master and the slave, and the master sends data to the slave for data transmission; The first controller is used to execute the method described in claim 1 or 2 above; the second controller is used to execute the method described in any one of claims 3 to 5 above.

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