A method for generating an impedance test file

Abstract

The application discloses a kind of impedance test file generation methods, comprising the following steps: S1: Genesis software retrieves ERP file and TGZ file from database;The impedance information of PCB board is contained in the ERP file, and the layer information of PCB board is contained in the TGZ file;S2: Genesis software identifies ground point according to TGZ file;S3: Genesis software identifies single-ended impedance line and differential impedance line according to ERP file, and calculates its length;S4: the coordinates of the single-ended impedance line and the end point coordinate of ground point in the preset range are positioned, and the two end point coordinates of differential impedance line in the preset range are positioned;Single-ended impedance line, differential impedance line and corresponding coordinates are formed CSV file output;S5: CSV file is decoded as DIF file and is output.The impedance test file generation method provided by the application can automatically output ground point and impedance line, and can output all data at a time, to ensure that impedance test file can be quickly and effectively generated.

Description

Technical Field

[0001] This invention relates to the field of impedance test files, and more particularly to a method for generating impedance test files. Background Technology

[0002] Currently, PCB impedance testing methods are broadly divided into manual and automatic testing. Manual testing is extremely inefficient and can no longer meet the ever-increasing production needs, making automatic testing the inevitable trend. However, before performing automatic impedance testing, a corresponding impedance test file must be created. This involves outputting the customer's impedance requirements and related information into a file with a fixed format. The automatic impedance testing equipment then determines whether the corresponding resistance value meets the customer's requirements based on the test file. Therefore, the creation of impedance test files is particularly important in automatic testing. The most primitive method involves entirely manual operation, which is inefficient and lacks accuracy.

[0003] The creation of the initial impedance test files requires the combined output of various PCB design software (IGI, TDR Surpport, TPG, ERP, Genesis, etc.). Due to the large number of software programs used and the fact that all of them require manual operation, the steps are tedious and lengthy, making it difficult to learn and requiring a long training period. Furthermore, as PCB integration becomes increasingly dense and the PCB design becomes more sophisticated, the number of impedance groups that need to be controlled also increases. In such cases, manual operation is prone to omissions, errors, or incorrect selections. Summary of the Invention

[0004] This invention aims to at least partially solve one of the problems in related technologies. Therefore, the object of this invention is to provide a method for generating impedance test files, which can automatically output grounding points and impedance lines, and can output all data at once, ensuring that impedance test files can be generated quickly and effectively.

[0005] To achieve the above objectives, this application adopts the following technical solution: a method for generating impedance test files, comprising the following steps:

[0006] S1: Genesis software retrieves ERP and TGZ files from the database; the ERP file contains impedance information of the PCB board, and the TGZ file contains layer information of the PCB board.

[0007] S2: Genesis software identifies the grounding point based on the TGZ file;

[0008] S3: Genesis software identifies single-ended impedance lines and differential impedance lines based on the ERP file and calculates their lengths;

[0009] S4: Locate the grounding point and endpoint coordinates of a single-ended impedance line with a length within a preset range, as well as the coordinates of the two endpoints of a differential impedance line with a length within a preset range; output the single-ended impedance line, the differential impedance line, and their corresponding coordinates as a CSV file.

[0010] S5: Decode the CSV file into a DIF file for output.

[0011] Furthermore, the impedance information includes the layer to which the impedance line belongs, the designed linewidth of the impedance line, the designed line spacing of the impedance line, the reference layer, the impedance value, and the impedance tolerance.

[0012] Furthermore, in step S3, if the designed line spacing of the impedance line is greater than 0, then the impedance line is a differential impedance; if the impedance line has no designed line spacing information, then the impedance line is a single-ended impedance.

[0013] Furthermore, the Genesis software outputs an EMM file based on the ERP file and TGZ file. When the PCB board is a panel board, the EMM file includes a PNL file and a SET file. The PNL file contains panelization instructions, and the SET file includes panelization information and a PCS file corresponding to each panel. The PCS file includes the location, size, and layer of the pads on the PCB board.

[0014] Furthermore, when the PCB board is a non-paneled board, the EMM file includes a PNL file and a PCS file. The PNL file contains panelization instructions, and the PCS file includes the location, size, and layer of the pads on the PCB board.

[0015] Furthermore, the Genesis software selects alignment sites based on the PNL file, and integrates and decodes the EMM and CSV files into a PCB file based on the alignment sites before outputting it.

[0016] Furthermore, the preset range in step S4 is greater than 2 inches.

[0017] Furthermore, step S4 includes:

[0018] S41: For single-ended impedance lines, Genesis software automatically finds the grounding wire within 4mm of the endpoint of the single-ended impedance line, and prioritizes outputting the grounding point and endpoint coordinates of single-ended impedance lines with a length greater than 6 inches; then outputs the grounding point and endpoint coordinates of single-ended impedance lines with a length greater than 2 inches and less than 6 inches.

[0019] S42: For differential impedance lines, Genesis software prioritizes outputting the coordinates of the two endpoints of differential impedance lines with a length greater than 6 inches; then it outputs the coordinates of the two endpoints of single-ended impedance lines with a length greater than 2 inches but less than 6 inches.

[0020] An electronic device, comprising:

[0021] Processor; and

[0022] A memory that stores executable code, which, when executed by the processor, causes the processor to perform the method described above.

[0023] A non-transitory machine-readable storage medium having executable code stored thereon, which, when executed by a processor of an electronic device, causes the processor to perform the method described above.

[0024] Compared with the prior art, the above-mentioned technical solution provided in this application has the following advantages: With the help of Genesis software, this application only needs to input impedance information and layer information to automatically identify the grounding point, single-ended impedance line and differential impedance line, as well as the coordinates of the impedance line within the preset range. It can also decode them into PCB files and DIF files required for subsequent testing, ensuring the efficiency and accuracy of impedance test file organization and providing convenience for subsequent impedance testing. Attached Figure Description

[0025] The accompanying drawings, which are incorporated in and form part of this specification, illustrate embodiments consistent with the invention and, together with the description, serve to explain the principles of the invention.

[0026] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, for those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0027] In the attached image:

[0028] Figure 1 This is a flowchart illustrating the method for generating impedance test files in this application;

[0029] Figure 2 This is a schematic diagram of file input and output in Example 1; Detailed Implementation

[0030] To provide a clearer understanding of the technical features, objectives, and effects of this invention, specific embodiments are now described in detail with reference to the accompanying drawings. In the following description, it should be understood that the orientations or positional relationships indicated by terms such as "front," "rear," "upper," "lower," "left," "right," "longitudinal," "horizontal," "vertical," "horizontal," "top," "bottom," "inner," "outer," "head," and "tail" are based on the orientations or positional relationships shown in the accompanying drawings, and are constructed and operated in a specific orientation. They are only for the convenience of describing this technical solution and do not indicate that the referred mechanism or element must have a specific orientation; therefore, they should not be construed as limitations on this invention.

[0031] It should also be noted that, unless otherwise explicitly specified and limited, terms such as "installation," "connection," "linking," "fixing," and "setting" should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral part; they can refer to a mechanical connection or an electrical connection; they can refer to a direct connection or an indirect connection through an intermediate medium; they can refer to the internal communication of two components or the interaction between two components. When an component is referred to as being "on" or "below" another component, the component can be located "directly" or "indirectly" on the other component, or there may be one or more intermediary components. The terms "first," "second," "third," etc., are only for the convenience of describing this technical solution and should not be construed as indicating or implying relative importance or implicitly specifying the number of indicated technical features. Therefore, features defined with "first," "second," "third," etc., may explicitly or implicitly include one or more of that feature. For those skilled in the art, the specific meaning of the above terms in this invention can be understood according to the specific circumstances.

[0032] In the following description, specific details such as particular system structures and techniques are set forth for illustrative purposes and not for limitation, in order to provide a thorough understanding of the embodiments of the invention. However, those skilled in the art will understand that the invention can be implemented in other embodiments without these specific details. In other instances, detailed descriptions of well-known systems, mechanisms, circuits, and methods are omitted so as not to obscure the description of the invention with unnecessary detail.

[0033] Please see the appendix Figure 1-2 This application provides a method for generating impedance test files, comprising the following steps:

[0034] S1: Genesis software retrieves ERP and TGZ files from the database; the ERP file contains impedance information of the PCB board, and the TGZ file contains layer information of the PCB board.

[0035] In this application, the impedance test file serves as the input file for subsequent impedance testing. The purpose of this application is to quickly generate files for subsequent impedance testing. Before preparing the impedance test file, some information corresponding to the PCB board needs to be entered into a database. Then, Genesis software is used to retrieve the information corresponding to the PCB board from the database and generate the impedance test file.

[0036] The information pre-entered into the database includes ERP and TGZ files. The ERP file contains the impedance information of the PCB board, including the layer to which the impedance lines belong, the designed trace width, the designed trace spacing, the reference layer, the impedance value, and the impedance tolerance. This impedance information must be written in a standardized manner, especially the designed trace width, designed trace spacing, and the layer to which they belong must correspond exactly to the information in the TGZ file.

[0037] Since impedance lines are closely related to design line width and design line spacing, this application also requires that when designing PCB boards, the line spacing of non-control lines with the same line width should not meet the line spacing of control lines; otherwise, impedance lines cannot be correctly identified. Control lines refer to impedance lines, while non-control lines refer to lines other than impedance lines.

[0038] S2: Genesis software identifies the grounding point of a single-ended line based on the TGZ file. In a PCB board, the grounding point is determined by the shielding relationship of the reference layer; that is, the grounding point is connected to the reference layer, while the impedance test point is disconnected from the reference layer. Through this design, Genesis software can identify the grounding point on the PCB board.

[0039] S3: Genesis software identifies single-ended impedance lines and differential impedance lines based on the ERP file and calculates their lengths; specifically, the design line spacing information in the ERP can be used to make the determination.

[0040] S4: Locate the grounding point and endpoint coordinates of single-ended impedance lines with lengths within a preset range, as well as the coordinates of the two endpoints of differential impedance lines with lengths within a preset range; output the single-ended impedance lines, differential impedance lines, and their corresponding coordinates as a CSV file; the CSV file is a collection of all impedance line information in the PCB board.

[0041] S5: Decode the CSV file into a DIF file for output. The DIF file is the file format that needs to be used in the subsequent impedance testing process.

[0042] This application utilizes Genesis software, which only requires inputting impedance information and layer information to automatically identify grounding points, single-ended impedance lines, and differential impedance lines, as well as the coordinates of impedance lines within a preset range. It can also decode these into PCB files and DIF files required for subsequent testing, ensuring the efficiency and accuracy of impedance test file organization and providing convenience for subsequent impedance testing.

[0043] Example 1

[0044] Please continue to refer to the appendix. Figure 1-2 A method for generating impedance test files includes the following steps:

[0045] S1: Genesis software retrieves ERP and TGZ files from the database; the ERP file contains impedance information of the PCB board, and the TGZ file contains layer information of the PCB board.

[0046] Before preparing the impedance test file, some information corresponding to the PCB board needs to be entered into the database. Then, Genesis software is used to retrieve the information corresponding to the PCB board from the database and generate the impedance test file.

[0047] The information pre-entered into the database includes ERP and TGZ files. The ERP file contains the impedance information of the PCB board, including the layer to which the impedance lines belong, the designed trace width, the designed trace spacing, the reference layer, the impedance value, and the impedance tolerance. This impedance information must be written in a standardized manner, especially the designed trace width, designed trace spacing, and the layer to which they belong must correspond exactly to the information in the TGZ file.

[0048] Before proceeding to step S2, the Genesis software outputs an EMM file based on the ERP and TGZ files. The EMM file contains information such as the network, number, coordinates, dimensions, and solder mask of the measurement points on both sides of the PCB board.

[0049] When the PCB board is a panelized board, the EMM file includes a PNL file and a SET file. The PNL file contains panelization instructions, and the SET file contains panelization information and a PCS file corresponding to each panel. The PCS file includes the location, size, and layer of the pads on the PCB board. Since this PCB board is a panelized board, the PNL file contains the panelization instructions.

[0050] When the PCB board is not a panelized board, the EMM file includes a PNL file and a PCS file. The PNL file contains panelization instructions, and the PCS file includes the location, size, and layer of the pads on the PCB board. Since the PCB board is not a panelized board, the PNL file can be empty or contain non-panelized identification information.

[0051] In this application, the EMM file is output in IPC356A format and is obtained by converting the TGZ file. Impedance information is not required here. The conversion process is as follows: the Genesis software imports the TGZ file; useless information in the PNL file is processed; the file is rotated 90 degrees and treated as an IPC zero point; the solder mask layer in the working draft is processed; and the solder mask pads are output in IPC356A format.

[0052] S2: Genesis software identifies the grounding point of a single-ended line based on the TGZ file. In a PCB board, the grounding point is determined by the shielding relationship of the reference layer; that is, the grounding point is connected to the reference layer, while the impedance test point is disconnected from the reference layer. Through this design, Genesis software can identify the grounding point on the PCB board.

[0053] S3: Genesis software identifies single-ended impedance lines and differential impedance lines based on the ERP file and calculates their lengths.

[0054] If the design spacing of the impedance line is greater than 0, then the impedance line is a differential impedance; if there is no design spacing information for the impedance line, then the impedance line is a single-ended impedance.

[0055] S4: Locate the grounding point and endpoint coordinates of a single-ended impedance line with a length within a preset range, as well as the coordinates of the two endpoints of a differential impedance line with a length within a preset range; output the single-ended impedance line, the differential impedance line, and their corresponding coordinates as a CSV file.

[0056] As a specific embodiment, the preset range can be set to be greater than 2 inches; this step specifically includes:

[0057] S41: For single-ended impedance lines, Genesis software automatically finds the grounding wire within 4mm of the endpoint of the single-ended impedance line, and prioritizes outputting the grounding point and endpoint coordinates of single-ended impedance lines with a length greater than 6 inches; then outputs the grounding point and endpoint coordinates of single-ended impedance lines with a length greater than 2 inches and less than 6 inches; if the length of the single-ended impedance line is not within the above preset range, this step is skipped.

[0058] S42: For differential impedance lines, Genesis software prioritizes outputting the coordinates of the two endpoints of differential impedance lines longer than 6 inches; then it outputs the coordinates of the two endpoints of single-ended impedance lines longer than 2 inches but less than 6 inches. If the length of the differential impedance line is not within the above preset range, this step is skipped. This process continues until all impedance lines and their corresponding coordinates are output, forming a CVS file.

[0059] S5: Genesis software selects alignment sites based on the PNL file. When selecting alignment sites, the top layer follows the rule of upper right and lower left, and the bottom layer follows the rule of upper left and lower right.

[0060] Genesis software integrates and decodes the EMM and CSV files into a PCB file based on the alignment points, and then outputs it. Simultaneously, it decodes the CSV file into a DIF file and outputs it. The PCB file and DIF file are the files used in subsequent impedance testing. Board thickness information can be automatically obtained from the DIF file.

[0061] As attached Figure 2 As shown, the Genesis software of this application can automatically output EMM files, CVS files, PCB files and DIF files based on the ERP files and TGZ files pre-stored in the database. It can realize the automatic generation and conversion of impedance test files, directly forming the files required for impedance testing, instead of requiring multiple software programs as in the prior art, and only one type of file can be output each time, which significantly improves the efficiency of impedance test file production.

[0062] This application also provides an electronic device, which includes a memory and a processor.

[0063] The processor can be a Central Processing Unit (CPU), or other general-purpose processors, digital signal processors (DSPs), application-specific integrated circuits (ASICs), field-programmable gate arrays (FPGAs), or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components, etc. A general-purpose processor can be a microprocessor or any conventional processor.

[0064] The memory stores executable code, which, when processed by the processor, can cause the processor to execute some or all of the methods described above.

[0065] This application can also be implemented as a non-transitory machine-readable storage medium (or computer-readable storage medium, or machine-readable storage medium) storing executable code (or computer program, or computer instruction code) thereon, which, when executed by a processor of an electronic device (or electronic device, server, etc.), causes the processor to perform part or all of the steps of the above-described method according to this application.

[0066] It is understood that the above embodiments only illustrate preferred embodiments of the present invention, and their descriptions are relatively specific and detailed, but they should not be construed as limiting the scope of the present invention. It should be noted that those skilled in the art can freely combine the above technical features without departing from the concept of the present invention, and can also make several modifications and improvements, all of which fall within the protection scope of the present invention. Therefore, all equivalent transformations and modifications made with respect to the scope of the claims of the present invention should fall within the scope of the claims of the present invention.

Claims

1. A method for generating impedance test files, characterized in that, Includes the following steps: S1: Genesis software retrieves ERP and TGZ files from the database; the ERP file contains impedance information of the PCB board, and the TGZ file contains layer information of the PCB board; Genesis software outputs EMM files based on the ERP and TGZ files. When the PCB board is a panel board, the EMM file includes a PNL file and a SET file. The PNL file contains panelization instructions, and the SET file includes panelization information and a PCS file corresponding to each panel. The PCS file includes the location, size, and layer of the pads on the PCB board. When the PCB board is a non-paneled board, the EMM file includes a PNL file and a PCS file. The PNL file contains panelization instructions, and the PCS file includes the location, size, and layer of the pads on the PCB board. S2: Genesis software identifies the grounding point based on the TGZ file; S3: Genesis software identifies single-ended impedance lines and differential impedance lines based on the ERP file and calculates their lengths; S4: Locate the grounding point and endpoint coordinates of a single-ended impedance line with a length within a preset range, as well as the coordinates of the two endpoints of a differential impedance line with a length within a preset range; output the single-ended impedance line, the differential impedance line, and their corresponding coordinates as a CSV file. S5: Decode the CSV file into a DIF file for output; Genesis software selects alignment points based on the PNL file, and integrates the EMM file and CSV file into a PCB file based on the alignment points for output.

2. The method for generating an impedance test file according to claim 1, characterized in that, The impedance information includes the layer to which the impedance line belongs, the design linewidth of the impedance line, the design line spacing of the impedance line, the reference layer, the impedance value, and the impedance tolerance.

3. The method for generating an impedance test file according to claim 2, characterized in that, In step S3, if the designed line spacing of the impedance line is greater than 0, then the impedance line is a differential impedance; if the impedance line has no designed line spacing information, then the impedance line is a single-ended impedance.

4. The method for generating an impedance test file according to claim 1, characterized in that, The preset range in step S4 is greater than 2 inches.

5. The method for generating an impedance test file according to claim 4, characterized in that, Step S4 includes: S41: For single-ended impedance lines, Genesis software automatically finds the grounding wire within 4mm of the endpoint of the single-ended impedance line, and prioritizes outputting the grounding point and endpoint coordinates of single-ended impedance lines with a length greater than 6 inches; then outputs the grounding point and endpoint coordinates of single-ended impedance lines with a length greater than 2 inches and less than 6 inches. S42: For differential impedance lines, Genesis software prioritizes outputting the coordinates of the two endpoints of differential impedance lines with a length greater than 6 inches; then it outputs the coordinates of the two endpoints of single-ended impedance lines with a length greater than 2 inches but less than 6 inches.

6. An electronic device, characterized in that, include: processor; as well as A memory having executable code stored thereon, which, when executed by the processor, causes the processor to perform the method as described in any one of claims 1-5.

7. A non-transitory machine-readable storage medium having executable code stored thereon, which, when executed by a processor of an electronic device, causes the processor to perform the method as described in any one of claims 1-5.

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