Chip package structure with heat dissipation cover plate and manufacturing method thereof

Abstract

The application provides a chip packaging structure with a heat dissipation cover plate and a manufacturing method thereof. The packaging structure comprises: a substrate with opposite first and second surfaces; at least one chip disposed on the first surface of the substrate and electrically connected to the substrate; and a heat dissipation cover plate combined with the first surface of the substrate to form a cavity for accommodating the chip, wherein the heat dissipation cover plate is connected to the chip through at least one fixing connector, the region among the heat dissipation cover plate, the chip and the fixing connector is filled with a thermal interface material, and the connection strength between the fixing connector and the chip and the heat dissipation cover plate is greater than the connection strength between the thermal interface material and the chip and the heat dissipation cover plate. The connection strength between the chip and the heat dissipation cover plate is strengthened, the warping deformation between the chip and the heat dissipation cover plate is reduced, the fixing connector serves as a stress concentration area and has higher structural strength, can bear more deformation force, and thus the risk of delamination of the thermal interface material is reduced.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of electronic packaging, in particular to a chip packaging structure with a heat dissipation cover plate and a manufacturing method thereof. BACKGROUND

[0002] The heat dissipation cover plate in the packaging structure mainly serves to protect the chip and conduct heat. The chip and the heat dissipation cover plate are connected through a thermal interface material, and the thermal conductivity of the thermal interface material is determined by the material properties and coverage rate thereof. Generally, the higher the thermal conductivity of the thermal interface material and the better the coverage rate, the better the heat dissipation performance of the packaging structure.

[0003] However, in the process and reliability experiment of the packaging structure, due to the difference in the thermal expansion coefficient between the chip and the heat dissipation cover plate, the warping degrees of the chip and the heat dissipation cover plate are different, which may cause the chip, the thermal interface material and the heat dissipation cover plate to be separated and layered, thereby causing the chip packaging structure to fail. SUMMARY

[0004] The present application provides a chip packaging structure with a heat dissipation cover plate and a manufacturing method thereof.

[0005] The present application provides a chip packaging structure with a heat dissipation cover plate, comprising:

[0006] a substrate having opposite first and second surfaces;

[0007] at least one chip disposed on the first surface of the substrate and electrically connected to the substrate;

[0008] a heat dissipation cover plate combined with the first surface of the substrate and surrounding the substrate to form a cavity in which the chip is accommodated, the heat dissipation cover plate and the chip being connected through at least one fixed connecting member, the heat dissipation cover plate, the chip and the fixed connecting member being filled with a thermal interface material, and the connection strength between the fixed connecting member and the chip and the heat dissipation cover plate being greater than the connection strength between the thermal interface material and the chip and the heat dissipation cover plate.

[0009] As a further improvement of the present application, the heat dissipation cover plate and the chip are connected through a plurality of fixed connecting members, and the fixed connecting members are distributed at least at the edges of the non-functional surface of the chip.

[0010] As a further improvement of the present application, the fixing connectors comprise at least first fixing connectors and second fixing connectors, the connection strength between the first fixing connectors and the chip and the heat dissipation cover plate respectively is greater than the connection strength between the second fixing connectors and the chip and the heat dissipation cover plate respectively, the first fixing connectors are arranged at the four corners and / or the four edges of the non-functional surface of the chip, and the second fixing connectors are arranged in the region between the first fixing connectors on the opposite sides.

[0011] As a further improvement of the present application, the fixing connection area between the first fixing connectors and the chip and the heat dissipation cover plate respectively is greater than the fixing connection area between the second fixing connectors and the chip and the heat dissipation cover plate respectively.

[0012] As a further improvement of the present application, the fixing connectors are bonding metal blocks arranged between the chip and the heat dissipation cover plate.

[0013] As a further improvement of the present application, the chip has a functional surface facing the first surface of the substrate and a non-functional surface opposite to the functional surface, and the non-functional surface of the chip is provided with at least one chip-side metal block.

[0014] As a further improvement of the present application, the heat dissipation cover plate comprises a top cover plate and side cover plates extending downward along the edges of the top cover plate, the top cover plate is combined above the non-functional surface of the chip, the end of the side cover plate is connected to the first surface of the substrate, the inner surface of the top cover plate is provided with at least one cover plate-side metal block, the position and number of the cover plate-side metal block correspond to the chip-side metal block, and the cover plate-side metal block and the chip-side metal block are bonded to form the bonding metal block.

[0015] As a further improvement of the present application, the heat dissipation cover plate is a metal heat dissipation cover plate.

[0016] As a further improvement of the present application, the functional surface of the chip is provided with solder balls, the solder balls are electrically connected to the solder pads on the first surface of the substrate, and the bottom filler is filled between the chip and the substrate.

[0017] The present application also provides a manufacturing method of a chip packaging structure with a heat dissipation cover plate, comprising the following steps:

[0018] providing a chip, arranging at least one chip-side metal block on the non-functional surface of the chip;

[0019] providing a heat dissipation cover plate, arranging at least one cover plate-side metal block on the inner surface of the top cover plate of the heat dissipation cover plate;

[0020] providing a substrate, arranging the functional surface of the chip to face the first surface of the substrate, and electrically connecting the two.

[0021] Coating a thermal interface material on the inner surface of the top cover plate of the heat dissipation cover plate;

[0022] Combining the heat dissipation cover plate on the substrate, and fusion bonding the cover plate side metal block and the chip side metal block.

[0023] As a further improvement of the present application, the at least one chip side metal block arranged on the non-functional surface of the chip specifically comprises:

[0024] The at least one chip side metal block arranged on the non-functional surface of the chip is arranged at least at the edge of the non-functional surface of the chip.

[0025] As a further improvement of the present application, the at least one chip side metal block arranged on the non-functional surface of the chip further comprises:

[0026] The first chip side metal block is arranged at the four corners and / or the four edges of the non-functional surface of the chip, and the second chip side metal block is arranged in the area between the first chip side metal blocks on the opposite sides, wherein the area of the fixed connection between the first chip side metal block and the chip is larger than the area of the fixed connection between the second chip side metal block and the chip.

[0027] As a further improvement of the present application, the at least one cover plate side metal block arranged on the inner surface of the top cover plate of the heat dissipation cover plate specifically comprises:

[0028] The same number of cover plate side metal blocks as the chip side metal blocks are arranged on the inner surface of the top cover plate of the heat dissipation cover plate at positions corresponding to the chip side metal blocks.

[0029] The present application has the following beneficial effects: the present application can strengthen the connection strength between the chip and the heat dissipation cover plate by arranging a fixed connection component with higher connection strength than the thermal interface material between the heat dissipation cover plate and the chip, thereby reducing the warping deformation between the chip and the heat dissipation cover plate, and the fixed connection component as a stress concentration area has higher structural strength and can withstand more deformation force, thereby reducing the risk of delamination of the thermal interface material and improving the reliability of the chip packaging structure. In addition, since the fixed connection component strengthens the connection strength between the chip and the heat dissipation cover plate, a heat dissipation adhesive material with high thermal conductivity can be used, thereby further improving the heat conduction efficiency between the chip and the heat dissipation cover plate. BRIEF DESCRIPTION OF DRAWINGS

[0030] Figure 1 is a schematic diagram of a packaging structure with a heat dissipation cover plate in an embodiment of the present application.

[0031] Figure 2is a flow chart of a method for manufacturing a packaging structure with a heat dissipation cover plate according to an embodiment of the present application.

[0032] Figures 3 to 7 is a flow chart of a method for manufacturing a packaging structure with a heat dissipation cover plate according to an embodiment of the present application. DETAILED DESCRIPTION

[0033] For the purpose of making the object, technical solutions and advantages of the present application clearer, the technical solutions of the present application will be described clearly and completely below in combination with the specific embodiments of the present application and corresponding drawings. Obviously, the described embodiments are only some of the embodiments of the present application, but not all the embodiments of the present application. Based on the embodiments in the present application, all other embodiments obtained by those skilled in the art without creative work fall within the scope of protection of the present application.

[0034] The embodiments of the present application will be described in detail below, and examples of the embodiments are shown in the drawings, in which the same or similar notations represent the same or similar elements or elements having the same or similar functions throughout. The embodiments described below by referring to the drawings are exemplary and are only used to explain the present application, and cannot be understood as limiting the present application.

[0035] For the convenience of description, the terms representing spatial relative positions are used for description, such as “upper”, “lower”, “rear”, “front”, etc., to describe the relationship of one unit or feature relative to another unit or feature shown in the drawings. The terms of spatial relative positions can include different positions of the device in use or work other than the positions shown in the drawings. For example, if the device in the drawings is turned over, the unit described as being “below” or “above” the other unit or feature will be “below” or “above” the other unit or feature. Therefore, the exemplary term “below” can include both the lower and upper spatial positions.

[0036] As shown in Figure 1 The present embodiment provides a chip packaging structure with a heat dissipation cover plate, which comprises a substrate 1, at least one chip 2, and a heat dissipation cover plate 3. The heat dissipation cover plate 3 and the chip 2 are connected through a fixing connector 4. Compared with directly connecting the two through a thermal interface material 6, the fixing connector 4 increases the bonding force between the heat dissipation cover plate 3 and the chip 2, suppresses the warping deformation between the chip 2 and the heat dissipation cover plate 3, and reduces the risk of delamination of the thermal interface material 6.

[0037] The substrate 1 has opposite first and second surfaces 1a and 1b. In the embodiment, the first surface 1a of the substrate is provided with pads for electrically connecting with the chip 2, and the second surface 1b is provided with solder balls or other conductive connecting structures for electrically connecting with external circuits or other chips 2. The substrate 1 is provided with at least one metal wiring layer 11, which electrically connects the pads and the solder balls.

[0038] The at least one chip 2 is arranged on the first surface 1a of the substrate 1 and electrically connected with the substrate 1. In the embodiment, the substrate 1 is provided with one chip 2. The chip 2 has opposite functional and non-functional surfaces 2a and 2b. The functional surface 2a of the chip 2 is provided with solder balls or other conductive connecting structures. The functional surface 2a of the chip 2 faces the first surface 1a of the substrate 1 and is flip-chip mounted on the substrate 1 and electrically connected with the substrate 1. The chip 2 and the substrate 1 are filled with an underfill 5. The underfill 5 can reduce the stress between the substrate 1 and the chip 2 caused by the mismatch of the thermal expansion coefficients and also protect the solder balls of the chip 2 and the surface of the substrate 1.

[0039] In other embodiments of the application, the substrate 1 can be provided with multiple chips 2 and other passive electronic components. The chip 2 can also be arranged on the second surface 1b of the substrate 1 to form a double-sided packaging structure, thereby improving the integration of the single packaging structure. In addition, the chip 2 can be arranged on the substrate 1 in other mounting manners such as the normal mounting manner. The chip 2 can also be embedded in a recess formed in the substrate 1. The application does not limit the mounting manner of the chip 2 and the substrate 1. In general, the chip 2 and the substrate 1 can be arranged in the known packaging structures of the chip 2.

[0040] The heat dissipation cover plate 3 is arranged on the first surface 1a of the substrate 1. The heat dissipation cover plate 3 is fixedly arranged on the substrate 1 by adhesive and forms a cavity for accommodating the chip 2 in cooperation with the substrate 1. The heat dissipation cover plate 3 is connected with the chip 2 by at least one fixing connector 4. The heat dissipation cover plate 3, the chip 2 and the fixing connector 4 are filled with a thermal interface material 6. The connection strength between the fixing connector 4 and the chip 2 and the heat dissipation cover plate 3 is greater than the connection strength between the thermal interface material 6 and the chip 2 and the heat dissipation cover plate 3.

[0041] The heat dissipation cover plate 3 can be made of copper, heat conductive ceramic, ceramic metal composite material or other materials with excellent heat conduction performance. The heat dissipation cover plate 3 covers the non-functional surface 2b of the chip 2 and can conduct heat and help the chip 2 form thermal interconnection with the outside, thereby assisting the chip 2 in heat dissipation.

[0042] The thermal interface material 6 is a material coated between the heat dissipation cover plate 3 and the chip 2, which can reduce the contact thermal resistance between the chip 2 and the heat dissipation cover plate 3. In the chip 2 packaging structure, an epoxy resin-based thermal conductive adhesive containing additives such as silver and copper can be used as the thermal interface material 6, which can not only reduce the contact thermal resistance, but also structurally bond and fix the chip 2 and the heat dissipation cover plate 3.

[0043] Specifically, in the present embodiment, the heat dissipation cover plate 3 is a metal cover plate, which includes a top cover plate 31 and a side cover plate 32. The top cover plate 31 is a flat plate with a rectangular planar shape, and the side cover plate 32 is located on the side of the top cover plate 31 and extends downward along the edge of the top cover plate 31. The side cover plate 32 is adhesively arranged on the substrate 1. The heat dissipation cover plate 3 as a whole forms a box structure with the opening facing downward. The lower surface of the top cover plate 31, the inner wall surface of the side cover plate 32, and the upper surface of the substrate 1 form a cavity, in which the chip 2 is accommodated. The heat dissipation cover plate 3 with a certain structural strength and in a box structure can not only help dissipate heat from the chip 2, but also protect the chip 2 from the harmful operating environment such as mechanical stretching, shearing, twisting, vibration, and the like, and prevent the chip 2 from being eroded by impurities such as water vapor and dust.

[0044] In other embodiments of the present application, other heat dissipation cover plates 3 with structures such as trapezoidal longitudinal cross-sectional shape can also be used, as long as the heat dissipation cover plate 3 can form a cavity to accommodate the chip 2 with the substrate 1.

[0045] During the reflow soldering and temperature test cycle of the chip 2 packaging structure, due to the difference in the thermal expansion coefficients among the thermal interface material 6, the chip 2, and the heat dissipation cover plate 3, the expansion or contraction degrees of the three will be different, which will cause the thermal stress to concentrate, resulting in changes in the warping degree between the chip 2 and the heat dissipation cover plate 3. In severe cases, the chip 2, the thermal interface material 6, and the heat dissipation cover plate 3 may be separated or cracked, resulting in failure of the chip 2 packaging structure. In the present embodiment, the fixed connecting piece 4 is arranged to strengthen the connection strength between the chip 2 and the heat dissipation cover plate 3, reduce the warping deformation between the chip 2 and the heat dissipation cover plate 3, and the fixed connecting piece 4 as a stress concentration area has higher structural strength and can withstand more deformation force, thereby reducing the risk of delamination of the thermal interface material 6 and improving the reliability of the chip 2 packaging structure. In addition, since the fixed connecting piece 4 strengthens the connection strength between the chip 2 and the heat dissipation cover plate 3, a high-thermal-conductivity thermal adhesive material can be used as the thermal interface material 6, thereby further improving the heat conduction efficiency between the chip 2 and the heat dissipation cover plate 3.

[0046] Further, the heat dissipation cover plate 3 is connected with the chip 2 through multiple fixing connectors 4, and the fixing connectors 4 are arranged at least at edges of the non-functional surface 2b of the chip 2. By arranging multiple fixing connectors 4, the connection strength between the chip 2 and the heat dissipation cover plate 3 can be further enhanced, and the stress can be dispersed to the multiple fixing connectors 4 to be shared and borne, thereby reducing the risk of connection failure of a single fixing connector 4. Since the warping deformation usually starts gradually from the edges of the non-functional surface 2b of the chip 2 to the central region, arranging the fixing connectors 4 at least at the edges can better inhibit the warping deformation between the chip 2 and the heat dissipation cover plate 3.

[0047] Further, the fixing connectors 4 at least include first fixing connectors 41 and second fixing connectors 42, the connection strength between the first fixing connectors 41 and the chip 2 and the heat dissipation cover plate 3 is greater than the connection strength between the second fixing connectors 42 and the chip 2 and the heat dissipation cover plate 3, the first fixing connectors 41 are arranged at four corners and / or four edges of the non-functional surface 2b of the chip 2, and the second fixing connectors 42 are arranged in regions between the first fixing connectors 41 on opposite sides. Arranging the fixing connectors 4 with higher connection strength at the four edges and / or four corners can further inhibit the warping deformation between the chip 2 and the heat dissipation cover plate 3. Arranging the second fixing connectors 42 with lower connection strength in the middle region can reduce the production cost to a certain extent.

[0048] Not limited to the above distribution mode, in other embodiments of the present application, the first fixing connectors 41 and the second fixing connectors 42 can also be arranged in other ways, for example, in addition to the four edges and / or four corners, the first fixing connectors 41 can also be additionally arranged in the central region of the chip 2, so that the stress distribution is more uniform.

[0049] In the present embodiment, the fixing connection area between the first fixing connectors 41 and the chip 2 and the heat dissipation cover plate 3 is greater than the fixing connection area between the second fixing connectors 42 and the chip 2 and the heat dissipation cover plate 3, and the fixing connectors 4 with larger contact area are arranged to have higher connection strength. In other embodiments of the present application, the first fixing connectors 41 and the second fixing connectors 42 can also be made of different materials.

[0050] Specifically, in the embodiment, the fixed connecting member 4 is a bonding metal block 4a arranged between the chip 2 and the heat dissipation cover plate 3. The bonding metal block 4a includes a base metal layer 4a1 combined with the chip 2 and the heat dissipation cover plate 3 respectively and a bonding layer 4a2 between the base metal layer 4a1. The non-functional surface 2b of the chip 2 is provided with at least one chip-side metal block. The inner surface of the top cover plate 31 is provided with at least one cover-plate-side metal block, the position and number of which correspond to the chip-side metal block, and the cover-plate-side metal block and the chip-side metal block are bonded to form the bonding metal block 4a. The heat dissipation cover plate 3 corresponds to a metal heat dissipation cover plate 3 and can be well combined with the cover-plate-side metal block.

[0051] The bonding metal block 4a formed by fusion bonding has excellent heat conduction performance in addition to high structural strength and high connection strength between the chip 2 and the heat dissipation cover plate 3, which can further improve the heat dissipation efficiency between the chip 2 and the heat dissipation cover plate 3.

[0052] In summary, the application can strengthen the connection strength between the chip 2 and the heat dissipation cover plate 3 by arranging the fixed connecting member 4 with higher connection strength than the thermal interface material 6 between the heat dissipation cover plate 3 and the chip 2, reduce the warping deformation between the chip 2 and the heat dissipation cover plate 3, and the fixed connecting member 4 as a stress concentration area has higher structural strength and can withstand more deformation force, thereby reducing the risk of delamination of the thermal interface material 6 and improving the reliability of the chip 2 packaging structure. In addition, since the fixed connecting member 4 strengthens the connection strength between the chip 2 and the heat dissipation cover plate 3, a high-thermal-conductivity heat dissipation adhesive material can be used, thereby further improving the heat conduction efficiency between the chip 2 and the heat dissipation cover plate 3.

[0053] As shown in Figure 2 , based on the same inventive concept, the embodiment also provides a chip packaging structure with a heat dissipation cover plate manufacturing method, which includes the following steps:

[0054] S1: as shown in Figure 3 , a chip 2 is provided, and at least one chip-side metal block 4aa is arranged on the non-functional surface 2b of the chip 2.

[0055] S2: as shown in Figure 4 , a heat dissipation cover plate 3 is provided, and at least one cover-plate-side metal block 4ab is arranged on the inner surface of the top cover plate 31 of the heat dissipation cover plate 3.

[0056] S3: as shown in Figure 5 , a substrate 1 is provided, the functional surface 2a of the chip is arranged towards the first surface 1a of the substrate, and the two are electrically connected.

[0057] S4: as shown in Figure 6 , a thermal interface material 6 is coated on the inner surface of the top cover plate 31 of the heat dissipation cover plate 3.

[0058] S5: as shown in the figure, the heat dissipation cover plate 3 is combined on the substrate 1, and the cover plate side metal block 4ab and the chip side metal block 4aa are fusion bonded. Figure 7

[0059] In step S1, it specifically includes:

[0060] The first chip side metal block 4aa is arranged at the four corners and / or four edges of the non-functional surface 2b of the chip 2, and the second chip side metal block 4aa is arranged in the area between the first chip side metal blocks 4aa on the opposite sides, wherein the fixed connection area between the first chip side metal block 4aa and the chip 2 is larger than the fixed connection area between the second chip side metal block 4aa and the chip 2.

[0061] The chip side metal block 4aa includes a base metal layer 4a1 and a bonding layer 4a2 arranged thereon.

[0062] In some embodiments of the present application, step S1 further includes:

[0063] The passive electronic element is arranged on the substrate 1.

[0064] In step S2, it specifically includes:

[0065] At the positions corresponding to the chip side metal blocks 4aa, the same number of cover plate side metal blocks 4ab as the chip side metal blocks 4aa are arranged on the inner surface of the top cover plate 31 of the heat dissipation cover plate 3.

[0066] The cover plate side metal block includes a base metal layer 4a1 and a bonding layer 4a2 arranged thereon.

[0067] In step S3, it specifically includes:

[0068] The functional surface 2a of the chip 2 is arranged on the substrate 1 in a flip-chip manner.

[0069] The underfill 5 is filled between the chip 2 and the substrate 1.

[0070] In step S4, it further includes:

[0071] The adhesive glue is coated on the bottom of the side cover plate 32.

[0072] In step S5, it further includes:

[0073] While the cover plate side metal block 4ab and the chip side metal block 4aa are fusion bonded, the adhesive glue coated on the bottom surface of the side cover plate 32 is high-temperature cured, and the heat dissipation cover plate 3 is bonded and fixed with the substrate 1.

[0074] ​It should be understood that although the present specification describes only a single embodiment, the description herein of the embodiment by no means limits the scope of the present specification, and the skilled in the art should consider the specification as a whole, and the technical solutions in each embodiment can be combined appropriately to form other embodiments which can be understood by the skilled in the art.

[0075] The above detailed description of a series of embodiments is merely specific to the feasible embodiments of the present application, and is not intended to limit the protection scope of the present application, and any equivalent embodiments or changes made without departing from the spirit of the present application should be included in the protection scope of the present application.

Claims

1. A chip package structure having a heat dissipation cover plate, characterized in that, include: A substrate having opposing first and second surfaces; At least one chip is disposed on a first side of the substrate and electrically connected to the substrate; A heat dissipation cover is attached to the first surface of the substrate, forming a cavity between the heat dissipation cover and the substrate to house the chip. The heat dissipation cover and the chip are connected by at least one fixing connector. The area between the heat dissipation cover, the chip, and the fixing connector is filled with a thermal interface material. The connection strength between the fixing connector and the chip and the heat dissipation cover is greater than the connection strength between the thermal interface material and the chip and the heat dissipation cover. The heat dissipation cover and the chip are connected by multiple fixing connectors. The fixing connectors are distributed at least at the edges of the non-functional surfaces of the chip. The fixing connectors are bonding metal blocks disposed between the chip and the heat dissipation cover.

2. The chip package structure with heat dissipation cover plate according to claim 1, wherein, The fixing connector includes at least a first fixing connector and a second fixing connector. The connection strength between the first fixing connector and the chip and the heat sink cover is greater than the connection strength between the second fixing connector and the chip and the heat sink cover. The first fixing connector is distributed at the four corners and / or four sides of the non-functional surface of the chip, and the second fixing connector is distributed in the area between the first fixing connectors on opposite sides.

3. The chip package structure with heat dissipation cover plate according to claim 2, wherein, The area of ​​the fixed connection between the first fixed connector and the chip and the heat sink cover is greater than the area of ​​the fixed connection between the second fixed connector and the chip and the heat sink cover.

4. The chip package structure with heat dissipation cover plate according to claim 1, wherein, The chip has a functional surface facing the first surface of the substrate and a non-functional surface relative to the functional surface, and the non-functional surface of the chip is provided with at least one chip-side metal block.

5. The chip package structure with heat dissipation cover plate according to claim 4, wherein, The heat dissipation cover includes a top cover and a side cover extending downward along the edge of the top cover. The top cover is disposed above the non-functional surface of the chip, and the end of the side cover is connected to the first surface of the substrate. At least one cover-side metal block is disposed on the inner surface of the top cover. The position and number of the cover-side metal blocks correspond to the chip-side metal blocks. The cover-side metal blocks and the chip-side metal blocks are bonded to form the bonding metal block.

6. The chip package structure with heat dissipation cover plate according to claim 1, wherein, The heat dissipation cover is a metal heat dissipation cover.

7. The chip package structure with heat dissipation cover plate according to claim 1, wherein, The chip has solder balls on its functional surface, which are electrically connected to the pads on the first surface of the substrate. The space between the chip and the substrate is filled with a filler.

8. A method for fabricating a chip package structure with a heat dissipation cover plate, characterized in that, Including the following steps: A chip is provided, wherein at least one chip-side metal block is disposed on the non-functional side of the chip; A heat dissipation cover is provided, and at least one cover-side metal block is provided on the inner surface of the top cover of the heat dissipation cover; A substrate is provided, with the functional surface of the chip facing the first surface of the substrate, and the two are electrically connected; A thermal interface material is coated on the inner surface of the top cover of the heat dissipation cover. The heat dissipation cover is attached to the substrate, and the metal block on the cover side and the metal block on the chip side are fused and bonded together, with the bonding positions distributed at least at the edges of the non-functional surfaces of the chip.

9. The method for fabricating a chip packaging structure with a heat dissipation cover according to claim 8, characterized in that, The provision of at least one chip-side metal block on the non-functional surface of the chip specifically includes: The chip side metal blocks are arranged on the non-functional surface of the chip.

10. The method for fabricating a chip packaging structure with a heat dissipation cover according to claim 9, characterized in that, The chip side metal blocks arranged on the non-functional surface of the chip further include: The first chip side metal blocks are arranged on the four corners and / or the four edges of the non-functional surface of the chip, and the second chip side metal blocks are arranged in the areas between the first chip side metal blocks on opposite sides, wherein the area of the fixed connection between the first chip side metal blocks and the chip is larger than the area of the fixed connection between the second chip side metal blocks and the chip.

11. The method of claim 9, wherein the method further comprises: The cover plate side metal blocks arranged on the inner surface of the top cover plate of the heat dissipation cover plate specifically include: The same number of heat dissipation cover plate side metal blocks as the chip side metal blocks are arranged on the inner surface of the top cover plate of the heat dissipation cover plate at positions corresponding to the chip side metal blocks.

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