Pixel circuit and driving method thereof, and display panel

Abstract

The present invention discloses a pixel circuit, a driving method thereof, and a display panel. The pixel circuit includes: a potential mirroring module, a storage module, a data writing module, and a current generating module. The current generating module is used to generate a driving current based on the potential difference between its first and second ends; the second end of the current generating module is electrically connected to the first end of the light-emitting module; the data writing module is used to write a data signal to the first end of the current generating module; the storage module is used to store the potential of the first end of the current generating module; the potential mirroring module is electrically connected to the second end of the current generating module and the second end of the light-emitting module, respectively, and the potential mirroring module is used to mirror a preset potential signal to the second end of the current generating module during the light-emitting phase and provide a flow path for the driving current; during the light-emitting phase, the potential of the preset potential signal is less than the potential of the data signal. The present invention can improve the stability and accuracy of the driving current output by the pixel circuit and enhance the display quality of the display panel.

Description

Technical Field

[0001] The present invention relates to the field of display technology, and in particular to a pixel circuit and a driving method thereof, and a display panel. Background Art

[0002] With the continuous development of display technology, the application scope of display devices is becoming wider and wider, and people's requirements for display devices are also becoming higher and higher.

[0003] The pixel circuits in display panels play a crucial role in driving the stable emission of light-emitting devices. However, existing pixel circuits use driver transistors to generate drive current, which in turn drives the light-emitting devices. This is affected by factors such as temperature, causing threshold voltage drift in the driver transistors. This affects the accurate and stable generation of the drive current, which in turn affects the brightness and stability of the light-emitting devices, and consequently, the display quality of the display panel. Summary of the Invention

[0004] The present invention provides a pixel circuit and a driving method thereof, and a display panel, so as to improve the stability and accuracy of the driving current output by the pixel circuit and enhance the display quality of the display panel.

[0005] To achieve the above technical objectives, the embodiments of the present invention provide the following technical solutions:

[0006] A pixel circuit includes: a potential mirror module, a storage module, a data writing module and a current generating module;

[0007] The current generating module includes a first end and a second end; the current generating module is used to generate a driving current according to the potential difference between the first end and the second end; the second end of the current generating module is electrically connected to the first end of the light-emitting module, and the driving current is used to drive the light-emitting module to emit light;

[0008] The data writing module is electrically connected to the first end of the current generating module, and the data writing module is used to write a data signal into the first end of the current generating module;

[0009] The storage module is electrically connected to the first end of the current generating module; the storage module is used to store the potential of the first end of the current generating module;

[0010] The potential mirror module is electrically connected to the second end of the current generating module and the second end of the light emitting module respectively, and is used to mirror the preset potential signal to the second end of the current generating module during the light emitting phase and provide a flow path for the driving current;

[0011] Wherein, in the light emitting stage, the potential of the preset potential signal is lower than the potential of the data signal.

[0012] Optionally, the potential mirror module includes: a light emitting control unit, a controlled unit and a differential unit;

[0013] The light-emitting control unit is electrically connected to the second end of the light-emitting module, the controlled unit, and the differential unit respectively; the light-emitting control unit is used to transmit the first power signal to the controlled unit, transmit the preset potential signal to the differential unit, and provide a flow path for the driving current;

[0014] The controlled unit is also electrically connected to the differential unit; the controlled unit is used to provide a constant current source to the differential unit under the control of the first power signal and the first scan signal;

[0015] The differential unit is also electrically connected to the second end of the current generating module; the differential unit is used to mirror the preset potential signal to the second end of the current generating module under the control of the constant current source.

[0016] Optionally, the light-emitting control unit includes: a first transistor, a second transistor, and a third transistor; the gate of the first transistor is connected to the light-emitting control signal, the first electrode of the first transistor is connected to the first power supply signal, and the second electrode of the first transistor is electrically connected to the controlled unit; the gate of the second transistor is connected to the light-emitting control signal, the first electrode of the second transistor is connected to the preset potential signal, and the second electrode of the second transistor is electrically connected to the differential unit; the gate of the third transistor is connected to the light-emitting control signal, the first electrode of the third transistor is electrically connected to the second end of the light-emitting module and the differential unit respectively, and the second electrode of the third transistor is connected to the second power supply signal;

[0017] The controlled unit includes: a fourth transistor; a gate of the fourth transistor is connected to the first scanning signal, a first electrode of the fourth transistor is electrically connected to the second electrode of the first transistor, and a second electrode of the fourth transistor is electrically connected to the differential unit;

[0018] The differential unit includes: a fifth transistor and a sixth transistor; the gate of the fifth transistor is electrically connected to the second electrode of the second transistor, the first electrode of the fifth transistor is electrically connected to the second electrode of the fourth transistor and the first electrode of the sixth transistor respectively, the second electrode of the fifth transistor is electrically connected to the first electrode of the third transistor and the second electrode of the sixth transistor respectively, and the gate of the sixth transistor is electrically connected to the second end of the current generating module.

[0019] Optionally, the data writing module includes: a seventh transistor and an eighth transistor; the gates of the seventh transistor and the eighth transistor are both connected to the second scanning signal, the first electrode of the seventh transistor is connected to the data signal, the second electrode of the seventh transistor is electrically connected to one end or the other end of the controlled unit, the first electrode of the eighth transistor is electrically connected to the differential unit, and the second electrode of the eighth transistor is electrically connected to the first end of the current generating module;

[0020] Alternatively, the data writing module includes: a ninth transistor; the gate of the ninth transistor is connected to the second scanning signal, the first electrode of the ninth transistor is connected to the data signal, and the second electrode of the ninth transistor is electrically connected to the first end of the current generating module.

[0021] Optionally, the current generating module includes: a resistor; a first end of the resistor serves as the first end of the current generating module, and a second end of the resistor serves as the second end of the current generating module.

[0022] Optionally, the storage module includes: a capacitor; a first end of the capacitor is connected to a first power supply signal, and a second end of the capacitor is electrically connected to the first end of the current generating module.

[0023] Optionally, the pixel circuit further includes: an initialization module; the initialization module is electrically connected to the first end of the current generating module or the second end of the current generating module, and the initialization module is used to initialize the first end of the light emitting module;

[0024] Preferably, the initialization module includes: a tenth transistor; the gate of the tenth transistor is connected to the third scanning signal, the first electrode of the tenth transistor is connected to the initialization signal, and the second electrode of the tenth transistor is electrically connected to the first end of the current generating module or the second end of the current generating module.

[0025] Optionally, the preset potential signal includes: a jump potential signal or a fixed potential signal;

[0026] Preferably, the preset potential signal is a fixed potential signal;

[0027] Preferably, the preset potential signal is a zero potential signal.

[0028] Correspondingly, an embodiment of the present invention further provides a display panel, comprising: the pixel circuit provided by any embodiment of the present invention.

[0029] Accordingly, an embodiment of the present invention further provides a method for driving a pixel circuit, for driving the pixel circuit provided by any embodiment of the present invention, the driving method comprising:

[0030] In the data writing phase, the data writing module is controlled to write a data signal to the first terminal of the current generating module;

[0031] During the light-emitting stage, the potential mirror module is controlled to mirror the preset potential signal to the second end of the current generating module and provide a flow path for the driving current; the current generating module generates a driving current according to the potential difference between its first end and the second end, driving the light-emitting module to emit light.

[0032] The pixel circuit provided in an embodiment of the present invention comprises a potential mirroring module, a storage module, a data writing module, and a current generating module. The data writing module is configured to transmit a data signal to the first terminal of the current generating module, the storage module is configured to maintain the potential at the first terminal of the current generating module as the data signal, and the potential mirroring module is configured to mirror a preset potential signal to the second terminal of the current generating module. Unlike existing pixel circuits with structures such as 7T1C, the pixel circuit provided in an embodiment of the present invention does not rely on a driving transistor to generate a driving current. Instead, it controls the potential at both ends of the current generating module, causing the current generating module to generate a driving current based on the potential difference between its first and second terminals. This prevents the threshold voltage drift of the driving transistor caused by factors such as temperature from affecting the brightness of the light-emitting module, thereby improving the stability of the driving current output. Furthermore, as a direct factor affecting the generation of the driving current, the potential at both ends of the current generating module is precisely controllable, effectively improving the accuracy of the driving current. In summary, compared to the prior art, the embodiment of the present invention can improve the stability and accuracy of the driving current output by the pixel circuit, thereby enhancing the display quality of the display panel.

[0033] It should be understood that the content described in this section is not intended to identify the key or important features of the embodiments of the present invention, nor is it intended to limit the scope of the present invention. Other features of the present invention will become readily understood through the following description. BRIEF DESCRIPTION OF THE DRAWINGS

[0034] In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the following briefly introduces the drawings required for use in the description of the embodiments. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work.

[0035] Figure 1 is a structural schematic diagram of a pixel circuit provided by an embodiment of the present invention;

[0036] Figure 2 This is a driving timing diagram of a pixel circuit provided by an embodiment of the present invention;

[0037] Figure 3is a structural diagram of another pixel circuit provided by an embodiment of the present invention;

[0038] Figure 4 This is a driving timing diagram of another pixel circuit provided by an embodiment of the present invention;

[0039] Figure 5 is a structural diagram of another pixel circuit provided by an embodiment of the present invention;

[0040] Figure 6 is a structural diagram of another pixel circuit provided by an embodiment of the present invention;

[0041] Figure 7 is a structural diagram of another pixel circuit provided by an embodiment of the present invention;

[0042] Figure 8 This is a driving timing diagram of another pixel circuit provided by an embodiment of the present invention;

[0043] Figure 9 is a schematic flow chart of a driving method for a pixel circuit provided by an embodiment of the present invention;

[0044] Figure 10 It is a structural schematic diagram of a display panel provided by an embodiment of the present invention. DETAILED DESCRIPTION

[0045] In order to enable those skilled in the art to better understand the solutions of the present invention, the technical solutions in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention. Obviously, the embodiments described are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without making creative efforts should fall within the scope of protection of the present invention.

[0046] It should be noted that the terms "first," "second," and the like in the description and claims of the present invention and the accompanying drawings are used to distinguish similar items and are not necessarily used to describe a particular order or precedence. It should be understood that the terms used in this manner are interchangeable where appropriate, such that the embodiments of the present invention described herein can be implemented in sequences other than those illustrated or described herein. Furthermore, the terms "including," "having," and any variations thereof are intended to cover non-exclusive inclusions.

[0047] An embodiment of the present invention provides a pixel circuit, which includes a potential mirror module, a storage module, a data writing module, and a current generating module.

[0048] The current generating module includes a first end and a second end; the current generating module is configured to generate a driving current based on the potential difference between the first end and the second end. The second end of the current generating module is electrically connected to the first end of the light-emitting module, and the driving current is configured to drive the light-emitting module to emit light. The data writing module is electrically connected to the first end of the current generating module, and the data writing module is configured to write a data signal to the first end of the current generating module. The storage module is electrically connected to the first end of the current generating module, and the storage module is configured to store the potential at the first end of the current generating module. The potential mirroring module is electrically connected to the second end of the current generating module and the second end of the light-emitting module, respectively, and is configured to mirror a preset potential signal to the second end of the current generating module during the light-emitting phase and provide a path for the driving current to flow. During the light-emitting phase, the potential of the preset potential signal is lower than the potential of the data signal.

[0049] Exemplarily, the driving process of the pixel circuit includes:

[0050] In the data writing phase, the data writing module is controlled to write a data signal to the first end of the current generating module; the data signal is stored by the storage module.

[0051] During the light-emitting stage, the potential mirror module is controlled to mirror the preset potential signal to the second end of the current generating module. At this time, the potential of the first end of the current generating module is the potential of the data signal, and the potential of the second end is the potential of the preset potential signal. The current generating module generates a driving current based on the potential difference between its first end and the second end; at the same time, the potential mirror module provides a flow path for the driving current, so that the driving current flows through the current generating module to the light-emitting module, driving the light-emitting module to emit light.

[0052] The pixel circuit provided in an embodiment of the present invention comprises a potential mirroring module, a storage module, a data writing module, and a current generating module. The data writing module is configured to transmit a data signal to the first terminal of the current generating module, the storage module is configured to maintain the potential at the first terminal of the current generating module as the data signal, and the potential mirroring module is configured to mirror a preset potential signal to the second terminal of the current generating module. Unlike existing pixel circuits with structures such as 7T1C, the pixel circuit provided in an embodiment of the present invention does not rely on a driving transistor to generate a driving current. Instead, it controls the potential at both ends of the current generating module, causing the current generating module to generate a driving current based on the potential difference between its first and second terminals. This prevents the threshold voltage drift of the driving transistor caused by factors such as temperature from affecting the brightness of the light-emitting module, thereby improving the stability of the driving current output. Furthermore, as a direct factor affecting the generation of the driving current, the potential at both ends of the current generating module is precisely controllable, effectively improving the accuracy of the driving current. In summary, compared to the prior art, the embodiment of the present invention can improve the stability and accuracy of the driving current output by the pixel circuit, thereby enhancing the display quality of the display panel.

[0053] The structure and driving process of the pixel circuit are described below with reference to specific embodiments.

[0054] Figure 1 Schematic diagram of a pixel circuit according to an embodiment of the present invention. Figure 1 In one embodiment, optionally, the pixel circuit includes: a potential mirror module 10 , a storage module 30 , a data writing module 40 and a current generating module 20 .

[0055] Exemplarily, the control terminal of the data writing module 40 is connected to the second scan signal Sn2, the input terminal is connected to the data signal Vdata, and the output terminal is electrically connected to the first terminal N1 of the current generating module 20. The first terminal of the storage module 30 is connected to the first power signal ELVDD, and the second terminal is electrically connected to the first terminal N1 of the current generating module 20. The first control terminal of the potential mirror module 10 is connected to the first scan signal Sn1, the second control terminal is connected to the light control signal EM, the first power terminal is connected to the first power signal ELVDD, the second power terminal is connected to the second power signal ELVSS, the input terminal is connected to the preset potential signal V0, the first connection terminal is electrically connected to the second terminal N2 of the current generating module 20 and the first terminal of the light-emitting module 50, respectively, and the second connection terminal is electrically connected to the second terminal of the light-emitting module 50.

[0056] Among them, the first power supply signal ELVDD can be a high potential signal, such as a positive potential in the range of 3 to 7V; the first power supply signal ELVDD can be a low potential signal, such as a negative potential in the range of -3.5 to -2. The data signal Vdata and the preset potential signal V0 can be determined according to the target brightness of the light-emitting module 50 and the voltage-current relationship of the current generating module 20. Specifically, the size of the driving current required by the light-emitting module 50 can be known according to the target brightness of the light-emitting module 50. Based on this, the potential difference required at both ends of the current generating module 20 can be calculated in combination with the voltage-current relationship of the current generating module 20. Then, in each frame of display, for each pixel circuit, the difference between the data signal Vdata and the preset potential signal V0 connected thereto is controlled to be maintained at the above-mentioned potential difference during the light-emitting stage, so that the light-emitting module 50 can be driven to emit light accurately and stably.

[0057] For example, the preset potential signal V0 itself can be a jumping potential signal. As long as the potential remains unchanged during the light-emitting phase, the stability of the driving current can be guaranteed. Alternatively, the preset potential signal V0 can also be a fixed potential signal. The fixed potential can be set to a certain potential value less than the minimum potential value of the data signal Vdata to ensure that there is always a potential difference between the data signal Vdata and the preset potential signal V0 during the light-emitting phase, so that the current generation module 20 can effectively generate the driving current. Setting the preset potential signal V0 as a fixed potential signal firstly allows the driver IC to only provide the changing data signal Vdata, simplifying the control logic; secondly, it allows all pixel circuits in the display panel to access the same preset potential signal V0, reducing the output ports of the driver chip and lowering the cost of the display panel. For example, the preset potential signal V0 can be a zero potential signal, so that the potential difference across the current generation module 20 is actually the potential value of the data signal Vdata, thereby eliminating the potential difference calculation step and further simplifying the control logic. In addition, the zero potential signal can reuse the original ground signal in the display panel, eliminating the need to add new signal ports and signal lines, thereby simplifying the wiring of the display panel.

[0058] Figure 2 1 is a driving timing diagram of a pixel circuit provided by an embodiment of the present invention. Figure 1 and Figure 2 , taking the case where each control signal is at a low potential and is effective as an example, the driving process of the pixel circuit includes:

[0059] Data writing phase T1: The second scan signal Sn2 is at a low level, while the first scan signal Sn1 and the light-emission control signal EM are both at a high level. The data writing module 40 is turned on in response to the second scan signal Sn2 and transmits the data signal Vdata to the first terminal N1 of the current generating module 20. That is, the potential of the first terminal N1 of the current generating module 20 is Vdata. The data signal Vdata is stored by the storage module 30.

[0060] During light-emitting phase T2, the first scanning signal Sn1 changes to the first potential V11, the second scanning signal Sn2 is at a high potential, and the light-emitting control signal EM is at a low potential. In response to the first potential V11 and the light-emitting control signal EM, the potential mirroring module 10 activates the potential mirroring function, mirroring the preset potential signal V0 to the second terminal N2 of the current generating module 20. This means that the potential of the second terminal N2 of the current generating module 20 is V0. At this point, the potential of the first terminal N1 of the current generating module 20 is still maintained by the storage module 30, and the potential difference between the first terminal N1 and the second terminal N2 of the current generating module is Vdata - V0. This potential difference generates a driving current in response to the driving current. Simultaneously, in response to the light-emitting control signal EM, the potential mirroring module 10 connects its second power supply terminal and second connection terminal to provide a path for the driving current to flow, thereby driving the light-emitting module 50 to emit light.

[0061] In summary, an embodiment of the present invention provides a new pixel circuit, which generates a driving current through a current generating module 20 according to the potential difference between a data signal Vdata and a preset potential signal V0, thereby avoiding the influence of changes in properties such as the threshold voltage of the driving transistor in the existing pixel circuit on the accuracy and stability of the driving current.

[0062] Figure 3 is a structural diagram of another pixel circuit provided by an embodiment of the present invention. Figure 3 Based on the above embodiments, the potential mirror module 10 optionally includes: a light-emitting control unit 110, a controlled unit 120, and a differential unit 130. The light-emitting control unit 110 is configured to transmit the first power supply signal ELVDD to the controlled unit 120, transmit the preset potential signal VO to the differential unit 130, and provide a flow path for the driving current. The controlled unit 120 is configured to provide a constant current source to the differential unit 130 under the control of the first power supply signal ELVDD and the first scan signal Sn1. The differential unit 130 is configured to mirror the preset potential signal V0 to the second terminal N2 of the current generating module 20 under the control of the constant current source.

[0063] In the embodiment of the present invention, the differential unit 130 has a potential mirroring function under the control of the light emitting control unit 110 and the controlled unit 120 to control the potential of the second terminal N2 of the current generating module 20 to be the preset potential signal V0 during the light emitting stage.

[0064] Continue to see Figure 3 For example, the specific connection method of each unit in the potential mirror module 10 is as follows: the control terminal of the light-emitting control unit 110 is connected to the light-emitting control signal EM, the first power terminal is connected to the first power signal ELVDD, the second power terminal is connected to the second power signal ELVSS, the input terminal is connected to the preset potential signal V0, the first connection terminal is electrically connected to the first terminal of the controlled unit 120, the second connection terminal is electrically connected to the first control terminal of the differential unit 130, and the third connection terminal is electrically connected to the second terminal of the differential unit 130. The control terminal of the controlled unit 120 is connected to the first scan signal Sn1, and the second terminal is electrically connected to the first terminal of the differential unit 130. The second control terminal of the differential unit 130 is electrically connected to the second terminal N2 of the current generating module 20 and the first terminal of the light-emitting module 50, respectively, and the second terminal of the differential unit 130 is electrically connected to the second terminal of the light-emitting module 50.

[0065] The functional implementation process of the potential mirroring module 10 specifically includes: under the control of the light control signal EM, the light control unit 110 connects its first power terminal and first connection terminal, allowing the first power signal ELVDD to be transmitted to the first terminal of the controlled unit 120. The potential difference between the first power signal ELVDD and the first scan signal Sn1 causes the controlled unit 120 to operate as a constant current source. Simultaneously, under the control of the light control signal EM, the light control unit 110 connects its input terminal and second connection terminal, allowing the preset potential signal V0 to be transmitted to the first control terminal of the differential unit 130. Under the control of the constant current source, the differential unit 130 implements a potential mirroring function, mirroring the preset potential signal V0 connected to its first control terminal to its second control terminal, causing the potential of the second terminal N2 of the current generating module 20 to be the preset potential signal V0. Furthermore, under the control of the light control signal EM, the light control unit 110 connects its second power terminal and third connection terminal, providing a path between the second terminal of the light-emitting module 50 and the second power terminal of the light control unit 110, thereby providing a transmission path for the driving current.

[0066] Continue to see Figure 3 Based on the above embodiments, the pixel circuit may optionally further include an initialization module 60. The control terminal of the initialization module 60 is connected to the third scanning signal Sn3, the input terminal is connected to the initialization signal Vref, and the output terminal is electrically connected to the first terminal of the light-emitting module 50. The initialization module 60 is configured to respond to the control of the third scanning signal Sn3 and initialize the first terminal of the light-emitting module 50 using the initialization signal Vref, so that all light-emitting modules 50 are driven to emit light in the same initial state, thereby preventing the residual potential displayed in the previous frame from affecting the display of the current frame.

[0067] For example, the light-emitting module 50 may be composed of a current-driven light-emitting device OLED, with the anode of the light-emitting device OLED serving as the first terminal of the light-emitting module 50 and the cathode of the light-emitting device OLED serving as the second terminal of the light-emitting module 50. Therefore, the initialization signal Vref may be a negative potential signal, so that the anode potential of the light-emitting device OLED approaches the cathode potential during initialization, or even achieve reverse bias initialization of the light-emitting device OLED to improve display contrast.

[0068] Correspondingly, the driving process of the pixel circuit also includes an initialization phase, which is performed before the data writing phase. Figure 4 , the driving process of the pixel circuit is explained. Figure 4 FIG. 1 is a driving timing diagram of another pixel circuit provided by an embodiment of the present invention. Figure 3 and Figure 4 , the driving process of the pixel circuit includes:

[0069] Initialization stage T0: the third scan signal Sn3 is low, the first scan signal Sn1, the second scan signal Sn2 and the light control signal EM are all high. The initialization module 60 is turned on in response to the third scan signal Sn3 and uses the initialization signal Vref to initialize the anode of the light emitting device OLED.

[0070] In the data writing phase T1 and the light emitting phase T2, the third scanning signal Sn3 maintains a high potential and the initialization module 60 is turned off. Figure 1 and Figure 2 The same as in the embodiment shown, no further details will be given here.

[0071] The above embodiments exemplarily provide various functional modules in the pixel circuit. The specific structure that each module may have will be described below.

[0072] Figure 5 is a structural diagram of another pixel circuit provided by an embodiment of the present invention. Figure 5 In one embodiment, optionally, the light emitting control unit 110 includes: a first transistor M1, a second transistor M2, and a third transistor M3; the controlled unit 120 includes: a fourth transistor M4; and the differential unit 130 includes: a fifth transistor M5 and a sixth transistor M6.

[0073] Specifically, the gate of the first transistor M1 is connected to the light-emitting control signal EM, the first electrode of the first transistor M1 is connected to the first power supply signal ELVDD, and the second electrode of the first transistor M1 is electrically connected to the first electrode of the fourth transistor M4; the gate of the second transistor M2 is connected to the light-emitting control signal EM, the first electrode of the second transistor M2 is connected to the preset potential signal V0, and the second electrode of the second transistor M2 is electrically connected to the gate of the fifth transistor M5; the gate of the third transistor M3 is connected to the light-emitting control signal EM, the first electrode of the third transistor M3 is electrically connected to the second terminal of the light-emitting module 50, the second electrode of the fifth transistor M5, and the second electrode of the sixth transistor M6, respectively, and the second electrode of the third transistor M3 is connected to the second power supply signal ELVSS; the gate of the fourth transistor M4 is connected to the first scan signal Sn1, the second electrode of the fourth transistor M4 is electrically connected to the first electrode of the fifth transistor M5 and the first electrode of the sixth transistor M6, respectively; the gate of the sixth transistor M6 is electrically connected to the second terminal N2 of the current generating module 20 and the first terminal of the light-emitting module 50, respectively.

[0074] Taking the above transistors as P-type transistors as an example, combined with Figure 4In the timing sequence, during the light-emitting phase T2, the light-emitting control signal EM is at a low potential, and the first scan line signal Sn1 is at a first potential V11. The first transistor M1, the second transistor M2, and the third transistor M3 all function as switching transistors and are turned on under the control of the light-emitting control signal EM. The first power supply signal ELVDD is transmitted to the first electrode of the fourth transistor M4 via the first transistor M1. The preset potential signal V0 is transmitted to the gate of the fifth transistor M5 via the second transistor M2. The second power supply signal ELVSS is transmitted to the second electrodes of the fifth transistor M5 and the sixth transistor M6 via the third transistor. At this time, the gate of the fourth transistor M4 is connected to the first potential V11, and the first electrode is connected to the first power supply signal ELVDD. The potential difference between the first potential V11 and the first power supply signal ELVDD controls the fourth transistor M4 to operate in the amplification region, causing the fourth transistor M4 to operate as a constant current source. In other words, the value of the first potential V11 can be determined based on the operating characteristics of the fourth transistor M4 and the value of the first power supply signal ELVDD. The fifth transistor M5 and the sixth transistor M6 are two transistors with identical performance and parameters. Their first electrodes are interconnected, and their second electrodes are interconnected, forming a differential pair transistor structure. The fourth transistor M4 serves as a constant current source load for the differential pair transistor, and the current transmitted by the fourth transistor M4 to the differential unit 130 is recorded as I0. Therefore, the current flowing through the fifth transistor M5 and the current flowing through the sixth transistor M6 are equal, both being I0 / 2. Since the fifth transistor M5 and the sixth transistor M6 have identical performance parameters, the corresponding relationship between the voltage difference and the current between the gates of the two transistors and the first electrodes is the same. At this time, the current flowing through the two transistors is equal, and therefore the potential difference between the gates of the two transistors and the first electrodes is equal. At the same time, the first electrodes of the two transistors are connected together, that is, the potentials of the first electrodes of the two transistors are equal, and therefore, the potentials of the gates of the two transistors are equal.

[0075] In summary, the potential mirror module 10 forms a negative feedback differential circuit. The connection method of the differential pair transistors and the provision of a constant current source enable the differential unit 130 to have a potential mirroring function, mirroring the preset potential signal V0 connected to the gate of the fifth transistor M5 to the gate of the sixth transistor M6. At this time, the conduction of the third transistor M3 provides a path for the drive current to flow through the light-emitting device OLED and the third transistor M3 to the second power supply terminal, which is equivalent to providing a transmission path for the drive current.

[0076] Continue to see Figure 5 Based on the above embodiments, optionally, the current generating module 20 includes a resistor R1 , a first end of the resistor R1 serving as a first end N1 of the current generating module 20 , and a second end of the resistor R1 serving as a second end N2 of the current generating module 20 .

[0077] In this embodiment, the current generating module 20 is configured to be composed of a resistor R1, so that the structure of the current generating module 20 is simple and easy to implement. At the same time, the driving current (denoted as I1) can be calculated by the following formula: I1 = (VN1-VN2) / R1 = (Vdata-V0) / R1. This makes the driving current and the potential difference across the current generating module 20 linearly related, and the calculation of the driving current is more accurate and controllable. Moreover, compared to the driving transistor in the prior art, the resistance value of the resistor R1 is basically unaffected by factors such as temperature, so that the driving current is not affected by factors such as temperature, thereby ensuring the stability of the driving current. When the preset potential signal is 0 potential, I1 = Vdata / R1, which can further simplify the calculation process of the driving current.

[0078] Continue to see Figure 5 Based on the above embodiments, the data writing module 40 optionally includes a ninth transistor M9. A gate of the ninth transistor M9 is connected to the second scan signal Sn2, a first electrode of the ninth transistor M9 is connected to the data signal Vdata, and a second electrode of the ninth transistor M9 is electrically connected to the first terminal N1 of the current generating module 20. In this embodiment, the data writing module 40 is composed of a single transistor, which simplifies the structure of the data writing module 40 and makes it easy to implement.

[0079] Continue to see Figure 5 On the basis of the above embodiments, optionally, the storage module 30 includes: a capacitor C1. The first end of the capacitor C1 is connected to the first power signal ELVDD, and the second end of the capacitor C1 is electrically connected to the first end N1 of the current generating module 20. Based on the characteristic that the potential at both ends of the capacitor cannot change suddenly, the first end of the capacitor C1 is connected to the first power signal ELVDD with a fixed potential, which can suppress the decrease in the potential of the second end of the capacitor C1 (i.e., the first end N1 of the current generating module 20) during the light-emitting stage; in other words, due to the coupling effect of the capacitor C1, during the light-emitting stage, when the potential of the first end N1 of the current generating module 20 shows a continuous downward trend, the first end of the capacitor C1 will continuously replenish charge to its second end to maintain the potential of the first end N1 of the current generating module 20 stable, thereby ensuring the stability of the driving current during the light-emitting stage. In this embodiment, the storage module 30 is configured to be composed of a capacitor, so that the structure of the storage module 30 is simple and easy to implement.

[0080] Continue to see Figure 5Based on the above embodiments, the initialization module 60 optionally includes a tenth transistor M10. The gate of the tenth transistor M10 is connected to the third scan signal Sn3, the first electrode of the tenth transistor M10 is connected to the initialization signal Vref, and the second electrode of the tenth transistor M10 is electrically connected to the second terminal N2 of the current generating module 20, that is, directly electrically connected to the anode of the light-emitting device OLED. In this embodiment, the initialization module 60 is composed of a single transistor, which makes the structure of the initialization module 60 simple and easy to implement.

[0081] Combine Figure 4 and Figure 5 , still taking the case where all transistors in the pixel circuit are P-type transistors as an example, the driving process of the pixel circuit specifically includes:

[0082] Initialization stage T0: the third scan signal Sn3 is low, the first scan signal Sn1, the second scan signal Sn2 and the light emitting control signal EM are high. The tenth transistor M10 is turned on in response to the third scan signal Sn3 and initializes the anode of the light emitting device OLED using the initialization signal Vref.

[0083] Data writing phase T1: The second scan signal Sn2 is at a low level, and the first scan signal Sn1, the third scan signal Sn3, and the light-emitting control signal EM are all at a high level. The ninth transistor M9 is turned on in response to the second scan signal Sn2 and transmits the data signal Vdata to the first terminal N1 of the current generating module 20.

[0084] Light-emitting stage T2: The first scanning signal Sn1 jumps to the first potential V11, the light-emitting control signal EM is at a low potential, and the second scanning signal Sn2 and the third scanning signal Sn3 are both at a high potential. The first transistor M1, the second transistor M2, and the third transistor M3 are all turned on. The fifth transistor M5 and the sixth transistor M6 form a differential pair. The fourth transistor M4 serves as a constant current source load for the differential pair. Based on the operating characteristics of the differential pair, the potential mirror module 10 mirrors the gate potential of the fifth transistor M5 (the preset potential signal V0) to the gate of the sixth transistor M6. The drive current flowing through the resistor R1 and the light-emitting device OLED is I1 = (Vdata - V0) / R1, making the drive current controllable and unaffected by temperature.

[0085] It should be noted that the above embodiments exemplify that the data writing module is composed of the ninth transistor, but this is not intended to limit the present invention. In other embodiments, the data writing module may also have other structures. Several of these structures are described below.

[0086] Figure 6 is a structural diagram of another pixel circuit provided by an embodiment of the present invention. Figure 6In one embodiment, the data writing module 40 optionally includes: a seventh transistor M7 and an eighth transistor M8. The gates of the seventh transistor M7 and the eighth transistor M8 are both connected to the second scan signal Sn2, the first electrode of the seventh transistor M7 is connected to the data signal Vdata, and the second electrode of the seventh transistor M7 is electrically connected to the potential mirror module 10, specifically to the second end of the controlled unit 120, that is, to the second electrode of the fourth transistor M4; the first electrode of the eighth transistor M8 is electrically connected to the potential mirror module 10, specifically to the second end of the differential unit 130, that is, to the second electrode of the sixth transistor M6; and the second electrode of the eighth transistor M8 is electrically connected to the first terminal N1 of the current generating module 20.

[0087] The pixel circuit can still be used Figure 4 The timing shown is driven by Figure 5 The driving process of the circuit shown differs in the transmission path of the data signal Vdata. Specifically, in the initialization phase T0, the tenth transistor M10 uses the initialization signal Vref to initialize the anode of the light-emitting device OLED while also initializing the gate of the sixth transistor M6, so that the sixth transistor M6 can be turned on in the next phase. In the data writing phase T2, the seventh transistor M7 and the eighth transistor M8 are turned on in response to the second scanning signal Sn2. The data signal Vdata is transmitted to the first electrode of the sixth transistor M6 via the seventh transistor M7. The potential difference between the gate and the first electrode of the sixth transistor M6 controls the conduction of the sixth transistor M6. The data signal Vdata continues to be transmitted to the first terminal N1 of the current generating module 20 via the first and second electrodes of the sixth transistor M6 and the eighth transistor M8.

[0088] Figure 7 is a structural diagram of another pixel circuit provided by an embodiment of the present invention. Figure 7 In another embodiment, optionally, the data writing module 40 is still composed of the seventh transistor M7 and the eighth transistor M8. Figure 6 The difference between the connection mode and the connection mode is that the second electrode of the seventh transistor M7 is electrically connected to the first end of the controlled unit 120, that is, the first electrode of the fourth transistor M4. Figure 8 See the timing diagram for the Figure 8 ,and Figure 4 The timing difference is:

[0089] During the data writing phase T1, in addition to the second scan signal Sn2 jumping to a low potential, the first scan signal Sn1 also jumps to a low potential V12, thereby controlling the fourth transistor M4 to be fully turned on, providing a signal transmission path from the seventh transistor M7 to the fourth transistor M4, to the first and second electrodes of the sixth transistor, to the eighth transistor M8, and finally to the first terminal N1 of the current generating module 20, so that the data signal Vdata is successfully transmitted to the first terminal N1 of the current generating module 20.

[0090] It should also be noted that the above embodiments exemplify the structure in which the initialization module is directly connected to the anode of the light-emitting device OLED, but this is not intended to limit the present invention. Figure 6 and Figure 7 The initialization module 60 can also be connected to the first terminal N1 of the current generating module 20. In the initialization stage, the initialization signal Vref can be transmitted to the anode of the light-emitting device OLED through the tenth transistor M10 and the resistor R1, thereby initializing the light-emitting device OLED.

[0091] It should also be noted that the above embodiments are all described with each transistor in the pixel circuit being a P-type transistor, but this is not intended to limit the present invention. In other embodiments, some or all of the transistors in the pixel circuit may be replaced with N-type transistors as required, and the control timing of their control signals may be changed accordingly.

[0092] An embodiment of the present invention further provides a method for driving a pixel circuit, which is used to drive the pixel circuit provided by any embodiment of the present invention and has corresponding beneficial effects. Figure 9 FIG1 is a flow chart of a driving method of a pixel circuit provided by an embodiment of the present invention. Figure 9 , the driving method comprises the following steps:

[0093] S110 , data writing stage, controlling the data writing module to write a data signal to the first end of the current generating module.

[0094] S120, in the light-emitting stage, the potential mirror module is controlled to mirror the preset potential signal to the second end of the current generating module and provide a flow path for the driving current; the current generating module generates a driving current according to the potential difference between its first end and the second end, driving the light-emitting module to emit light.

[0095] The pixel circuit driving method provided by an embodiment of the present invention controls the potential of the first terminal of the current generating module to be a data signal through a data writing module, and maintains the potential of the first terminal of the current generating module as the data signal through a storage module; and controls the potential of the second terminal of the current generating module to be a preset potential signal through a potential mirroring module. Unlike existing pixel circuits with structures such as 2T1C or 7T1C, the pixel circuit provided by an embodiment of the present invention does not rely on a driving transistor to generate a driving current. Instead, it controls the potential at both ends of the current generating module so that the current generating module generates a driving current based on the potential difference between its first and second ends. In this way, the influence of threshold voltage drift caused by factors such as temperature on the brightness of the light-emitting module can be avoided, and the stability of the driving current output can be improved. At the same time, as a direct factor affecting the generation of the driving current, the potential at both ends of the current generating module is precisely controllable, which can effectively improve the accuracy of the driving current. In summary, compared with the existing technology, the embodiment of the present invention can improve the stability and accuracy of the driving current output by the pixel circuit, thereby improving the display quality of the display panel.

[0096] It should be noted that in each embodiment of the pixel circuit, specific descriptions of driving methods are given for different pixel circuits. These driving methods can all be considered as driving methods for the pixel circuit provided in the embodiments of the present invention, and repeated content will not be repeated here.

[0097] The present invention also provides a display panel including the pixel circuit provided by any embodiment of the present invention, which has corresponding beneficial effects. For example, the display panel can be an active matrix organic light emitting diode panel or a micro light emitting diode display panel. Figure 10 Schematic diagram of the structure of a display panel provided by an embodiment of the present invention. Figure 10 The display panel 100 includes: pixel circuits 101 arranged in an array. In addition, the display panel 100 also includes a shift register circuit 102, multiple control signal lines 104, a driver IC 103, and multiple data lines 105. Among them, the control signal line 104 is electrically connected to the shift register circuit 102 and is used to provide control signals to the pixel circuit 101. The control signal line 104 may specifically include: a first scan line for transmitting a first scan signal; a second scan line for transmitting a second scan signal; and a light-emitting control signal line for transmitting a light-emitting control signal. The data line 150 is electrically connected to the driver IC 103 and is used to provide data signals to each pixel circuit 101.

[0098] It should be understood that the various forms of the processes shown above can be used to reorder, add, or delete steps. For example, the steps described in the present invention can be performed in parallel, sequentially, or in a different order, as long as the desired results of the technical solution of the present invention can be achieved. This is not limited herein.

[0099] The above specific embodiments do not limit the scope of protection of the present invention. Those skilled in the art will appreciate that various modifications, combinations, sub-combinations, and substitutions may be made based on design requirements and other factors. Any modifications, equivalent substitutions, and improvements made within the spirit and principles of the present invention are intended to be included within the scope of protection of the present invention.

Claims

1. A pixel circuit, characterized in that: include: A potential mirror module, a storage module, a data writing module and a current generating module; The current generating module includes a first end and a second end; the current generating module is used to generate a driving current according to the potential difference between the first end and the second end; the second end of the current generating module is electrically connected to the first end of the light-emitting module, and the driving current is used to drive the light-emitting module to emit light; The data writing module is electrically connected to the first end of the current generating module, and the data writing module is used to write a data signal into the first end of the current generating module; The storage module is electrically connected to the first end of the current generating module; the storage module is used to store the potential of the first end of the current generating module; The potential mirror module is electrically connected to the second end of the current generating module and the second end of the light emitting module respectively, and is used to mirror the preset potential signal to the second end of the current generating module during the light emitting phase and provide a flow path for the driving current; Wherein, in the light emitting stage, the potential of the preset potential signal is lower than the potential of the data signal.

2. The pixel circuit according to claim 1, wherein: The potential mirror module includes: a light emitting control unit, a controlled unit and a differential unit; The light-emitting control unit is electrically connected to the second end of the light-emitting module, the controlled unit, and the differential unit respectively; the light-emitting control unit is used to transmit the first power signal to the controlled unit, transmit the preset potential signal to the differential unit, and provide a flow path for the driving current; The controlled unit is also electrically connected to the differential unit; the controlled unit is used to provide a constant current source to the differential unit under the control of the first power signal and the first scan signal; The differential unit is also electrically connected to the second end of the current generating module; the differential unit is used to mirror the preset potential signal to the second end of the current generating module under the control of the constant current source.

3. The pixel circuit according to claim 2, wherein: The light-emitting control unit includes: a first transistor, a second transistor, and a third transistor; the gate of the first transistor is connected to the light-emitting control signal, the first electrode of the first transistor is connected to the first power supply signal, and the second electrode of the first transistor is electrically connected to the controlled unit; the gate of the second transistor is connected to the light-emitting control signal, the first electrode of the second transistor is connected to the preset potential signal, and the second electrode of the second transistor is electrically connected to the differential unit; the gate of the third transistor is connected to the light-emitting control signal, the first electrode of the third transistor is electrically connected to the second end of the light-emitting module and the differential unit respectively, and the second electrode of the third transistor is connected to the second power supply signal; The controlled unit includes: a fourth transistor; a gate of the fourth transistor is connected to the first scanning signal, a first electrode of the fourth transistor is electrically connected to the second electrode of the first transistor, and a second electrode of the fourth transistor is electrically connected to the differential unit; The differential unit includes: a fifth transistor and a sixth transistor; the gate of the fifth transistor is electrically connected to the second electrode of the second transistor, the first electrode of the fifth transistor is electrically connected to the second electrode of the fourth transistor and the first electrode of the sixth transistor respectively, the second electrode of the fifth transistor is electrically connected to the first electrode of the third transistor and the second electrode of the sixth transistor respectively, and the gate of the sixth transistor is electrically connected to the second end of the current generating module.

4. The pixel circuit according to claim 2, wherein: The data writing module includes: a seventh transistor and an eighth transistor; the gates of the seventh transistor and the eighth transistor are both connected to the second scanning signal, the first electrode of the seventh transistor is connected to the data signal, the second electrode of the seventh transistor is electrically connected to one end or the other end of the controlled unit, the first electrode of the eighth transistor is electrically connected to the differential unit, and the second electrode of the eighth transistor is electrically connected to the first end of the current generating module; Alternatively, the data writing module includes: a ninth transistor; the gate of the ninth transistor is connected to the second scanning signal, the first electrode of the ninth transistor is connected to the data signal, and the second electrode of the ninth transistor is electrically connected to the first end of the current generating module.

5. The pixel circuit according to claim 1, wherein: The current generating module includes: a resistor; a first end of the resistor serves as the first end of the current generating module, and a second end of the resistor serves as the second end of the current generating module.

6. The pixel circuit according to claim 1, wherein: The storage module includes: a capacitor; a first end of the capacitor is connected to a first power supply signal, and a second end of the capacitor is electrically connected to the first end of the current generating module.

7. The pixel circuit according to claim 1, wherein: Also includes: Initialization module; the initialization module is electrically connected to the first end of the current generating module or the second end of the current generating module, and the initialization module is used to initialize the first end of the light emitting module.

8. The pixel circuit according to claim 7, wherein: The initialization module includes: a tenth transistor; the gate of the tenth transistor is connected to the third scanning signal, the first electrode of the tenth transistor is connected to the initialization signal, and the second electrode of the tenth transistor is electrically connected to the first end of the current generating module or the second end of the current generating module.

9. The pixel circuit according to any one of claims 1 to 8, wherein: The preset potential signal includes a jump potential signal.

10. The pixel circuit according to any one of claims 1 to 8, wherein: The preset potential signal includes: a fixed potential signal.

11. The pixel circuit according to claim 10, wherein: The preset potential signal is a zero potential signal.

12. A display panel, characterized in that: include: The pixel circuit according to any one of claims 1 to 11.

13. A method for driving a pixel circuit, characterized in that: Used to drive the pixel circuit according to any one of claims 1 to 11, the driving method comprising: In the data writing phase, the data writing module is controlled to write a data signal to the first terminal of the current generating module; During the light-emitting stage, the potential mirror module is controlled to mirror the preset potential signal to the second end of the current generating module and provide a flow path for the driving current; the current generating module generates a driving current according to the potential difference between its first end and the second end, driving the light-emitting module to emit light.

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