Integrated circuit board, chip bonding method, and electronic device
By setting bonding areas with different elastic adhesives between the circuit board and the chip, the problem of poor resistance to thermal shock caused by the difference in thermal expansion rate between silicon-based chips and circuit boards is solved, and a stable connection between the chip and the circuit board is achieved.
Patent Information
- Application Number
- CN202210583366.0
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2022-05-25
- Publication Date
- 2026-02-03
- Estimated Expiration
- 2042-05-25
AI Technical Summary
In the prior art, the difference in linear thermal expansion rates between silicon-based chips and circuit board materials leads to poor resistance to thermal shock, which may cause silicon-based chips to break or separate from the circuit board.
A chip bonding layer is set between the circuit board and the chip. The bonding layer includes a first bonding area near the bonding terminal and a second bonding area away from the bonding terminal. The first bonding area uses epoxy resin with low elasticity, and the second bonding area uses silicone with high elasticity. The width of the second bonding area is greater than that of the first bonding area, and the elongation of the second adhesive is more than 10%.
It improves the resistance of integrated circuit boards to thermal shock, avoids chip damage and separation from the circuit board, and maintains the connection stability of lead bonding.
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Figure CN115188730B_ABST
Abstract
Description
Technical Field
[0001] This invention relates to the technical field of chip bonding, and more particularly to an integrated circuit board, a chip bonding method, and an electronic device. Background Technology
[0002] Various silicon-based chips are integrated on the integrated circuit boards used in some electronic devices. The silicon-based chips are bonded to the surface of the circuit board by adhesives, such as epoxy resin.
[0003] When bonding silicon-based chips and circuit boards (typically using FR-4 material) with epoxy resin adhesive, differences in the linear thermal expansion rates (LCOEs) between the different materials result in a smaller LCOE for the silicon-based chip and adhesive, compared to a larger LCOE for the circuit board. This difference leads to poor resistance to thermal shock, potentially causing silicon-based chip breakage or separation between the chip and the circuit board. Summary of the Invention
[0004] This invention provides an integrated circuit board, a chip bonding method, and an electronic device to solve the technical problem of poor resistance to thermal shock in the existing products.
[0005] The integrated circuit board provided by the present invention includes a circuit board and a chip, wherein a chip bonding layer is provided between the circuit board and the chip to bond the two together; a bonding terminal is also provided on the circuit board, the bonding terminal being located on one side of the chip; the chip bonding layer includes a first bonding area and a second bonding area; in the chip bonding layer, the first bonding area is close to the bonding terminal, and the second bonding area is far from the bonding terminal; the first bonding area has a first adhesive, the second bonding area has a second adhesive, and the elasticity of the second adhesive is greater than that of the first adhesive.
[0006] The elongation of the second adhesive is above 10%.
[0007] The second adhesive is silicone.
[0008] The first adhesive is an epoxy resin adhesive.
[0009] The width of the second binding area is greater than the width of the first binding area.
[0010] The ratio of the width of the second binding area to the width of the first binding area is greater than 2.
[0011] The width of the first binding area is not less than 5 millimeters.
[0012] Wherein, the first adhesive in the first bonding area is coated in a star-shaped or zigzag pattern; and / or, the second adhesive in the second bonding area is coated in a star-shaped or zigzag pattern.
[0013] The chip bonding method provided by this invention includes:
[0014] A first adhesive and a second adhesive are respectively applied to the first bonding area and the second bonding area on the circuit board, wherein the elasticity of the second adhesive is greater than that of the first adhesive;
[0015] The chip is aligned and bonded to the first and second bonding areas;
[0016] The first adhesive and the second adhesive are cured.
[0017] The chip bonding method further includes:
[0018] Connect the bonding terminals on the circuit board to the chip via wire bonding.
[0019] The electronic device provided by the present invention includes the aforementioned integrated circuit board.
[0020] The integrated circuit board, chip bonding method, and electronic device provided in the embodiments of the present invention have the following advantages compared with the prior art:
[0021] The integrated circuit board provided by this invention includes a chip bonding layer comprising a first bonding area and a second bonding area for bonding the circuit board and the chip. A first adhesive is disposed in the first bonding area to bond the circuit board and the chip; and the first adhesive can be selected from a type of adhesive with low elasticity, thereby ensuring a relatively stable bond between the circuit board and the chip in the first bonding area near the bonding terminals, preventing deformation and thus facilitating the connection stability of the lead bonding between the chip and the bonding terminals. A second adhesive is disposed in the second bonding area to bond the circuit board and the chip; and the second adhesive can be selected from a type of adhesive with high elasticity, thereby ensuring a certain degree of elasticity in the bond between the circuit board and the chip in the second bonding area away from the bonding terminals. This allows the second adhesive to maintain the bond between the circuit board and the chip through its elastic deformation state when thermal shocks or other temperature changes cause the circuit board, chip, and second adhesive to expand to different degrees due to their different thermal expansion rates, preventing chip damage or separation of the chip and circuit board connection. When the second adhesive undergoes elastic deformation, since it is located in the second bonding area and is far away from the bonding terminal, its deformation state has little impact on the lead bonding between the chip and the bonding terminal, and will not damage the connection stability of the lead bonding between the chip and the bonding terminal.
[0022] The chip bonding method provided by this invention produces an integrated circuit board with chips that has the same beneficial effects as described above, and will not be repeated here.
[0023] The electronic device provided by the present invention includes the aforementioned integrated circuit board and has the same beneficial effects as the aforementioned integrated circuit board, which will not be described in detail hereafter. Attached Figure Description
[0024] The accompanying drawings, which are incorporated in and form part of this specification, illustrate embodiments consistent with the invention and, together with the description, serve to explain the principles of the invention.
[0025] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, for those skilled in the art, other drawings can be obtained based on these drawings without creative effort.
[0026] Figure 1 This is a schematic diagram of the integrated circuit board in an embodiment of the present invention;
[0027] Figure 2 This is a schematic diagram of the circuit board structure;
[0028] Figure 3 This is a schematic diagram of the chip structure;
[0029] Figure 4 A schematic diagram of the structure after the circuit board and chip are bonded together;
[0030] Figure 5 This is a flowchart illustrating the chip bonding method in an embodiment of the present invention.
[0031] In the picture:
[0032] 10-Circuit board; 11-Chip; 12-Chip bonding layer; 13-Bonding terminal;
[0033] 121 - First binding area; 122 - Second binding area. Detailed Implementation
[0034] To make the objectives, technical solutions, and advantages of the embodiments of the present invention clearer, the technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.
[0035] The embodiments of the integrated circuit board and chip bonding method and electronic device provided by the present invention will be described below with reference to the accompanying drawings.
[0036] See Figure 1 , Figure 2 , Figure 3 and Figure 4 The integrated circuit board provided in this embodiment includes a circuit board 10 and a chip 11, with a chip bonding layer 12 connecting the circuit board 10 and the chip 11. A bonding terminal 13 is also provided on the circuit board 10, located on one side of the chip 11. The bonding achieved between the circuit board 10 and the chip 11 by the chip bonding layer 12 is called die bonding, and the bonding terminal 13 is used to achieve wire bonding with the chip 11.
[0037] In one embodiment of the present invention, the integrated circuit board is used for a display device, such as an OLED display device. That is, in this embodiment, the product is a PCB-based OLED display module. In this product, the chip 11 can be a silicon-based chip formed on a cover glass. The silicon-based chip may specifically include a driving circuit layer and an OLED display device layer. When the chip 11 is bonded to the chip bonding layer 12 on the circuit board 10, the driving circuit layer therein is bonded to the circuit board 10.
[0038] like Figure 2 As shown, the chip bonding layer 12 includes a first bonding region 121 and a second bonding region 122. In the chip bonding layer 12, the first bonding region 121 is close to the bonding terminal 13, and the second bonding region 122 is away from the bonding terminal 13. The first bonding region 121 has a first adhesive, and the second bonding region 122 has a second adhesive, the elasticity of the second adhesive being greater than that of the first adhesive.
[0039] In the first bonding area 121, the first adhesive bonds the circuit board 10 and the chip 11 together. Furthermore, the first adhesive can be selected from a type of adhesive with low elasticity, so that the bond between the circuit board 10 and the chip 11 is more fixed and less prone to deformation in the first bonding area 121 near the bonding terminal 13. This makes it easier to ensure the connection stability of the lead bonding between the chip 11 and the bonding terminal 13.
[0040] In the second bonding area 122, the second adhesive bonds the circuit board 10 and the chip 11 together. Furthermore, the second adhesive can be a type of adhesive with high elasticity, thus providing a certain degree of elasticity in the bonding area 122, away from the bonding terminal 13. This allows the second adhesive to maintain the bond between the circuit board 10 and the chip 11 even when thermal shocks or temperature changes cause the circuit board 10, chip 11, and the second adhesive to expand to different degrees due to their different thermal expansion rates. This prevents the chip 11 from breaking or the connection between the chip 11 and the circuit board 10 from being disrupted and causing separation.
[0041] When the second adhesive undergoes elastic deformation, since it is located in the second bonding area 122 and is far away from the bonding terminal 13, its deformation state has little impact on the lead bonding between the chip 11 and the bonding terminal 13, and will not damage the connection stability of the lead bonding between the chip 11 and the bonding terminal 13.
[0042] Specifically, the first adhesive can be an epoxy resin adhesive, and a low-temperature thermosetting process is used to cure it. The second adhesive is an adhesive with an elongation of more than 10%, preferably silicone, and a moisture-curing process is used to cure it.
[0043] In this embodiment, the width of the second bonding area 122 is greater than the width of the first bonding area 121. This arrangement ensures that there is sufficient area on the chip bonding layer 12 to accommodate the highly elastic second adhesive. Furthermore, the ratio of the width of the second bonding area 122 to the width of the first bonding area 121 is greater than 2. For example, in... Figure 2 In the structure shown, the chip bonding layer 12 has a rectangular shape, and the first bonding area 121 and the second bonding area 122 are also rectangular. In the figure, the width L1 of the first bonding area 121 is a, and the width L2 of the second bonding area 122 is greater than 2a. This makes the area of the second bonding area larger, which can better prevent the chip 11 from being damaged and prevent the connection between the chip 11 and the circuit board 10 from being broken and separated.
[0044] In this embodiment, the width L1 of the first bonding area 121 is set to be no less than 5 mm. This setting ensures that the first bonding area 121 has sufficient area. On the one hand, this area enables better connection between the circuit board 10 and the chip 11. On the other hand, when the second adhesive in the second bonding area 122 undergoes large elastic deformation, the end of the chip bonding layer 12 near the bonding terminal 13 is not significantly affected by the elastic deformation of the second adhesive in the second bonding area 122, thus maintaining the connection stability between the chip 11 and the bonding terminal 13.
[0045] Specifically, the first adhesive in the first bonding area 121 can be applied in a star-shaped or zigzag pattern, or other shapes. The second adhesive in the second bonding area 122 can also be applied in a star-shaped or zigzag pattern, or other shapes.
[0046] The present invention also provides a chip bonding method. In its embodiments, the chip bonding method includes the following steps S1 to S3, as follows: Figure 5 As shown.
[0047] Step S1: Apply a first adhesive and a second adhesive to the first bonding area 121 and the second bonding area 122 on the circuit board 10, respectively. The elasticity of the second adhesive is greater than that of the first adhesive.
[0048] In step S1, the first bonding area 121 is set as the area of the chip bonding layer 12 adjacent to the bonding terminal 13, and the second bonding area 122 is set as the area of the chip bonding layer 12 away from the bonding terminal, such as... Figure 2 As shown. Simultaneously, the first binding area 121 is configured to have sufficient area; generally, the width of the first binding area 122 is not less than 5 mm. Furthermore, the width of the second binding area 122 is greater than the width of the first binding area 121; preferably, the width of the second binding area 122 can be twice or more the width of the first binding area 121, such as... Figure 2 As shown, when the width L1 of the first binding area 121 is a, the width L2 of the second binding area 122 can be 2a or greater.
[0049] In step S1, the elasticity of the second adhesive is greater than that of the first adhesive. Specifically, the second adhesive can be an adhesive with an elongation greater than 10%, preferably silicone. The first adhesive can be an adhesive with low elasticity, such as epoxy resin.
[0050] Step S2: Align and attach the chip 11 to the first bonding area 121 and the second bonding area 122.
[0051] Typically, a first bonding area 121 and a second bonding area 122 form a pattern of an independent chip bonding layer 12. In step S2, each chip 11 is attached to the pattern of an independent chip bonding layer 12.
[0052] Step S3: Cure the first adhesive and the second adhesive.
[0053] In step S3, when epoxy resin is selected as the first adhesive and silicone is selected as the second adhesive, the first adhesive can be first heat-cured at a low temperature, and then the second adhesive can be cured. After curing, the first adhesive and the second adhesive are bonded to the chip 11 in the first bonding area 121 and the second bonding area 122, respectively.
[0054] When the first and second adhesives are selected as other types of adhesives, the curing order of the first and second adhesives is not limited to the above description, and other curing orders can be adopted according to actual needs.
[0055] According to an embodiment of the present invention, in the first bonding area 121, a first adhesive bonds the circuit board 10 and the chip 11. Furthermore, the first adhesive can be selected as a type of adhesive with low elasticity, thereby ensuring a relatively stable bond between the circuit board 10 and the chip 11 in the first bonding area 121 near the bonding terminal 13, preventing deformation and thus facilitating the connection stability of the lead bonding between the chip 11 and the bonding terminal 13. In the second bonding area 122, a second adhesive bonds the circuit board 10 and the chip 11. Furthermore, the second adhesive can be selected as a type of adhesive with high elasticity, thereby ensuring a certain degree of elasticity in the bond between the circuit board 10 and the chip 11 in the second bonding area 122 away from the bonding terminal 13. This allows the second adhesive to maintain the bond between the circuit board 10 and the chip 11 through its elastic deformation state when thermal shocks or other temperature changes cause the circuit board 10, chip 11, and second adhesive to expand to different degrees due to their different thermal expansion rates. This prevents chip 11 from breaking or the connection between chip 11 and circuit board 10 from being disrupted and causing separation. When the second adhesive undergoes elastic deformation, since it is located in the second bonding area 122 and is far away from the bonding terminal 13, its deformation state has little impact on the lead bonding between the chip 11 and the bonding terminal 13, and will not damage the connection stability of the lead bonding between the chip 11 and the bonding terminal 13.
[0056] In one embodiment of the present invention, the chip bonding method further includes:
[0057] Step S4: Connect the bonding terminals 13 on the circuit board 10 to the chip 11 with wires, such as... Figure 4 As shown.
[0058] In step S4, leads are used to connect chip 11 and bonding terminal 13, thereby connecting chip 11 and other electronic components on circuit board 10 to form one or more circuit units and realize corresponding functions.
[0059] The present invention also provides an electronic device. In one embodiment, the electronic device includes the aforementioned integrated circuit board.
[0060] In one embodiment of an electronic device, the electronic device can be a mobile phone, computer, monitor, television, or other electronic product in the conventional sense. It can also be any device or equipment that has an integrated circuit board and implements a certain function through the integrated circuit board.
[0061] It should be noted that, in this document, relational terms such as "first" and "second" are used merely to distinguish one entity or operation from another, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Furthermore, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Without further limitations, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes said element.
[0062] The above description is merely a specific embodiment of the present invention, enabling those skilled in the art to understand or implement the invention. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the general principles defined herein may be implemented in other embodiments without departing from the spirit or scope of the invention. Therefore, the present invention is not to be limited to the embodiments shown herein, but is to be accorded the widest scope consistent with the principles and novel features claimed herein.
Claims
1. An integrated circuit board, characterized in that, The integrated circuit board includes a circuit board and a chip, and a chip bonding layer is provided between the circuit board and the chip to bind them together; The circuit board is also provided with bonding terminals, which are located on one side of the chip; The chip bonding layer includes a first bonding area and a second bonding area; in the chip bonding layer, the first bonding area is close to the bonding terminal, and the second bonding area is far from the bonding terminal. The first binding area has a first adhesive, the second binding area has a second adhesive, the elasticity of the second adhesive is greater than the elasticity of the first adhesive; the width of the second binding area is greater than the width of the first binding area; the ratio of the width of the second binding area to the width of the first binding area is greater than 2.
2. The integrated circuit board according to claim 1, characterized in that, The elongation of the second adhesive is above 10%.
3. The integrated circuit board according to claim 1 or 2, characterized in that, The second adhesive is silicone.
4. The integrated circuit board according to claim 1 or 2, characterized in that, The first adhesive is an epoxy resin adhesive.
5. The integrated circuit board according to claim 1, characterized in that, The width of the first binding area is not less than 5 millimeters.
6. The integrated circuit board according to claim 1, characterized in that, The first adhesive within the first bonding area is coated in a star-shaped or zigzag pattern; and / or The second adhesive in the second bonding area is coated in a star-shaped or zigzag pattern.
7. A chip bonding method, characterized in that, The chip bonding method includes: A first adhesive and a second adhesive are respectively coated on a first bonding area and a second bonding area on a circuit board. The elasticity of the second adhesive is greater than that of the first adhesive. A bonding terminal is provided on the circuit board. The bonding terminal is located on one side of the chip. The first bonding area is close to the bonding terminal, and the second bonding area is far away from the bonding terminal. The width of the second bonding area is greater than the width of the first bonding area. The ratio of the width of the second bonding area to the width of the first bonding area is greater than 2. The chip is aligned and bonded to the first and second bonding areas; The first adhesive and the second adhesive are cured.
8. The chip bonding method according to claim 7, characterized in that, The chip bonding method further includes: Connect the bonding terminals on the circuit board to the chip via wire bonding.
9. An electronic device, characterized in that, The electronic device includes the integrated circuit board according to any one of claims 1 to 6.
Citation Information
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