A data sharing method, device and storage medium based on storage slice mapping buffer SMB transmission

Abstract

The present invention provides a data sharing method, device and storage medium based on SMB transmission, the steps of the method include: each processing node is connected to a preset cache center, and the cache center is provided with a storage slice; the processing node receives the transfer data, determines whether the cache space of the processing node can accommodate the input data, and if not, sends a storage request to the cache center; the cache center provides the storage slice for the processing node, and first marks the storage slice provided to the processing node; the processing node stores the transfer data in the storage slice, releases the transfer data stored in the storage slice to the downstream processing node, and deletes the transfer data in the storage slice and the first mark of the storage slice after the storage slice completes the release of all downstream nodes. The present invention provides an expandable cache center for the node, first marks the storage slice in use, deletes the transfer data in the storage slice after all release tasks are completed, and deletes the first mark.

Description

Technical Field

[0001] The present invention relates to the technical field of network processors, and in particular to a data sharing method, device and storage medium based on SMB transmission of a memory slice mapping buffer. Background Art

[0002] There are currently two main architectures in the field of network processors and switches: PIPELINE stream processing architecture and RTC (Run To Complete) "run to completion" processing architecture. The stream processing architecture divides the processing of messages into multiple stages, each of which is performed by a specific processing unit. Messages and metadata are moved in different processing units; while the RTC processing architecture is completed by independent processing units.

[0003] In the RTC architecture, each processing engine is completed independently, and there is no need for a large amount of data transfer and exchange between processing engines. However, the pure RTC architecture will face problems such as single-stream performance and flow isolation. Therefore, the PIPELINE architecture must be adopted and the problems of cache sharing and use must be solved.

[0004] Under the PIPELINE architecture, there are currently two approaches: one is to stream all data (packet headers and payloads) through each processing unit, and the other is to move the packet header and some metadata representing the processing method between each processing module.

[0005] The first method is generally used in traditional switch systems. In this system, the processing flow and processing time of each processing module are fixed, and the scalability is poor. In addition, since most of the payload data does not need to be used and processed during the forwarding process, unnecessary data transfer will actually lead to increased latency and increased power consumption.

[0006] As for the second method, which is used in some programmable network processors, unnecessary data movement will still be caused when the message header and metadata are transmitted between processing engines. At the same time, due to factors such as the internal cache limitations of each processing unit, the size of the metadata and header will be limited. Therefore, both methods face the problem of poor scalability. Summary of the invention

[0007] In view of this, an embodiment of the present invention provides a data sharing method based on SMB transmission to eliminate or improve one or more defects in the prior art.

[0008] One aspect of the present invention provides a data sharing method based on SMB transmission, wherein a network processor includes a plurality of processing nodes, and the steps of the method include:

[0009] Each of the processing nodes is connected to a preset cache center, and the cache center is provided with a plurality of storage slices;

[0010] The processing node receives the transferred data, determines whether the cache space of the processing node can accommodate the input data, and if not, sends a storage request to the cache center;

[0011] The cache center provides storage slices for the processing node based on the storage request, and performs a first mark on the storage slices provided to the processing node;

[0012] The processing node stores the transfer data in the storage slice, and releases the transfer data stored in the storage slice to the downstream processing nodes respectively. When the storage slice completes the release of all downstream nodes, the transfer data in the storage slice is deleted, and the first mark of the storage slice is deleted.

[0013] By adopting the above scheme, the present invention provides an expandable cache center for nodes. When the node needs to be expanded, it can request storage slices from the cache center according to the expansion requirements, make a first mark on the storage slices in use, and release data according to the requirements of downstream processing nodes. After completing all release tasks, the transferred data in the storage slices is deleted, and the first mark is deleted, so that the storage slices can be used again, providing convenient data expansion for the network processor.

[0014] In some embodiments of the present invention, the transferred data includes data processed by the processing node and data before being processed by the processing node, and the step of the processing node storing the transferred data in the storage slice includes:

[0015] When the data before being processed by the processing node is input to the processing node, if the cache space of the processing node cannot accommodate the input data, a storage request is sent to the cache center to store the input data in the storage slice provided by the cache center;

[0016] The processing node processes the data, outputs the data processed by the processing node, determines whether the current remaining space can accommodate the data processed by the processing node, and if not, sends a storage request to the cache center again to store the data processed by the processing node in the storage slice provided by the cache center.

[0017] In some embodiments of the present invention, the processing node includes at least one processing logic. When the processing node includes multiple processing logics, multiple output data are output based on the same input data, and the multiple output data are all stored in the storage chip.

[0018] In some embodiments of the present invention, the input data is preset with a transmission tag, and when the processing node includes multiple processing logics, the steps further include:

[0019] The processing node parses the transmission mark in the input data, and determines the processing logic of the input data and the downstream processing node to which the input data is to be output after being processed based on the transmission mark.

[0020] In some embodiments of the present invention, the processing node stores the transferred data in a storage slice, and releases the transferred data stored in the storage slice to downstream processing nodes respectively. When the storage slice completes the release of all downstream nodes, the step of deleting the transferred data in the storage slice further includes:

[0021] Based on the number of data releases of the processing node, the storage slice is secondly marked. The storage slice records the number of times the storage slice releases its own data. When the number of times the storage slice releases its own data is equal to the second mark, the first mark is deleted from the transferred data in the storage slice.

[0022] In some embodiments of the present invention, the step of sending a storage request to a cache center includes:

[0023] The required expansion space is determined based on the cache space of the processing node itself and the total space required for transmitting the data, and the storage request includes information on the required expansion space.

[0024] In some embodiments of the present invention, the storage slices are all provided with numbers, the processing nodes are all provided with address translation modules, the translation modules are used to obtain the addresses of the storage slices according to the numbers of the storage slices, obtain data from the storage slices, and release the transfer data stored in the storage slices to the downstream processing nodes. The steps include:

[0025] The downstream processing node obtains the serial number of the storage slice, and the address translation module of the downstream processing node obtains the address of the transfer data based on the serial number of the storage slice, and obtains the transfer data from the address of the transfer data.

[0026] In some embodiments of the present invention, the step of releasing the transferred data stored in the storage slice to the downstream processing node further includes:

[0027] Determine the working status of the downstream processing node. If the downstream processing node is processing data, send the number of the storage slice to the downstream processing node, and enter the number of the storage slice into the queue as queue data;

[0028] When the queued data is output from the queue, the downstream processing node obtains the address of the transferred data based on the number of the storage slice, and acquires the transferred data from the address of the transferred data.

[0029] Additional advantages, purposes, and features of the present invention will be described in part in the following description, and will become apparent to those skilled in the art after studying the following, or may be learned from the practice of the present invention. The purposes and other advantages of the present invention can be specifically pointed out and obtained in the specification and the accompanying drawings.

[0030] Those skilled in the art will appreciate that the objectives and advantages that can be achieved with the present invention are not limited to the above specific description, and the above and other objectives that can be achieved by the present invention will be more clearly understood from the following detailed description. BRIEF DESCRIPTION OF THE DRAWINGS

[0031] The drawings described herein are used to provide a further understanding of the present invention, constitute a part of this application, and do not constitute a limitation of the present invention.

[0032] Figure 1 It is a schematic diagram of a first embodiment of a data sharing method based on SMB transmission of a memory slice mapping buffer according to the present invention;

[0033] Figure 2 A schematic diagram of transmitting data to downstream processing nodes;

[0034] Figure 3 A schematic diagram of a processing structure of an embodiment of the present invention. DETAILED DESCRIPTION

[0035] In order to make the purpose, technical solution and advantages of the present invention more clearly understood, the present invention is further described in detail below in conjunction with the embodiments and the accompanying drawings. Here, the illustrative embodiments of the present invention and their descriptions are used to explain the present invention, but are not intended to limit the present invention.

[0036] It should also be noted that, in order to avoid obscuring the present invention due to unnecessary details, only structures and / or processing steps closely related to the solutions according to the present invention are shown in the accompanying drawings, while other details that are not closely related to the present invention are omitted.

[0037] It should be emphasized that the term “include / comprises” when used herein refers to the presence of features, elements, steps or components, but does not exclude the presence or addition of one or more other features, elements, steps or components.

[0038] It should also be noted that, unless otherwise specified, the term “connection” herein may refer not only to a direct connection but also to an indirect connection involving an intermediate.

[0039] Hereinafter, embodiments of the present invention will be described with reference to the accompanying drawings. In the accompanying drawings, the same reference numerals represent the same or similar components, or the same or similar steps.

[0040] To solve the above problems, Figure 1 , 3 As shown, the present invention proposes a data sharing method based on storage slice mapping buffer SMB transmission, the network processor includes multiple processing nodes, and the steps of the method include:

[0041] In some implementations of the present invention, each of the processing nodes can independently complete different processing logics, and multiple processing nodes are connected to complete the entire processing task.

[0042] Step S100, each of the processing nodes is connected to a preset cache center, and the cache center is provided with a plurality of storage slices;

[0043] In some embodiments of the present invention, the preset cache center can be a storage tool including a static random access memory (SRAM), and the internal storage space of the static random access memory is divided into multiple storage units, each storage unit includes a partial storage space of the static random access memory, and each storage unit is a storage chip.

[0044] In some embodiments of the present invention, the static random access memory is used, edited and transmitted based on a slice mapping buffer (SMB).

[0045] By adopting the above scheme, SMB (Slice Mapping Buffer) is transmitted between programmable packet processing engines (PPE) to schedule tasks, thereby reducing the amount of data directly transmitted between programmable packet processing engines (PPE). Each packet processing engine can read and write a small amount of shared packet cache as needed at each processing stage without the need to frequently move a large amount of metadata.

[0046] Step S200, the processing node receives the transferred data and determines whether the cache space of the processing node can accommodate the input data. If not, a storage request is sent to the cache center;

[0047] In some embodiments of the present invention, the cache center is used to provide expanded storage space for the processing node. If the processing node's own cache space can accommodate all the input data, there is no need to send a storage request to the cache center. If the processing node's own cache space cannot accommodate the input data, the cache center is required to provide storage slices for the processing node to expand the storage space so that the storage space of the processing node's cache space plus the storage space of the storage slices provided by the cache center can accommodate the input data.

[0048] Step S300, the cache center provides a storage slice for the processing node based on the storage request, and performs a first mark on the storage slice provided to the processing node;

[0049] In some embodiments of the present invention, the cache center provides a storage slice of a corresponding size to the processing node based on the storage space requested by the storage request, and the storage slice provided by the cache center may be multiple;

[0050] In some embodiments of the present invention, when the storage slice is provided to a processing node for use, a first mark is recorded on the storage slice of the cache center, where the first mark is used to mark that the storage slice is being used, and the storage slice will not be provided to other processing nodes again.

[0051] In step S400, the processing node stores the transfer data in the storage slice, and releases the transfer data stored in the storage slice to the downstream processing nodes respectively. When the storage slice completes the release of all downstream nodes, the transfer data in the storage slice is deleted, and the first mark of the storage slice is deleted.

[0052] In some implementations of the present invention, the transferred data includes data processed by the processing node and data before being processed by the processing node, and the data processed by the processing node is released to a downstream processing node.

[0053] In some embodiments of the present invention, the processing node parses the data before processing by the processing node to obtain the downstream processing nodes to which the data processed by the processing node needs to be passed, records the number of downstream processing nodes to which the data needs to be passed, and deletes the first mark of the storage slice when the storage slice completes the release of all downstream nodes.

[0054] In some embodiments of the present invention, after the storage slice deletes the first mark, the storage slice returns to an idle state. When the storage slice is in an idle state, it can be provided to the processing node by the cache center again to complete the task of expanding the cache, thereby facilitating the reuse of the storage slice and improving the utilization rate of each processing node in the cache center.

[0055] By adopting the above scheme, the present invention provides an expandable cache center for nodes. When the node needs to be expanded, it can request storage slices from the cache center according to the expansion requirements, make a first mark on the storage slices in use, and release data according to the requirements of downstream processing nodes. After completing all release tasks, the transferred data in the storage slices is deleted, and the first mark is deleted, so that the storage slices can be used again, providing convenient data expansion for the network processor.

[0056] This application can operate SMB through the firmware in the processing engine, including application, release, reuse and rearrangement. Application means applying for one or more newly allocated storage slices from the shared cache when the storage space needs to be expanded; release means sending the specified SMB to the cache management module for recycling when the packet is discarded; reuse means when the processing engine needs to use a certain storage space multiple times, notifying the cache management module of the scope and number of times to be reused; rearrangement means moving the position of each slice number in the SMB and forming a new slice number sequence.

[0057] The technical effect achieved: It can adapt to complex and changing businesses, and the modification of packages is highly scalable, that is, it can realize services such as programmable control of message length expansion and multiple output of messages without payload data movement.

[0058] like Figure 2 , 3 As shown, in some embodiments of the present invention, the transferred data includes data processed by the processing node and data before being processed by the processing node, and the step of the processing node storing the transferred data in the storage slice includes:

[0059] Step S410, when the data before being processed by the processing node is input to the processing node, if the cache space of the processing node cannot accommodate the input data, a storage request is sent to the cache center to store the input data in the storage slice provided by the cache center;

[0060] In some embodiments of the present invention, if the cache space of the processing node itself can accommodate all the input data, there is no need to send a storage request to the cache center.

[0061] Step S420, the processing node processes the data, outputs the data processed by the processing node, determines whether the current remaining space can accommodate the data processed by the processing node, and if not, sends a storage request to the cache center again to store the data processed by the processing node in the storage slice provided by the cache center.

[0062] In some embodiments of the present invention, in the step of determining whether the current remaining space can accommodate the data processed by the processing node, the remaining space may be the remaining space of the processing node's own cache space or the remaining space of the requested storage slice.

[0063] In some embodiments of the present invention, if the processing node has not requested a storage slice from the cache center before processing the data, the remaining space is the remaining space of the processing node's own cache space; if the processing node has requested a storage slice from the cache center before processing the data, the remaining space is the remaining space of the requested storage slice.

[0064] In some implementations of the present invention, if the current remaining space can accommodate the data processed by the processing node, there is no need to send a storage request to the cache center.

[0065] By adopting the above scheme, this scheme can send requests to the cache center twice in one processing process of the same node, and can expand the space in real time. On the one hand, it avoids occupying too many storage slices at one time, and on the other hand, it can ensure the normal use of storage space.

[0066] In some embodiments of the present invention, the processing node includes at least one processing logic. When the processing node includes multiple processing logics, multiple output data are output based on the same input data, and the multiple output data are all stored in the storage chip.

[0067] In some implementations of the present invention, the processing logic inside the node may be addition or multiplication, etc., which is only provided as an example and is not specifically limited.

[0068] In some embodiments of the present invention, if a processing node includes multiple processing logics, the processing node obtains the processing logic used for the data by parsing the data before being processed by the processing node;

[0069] The data analysis may be decoding the data through a decoder to obtain the above processing logic and information of downstream processing nodes.

[0070] In some embodiments of the present invention, output data based on different processing logics may be stored on different storage slices, or may be stored on the same storage slice or locally on a processing node.

[0071] In some embodiments of the present invention, the input data is preset with a transmission tag, and when the processing node includes multiple processing logics, the steps further include:

[0072] The processing node parses the transmission mark in the input data, and determines the processing logic of the input data and the downstream processing node to which the input data is to be output after being processed based on the transmission mark.

[0073] By adopting the above solution, the input data is provided with a transmission mark, and the node learns the data transmission path through data analysis, thereby improving the data transmission efficiency.

[0074] In some embodiments of the present invention, the processing node stores the transferred data in a storage slice, and releases the transferred data stored in the storage slice to downstream processing nodes respectively. When the storage slice completes the release of all downstream nodes, the step of deleting the transferred data in the storage slice further includes:

[0075] Step S430, based on the number of data releases of the processing node, the storage slice is secondly marked, and the storage slice records the number of times it releases data. When the number of times it releases data is equal to the second mark, the first mark is deleted from the transferred data in the storage slice.

[0076] In some embodiments of the present invention, the second mark records the total number of times the storage slice needs to release data, and records each data release of the storage slice. When the actual number of data releases of the storage slice reaches the second mark, the storage slice completes the storage task, clears the internal data, and deletes the first mark and the second mark.

[0077] By adopting the above solution, the present solution records the total number of times the storage slice needs to release data through the second mark. When the storage slice completes the storage task, the internal data can be cleared in time, so as to facilitate the reuse of the storage slice.

[0078] In some embodiments of the present invention, the step of sending a storage request to a cache center includes:

[0079] The required expansion space is determined based on the cache space of the processing node itself and the total space required for transmitting the data, and the storage request includes information on the required expansion space.

[0080] In some embodiments of the present invention, if the required expansion space is 200M, 200M is requested from the cache center to prevent waste of storage resources;

[0081] In actual use, since the provided storage slice may be larger than the required expansion space, there may be surplus space.

[0082] In some embodiments of the present invention, the storage slices are all numbered, and the step of releasing the transferred data stored in the storage slices to the downstream processing nodes includes:

[0083] The downstream processing node obtains the serial number of the storage slice, obtains the address of the transfer data based on the serial number of the storage slice, and obtains the transfer data from the address of the transfer data.

[0084] By adopting the above solution, the downstream processing nodes of the present application do not need to record addresses, but only need to obtain address information through the number of the storage slice, thereby improving data transmission efficiency.

[0085] In some embodiments of the present invention, the step of releasing the transferred data stored in the storage slice to the downstream processing node further includes:

[0086] Determine the working status of the downstream processing node. If the downstream processing node is processing data, send the number of the storage slice to the downstream processing node, and enter the number of the storage slice into the queue as queue data;

[0087] When the queued data is output from the queue, the downstream processing node obtains the address of the transferred data based on the number of the storage slice, and acquires the transferred data from the address of the transferred data.

[0088] By adopting the above scheme, the storage slice number is used as the queuing data to enter the queuing queue, and all data does not need to be entered into the queue, thereby improving the queuing queue's capacity and being able to provide queues for more nodes. The downstream processing nodes can also obtain the address of the transmitted data based on the storage slice number, thereby improving resource utilization.

[0089] This solution uses queues (FIFO) to transmit SMBs between processing engines; the technical effect achieved is: reducing the waiting time of the processing engines.

[0090] This solution is based on the shared cache read and write method of SMB. It performs address translation at the processing engine to form the physical start address and read and write length, and forms sequential physical addresses near the shared cache.

[0091] The technical effect achieved: improving transmission efficiency, reducing latency, and shielding the details of physical memory from the processing engine firmware.

[0092] Increased flexibility and scalability, reducing the cache used by the processing engine due to inter-core scheduling.

[0093] The node may be a PPE.

[0094] Each Packet Processing Engine (PPE) contains an Ingress SMB and an Egress SMB, where the Ingress SMB is received from the previous PPE. The Packet Processing Engine (PPE) that receives the Ingress SMB can read the data content prepared by the previous PPE in the shared cache through the Ingress SMB. Each PPE can interact with the cache management unit through the bus to apply for, release, and reuse SMB storage slices, and rearrange the SMB through the firmware in the PPE to form an Egress SMB. The processing engine can use the Egress SMB to perform shared cache write operations and pass the Egress SMB to the subsequent processing engine so that the subsequent processing engine can obtain the data prepared by the current processing engine.

[0095] PPE is a programmable packet processing engine, including program memory, instruction pipeline and local cache. The program memory is static random access memory SRAM, which stores a series of packet processing instructions for the instruction pipeline to read and execute; the local buffer (LB) is composed of SRAM, which is divided into SMB storage space and ordinary data storage space according to the address; the instruction pipeline reads the firmware in the program memory and parses and executes it. The instruction pipeline can read data at any location in the local cache (LB) and perform logical arithmetic operations (through the arithmetic logic unit ALU and general register GPR) and carry out write-back operations. The instruction pipeline operates on data in units of 2 bytes.

[0096] In the local cache (LB) of PPE, SMB occupies 256B of address space, of which Ingress SMB occupies 128B and Egress SMB occupies 128B. Every 2B in SMB describes the slice number of a shared storage slice, which can provide address translation for 256B storage space. Ingress SMB and Egress SMB can provide 16KB of address translation respectively, which can meet the processing requirements of jumbo frames (9600B).

[0097] The descriptions here are only possible scenarios and should not be understood as specific limitations.

[0098] In order to improve the efficiency of cache space, this solution uses a shared cache method, that is, SRAM is divided into multiple memory slices for management and use. Each processing engine can perform address translation according to the memory slice sequence (i.e. SMB, memory slice mapping buffer) and read and write the shared cache.

[0099] The inventors found that the processing methods for network packets are complex and varied: 1) When performing services such as mirroring, broadcasting, and multicasting, the payload will be sent multiple times, and each message header will be modified differently, and each time it will be sent to a different output queue and will be output at an unpredictable time. 2) In some business scenarios, there may be a large amount of storage space expansion for the message header, and even LRO (Large Receive Offload, which requires multiple messages to be combined into one message) and GSO (Generic Segmentation Offload, which requires one message to be split into multiple messages) must be processed. In both cases, the packet number (PID) must be regenerated and the mapping table for the storage slice number must be rearranged as needed, which will lead to a very complex hardware design (with the corresponding increase in area and power consumption).

[0100] In order to achieve the above-mentioned purpose of data sharing between processing engines, significantly reduce design complexity and area, and improve scalability, the following solution was finally formed:

[0101] 1) Use shared cache and adopt centralized cache management module. Support application, reuse and release of storage slices.

[0102] 2) SMB is directly transmitted between processing engines, so that when processing tasks are transmitted between processing engines, consistent cache space can be obtained. Data is transmitted through shared cache. Since the processing time of processing engines varies, SMB is temporarily stored in queues during the transmission process.

[0103] 3) The operation of SMB is managed by the firmware in the processing engine, and the firmware programmers directly apply for, reuse, release and other operations on SMB according to business needs.

[0104] When performing read and write operations on shared storage, the processing engine still only needs to provide the packet offset address, and the hardware will perform the address translation.

[0105] An embodiment of the present invention also provides a data sharing device based on storage slice mapping buffer SMB transmission, the device includes a computer device, the computer device includes a processor and a memory, the memory stores computer instructions, the processor is used to execute the computer instructions stored in the memory, when the computer instructions are executed by the processor, the device implements the steps of the method described above.

[0106] The embodiment of the present invention also provides a computer-readable storage medium, on which a computer program is stored, and when the computer program is executed by a processor, the steps of the data sharing method based on the storage slice mapping buffer SMB transmission are implemented. The computer-readable storage medium can be a tangible storage medium, such as a random access memory (RAM), a memory, a read-only memory (ROM), an electrically programmable ROM, an electrically erasable programmable ROM, a register, a floppy disk, a hard disk, a removable storage disk, a CD-ROM, or any other form of storage medium known in the technical field.

[0107] It should be understood by those skilled in the art that the exemplary components, systems and methods described in conjunction with the embodiments disclosed herein can be implemented in hardware, software or a combination of the two. Whether it is performed in hardware or software depends on the specific application and design constraints of the technical solution. Professional and technical personnel can use different methods to implement the described functions for each specific application, but such implementation should not be considered to be beyond the scope of the present invention. When implemented in hardware, it can be, for example, an electronic circuit, an application specific integrated circuit (ASIC), appropriate firmware, a plug-in, a function card, etc. When implemented in software, the elements of the present invention are programs or code segments used to perform the required tasks. The program or code segment can be stored in a machine-readable medium, or transmitted on a transmission medium or a communication link via a data signal carried in a carrier.

[0108] It should be clear that the present invention is not limited to the specific configuration and processing described above and shown in the figures. For the sake of simplicity, a detailed description of the known method is omitted here. In the above embodiments, several specific steps are described and shown as examples. However, the method process of the present invention is not limited to the specific steps described and shown, and those skilled in the art can make various changes, modifications and additions, or change the order between the steps after understanding the spirit of the present invention.

[0109] In the present invention, features described and / or illustrated for one embodiment may be used in the same or similar manner in one or more other embodiments, and / or combined with features of other embodiments or replace features of other embodiments.

[0110] The above description is only a preferred embodiment of the present invention and is not intended to limit the present invention. For those skilled in the art, the embodiments of the present invention may have various modifications and variations. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present invention shall be included in the protection scope of the present invention.

Claims

1. A data sharing method based on SMB transmission of a memory slice mapping buffer, characterized in that: The network processor includes a plurality of processing nodes, and the plurality of processing nodes are connected to complete the entire processing task. The steps of the method include: Each of the processing nodes is connected to a preset cache center, and the cache center is provided with a plurality of storage slices; The processing node receives the transferred data, determines whether the cache space of the processing node can accommodate the input data, and if not, sends a storage request to the cache center; The cache center provides storage slices for the processing node based on the storage request, and performs a first mark on the storage slices provided to the processing node; The processing node stores the transferred data in the storage slice, releases the transferred data stored in the storage slice to the downstream processing nodes respectively, and deletes the transferred data in the storage slice and the first mark of the storage slice after the storage slice completes the release to all downstream nodes; The processing node stores the transferred data in the storage slice, and releases the transferred data stored in the storage slice to the downstream processing nodes respectively. When the storage slice completes the release of all downstream nodes, the step of deleting the transferred data in the storage slice further includes: marking the storage slice with a second mark based on the number of data releases of the processing node, the storage slice records the number of data releases by itself, and when the number of data releases by itself is equal to the second mark, deleting the transferred data in the storage slice; The storage slices are all provided with numbers, the processing nodes are all provided with address translation modules, the translation modules are used to obtain the addresses of the storage slices according to the numbers of the storage slices, obtain data from the storage slices, and release the transfer data stored in the storage slices to the downstream processing nodes, the steps include: The downstream processing node obtains the serial number of the storage slice, and the address translation module of the downstream processing node obtains the address of the transfer data based on the serial number of the storage slice, and obtains the transfer data from the address of the transfer data.

2. The data sharing method based on SMB transmission of memory slice mapping buffer according to claim 1 is characterized in that: The transferred data includes data processed by the processing node and data before being processed by the processing node, and the step of the processing node storing the transferred data in the storage slice includes: When the data before being processed by the processing node is input to the processing node, if the cache space of the processing node cannot accommodate the input data, a storage request is sent to the cache center to store the input data in the storage slice provided by the cache center; The processing node processes the data, outputs the data processed by the processing node, determines whether the current remaining space can accommodate the data processed by the processing node, and if not, sends a storage request to the cache center again to store the data processed by the processing node in the storage slice provided by the cache center.

3. The data sharing method based on SMB transmission of a memory slice mapping buffer according to claim 1 or 2, characterized in that: The processing node includes at least one processing logic inside. When the processing node includes multiple processing logics, multiple output data are output based on the same input data, and the multiple output data are all stored in the storage chip.

4. The data sharing method based on SMB transmission of memory slice mapping buffer according to claim 3 is characterized in that: The input data is preset with a transmission mark. When the processing node includes multiple processing logics, the steps further include: The processing node parses the transmission mark in the input data, and determines the processing logic of the input data and the downstream processing node to which the input data is to be output after being processed based on the transmission mark.

5. The data sharing method based on SMB transmission of memory slice mapping buffer according to claim 1, characterized in that: The steps of sending a storage request to the cache center include: The required expansion space is determined based on the cache space of the processing node itself and the total space required for transmitting the data, and the storage request includes information on the required expansion space.

6. The data sharing method based on SMB transmission of memory slice mapping buffer according to claim 1, characterized in that: The step of releasing the transferred data stored in the storage slice to the downstream processing node also includes: Determine the working status of the downstream processing node. If the downstream processing node is processing data, send the number of the storage slice to the downstream processing node, and enter the number of the storage slice into the queue as queue data; When the queued data is output from the queue, the downstream processing node obtains the address of the transferred data based on the number of the storage slice, and acquires the transferred data from the address of the transferred data.

7. A data sharing device based on SMB transmission of a memory slice mapping buffer, characterized in that: The apparatus comprises a computer device, wherein the computer device comprises a processor and a memory, wherein the memory stores computer instructions, and the processor is used to execute the computer instructions stored in the memory. When the computer instructions are executed by the processor, the apparatus implements the steps of the method as described in any one of claims 1 to 6.

8. A computer-readable storage medium, characterized in that: A computer program is stored thereon, and when the computer program is executed by a processor, the steps of the data sharing method based on storage slice mapping buffer SMB transmission as described in any one of claims 1 to 6 are implemented.

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