voltage detection circuit

Abstract

The application discloses a voltage detection circuit, comprising: an input module for receiving a voltage to be detected; a control module connected with the input module, for outputting a control signal according to the voltage to be detected; and an output module connected with the control module, for selecting one of a supply voltage and a ground voltage as a test voltage according to the control signal, wherein the size of the test voltage represents the size of the voltage to be detected. The voltage detection circuit has a small number of devices, a simple structure, and can realize high-precision voltage comparison without an additional bias circuit.

Description

TECHNICAL FIELD

[0001] The present application relates to the field of analog integrated circuit technology, in particular to a voltage detection circuit. BACKGROUND

[0002] Many circuit modules have a voltage detection module to detect whether the power supply is on or off, which can turn off most circuit modules when the power supply is off to reduce power consumption. Or the supply voltage of the circuit module may appear in multiple levels, such as SD card or RGMII module, and the power supply voltage needs to support 1.8V and 3.3V. Under two different power supply voltages, the working mode of the circuit module needs to be switched to meet the functional performance requirements of the circuit module.

[0003] The common way to do voltage detection is to use a traditional comparator, but the traditional comparator uses a large number of devices and needs an additional bias circuit, so the required area is large and the consumed current is also large. SUMMARY

[0004] In view of the above problems, the purpose of the present application is to provide a voltage detection circuit which is simple and stable in structure and has low power consumption.

[0005] According to an aspect of the present application, a voltage detection circuit is provided, comprising: an input module configured to receive a to-be-detected voltage; a control module connected to the input module and configured to output a control signal according to the to-be-detected voltage; and an output module connected to the control module and configured to select one of a supply voltage and a ground voltage as a test voltage according to the control signal, wherein the size of the test voltage represents the size of the to-be-detected voltage.

[0006] Optionally, in the case that the test voltage is the supply voltage, the to-be-detected voltage is a first voltage; and in the case that the test voltage is the ground voltage, the to-be-detected voltage is a second voltage, wherein the first voltage is greater than the second voltage, and both the first voltage and the second voltage are less than or equal to the supply voltage.

[0007] Optionally, the input module comprises a first NMOS transistor, the control module comprises a first PMOS transistor, the output module comprises a second PMOS transistor and a second NMOS transistor, a source of the first PMOS transistor is connected with a power supply voltage, a gate is connected with a drain of the second PMOS transistor, and a drain is connected with a drain of the first NMOS transistor; a source of the second PMOS transistor is connected with the power supply voltage, a gate is connected with a drain of the first PMOS transistor, and a drain is connected with a gate of the first PMOS transistor; a drain of the first NMOS transistor is connected with a drain of the first PMOS transistor, a gate is connected with the voltage to be measured, and a source is connected with a second reference voltage; a drain of the second NMOS transistor is connected with a drain of the second PMOS transistor, a gate is connected with a first reference voltage, and a source is connected with a ground terminal.

[0008] Optionally, the input module comprises a first NMOS transistor, the control module comprises a first PMOS transistor, and the output module comprises a second PMOS transistor and a current source.

[0009] Optionally, a width-length ratio of the second PMOS transistor is greater than a width-length ratio of the second NMOS transistor.

[0010] Optionally, the first reference voltage is greater than a threshold voltage of the second NMOS transistor.

[0011] Optionally, the second reference voltage Vref2 satisfies (V2-VthMN1)<Vref2<(V1-VthMN1), wherein V1 represents a first voltage, V2 represents a second voltage, and VthMN1 represents a threshold voltage of the first NMOS transistor, wherein the first voltage is greater than the second voltage.

[0012] The voltage detection circuit provided in the application can realize voltage detection only by using two NMOS and two PMOS, and has the advantages of few used devices, simple structure, strong stability, and low power consumption.

[0013] Further, the voltage detection circuit provided in the application can judge the pressure value of the voltage to be measured, and high-precision voltage comparison can be realized without using an additional bias circuit. BRIEF DESCRIPTION OF DRAWINGS

[0014] The above and other objects, features and advantages of the present application will become more apparent from the following description of embodiments of the present application, taken in conjunction with the accompanying drawings, in which:

[0015] Figure 1 A working circuit module diagram of a voltage detection circuit according to an embodiment of the application is shown;

[0016] Figure 2A structural diagram of a voltage detection circuit according to an embodiment of the present application is shown.

[0017] Figure 3 A circuit diagram of a voltage detection circuit according to an embodiment of the present application is shown. DETAILED DESCRIPTION

[0018] The present application will be described in further detail below with reference to the accompanying drawings. In the various drawings, like reference numerals refer to like elements throughout. For the sake of clarity, each portion of the drawings has not been drawn to scale. In addition, some known portions can not be shown.

[0019] The present application will be described below based on embodiments, but the present application is not limited only to these embodiments. In the following detailed description of the present application, some specific details are described in detail. The present application can be fully understood without the description of these details by those skilled in the art. In order to avoid confusion of the essence of the present application, well-known methods, processes, procedures, elements and circuits are not described in detail.

[0020] Meanwhile, it should be understood that in the following description, "circuit" refers to a conductive loop formed by at least one element or sub-circuit through electrical or electromagnetic connection. When an element or circuit is said to be "connected to" another element or said to be "connected between" two nodes, it can be directly coupled or connected to another element or there can be intermediate elements, and the connection between elements can be physical, logical, or a combination thereof. On the contrary, when an element is said to be "directly coupled to" or "directly connected to" another element, it means that there is no intermediate element between the two.

[0021] Unless the context clearly requires otherwise, throughout the description and the claims, the words "comprise", "comprising", and the like are to be construed in an inclusive sense as opposed to an exclusive or exhaustive sense; that is to say, in the sense of "including, but not limited to".

[0022] In the description of the present application, it should be understood that the terms "first", "second", and the like are used only for the purpose of description and should not be construed as indicating or implying relative importance. In addition, in the description of the present application, unless otherwise stated, the meaning of "a plurality of" is two or more.

[0023] The specific embodiments of the present application will be described in further detail below with reference to the accompanying drawings and examples.

[0024] Figure 1 A working circuit module diagram of a voltage detection circuit according to an embodiment of the present application is shown.

[0025] Reference Figure 1In the working circuit module 100, a power supply module 110, a working module 120 and a voltage detection circuit 130 are included. The power supply module 110 is used to supply power to the working module 120, and the voltage detection circuit 130 is used to detect the voltage value of the power supply voltage Vsense output by the power supply module 110 and control the working module 120.

[0026] In the working circuit module 100, whether the power supply module 110 is turned on or off is determined according to the voltage value of Vsense detected by the voltage detection circuit 130, and whether to turn off part of the circuit in the working module 120 is determined, so that the power consumption of the working module 120 can be reduced to a certain extent; or whether the power supply module 110 is high voltage or low voltage is determined according to the voltage value of Vsense detected by the voltage detection circuit 130, and the working module 120 is switched to work in mode one or mode two, so that the functional performance requirements of the working module 100 can be met.

[0027] In this embodiment, the to-be-detected voltage Vsense is a power supply voltage, and in other embodiments, the to-be-detected voltage Vsense can also be a reference voltage.

[0028] Figure 2 A structural diagram of the voltage detection circuit according to the embodiment of the application is shown; Figure 3 A circuit diagram of the voltage detection circuit according to the embodiment of the application is shown.

[0029] Reference Figure 2 The voltage detection circuit 130 of the embodiment of the application includes a control module 131, an input module 132 and an output module 133. The input module 132 is connected with the control module 131, and the control module 131 is connected with the output module 133. The input module 132 is used to receive the to-be-detected voltage Vsense, the control module 131 generates a control signal according to the voltage value of the to-be-detected voltage Vsense, and the output module 133 selects one of the power supply voltage or the ground voltage as the test voltage Vout according to the control signal, and determines the size of the to-be-detected voltage Vsense according to the voltage value of the test voltage Vout. When the test voltage Vout is the power supply voltage VDDH, the to-be-detected voltage Vsense is a first voltage; when the test voltage Vout is the ground voltage, the to-be-detected voltage Vsense is a second voltage, wherein the first voltage is greater than the second voltage, and both the first voltage and the second voltage are less than or equal to the power supply voltage.

[0030] Specifically, reference Figure 3The voltage detection circuit 130 is composed of four MOS (MOSFET metal-oxide semiconductor field effect transistor) tubes, wherein the input module 132 includes a first NMOS tube (hereinafter referred to as Mn1), the control module 131 includes a first PMOS tube (hereinafter referred to as Mp1), and the output module 133 includes a second PMOS tube 1331 (hereinafter referred to as Mp2) and a second NMOS tube 1332 (hereinafter referred to as Mn2). The output end of the output module 133 is located between the second PMOS tube and the second NMOS tube, and the second PMOS tube and the second NMOS tube constitute a NOR logic structure. The on and off of the second PMOS tube are controlled by a control signal, so as to realize the change of the test voltage Vout of the output end.

[0031] Further referring to Figure 3 The drain of Mn1 of the input module 132 is connected with the control module 131, the gate of Mn1 is connected with the voltage to be detected Vsense, and the source of Mn1 is connected with a second reference voltage Vref2. The source of Mp1 of the control module 131 is connected with a power supply voltage VDDH, the gate of Mp1 is connected with the output module 133, and the drain of Mp1 is connected with the drain of Mn1 of the input module 132, and simultaneously, the drain of Mp1 is also connected with the output module 133. The source of Mp2 in the output module 133 is connected with the power supply voltage VDDH, the gate of Mp2 is connected with the drain of Mp1 in the control module 131, the drain of Mp2 is connected with the gate of Mp1 in the control module 131, and simultaneously, the drain of Mp2 is also connected with the drain of Mn2. The drain of Mn2 in the output module 133 is connected with the drain of Mp2, the gate of Mn2 is connected with a first reference voltage Vref1, and the source of Mn2 is grounded. The port of the output test voltage Vout of the voltage detection circuit 130 is located between the drain of Mp2 and the drain of Mn2 in the output module 133.

[0032] The value of the first reference voltage Vref1 needs to satisfy that it is greater than a threshold voltage Vth, so that Mn2 in the output module 133 remains on. The threshold voltage Vth is, for example, the on voltage of Mn2. The value of the second reference voltage Vref2 needs to satisfy that (V1-Vref2) > Vth and (V2-Vref2) < Vth, wherein V1 and V2 are respectively one of the voltages to be detected Vsense, and V1 > V2. For example, V1 is 3.3V and V2 is 1.8V. In this embodiment, since the threshold voltage Vth of Mn1 and Mn2 is 0.7V, the value of the second reference voltage can be determined according to the threshold voltage Vth, V1 and V2. The power supply voltage VDDH is greater than or equal to Vsense.

[0033] Wherein, the supply voltage VDDH is for example the supply voltage of the working circuit module where the voltage detection circuit 130 is located; the first reference voltage Vref1 and the second reference voltage Vref2 are reference voltages, which can not be intentionally generated, and can be directly used or used after simple resistance voltage division as reference voltages.

[0034] In this embodiment, the driving capability of Mp2 in the output module 133 must be stronger than that of Mn2, where the driving capability refers to the driving current capability of Mp2 for example, and the driving capability of Mn2 in the output module 133 is as weak as possible, which is beneficial to reduce power consumption. Since the wider the width-length ratio of a MOS transistor is, the stronger the driving capability is, the width-length ratio of Mp2 in the output module 133 can be increased to improve the driving capability of Mp2, and / or the width-length ratio of Mn2 in the output module 133 can be reduced to weaken the driving capability of Mn2.

[0035] The voltage detection circuit 130 provided in the present application is for example used in an SD card (SD memory card) or an RGMII (Reduced Gigabit Media Independent Interface) module, and in this case, the working condition of the voltage detection circuit 130 is as follows:

[0036] (1) When the working module 120 works in mode one or mode two, the to-be-detected voltage Vsense can be 3.3V or 1.8V, which needs to be detected.

[0037] In this case, the supply voltage VDDH is 3.3V, the first reference voltage Vref1 is 1V, and the second reference voltage Vref2 is 1.8V.

[0038] When the voltage to be measured Vsense is 3.3V, the voltage between the gate and the drain of Mn1 in the input module 132 is Vgs=1.5V>Vth, Mn1 is turned on; the voltage between the gate and the drain of Mn2 in the output module 133 is Vgs=1V>Vth, Mn2 is turned on, and since the voltage between the gate and the drain of Mn2 is less than the voltage between the gate and the drain of Mn1 in the input module 132, Mn1 in the input module 132 will consume more current, which will pull down the gate voltage of Mp2 in the output module 133, so that Mp2 in the output module 133 is turned on. At this time, Mp2 and Mn2 in the output module 133 constitute a NOR logic structure, because the driving current capacity of Mp2 is stronger than that of Mn2, therefore the test voltage Vout is finally pulled up, and the output is the supply voltage VDDH, representing that the voltage to be measured Vsense=3.3V at this time. At this time, the working module 120 is switched to work in mode one.

[0039] When the voltage to be measured Vsense=1.8V, the voltage between the gate and the source of Mn1 in the input module 132 is Vgs=0V, Mn1 in the input module 132 is turned off, the voltage between the gate and the source of Mn2 in the output module 133 is Vgs=1V, Mn2 in the output module 133 will pull down the gate voltage of Mp1 in the control module 131, Mp1 in the control module 131 is turned on, and then will pull up the gate voltage of Mp2 in the output module 133, and Mp2 in the output module 133 is turned off. In this way, the test voltage Vout=0V, and the output is the ground voltage, representing that the voltage to be measured Vsense=1.8V. At this time, the working module 120 is switched to work in mode two. By detecting the voltage to be measured, the state of the working module 120 is switched, which can meet the diverse functional performance requirements of the working module 100.

[0040] (2) When the working module 120 is turned on or off, the voltage to be measured Vsense can be 1.8V or 0V, which needs to be detected.

[0041] In this case, the supply voltage VDDH is 1.8V, the first reference voltage Vref1 and the second reference voltage Vref2 are both 1V.

[0042] When the to-be-tested voltage Vsense = 1.8V, the voltage Vgs between the gate and the source of Mn1 in the input module 132 = 0.8V, Mn1 in the input module 132 is turned on, the gate voltage of Mp2 in the output module 133 is pulled low, and Mp2 in the output module 133 is turned on. The voltage Vgs between the gate and the source of Mn2 in the output module 133 = 1V, which is also in the on state. At this time, Mp2 and Mn2 in the output module 133 constitute a NOR logic structure, because the driving capability of Mp2 is stronger than that of Mn2, the test voltage Vout is finally pulled high, and the output is the supply voltage VDDH, representing that the to-be-tested voltage Vsense = 1.8V at this time. At this time, the working module 120 is switched to the on state.

[0043] When the to-be-tested voltage Vsense = 0V, Mn1 in the input module 132 is turned off, the voltage Vgs between the gate and the source of Mn2 in the output module 133 = 1V, which is turned on, the gate voltage of Mp1 in the control module 131 is pulled low, Mp1 is turned on, and then the gate voltage of Mp2 in the output module 133 is pulled high, and Mp2 in the output module 133 is turned off. In this way, the test voltage Vout = 0V, and the output is the ground voltage, representing that the to-be-tested voltage Vsense = 0V. At this time, the working module 120 is switched to the state in which part of the circuit is turned off. By detecting the to-be-tested voltage, the state of the working module 120 is switched, and the power consumption can be reduced.

[0044] According to the working condition of the voltage detection circuit 130, when the to-be-tested voltage Vsense exists in two cases, and it is desired to confirm which case the to-be-tested voltage Vsense is in, the output judgment result of the test voltage Vout can be used. If the test voltage Vout is finally pulled high, and the output is the supply voltage VDDH, it represents that the to-be-tested voltage Vsense is a high voltage at this time. If the test voltage Vout = 0V, and the output is the ground voltage, it represents that the to-be-tested voltage Vsense is a low voltage.

[0045] The voltage detection circuit provided in the application only includes two NMOS and two PMOS, and the voltage detection can be realized. The number of devices used is very small, the structure is simple, the stability is strong, and the power consumption is low.

[0046] Further, by using the voltage detection circuit provided in the application, the pressure value of the to-be-tested voltage can be judged, and high-precision voltage comparison can be realized without using an additional bias circuit.

[0047] In accordance with the practices of the present invention, these embodiments have been described in relation to the above-described embodiments, which are intended to be illustrative only and not restrictive of the invention. Obviously, many modifications and variations of this invention can be effected without departing from the scope of the novel concept of the disclosure. No limitation with respect to the specific implementation techniques and applications presented thereby should be inferred into the scope of the invention, as understood by those skilled in the art. The specification and drawings should be regarded as illustrative only and in no way limiting of the scope of the invention as defined by the appended claims and equivalents thereof.

Claims

1. A voltage detection circuit for determining whether the voltage to be measured is a first voltage or a second voltage, characterized in that, The application relates to a voltage testing circuit, comprising: an input module for receiving a to-be-tested voltage, the to-be-tested voltage being one of a first voltage and a second voltage; a control module connected with the input module, for outputting a control signal according to the to-be-tested voltage; an output module connected with the control module, for selecting one of a supply voltage and a ground voltage as a test voltage according to the control signal, wherein the size of the test voltage represents the size of the to-be-tested voltage, the input module comprises a first NMOS tube, the control module comprises a first PMOS tube, and the output module comprises a second PMOS tube and a second NMOS tube, wherein, the source of the first PMOS tube is connected with the supply voltage, the gate is connected with the drain of the second PMOS tube, and the drain is connected with the drain of the first NMOS tube; the source of the second PMOS tube is connected with the supply voltage, the gate is connected with the drain of the first PMOS tube, and the drain is connected with the gate of the first PMOS tube; the drain of the first NMOS tube is connected with the drain of the first PMOS tube, the gate is connected with the to-be-tested voltage, and the source is connected with a second reference voltage; the drain of the second NMOS tube is connected with the drain of the second PMOS tube, the gate is connected with a first reference voltage, and the source is connected with a ground terminal, the first reference voltage and the second reference voltage are selected from an SOC, the first reference voltage is used for keeping the second NMOS tube conducting, the first reference voltage is greater than the threshold voltage of the second NMOS tube, and the SOC is a system integrated on a chip; the second reference voltage Vref2 satisfies (V2-VthMN1) < Vref2 < (V1-VthMN1), wherein V1 represents the first voltage, V2 represents the second voltage, and VthMN1 represents the threshold voltage of the first NMOS tube, wherein the first voltage is greater than the second voltage.

2. The voltage detection circuit according to claim 1, characterized by, in the case that the test voltage is the supply voltage, the to-be-tested voltage is the first voltage; in the case that the test voltage is the ground voltage, the to-be-tested voltage is the second voltage, wherein the first voltage is greater than the second voltage, and the first voltage and the second voltage are both less than or equal to the supply voltage.

3. The voltage detection circuit according to claim 1, characterized by, the width-length ratio of the second PMOS tube is greater than the width-length ratio of the second NMOS tube.

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