Detection panel and driving method thereof and flat panel detector

Abstract

An embodiment of the present disclosure provides a detection panel, comprising: a substrate, the substrate comprising a detection area and a non-detection area located outside the detection area; the detection area comprises: the non-detection area comprises: a plurality of drive signal transmission lines, a voltage transmission line for noise reduction, a plurality of first switch groups corresponding one-to-one to gate line groups, and a plurality of second switch groups corresponding one-to-one to the gate line groups, the first switch group comprises a plurality of first switches corresponding one-to-one to the gate lines in the corresponding gate line group, the second switch group comprises a plurality of second switches corresponding one-to-one to the gate lines in the corresponding gate line group; a first end of the gate line and a second end of the gate line are respectively connected to a drive signal transmission line and a voltage transmission line for noise reduction through corresponding first switches and second switches, different first switches located in the same first switch group are connected to different drive signal transmission lines, and at least two first switches located in different first switch groups are connected to the same drive signal transmission line.

Description

Technical Field

[0001] At least one embodiment of the present disclosure relates to a detection panel and a driving method thereof, and a flat panel detector. Background Art

[0002] X-ray detection is widely used in modern medical imaging detection. The most advanced direct digital X-ray photography (Digital Radiography, DR) is a technology that uses a one-dimensional or two-dimensional X-ray detector to directly convert X-ray information into digital image information under the control of a computer with image processing function. The two-dimensional flat panel X-ray detector (Flat X-ray Panel Detector, FPXD) currently used in DR equipment includes direct flat panel detectors and indirect flat panel detectors. Summary of the invention

[0003] In a first aspect, an embodiment of the present disclosure provides a detection panel, comprising: a substrate substrate, the substrate substrate comprising a detection area and a non-detection area located outside the detection area;

[0004] The detection area includes: a plurality of grid lines and a plurality of signal detection lines, the plurality of grid lines and the plurality of signal detection lines define a plurality of detection units arranged in an array, the detection units are connected to the corresponding grid lines and the signal detection lines, the plurality of detection units are divided into a plurality of detection unit groups, the detection unit group includes a plurality of rows of detection units, the plurality of grid lines are divided into a plurality of grid line groups corresponding to the detection unit groups one by one, the grid line groups include a plurality of grid lines corresponding to each row of detection units in the corresponding detection unit group;

[0005] The non-detection area includes: a plurality of drive signal transmission lines, a noise reduction voltage transmission line, a plurality of first switch groups corresponding to the gate line groups one by one, and a plurality of second switch groups corresponding to the gate line groups one by one, wherein the first switch group includes a plurality of first switches corresponding to the gate lines in the corresponding gate line group one by one, and the second switch group includes a plurality of second switches corresponding to the gate lines in the corresponding gate line group one by one;

[0006] The first end of the gate line and the second end of the gate line are respectively connected to a drive signal transmission line and the noise reduction voltage transmission line through the corresponding first switch and the second switch, different first switches in the same first switch group are connected to different drive signal transmission lines, and at least two first switches in different first switch groups are connected to the same drive signal transmission line.

[0007] In some embodiments, the non-detection area further includes: a gate driving module and a voltage supply module for noise reduction;

[0008] The gate driving module is configured with a plurality of driving signal output terminals, the driving signal transmission lines are connected to the driving signal output terminals and different driving signal transmission lines are connected to different driving signal output terminals, and the gate driving module is used to provide gate driving signals to each of the driving signal transmission lines respectively;

[0009] The noise reduction voltage supply module is connected to the noise reduction voltage transmission line, and the noise reduction voltage supply module is used to provide the noise reduction voltage to the noise reduction voltage transmission line.

[0010] In some embodiments, the first switch comprises: a first transistor, a control electrode of the first transistor is connected to a first control signal transmission line, a first electrode of the first transistor is connected to the corresponding drive signal transmission line, and a second electrode of the first transistor is connected to a first end of the corresponding gate line;

[0011] The second switch includes: a second transistor, a control electrode of the second transistor is connected to a second control signal transmission line, a first electrode of the second transistor is connected to a noise reduction voltage transmission line, and a second electrode of the second transistor is connected to a second end of the corresponding gate line.

[0012] In some embodiments, control electrodes of the first transistors in the same first switch group are connected to the same first control signal transmission line, and control electrodes of the first transistors in different first switch groups are connected to different first control signal transmission lines;

[0013] The control electrodes of the second transistors in the same second switch group are connected to the same second control signal transmission line, and the control electrodes of the second transistors in different second switch groups are connected to different second control signal transmission lines.

[0014] In some embodiments, among the first transistor and the second transistor, both are N-type transistors or both are P-type transistors.

[0015] In some embodiments, the non-detection zone further includes: a first control module and a second control module;

[0016] The first control module is configured with a plurality of first signal output terminals, the first control signal transmission lines are connected to the first signal output terminals, and different first control signal transmission lines are connected to different first signal output terminals, and the first control module is used to provide a first control signal to each of the first control signal transmission lines respectively;

[0017] The second control module is configured with multiple second signal output terminals, the second control signal transmission lines are connected to the second signal output terminals and different second control signal transmission lines are connected to different second signal output terminals, and the second control module is used to provide a second control signal to each of the second control signal transmission lines respectively.

[0018] In some embodiments, the first signal transmission line and the second signal transmission line are respectively located at two opposite sides of the detection area in a row direction.

[0019] In some embodiments, one of the first transistor and the second transistor is an N-type transistor and the other is a P-type transistor;

[0020] Corresponding to the first switch group and the second switch group of the same gate line group, a first control signal transmission line connected to the first switch group and a second control signal transmission line connected to the second switch group are the same control signal transmission line.

[0021] In some embodiments, the non-detection zone further includes: a switch control module;

[0022] The switch control module is configured with multiple control signal output terminals, the control signal transmission lines are connected to the control signal output terminals and different control signal transmission lines are connected to different control signal output terminals, and the switch control module is used to provide control signals to each of the control signal transmission lines respectively.

[0023] In some embodiments, the driving signal transmission line and the control signal transmission line are respectively located at two opposite sides of the detection area in the row direction.

[0024] In some embodiments, each detection unit group includes the same number of rows of detection units.

[0025] In some embodiments, the number of the driving signal transmission lines is the same as the number of rows of detection units included in one detection unit group.

[0026] In some embodiments, the base substrate is a flexible substrate.

[0027] In a second aspect, an embodiment of the present disclosure further provides a flat panel detector, comprising the detection panel provided in the first aspect.

[0028] In a third aspect, an embodiment of the present disclosure further provides a method for driving a detection panel, wherein the detection panel is the detection panel provided in the first aspect, and the driving method includes:

[0029] Driving each of the detection unit groups in sequence;

[0030] The step of driving one of the detection unit groups includes:

[0031] Control the first switch in the first switch group corresponding to the detection unit group to be driven to be in an on state, and control the second switch in the second switch group corresponding to the detection unit group to be driven to be in an off state; at the same time, control the first switch in the first switch group corresponding to the other detection unit groups except the detection unit group to be driven to be in an off state, and control the second switch in the second switch group corresponding to the other detection unit groups except the detection unit group to be driven to be in an on state, each gate line in the gate line group corresponding to the detection unit group to be driven is written with a gate drive signal in sequence, and each gate line in the gate line group corresponding to the other pixel detection unit groups except the detection unit group to be driven is written with a noise reduction voltage. BRIEF DESCRIPTION OF THE DRAWINGS

[0032] Figure 1A A schematic top view of a detection panel provided in an embodiment of the present disclosure;

[0033] Figure 1B A schematic diagram of a circuit structure of a detection unit in an embodiment of the present disclosure;

[0034] Figure 2 for Figure 1A A working timing diagram of the detection panel shown;

[0035] Figure 3 A schematic diagram of the structure of another detection panel provided in an embodiment of the present disclosure;

[0036] Figure 4 for Figure 3 A working timing diagram of the detection panel shown. DETAILED DESCRIPTION

[0037] In order to enable those skilled in the art to better understand the technical solution of the present invention, a detection panel and a driving method thereof and a flat panel detector provided by the present invention are described in detail below with reference to the accompanying drawings.

[0038] In a related technology, the detection panel generally includes a substrate, which includes a detection area and a non-detection area, wherein the detection area is provided with detection units arranged in an array, and each row of detection units is equipped with a corresponding gate line; in the non-detection area and on one side of the detection area, a plurality of drive signal transmission lines corresponding to the gate lines are generally arranged, one end of the drive signal transmission line is connected to the corresponding gate line, and the other end of the drive signal transmission line is connected to a drive signal output terminal of a gate drive module, and different drive signal transmission lines are connected to different drive signal output terminals; the gate drive module outputs the gate drive signal in sequence through each drive signal output terminal, so that each gate line located in the detection area can be loaded with the gate drive signal in sequence, thereby realizing the sequential driving of each row of detection units.

[0039] However, in the above-mentioned related technologies, it is necessary to arrange too many drive signal transmission lines in the non-detection area and on one side of the detection area, so that the drive signal transmission lines correspond one-to-one with the gate lines; and as the detection resolution of the detection panel is improved, the number of rows of detection units increases accordingly, and the number of gate lines and drive signal transmission lines required to be arranged increases accordingly, which is not conducive to the narrow frame design of the product.

[0040] In another related technology, by grouping the detection units, each detection unit group includes multiple rows of detection units; at the same time, a corresponding thin film transistor is set at one end of the gate line, and each gate line is connected to a corresponding drive signal transmission line through a corresponding thin film transistor. At this time, different gate lines can be connected to the same drive signal transmission line through their corresponding thin film transistors, and the working state (on or off) of each thin film transistor is controlled so that at most one thin film transistor connected to the same drive signal transmission line is in an on state and the other thin film transistors are in an off state at any time, that is, through time-division multiplexing, a drive signal transmission line can provide a gate drive signal to unused gate lines at different times. Specifically, at any time, only the transistor connected to the gate line corresponding to one detection unit group is in an on state, and the transistors connected to the gate lines corresponding to other detection units are in an off state. When the number of gate lines is constant, a thin film transistor is set at one end of the gate line so that multiple gate lines are connected to the same drive signal transmission line through thin film transistors, thereby reducing the number of drive signal transmission lines required to be arranged.

[0041] However, in the above technical solution, at any time, only the transistor connected to the gate line corresponding to one detection unit group is in the on state, while the transistors connected to the gate lines corresponding to other detection units are in the off state. At this time, the gate lines corresponding to other detection units will be in a floating state for a long time. These gate lines in the floating state for a long time are easily affected by factors such as inter-line capacitance (capacitance formed between the gate line itself and other electrical structures) and external noise, resulting in voltage drift, thereby causing the corresponding detection unit row to be misdriven, thereby interfering with the detection signal output by the detection unit currently being driven normally. That is, the working stability of the detection panel is poor.

[0042] In order to solve at least one of the technical problems existing in the related art, the present disclosure provides a corresponding solution.

[0043] It should be noted that the transistor in the embodiment of the present disclosure may be a thin film transistor or a field effect transistor or other devices with the same or similar characteristics. Since the source and drain of the transistor used are symmetrical, there is no difference between the source and drain. In the embodiment of the present disclosure, in order to distinguish the source and drain of the transistor, one of the electrodes is called the first electrode, the other electrode is called the second electrode, and the gate is called the control electrode.

[0044] Figure 1A A schematic top view of a detection panel provided in an embodiment of the present disclosure is shown in FIG. Figure 1B is a schematic diagram of a circuit structure of a detection unit in an embodiment of the present disclosure, such as Figure 1A and Figure 1B As shown, the detection panel includes: a substrate substrate, the substrate substrate includes a detection area A and a non-detection area B located outside the detection area A.

[0045] Among them, the detection area A is an area used for signal detection (such as X-ray detection), which is generally located in the middle of the substrate base plate; the non-detection area B is used to arrange peripheral signal transmission lines and fix the driver chip, which is generally located at the periphery of the substrate base plate and outside the detection area A.

[0046] The detection area A includes: multiple gate lines GATE and multiple signal detection lines RL, the multiple gate lines GATE and the multiple signal detection lines RL define multiple detection units arranged in an array, the detection units are connected to the corresponding gate lines GATE and the signal detection lines RL, the multiple detection units are divided into multiple detection unit groups PG, the detection unit group PG includes multiple rows of detection units, the multiple gate lines GATE are divided into multiple gate line groups corresponding to the detection unit groups PG one by one, and the gate line groups include multiple gate lines GATE corresponding to each row of detection units in the corresponding detection unit group PG.

[0047] In some embodiments, the base substrate is a flexible substrate so that the detection panel can bend and deform, which is convenient for carrying, transporting and using, and can be applied to more application scenarios.

[0048] See also Figure 1B As shown, in some embodiments, the detection unit includes: a switching transistor T0 and an optical sensor SC (the optical sensor SC4 can be a PIN photodiode or a PN photosensitive diode), the control electrode of the switching transistor T0 is connected to the corresponding gate line GATE, the first electrode of the switching transistor T0 is connected to one end of the optical sensor SC, the second electrode of the switching transistor T0 is connected to the corresponding signal detection line RL, and the other end of the optical sensor SC is connected to the bias voltage line VBL.

[0049] The non-detection area B includes: a plurality of drive signal transmission lines GL1 / GL2 / GL3 / GL4, a noise reduction voltage transmission line VL, a plurality of first switch groups TG1 corresponding to the gate line groups one by one, and a plurality of second switch groups TG2 corresponding to the gate line groups one by one, wherein the first switch group TG1 includes a plurality of first switches corresponding to the gate lines GATE in the corresponding gate line groups, and the second switch group TG2 includes a plurality of second switches corresponding to the gate lines GATE in the corresponding gate line groups. The drive signal transmission lines GL1 / GL2 / GL3 / GL4 are used to transmit gate drive signals, and the noise reduction voltage transmission lines VL are used to transmit noise reduction voltages.

[0050] The first end of the gate line GATE and the second end of the gate line GATE are respectively connected to a drive signal transmission line GL1 / GL2 / GL3 / GL4 and a noise reduction voltage transmission line VL through corresponding first switches and second switches. Different first switches in the same first switch group TG1 are connected to different drive signal transmission lines GL1 / GL2 / GL3 / GL4, and at least two first switches in different first switch groups TG1 are connected to the same drive signal transmission line GL1 / GL2 / GL3 / GL4.

[0051] In the embodiment of the present disclosure, a corresponding first switch group TG1 is configured for each gate line group, and different first switches in the same first switch group TG1 are connected to different drive signal transmission lines GL1 / GL2 / GL3 / GL4, and at least two first switches in different first switch groups TG1 are connected to the same drive signal transmission line GL1 / GL2 / GL3 / GL4, that is, the gate lines GATE in different gate line groups can be connected to the same drive signal transmission line GL1 / GL2 / GL3 / GL4 through the corresponding first switches, that is, one drive signal transmission line GL1 / GL2 / GL3 / GL4 can correspond to multiple gate lines GATE; therefore, when the number of gate lines GATE is certain, compared with the related art, the technical solution of the present disclosure can effectively reduce the number of drive signal transmission lines GL1 / GL2 / GL3 / GL4 that need to be arranged. At the same time, by configuring a corresponding second switch group TG2 for each gate line GATE, the second end of each gate line GATE is connected to the noise reduction voltage transmission line VL through the corresponding second switch, so that in the process of driving a certain detection unit group PG (called "detection unit group to be driven"), the gate line GATE corresponding to other detection unit groups PG except the detection unit group to be driven PG can also be provided with a noise reduction voltage at the same time, thereby achieving noise reduction processing for the gate line GATE corresponding to other detection unit groups PG except the detection unit group to be driven PG, so as to avoid the problem of erroneous driving of the detection unit caused by voltage drift, which is beneficial to improving the working stability of the detection panel.

[0052] In some embodiments, each detection unit group PG includes the same number of rows of detection units.

[0053] In some embodiments, the number of the driving signal transmission lines GL1 / GL2 / GL3 / GL4 is the same as the number of rows of the detection units included in one detection unit group PG.

[0054] See also Figure 1A As shown, in some embodiments, the non-detection area B further includes: a gate driving module 1 and a noise reduction voltage supply module 2 .

[0055] Among them, the gate driving module 1 is configured with multiple driving signal output terminals, the driving signal transmission lines GL1 / GL2 / GL3 / GL4 are connected to the driving signal output terminals and different driving signal transmission lines GL1 / GL2 / GL3 / GL4 are connected to different driving signal output terminals, and the gate driving module 1 is used to provide gate driving signals to each driving signal transmission line GL1 / GL2 / GL3 / GL4 respectively; in some embodiments, the gate driving module 1 can specifically be a gate driving chip (Gate Driver IC).

[0056] The noise reduction voltage supply module 2 is connected to the noise reduction voltage transmission line VL, and the noise reduction voltage supply module 2 is used to provide the noise reduction voltage to the noise reduction voltage transmission line VL. In some embodiments, the noise reduction voltage supply module 2 can be specifically a power IC, which can output the noise reduction voltage; the noise reduction voltage is a voltage that can make the switching transistor T0 in the off state, and the specific voltage value can be designed and adjusted according to actual needs.

[0057] In some embodiments, the first switch includes: a first transistor T1, the control electrode of the first transistor T1 is connected to the first control signal transmission line CL1 / CL2, the first electrode of the first transistor T1 is connected to the corresponding drive signal transmission line GL1 / GL2 / GL3 / GL4, and the second electrode of the first transistor T1 is connected to the first end of the corresponding gate line GATE.

[0058] The second switch includes: a second transistor T2, a control electrode of the second transistor T2 is connected to the second control signal transmission line CL1' / CL2', a first electrode of the second transistor T2 is connected to the noise reduction voltage transmission line VL, and a second electrode of the second transistor T2 is connected to the second end of the corresponding gate line GATE.

[0059] In some embodiments, the control electrodes of the first transistors T1 in the same first switch group TG1 are connected to the same first control signal transmission line CL1 / CL2, and the control electrodes of the first transistors T1 in different first switch groups TG1 are connected to different first control signal transmission lines CL1 / CL2; the control electrodes of the second transistors T2 in the same second switch group TG2 are connected to the same second control signal transmission line CL1' / CL2', and the control electrodes of the second transistors T2 in different second switch groups TG2 are connected to different second control signal transmission lines CL1' / CL2'. Through the above design, the number of first control signal transmission lines CL1 / CL2 that need to be arranged can be effectively reduced, which is conducive to narrow frame design.

[0060] In some embodiments, the first transistor T1 and the second transistor T2 are both N-type transistors or both P-type transistors.

[0061] In some embodiments, the non-detection area B further includes: a first control module 3 and a second control module 4 .

[0062] Among them, the first control module 3 is configured with multiple first signal output terminals, the first control signal transmission lines CL1 / CL2 are connected to the first signal output terminals and different first control signal transmission lines CL1 / CL2 are connected to different first signal output terminals, and the first control module 3 is used to provide the first control signal to each first control signal transmission line CL1 / CL2 respectively; in some embodiments, the first control module 3 can specifically be a gate drive chip.

[0063] The second control module 4 is configured with a plurality of second signal output terminals, the second control signal transmission lines CL1' / CL2' are connected to the second signal output terminals, and different second control signal transmission lines CL1' / CL2' are connected to different second signal output terminals, and the second control module 4 is used to provide the second control signal to each second control signal transmission line CL1' / CL2'. In some embodiments, the second control module 4 can be specifically a gate drive chip.

[0064] Taking the first transistor T1, the second transistor T2 and the switch transistor T0 as N-type transistors as an example, Figure 1A The driving process of the detection panel is described in detail. Figure 1A In the middle detection area A, 8 rows and 8 columns are exemplarily drawn, and a total of 64 detection units are divided into 2 detection unit groups PG, and each detection unit group PG includes 4 rows of detection units, and 8 gate lines GATE are divided into 2 gate line groups, and each gate line group includes 4 gate lines GATE; Figure 1A In the non-detection area B, two first control signal transmission lines CL1 / CL2, two second control signal transmission lines CL1' / CL2', four drive signal transmission lines GL1 / GL2 / GL3 / GL4 and one noise reduction voltage transmission line VL are exemplarily drawn.

[0065] Figure 2 for Figure 1A A working timing diagram of the detection panel shown in FIG. Figure 2 As shown, two corresponding driving phases s1 / s2 are configured for the two detection unit groups PG.

[0066] Taking the process of driving the first detection unit group PG as an example, the first control signal in the first control signal transmission line CL1 corresponding to the first detection unit group PG is in a high level state, the first switch in the first switch group TG1 corresponding to the first detection unit group PG is in an on state (forming a path), the second control signal in the second control signal transmission line CL1' corresponding to the first detection unit group PG is in a low level state, and the second switch in the second switch group TG2 corresponding to the first detection unit group PG is in an off state (forming an open circuit); at the same time, the first control signal in the first control signal transmission line CL2 corresponding to the other detection unit groups PG except the first detection unit group PG is in a low level state, the first switch in the first switch group TG1 corresponding to the other detection unit groups PG except the first detection unit group PG is in an off state (forming an open circuit), the second control signal in the second control signal transmission line CL2' connected to the second switch group TG2 corresponding to the other detection unit groups PG except the first detection unit group PG is in a high level state, and the second switch in the second switch group TG2 corresponding to the other detection unit groups PG except the first detection unit group PG is in an on state (forming a path). In the above process, the gate driving module outputs gate driving signals to each driving signal transmission line GL1 / GL2 / GL3 / GL4 in sequence to drive each row of detection units in the first detection unit group PG in sequence, and writes a noise reduction voltage into the gate line GATE corresponding to other detection unit groups PG except the first detection unit group PG to achieve noise reduction processing.

[0067] Thereafter, the other detection unit groups PG are driven in sequence in the same driving manner. In the process of driving each detection unit group PG, the first switch in the first switch group TG1 corresponding to the detection unit group PG to be driven is in the on state, and the second switch in the second switch group TG2 corresponding to the detection unit group PG to be driven is in the off state; at the same time, the first switch in the first switch group TG1 corresponding to the other detection unit groups PG except the detection unit group PG to be driven is in the off state, and the second switch in the second switch group TG2 corresponding to the other detection unit groups PG except the detection unit group PG to be driven is in the on state, and each gate line GATE in the gate line group corresponding to the detection unit group PG to be driven is sequentially written with the gate drive signal, and each gate line GATE in the gate line group corresponding to the other pixel detection unit groups PG except the detection unit group PG to be driven is written with the noise reduction voltage.

[0068] Continue to see Figure 1AAs shown, in some embodiments, the first signal transmission line and the second signal transmission line are respectively located on opposite sides of the detection area A in the row direction. The above design can make the first signal transmission line and the second signal transmission line evenly distributed on both sides of the detection area A, so as to avoid the problem of too wide a frame caused by the control signal transmission lines being concentrated on the same side.

[0069] Figure 3 A schematic diagram of the structure of another detection panel provided in an embodiment of the present disclosure, such as Figure 3 As shown, unlike the first transistor T1 and the second transistor T2 of the previous embodiment, which are the same type of transistors, the first transistor T1 and the second transistor T2 of this embodiment, one of them is an N-type transistor and the other is a P-type transistor; the first switch group TG1 and the second switch group TG2 corresponding to the same gate line group, the first control signal transmission line connected to the first switch group TG1 and the second control signal transmission line connected to the second switch group TG2 are the same control signal transmission line CK1 / CK2. Compared with the previous embodiment, the number of control signal transmission lines required to be set on the detection panel provided by this embodiment is halved.

[0070] In some embodiments, the non-detection area B further includes: a switch control module 5; the switch control module 5 is configured with a plurality of control signal output terminals, the control signal transmission lines CK1 / CK2 are connected to the control signal output terminals and different control signal transmission lines CK1 / CK2 are connected to different control signal output terminals, and the switch control module 5 is used to provide control signals to each control signal transmission line CK1 / CK2 respectively. Compared with the previous embodiment, the number of control modules required to be set on the detection panel provided in this embodiment is less.

[0071] In some embodiments, the drive signal transmission lines GL1 / GL2 / GL3 / GL4 and the control signal transmission lines CK1 / CK2 are respectively located on opposite sides of the detection area A in the row direction. The above design allows the drive signal transmission lines GL1 / GL2 / GL3 / GL4 and the control signal transmission lines CK1 / CK2 to be distributed on both sides of the detection area A to avoid the problem of the frame being too wide due to the signal transmission lines being concentrated on the same side.

[0072] Taking the first transistor T1 and the switch transistor T0 as N-type transistors and the second transistor T2 as a P-type transistor as an example, Figure 3 The driving process of the detection panel is described in detail. Figure 3 In the middle detection area A, 8 rows and 8 columns are exemplarily drawn, and a total of 64 detection units are divided into 2 detection unit groups PG, and each detection unit group PG includes 4 rows of detection units, and 8 gate lines GATE are divided into 2 gate line groups, and each gate line group includes 4 gate lines GATE; Figure 3In the non-detection area B, two control signal transmission lines CK1 / CK2 , four drive signal transmission lines GL1 / GL2 / GL3 / GL4 and one noise reduction voltage transmission line VL are exemplarily drawn.

[0073] Figure 4 for Figure 3 A working timing diagram of the detection panel shown in FIG. Figure 4 As shown, two corresponding driving phases s1 / s2 are configured for the two detection unit groups PG.

[0074] Taking the process of driving the first detection unit group PG as an example, the control signal in the control signal transmission line CK1 corresponding to the first detection unit group PG is in a high level state, the first switch in the first switch group TG1 corresponding to the first detection unit group PG is in an on state (forming a path), and the second switch in the second switch group TG2 corresponding to the first detection unit group PG is in an off state (forming an open circuit); at the same time, the control signal in the control signal transmission line CK2 corresponding to other detection unit groups PG except the first detection unit group PG is in a low level state, the first switch in the first switch group TG1 corresponding to other detection unit groups PG except the first detection unit group PG is in an off state (forming an open circuit), and the second switch in the second switch group TG2 corresponding to other detection unit groups PG except the first detection unit group PG is in an on state (forming a path). In the above process, the gate driving module 1 outputs the gate driving signal to each driving signal transmission line GL1 / GL2 / GL3 / GL4 in sequence to drive each row of detection units in the first detection unit group PG in sequence, and writes the noise reduction voltage into the gate line GATE corresponding to other detection unit groups PG except the first detection unit group PG to realize noise reduction processing.

[0075] Thereafter, the other detection unit groups PG are driven in sequence in the same driving manner. In the process of driving each detection unit group PG, the first switch in the first switch group TG1 corresponding to the detection unit group PG to be driven is in the on state, and the second switch in the second switch group TG2 corresponding to the detection unit group PG to be driven is in the off state; at the same time, the first switch in the first switch group TG1 corresponding to the other detection unit groups PG except the detection unit group PG to be driven is in the off state, and the second switch in the second switch group TG2 corresponding to the other detection unit groups PG except the detection unit group PG to be driven is in the on state, and each gate line GATE in the gate line group corresponding to the detection unit group PG to be driven is sequentially written with the gate drive signal, and each gate line GATE in the gate line group corresponding to the other pixel detection unit groups PG except the detection unit group PG to be driven is written with the noise reduction voltage.

[0076] The technical solution disclosed in the present invention can not only effectively reduce the number of driving signal transmission lines required to be arranged on the detection panel, but also can perform noise reduction processing on the gate lines corresponding to other detection units during the driving process of the detection unit to be driven, so as to improve the working stability of the detection panel.

[0077] It should be noted that Figure 1A and Figure 3 The situation that all the detection units are divided into two detection unit groups, and each detection unit group includes four rows of detection units, is only for illustrative purposes and does not limit the technical solution of the present disclosure. In the embodiment of the present disclosure, all the detection units can also be divided into three or more detection unit groups, and each detection unit group includes at least two rows of detection units, which will not be described one by one here.

[0078] The disclosed embodiment further provides a flat panel detector, which includes a detection panel, wherein the detection panel can adopt the detection panel provided in the above embodiment. For the description of the detection panel, please refer to the content in the previous embodiment, which will not be repeated here.

[0079] In some embodiments, the flat panel detector may specifically be an X-ray flat panel detector.

[0080] An embodiment of the present disclosure further provides a method for driving a detection panel, wherein the detection panel is the detection panel provided by any of the previous embodiments, and the driving method comprises: driving each detection unit group in sequence.

[0081] Among them, the step of driving a detection unit group (as a detection unit group to be driven) includes: controlling the first switch in the first switch group corresponding to the detection unit group to be driven to be in an on state, and controlling the second switch in the second switch group corresponding to the detection unit group to be driven to be in an off state; at the same time, controlling the first switch in the first switch group corresponding to other detection unit groups except the detection unit group to be driven to be in an off state, and controlling the second switch in the second switch group corresponding to other detection unit groups except the detection unit group to be driven to be in an on state, each gate line in the gate line group corresponding to the detection unit group to be driven is written with a gate drive signal in sequence, and each gate line in the gate line group corresponding to other pixel detection unit groups except the detection unit group to be driven is written with a noise reduction voltage.

[0082] For the specific driving process of each detection unit group, reference may be made to the corresponding content in the previous embodiment, which will not be repeated here.

[0083] The technical solution disclosed in the present invention can not only effectively reduce the number of driving signal transmission lines required to be arranged on the detection panel, but also can perform noise reduction processing on the gate lines corresponding to other detection units during the driving process of the detection unit to be driven, so as to improve the working stability of the detection panel.

[0084] It is to be understood that the above embodiments are merely exemplary embodiments used to illustrate the principles of the present invention, but the present invention is not limited thereto. For those of ordinary skill in the art, various modifications and improvements can be made without departing from the spirit and essence of the present invention, and these modifications and improvements are also considered to be within the scope of protection of the present invention.

Claims

1. A detection panel, characterized in that: include: A substrate, the substrate comprising a detection area and a non-detection area located outside the detection area; The detection area includes: a plurality of grid lines and a plurality of signal detection lines, the plurality of grid lines and the plurality of signal detection lines define a plurality of detection units arranged in an array, the detection units are connected to the corresponding grid lines and the signal detection lines, the plurality of detection units are divided into a plurality of detection unit groups, the detection unit group includes a plurality of rows of detection units, the plurality of grid lines are divided into a plurality of grid line groups corresponding to the detection unit groups one by one, the grid line groups include a plurality of grid lines corresponding to each row of detection units in the corresponding detection unit group; The non-detection area includes: a plurality of drive signal transmission lines, a noise reduction voltage transmission line, a plurality of first switch groups corresponding to the gate line groups one by one, and a plurality of second switch groups corresponding to the gate line groups one by one, wherein the first switch group includes a plurality of first switches corresponding to the gate lines in the corresponding gate line group one by one, and the second switch group includes a plurality of second switches corresponding to the gate lines in the corresponding gate line group one by one; The first end of the gate line and the second end of the gate line are respectively connected to a drive signal transmission line and the noise reduction voltage transmission line through the corresponding first switch and the second switch, different first switches in the same first switch group are connected to different drive signal transmission lines, and at least two first switches in different first switch groups are connected to the same drive signal transmission line.

2. The detection panel according to claim 1, characterized in that: The non-detection area also includes: a gate driving module and a voltage supply module for noise reduction; The gate driving module is configured with a plurality of driving signal output terminals, the driving signal transmission lines are connected to the driving signal output terminals and different driving signal transmission lines are connected to different driving signal output terminals, and the gate driving module is used to provide gate driving signals to each of the driving signal transmission lines respectively; The noise reduction voltage supply module is connected to the noise reduction voltage transmission line, and the noise reduction voltage supply module is used to provide the noise reduction voltage to the noise reduction voltage transmission line.

3. The detection panel according to claim 1, characterized in that: The first switch comprises: a first transistor, a control electrode of the first transistor is connected to a first control signal transmission line, a first electrode of the first transistor is connected to the corresponding drive signal transmission line, and a second electrode of the first transistor is connected to a first end of the corresponding gate line; The second switch includes: a second transistor, a control electrode of the second transistor is connected to a second control signal transmission line, a first electrode of the second transistor is connected to a noise reduction voltage transmission line, and a second electrode of the second transistor is connected to a second end of the corresponding gate line.

4. The detection panel according to claim 3, characterized in that: The control electrodes of the first transistors in the same first switch group are connected to the same first control signal transmission line, and the control electrodes of the first transistors in different first switch groups are connected to different first control signal transmission lines; The control electrodes of the second transistors in the same second switch group are connected to the same second control signal transmission line, and the control electrodes of the second transistors in different second switch groups are connected to different second control signal transmission lines.

5. The detection panel according to claim 4, characterized in that: In the first transistor and the second transistor, both are N-type transistors or both are P-type transistors.

6. The detection panel according to claim 5, characterized in that: The non-detection area further includes: a first control module and a second control module; The first control module is configured with a plurality of first signal output terminals, the first control signal transmission lines are connected to the first signal output terminals, and different first control signal transmission lines are connected to different first signal output terminals, and the first control module is used to provide a first control signal to each of the first control signal transmission lines respectively; The second control module is configured with multiple second signal output terminals, the second control signal transmission lines are connected to the second signal output terminals and different second control signal transmission lines are connected to different second signal output terminals, and the second control module is used to provide a second control signal to each of the second control signal transmission lines respectively.

7. The detection panel according to claim 6, characterized in that: The first control signal transmission line and the second control signal transmission line are respectively located at two opposite sides of the detection area in a row direction.

8. The detection panel according to claim 5, characterized in that: Among the first transistor and the second transistor, one is an N-type transistor and the other is a P-type transistor; Corresponding to the first switch group and the second switch group of the same gate line group, a first control signal transmission line connected to the first switch group and a second control signal transmission line connected to the second switch group are the same control signal transmission line.

9. The detection panel according to claim 8, characterized in that: The non-detection area also includes: a switch control module; The switch control module is configured with multiple control signal output terminals, the control signal transmission lines are connected to the control signal output terminals and different control signal transmission lines are connected to different control signal output terminals, and the switch control module is used to provide control signals to each of the control signal transmission lines respectively.

10. The detection panel according to claim 9, characterized in that: The driving signal transmission line and the control signal transmission line are respectively located at two opposite sides of the detection area in the row direction.

11. The detection panel according to claim 1, characterized in that: The number of rows of detection units included in each detection unit group is equal.

12. The detection panel according to claim 11, characterized in that: The number of the driving signal transmission lines is the same as the number of rows of detection units included in one detection unit group.

13. The detection panel according to any one of claims 1 to 12, characterized in that: The base substrate is a flexible substrate.

14. A flat panel detector, characterized in that: Comprising the detection panel according to any one of claims 1-13.

15. A method for driving a detection panel, characterized in that: The detection panel is the detection panel according to any one of claims 1 to 13, and the driving method comprises: Driving each of the detection unit groups in sequence; The step of driving one of the detection unit groups includes: Control the first switch in the first switch group corresponding to the detection unit group to be driven to be in an on state, and control the second switch in the second switch group corresponding to the detection unit group to be driven to be in an off state; at the same time, control the first switch in the first switch group corresponding to the other detection unit groups except the detection unit group to be driven to be in an off state, and control the second switch in the second switch group corresponding to the other detection unit groups except the detection unit group to be driven to be in an on state, each gate line in the gate line group corresponding to the detection unit group to be driven is written with a gate drive signal in sequence, and each gate line in the gate line group corresponding to the other detection unit groups except the detection unit group to be driven is written with a noise reduction voltage.

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