semiconductor devices
By adopting an asymmetric memory cell design and polarity programming pulses in a semiconductor device, the problems of read window tolerance and threshold voltage change width are solved, and higher data storage reliability and operating characteristics are achieved.
CN115207025BActive Publication Date: 2025-09-23SK HYNIX INC
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Patent Information
- Application Number
- CN202210193307.2
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Priority Date
- 2021-04-08
- Filing Date
- 2022-03-01
- Publication Date
- 2025-09-23
- Estimated Expiration
- 2042-03-01
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Figure CN115207025B_ABST
Abstract
The present invention relates to a semiconductor device. The semiconductor device may include: first row lines, each extending in a first direction; column lines, each extending in a second direction intersecting the first direction; second row lines, each extending in the first direction; a plurality of first memory cells, respectively coupled between the first row lines and the column lines, each of the plurality of first memory cells including a first variable resistance layer and a first dielectric layer located between the first variable resistance layer and a corresponding one of the first row lines; and a plurality of second memory cells, respectively coupled between the second row lines and the column lines, each of the plurality of second memory cells including a second variable resistance layer and a second dielectric layer located between the second variable resistance layer and a corresponding one of the second row lines.
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Citation Information
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