Display panel and display device

Abstract

The present disclosure provides a display panel and a display device, belonging to the field of display technology, wherein the display panel includes a substrate and a plurality of pixel unit groups arranged in an array on the substrate, each pixel unit group includes a first pixel unit and a second pixel unit arranged on the substrate; the first pixel unit includes a pixel driving circuit and a first light-emitting device electrically connected thereto, and the second pixel unit includes a second light-emitting device; wherein, for pixel unit groups located in the same row, each pixel driving circuit and the second electrode of each second light-emitting device are connected to the same gate line; for pixel unit groups located in the same column, each pixel driving circuit is connected to the same data line, and the first electrode of each second light-emitting device is connected to the same data line.

Description

Technical Field

[0001] The present disclosure belongs to the field of display technology, and particularly relates to a display panel and a display device. Background Art

[0002] Currently, display panels are mainly single-panel panels. However, in many scenarios, such as digital signage, window information equipment, exhibition halls and other public places, advertising playback equipment often needs to display the same image on both sides so that people in relative positions can all see the image on the display panel.

[0003] Traditional technical solutions for achieving double-sided display on display panels often use liquid crystal display (LCD) panels. However, since light sources cannot be placed on either side of the panel, ambient light can only be used as the light source, which limits the brightness of the display panel. Therefore, two independent LCD panels are usually used to achieve double-sided display. However, in this case, ensuring that the two LCD panels display the same image requires a more complex connection and drive relationship, which greatly increases the production cost of the display panel and increases the thickness of the display panel, which is not in line with the design of thin and light display panels.

[0004] Alternatively, organic electroluminescence displays (OLEDs) can address the limited brightness of LCD panels due to their self-luminous properties. However, achieving a double-sided display with OLEDs still requires separately manufacturing two OLED panels and then laminating them together, which is not conducive to achieving lightweight and thin products and also increases product manufacturing costs. Summary of the Invention

[0005] The present disclosure aims to solve at least one of the technical problems existing in the prior art and provides a display panel and a display device.

[0006] In a first aspect, an embodiment of the present disclosure provides a display panel comprising a base substrate and a plurality of pixel unit groups arranged in an array on the base substrate, wherein each pixel unit group comprises a first pixel unit and a second pixel unit arranged on the base substrate; the first pixel unit comprises a pixel driving circuit and a first light-emitting device electrically connected thereto, and the second pixel unit comprises a second light-emitting device; wherein,

[0007] For the pixel unit group located in the same row, each pixel driving circuit and the second electrode of each second light-emitting device are connected to the same gate line;

[0008] For the pixel unit group located in the same column, each pixel driving circuit is connected to the same data line, and the first electrode of each second light emitting device is connected to the same data line.

[0009] In some embodiments, the plurality of pixel unit groups arranged in an array include M rows and N columns of the pixel unit groups; wherein M is a positive integer greater than or equal to 1, and N is a positive integer greater than or equal to 2;

[0010] The N columns of pixel unit groups are arranged sequentially along the first direction, the N data lines are arranged sequentially along the first direction, and the pixel driving circuit in the i-th column is connected to the i-th data line; 0<i≤N, and i is a positive integer;

[0011] The first electrode of the second light-emitting device in the j-th column is connected to the (N-j+1)-th data line; 1≤j≤N, where j is a positive integer.

[0012] In some embodiments, the display panel further includes a connecting signal line;

[0013] One of the data lines connected to the pixel driving circuit is connected to one of the connection signal lines, and the connection signal line passes through the routing area and is connected to the first electrode of the second light-emitting device;

[0014] The orthographic projections of the connecting signal lines on the base substrate do not overlap.

[0015] In some embodiments, the display panel includes a driving circuit layer disposed on the base substrate; the pixel driving circuit is located in the driving circuit layer;

[0016] The first light emitting device is located on a side of the driving circuit layer away from the base substrate; the second light emitting device is located on a side of the driving circuit layer close to the base substrate;

[0017] For one pixel unit group, the orthographic projection of the first light-emitting device on the base substrate and / or the orthographic projection of the second light-emitting device on the base substrate at least partially overlaps with the orthographic projection of the pixel driving circuit on the base substrate.

[0018] In some embodiments, orthographic projections of any two of the first light-emitting device, the second light-emitting device, and the pixel driving circuit on the substrate overlap.

[0019] In some embodiments, the pixel driving circuit includes a thin film transistor and a storage capacitor;

[0020] The driving circuit layer includes a first semiconductor layer, a first conductive layer, and a second conductive layer, which are sequentially arranged on a side of the second light emitting device away from the base substrate;

[0021] The active layer of the thin film transistor is located in the first semiconductor layer;

[0022] The gate of the thin film transistor, the first electrode of the storage capacitor and the gate line are all located in the first conductive layer;

[0023] The source and drain of the thin film transistor are both located in the second conductive layer.

[0024] In some embodiments, the display panel further includes a buffer layer disposed on a side of the first semiconductor layer close to the base substrate, and a first insulating layer disposed between the first semiconductor layer and the first conductive layer;

[0025] The second electrode of the second light-emitting device in the same pixel unit group is electrically connected to the gate line through a connecting via hole; the connecting via hole sequentially passes through the second pixel definition layer, the buffer layer and the first insulating layer.

[0026] In some embodiments, the display panel further includes a third conductive layer, a first pixel definition layer, and a fourth conductive layer sequentially disposed on a side of the driving circuit layer away from the base substrate;

[0027] The first electrode of the first light-emitting device is located in the third conductive layer; the second electrode of the first light-emitting device is located in the fourth conductive layer; the first electrode of the first light-emitting device is a reflective electrode, and the second electrode of the first light-emitting device is a transmissive electrode;

[0028] The first evaporated layer of the first light-emitting device is located on the first pixel definition layer, and the orthographic projection of the second electrode of the first light-emitting device on the base substrate covers the orthographic projection of the first evaporated layer on the base substrate.

[0029] In some embodiments, the display panel further includes a fifth conductive layer, a second pixel definition layer, and a sixth conductive layer sequentially disposed on a side of the driving circuit layer close to the base substrate;

[0030] The first electrode of the second light-emitting device is located in the fifth conductive layer; the second electrode of the second light-emitting device is located in the sixth conductive layer; the first electrode of the second light-emitting device is a reflective electrode, and the second electrode of the second light-emitting device is a transmissive electrode;

[0031] The second evaporated layer of the second light-emitting device is located on the second pixel definition layer, and the orthographic projection of the second electrode of the second light-emitting device on the base substrate covers the orthographic projection of the second evaporated layer on the base substrate.

[0032] In a second aspect, an embodiment of the present disclosure further provides a display device, which includes any of the above-mentioned display panels. BRIEF DESCRIPTION OF THE DRAWINGS

[0033] Figure 1 A schematic diagram of the connection structure between pixel units provided in an embodiment of the present disclosure;

[0034] Figure 2 A schematic diagram of a pixel unit group provided in an embodiment of the present disclosure;

[0035] Figure 3 A schematic diagram of a connection structure between a first pixel unit and a second pixel unit provided in an embodiment of the present disclosure;

[0036] Figure 4 A circuit diagram of a double-sided display panel provided in an embodiment of the present disclosure;

[0037] Figure 5 A timing control principle diagram of a display panel provided in an embodiment of the present disclosure;

[0038] Figure 6 A schematic structural diagram of a display panel provided in an embodiment of the present disclosure;

[0039] Figure 7a A schematic diagram of a film layer structure of a display panel provided in an embodiment of the present disclosure;

[0040] Figure 7b A film layer layout of a pixel driving circuit provided in an embodiment of the present disclosure;

[0041] Figure 8 A schematic diagram of the connection structure of a second electrode of a second light-emitting device provided in an embodiment of the present disclosure;

[0042] Figure 9 Schematic diagram of the membrane layer connection structure of the first pixel unit and the second pixel unit provided in an embodiment of the present disclosure.

[0043] The accompanying drawings are as follows: display panel 100; substrate 01; pixel unit group 10; first pixel unit 11; second pixel unit 12; pixel driving circuit 111; first light-emitting device OLED1; second light-emitting device OLED2; first electrode 21 of the second light-emitting device; second electrode 22 of the second light-emitting device; second evaporated layer 23; first electrode 31 of the first light-emitting device; second electrode 32 of the first light-emitting device; first evaporated layer 33; switching thin film transistor T1; driving thin film transistor T2; gate 41 of the switching thin film transistor; storage capacitor Cst ; The first electrode plate Cst1 of the storage capacitor; The second electrode plate Cst2 of the storage capacitor; The source electrode 42 of the switching thin film transistor; The drain electrode 43 of the switching thin film transistor; The active layer 44 of the switching thin film transistor; The gate electrode 51 of the driving thin film transistor; The source electrode 52 of the driving thin film transistor; The drain electrode 53 of the driving thin film transistor; The active layer 54 of the driving thin film transistor; The driving circuit layer 02; The first insulating layer 71; The second insulating layer 72; The opening layer 73; The flat layer 74; The buffer layer 75; The second pixel definition layer 76; The first pixel definition layer 77; The spacer layer 78; The encapsulation layer 79. DETAILED DESCRIPTION

[0044] In order to make the purpose, technical solutions and advantages of the embodiments of the present disclosure clearer, the technical solutions in the embodiments of the present disclosure will be clearly and completely described below in conjunction with the drawings in the embodiments of the present disclosure. Obviously, the described embodiments are only part of the embodiments of the present disclosure, not all of the embodiments. The components of the embodiments of the present disclosure generally described and shown in the drawings herein can be arranged and designed in various different configurations. Therefore, the following detailed description of the embodiments of the present disclosure provided in the drawings is not intended to limit the scope of the disclosure for which protection is sought, but merely represents selected embodiments of the present disclosure. Based on the embodiments of the present disclosure, all other embodiments obtained by those skilled in the art without making creative work are within the scope of protection of the present disclosure.

[0045] Unless otherwise defined, the technical or scientific terms used in this disclosure should have the usual meanings understood by people with ordinary skills in the field to which this disclosure belongs. The words "first", "second" and similar words used in this disclosure do not indicate any order, quantity or importance, but are only used to distinguish different components. Similarly, words such as "one", "an" or "the" do not indicate a quantity limitation, but rather indicate the existence of at least one. Words such as "include" or "comprise" mean that the elements or objects appearing before the word include the elements or objects listed after the word and their equivalents, without excluding other elements or objects. Words such as "connect" or "connected" are not limited to physical or mechanical connections, but may include electrical connections, whether direct or indirect. "Up", "down", "left", "right" and the like are only used to indicate relative positional relationships. When the absolute position of the object being described changes, the relative positional relationship may also change accordingly.

[0046] In this disclosure, "multiple or several" refers to two or more. "And / or" describes the relationship between associated objects, indicating that three possible relationships exist. For example, "A and / or B" can mean: A exists alone, A and B exist simultaneously, or B exists alone. The character " / " generally indicates that the associated objects are in an "or" relationship.

[0047] It should be noted that, in the present disclosure, the first direction X, the second direction Y, and the third direction Z intersect with each other in pairs. In the present disclosure, the first direction X and the second direction Y are perpendicular to each other in the plane where the substrate is located, the first direction X is a horizontal direction, the second direction Y is a vertical direction, and the third direction Z is a vertical direction, which are perpendicular to the plane where the substrate is located, are used as an example for explanation, but this does not constitute a limitation to the present disclosure.

[0048] It should be noted that similar reference numerals and letters denote similar items in the following drawings, and therefore, once an item is defined in one drawing, it does not need to be further defined or explained in subsequent drawings.

[0049] Research has found that due to the self-luminous properties of OLEDs, the use of organic electroluminescent devices (OLEDs) to achieve double-sided display on display panels can solve the problem of limited brightness of LCD panels. However, using OLEDs to achieve double-sided display still requires the separate production of two OLED panels and then bonding them together. Since achieving simultaneous display of two independent panels requires relatively complex connections and driving, this significantly increases the production cost of the display panel and also increases the thickness of the display panel, which is not in line with the design of thin and lightweight display panels.

[0050] In order to achieve double-sided display of an OLED panel, make its display structure lighter and thinner, and reduce manufacturing costs, an embodiment of the present disclosure provides a display panel, which includes a plurality of pixel unit groups arranged in an array on a substrate. Each pixel unit group includes a first pixel unit and a second pixel unit arranged on the substrate. The first pixel unit includes a pixel driving circuit and a first light-emitting device electrically connected thereto, and the second pixel unit includes a second light-emitting device. Compared with the prior art, the first light-emitting device and the second light-emitting device in the embodiment of the present disclosure are located in the same pixel unit group, eliminating the need to prepare two independent display panels and then bond them together. This reduces manufacturing costs while achieving a lighter and thinner display panel. In addition, in the embodiment of the present disclosure, for pixel unit groups located in the same row, each pixel driving circuit and the second electrode of each second light-emitting device are connected to the same gate line; for pixel unit groups located in the same column, each pixel driving circuit is connected to the same data line, and the first electrode of each second light-emitting device is connected to the same data line. By connecting each gate line and each data line, the pixel driving circuit is used to drive the first and second light-emitting devices in the display panel, so that the first and second light-emitting devices can emit light synchronously, thereby achieving double-sided display of the display panel.

[0051] A display module provided by an embodiment of the present disclosure will be described below with reference to the accompanying drawings in the embodiment of the present disclosure.

[0052] Figure 1 A schematic diagram of the connection structure between pixel units provided in an embodiment of the present disclosure is provided. Figure 2 A schematic diagram of a pixel unit group provided in an embodiment of the present disclosure.

[0053] like Figure 1 and Figure 2 As shown, the display panel 100 includes a plurality of pixel unit groups 10 arranged in an array on a base substrate 01. Each pixel unit group 10 includes a first pixel unit 11 and a second pixel unit 12 provided on the base substrate 01. The first pixel unit 11 includes a pixel driving circuit 111 and a first light-emitting device OLED1 electrically connected thereto, and the second pixel unit 12 includes a second light-emitting device OLED2. The pixel driving circuit 111 is configured to drive the first light-emitting device OLED1 to emit light. The first light-emitting device OLED1 can realize front-side light emission of the display panel 100, and the second light-emitting device OLED2 can realize back-side light emission of the display panel 100.

[0054] like Figure 1As shown, for the pixel unit group 10 located in the same row, each pixel driving circuit 111 and the second electrode 22 of each second light-emitting device 112 are connected to the same gate line G. While driving the first light-emitting device OLED1 to emit light, the pixel driving circuit 111 can transmit a signal to the second electrode 22 of each second light-emitting device OLED2 connected thereto through the connected gate line G.

[0055] like Figure 1 As shown, for the pixel unit group 10 located in the same column, each pixel driving circuit 111 is connected to the same data line S, and the first electrode 21 of each second light emitting device OLED2 is connected to the same data line S.

[0056] It should be noted that, for the pixel unit group 10 located in the same column, each pixel driving circuit 111 is connected to the same data line S, and the data line S can be connected to the first electrode 21 of each second light-emitting device OLED2 in the pixel unit group 10 located in the same column; alternatively, the data line S can also be connected to the first electrode 21 of each second light-emitting device OLED2 in the pixel unit group 10 located in different columns, which can be set according to actual conditions.

[0057] It should be noted that, for the pixel unit groups 10 located in different columns, the pixel driving circuits 111 in multiple columns may be connected to the same data line S, or the pixel driving circuits 111 in each column may also be connected to different data lines S.

[0058] For example, the base substrate 01 of the present disclosure may be a flexible substrate, which is made of a transparent material and can transmit the light generated by the light-emitting device to the external environment.

[0059] In some examples, different columns of pixel driving circuits 111 are connected to different data lines S. The connection mode between the data lines S corresponding to the first pixel unit 11 and the second pixel unit 12 can be set according to the number of columns of the pixel unit groups 10 in the array.

[0060] If the first light-emitting device OLED1 and the second light-emitting device OLED2 in the same pixel unit group 10 display the same image, the image may be flipped, for example, the number "IV" is displayed on the front side, and the number "VI" is displayed on the back side. In order to eliminate the effect of the double-sided display image being flipped, the embodiment of the present disclosure provides a data line connection method, specifically, as shown in FIG. Figure 1As shown, a plurality of pixel unit groups 10 arranged in an array include M rows and N columns of pixel unit groups 10; wherein M is a positive integer greater than or equal to 1, and N is a positive integer greater than or equal to 2. The N columns of pixel unit groups 10 are arranged sequentially along a first direction X, the N data lines S are arranged sequentially along the first direction X, and the i-th column of pixel driving circuits 111 are connected to the i-th data line S, that is, each column of pixel driving circuits 111 has a one-to-one corresponding data line S. 0<i≤N, and i is a positive integer. The first electrode 21 of the second light-emitting device OLED2 in the j-th column is connected to the (N-j+1)-th data line S; 1≤j≤N, and j is a positive integer.

[0061] like Figure 1 As shown, taking a 4×4 pixel unit group as an example, the pixel driving circuit 111 in the first column is connected to the first data line S1, and the first data line S1 is connected to the first electrode 21 of the second light-emitting device OLED2 in the fourth column. That is, each pixel driving circuit 111 in the first column and the first electrode 21 of each second light-emitting device OLED2 in the fourth column are electrically connected via a data line (i.e., the first data line S1). Similarly, each pixel driving circuit 111 in the second column and the first electrode 21 of each second light-emitting device OLED2 in the third column are electrically connected via the second data line S2. Each pixel driving circuit 111 in the third column and the first electrode 21 of each second light-emitting device OLED2 in the second column are electrically connected via the third data line S3. Each pixel driving circuit 111 in the fourth column and the first electrode 21 of each second light-emitting device OLED2 in the first column are electrically connected via the fourth data line S4.

[0062] like Figure 1 As shown, M rows of pixel unit groups 10 are arranged sequentially along the second direction Y, M gate lines G are arranged sequentially along the second direction Y, and the kth row of pixel driver circuits 111 is connected to the kth gate line G. That is, each row of pixel driver circuits 111 has a one-to-one correspondence with a gate line G. 0 < k ≤ M, where k is a positive integer. Within the pixel unit groups 10 in the same row, each pixel driver circuit 111 and each second electrode 22 of the second light-emitting device OLED2 are connected to the same gate line G.

[0063] In some examples, such as Figure 1As shown, the display panel 100 of the present disclosure includes a display area DA (Display Area) and a peripheral area PA (Peripheral Area) arranged around the display area, wherein the pixel driving circuit is arranged in the display area DA, and the gate integrated driving circuit (Gate On Array, GOA) and the source driving chip (Chip, IC) are arranged in the peripheral area PA. The GOA can provide a gate driving signal to the first pixel unit of each row through the gate line, and the source driving chip IC can provide a data signal to the first pixel unit and the second pixel unit of each column through the data line.

[0064] Figure 3 A schematic diagram of a connection structure between a first pixel unit and a second pixel unit provided in an embodiment of the present disclosure is shown in FIG. Figure 3 As shown, the display panel 100 further includes a connecting signal line Y. A data line S connected to the pixel driving circuit 111 is connected to a connecting signal line Y. The connecting signal line Y passes through a routing area and is connected to the first electrode 21 of the second light-emitting device OLED2. The orthographic projections of the connecting signal lines Y on the base substrate 01 do not overlap. Specifically, the first electrode 21 of the second light-emitting device OLED2 in the jth column is connected to the (N-j+1)th data line S.

[0065] The embodiment of the present disclosure can avoid wiring overlap between data lines S by setting a connecting signal line Y in the routing area, thereby reducing interference in data signal transmission between data lines S, improving the stability of the driving circuit, and further improving the consistency of luminous brightness.

[0066] Here, the connecting signal line Y and the data line S can be an integrated structure, that is, the connecting signal line Y is the data line located in the routing area. Figure 3 As shown, taking a 4×4 pixel unit group as an example, the first data line S1 is connected to each pixel driving circuit 111 in the first column, then passes through the routing area (i.e., through the first connection signal line Y1) and is connected to the first electrode 21 of each second light-emitting device OLED2 in the fourth column. The connection structures of the other data lines S2, S3, and S4 are similar to those of the above-mentioned S1, and are not listed one by one in the embodiment of the present disclosure.

[0067] Figure 4 A circuit diagram of a double-sided display panel provided in an embodiment of the present disclosure, such as Figure 4 As shown, it only shows Figure 3Circuit diagram of the four pixel unit groups 10 corresponding to the second row and second column, the second row and third column, the third row and second column, and the third row and third column. Taking the pixel driving circuit 111 as a 2T1C structure (i.e., two thin film transistors and one capacitor) as an example, the gate line G2 of the third row is electrically connected to the gate 41 of the switching thin film transistor T1 in each of the first pixel units 11 in the third row, and is electrically connected to the second electrode 22 (i.e., cathode) of the second light emitting device OLED2 in each of the second pixel units 12 in the third row. The second data line S2 is electrically connected to the source 42 of the switching thin film transistor T1 in the first pixel unit 11 in the second column, and is electrically connected to the first electrode 12 (i.e., anode) of the second light emitting device OLED2 in the third column through the routing area. For example, as Figure 4 As shown, the gate line G2 connects the gate electrode 41 of the switching thin film transistor T1 in the first pixel unit A and the cathode electrode 22 of the second light-emitting device OLED2 in the second pixel unit B'. The data line S2 connects the source electrode 42 of the switching thin film transistor T1 in the first pixel unit A and the anode electrode 21 of the second light-emitting device OLED2 in the second pixel unit B'.

[0068] A pixel driving circuit with a 2T1C structure, wherein the first pixel unit 11 includes a switching thin-film transistor T1 for switching control and a driving thin-film transistor T2 for pixel driving. The drain electrode 43 of the switching thin-film transistor T1 is electrically connected to the gate electrode 51 of the driving thin-film transistor T2 and the first plate Cst1 of the storage capacitor Cst; the source electrode 52 of the driving thin-film transistor T2 is electrically connected to the first power signal line Vdd; the drain electrode 53 of the driving thin-film transistor T2 is electrically connected to the first electrode 31 (i.e., the anode) of the first light-emitting device OLED1; the second electrode 32 (i.e., the cathode) of the first light-emitting device OLED1 and the second plate Cst2 of the storage capacitor Cst are respectively electrically connected to the second power signal line Vss.

[0069] Figure 5 A timing control principle diagram of a display panel provided in an embodiment of the present disclosure is shown in FIG. Figure 5As shown, taking a 4×4 pixel unit group as an example, the GOA controls the gate lines to scan in rows, and at the first moment t1, provides a voltage signal pulse (i.e., a gate drive signal) to each pixel driving circuit 111 in the first row; at the second moment t2, provides a voltage signal pulse (i.e., a gate drive signal) to each pixel driving circuit 111 in the second row; at the third moment t3, provides a voltage signal pulse (i.e., a gate drive signal) to each pixel driving circuit 111 in the third row; at the fourth moment t4, provides a voltage signal pulse (i.e., a gate drive signal) to each pixel driving circuit 111 in the fourth row. The above-mentioned voltage signal pulses can use either low-potential signals or high-potential signals, and can be set according to actual conditions. The embodiment of the present disclosure is described by taking the actual use of low-potential signals as an example.

[0070] like Figure 5 As shown, the IC controls the data lines S of each column to provide a voltage pulse signal (i.e., a data signal) to the pixel driving circuit 111 of the first column at a certain moment, such as moment t2. At this time, at moment t2, the gate line G2 of the second row and the first data line S1 simultaneously have voltage pulses, and the corresponding pixel driving circuit 111 of the second row and the first column simultaneously has gate drive signals and data signals, so that the first electrode 31 of the first light-emitting device OLED1 of the second row and the first column is at a high potential, thereby driving the first light-emitting device OLED1 to emit light. At the same time, at moment t2, the gate line G2 of the second row and the first data line S1 simultaneously have voltage pulses, wherein the gate line G2 of the second row correspondingly provides a voltage to the second electrode 22 of the second light-emitting device OLED2 of the second row and the fourth column, and the first data line S1 correspondingly provides a voltage to the first electrode 21 of the second light-emitting device OLED2 of the second row and the fourth column. A voltage difference is formed between the first electrode 21 and the second electrode 22 of the second light-emitting device OLED2 of the second row and the fourth column, thereby driving the second light-emitting device OLED2 of the second row and the fourth column to emit light. Here, the data signal timing of the first light emitting device OLED1 in the second row and first column is consistent with that of the second light emitting device OLED2 in the second row and fourth column, so they can emit light synchronously and display the same picture.

[0071] like Figure 5As shown, the IC controls the data lines of each column and, at a certain moment, such as moment t4, provides a voltage pulse signal, i.e., a data signal, to the pixel driving circuit 111 of the fourth column. At this time, at moment t4, the gate line G4 of the fourth row and the fourth data line S4 simultaneously have voltage pulses, and the corresponding pixel driving circuit 111 of the fourth row and the fourth column simultaneously has gate drive signals and data signals, so that the first electrode 31 of the first light-emitting device OLED1 of the fourth row and the fourth column is at a high potential, thereby driving the first light-emitting device OLED1 to emit light. At the same time, at moment t4, the gate line G4 of the fourth row and the fourth data line S4 simultaneously have voltage pulses, wherein the gate line G4 of the fourth row provides a voltage to the second electrode 22 of the second light-emitting device OLED2 of the fourth row and the first column, and the fourth data line S4 provides a voltage to the first electrode 21 of the second light-emitting device OLED2 of the fourth row and the first column. A voltage difference is formed between the first electrode 21 and the second electrode 22 of the second light-emitting device OLED2 of the fourth row and the first column, thereby driving the second light-emitting device OLED2 of the fourth row and the first column to emit light. Here, the data signal timing of the first light emitting device OLED1 in the fourth row and fourth column is consistent with that of the second light emitting device OLED2 in the fourth row and first column, so they can emit light synchronously and display the same picture.

[0072] It should be noted that the above timing control can only realize double-sided display of the display panel 100 when the gate line and the data line provide voltage to the second light-emitting device OLED2 at the same time to form a voltage difference.

[0073] In some examples, Figure 6 A schematic diagram of the structure of a display panel provided in an embodiment of the present disclosure is shown in FIG. Figure 6 As shown, the display panel 100 includes a drive circuit layer 02 disposed on a base substrate 01; a pixel drive circuit 111 is located on the drive circuit layer 02. A first light-emitting device OLED1 is located on the side of the drive circuit layer 02 facing away from the base substrate 01; a second light-emitting device OLED2 is located on the side of the drive circuit layer 02 closer to the base substrate 01. Here, by disposing the first and second light-emitting devices OLED1 and OLED2 on opposite sides of the drive circuit layer 02, double-sided display is achieved for the display panel 100.

[0074] like Figure 6As shown, for a pixel unit group 10, the orthographic projection of the first light-emitting device OLED1 on the substrate 01 and / or the orthographic projection of the second light-emitting device OLED2 on the substrate 01 at least partially overlap with the orthographic projection of the pixel driving circuit 111 on the substrate 01. This method of overlapping the light-emitting device and the pixel driving circuit can reasonably utilize the occupied area of ​​the thin-film transistor in the pixel driving circuit, thereby increasing the number of pixel units set per unit area, and thus meeting the pixel requirements of the high-resolution (Pixels Per Inch, PPI) display panel 100.

[0075] Preferably, the orthographic projections of any two of the first light-emitting device OLED1 , the second light-emitting device OLED2 and the pixel driving circuit 111 on the base substrate 01 overlap.

[0076] In some examples, the pixel driving circuit 111 includes a thin film transistor and a storage capacitor Cst; the driving circuit layer 02 includes a first semiconductor layer, a first conductive layer, and a second conductive layer, which are sequentially arranged on the side of the second light-emitting device OLED2 away from the substrate; the active layer of the thin film transistor is located in the first semiconductor layer; the gate of the thin film transistor, the first electrode of the storage capacitor, and the gate line are all located in the first conductive layer; the source and drain of the thin film transistor are both located in the second conductive layer.

[0077] In actual products, the pixel driving circuit may have a 2T1C structure, a 5T2C structure, a 6T1C structure, a 6T2C structure, a 7T1C structure, a 7T2C structure, or a 9T2C structure, etc., and the embodiments of the present disclosure are not limited thereto. The embodiments of the present disclosure are described below using the pixel driving circuit having a 2T1C structure as an example. Specifically, the thin film transistor includes a switching thin film transistor T1 for switch control and a driving thin film transistor T2 for pixel driving.

[0078] Figure 7a A schematic diagram of a film layer structure of a display panel provided in an embodiment of the present disclosure is shown. Figure 7b The film layer layout of the pixel driving circuit provided in the embodiment of the present disclosure is as follows: Figure 4 、 Figure 7a and Figure 7b As shown, the active layer 44 of the switching thin film transistor T1 and the active layer 54 of the driving thin film transistor T2 are both located in the first semiconductor layer; the gate 41 of the switching thin film transistor T1 and the gate 51 of the driving thin film transistor T2 are both located in the first conductive layer; the source 42 and drain 43 of the switching thin film transistor T1, as well as the source 52 and drain 53 of the driving thin film transistor T2 are both located in the second conductive layer.

[0079] A first insulating layer 71 (also known as the first gate insulating layer GI1) is provided between the first semiconductor layer and the first conductive layer; a second insulating layer 72 (also known as the second gate insulating layer GI2) is provided between the first conductive layer and the second conductive layer and close to the first conductive layer; an open layer 73 is provided between the second insulating layer 72 and the second conductive layer; and a flat layer 74 is provided between the second conductive layer and the first light-emitting device OLED1.

[0080] The source electrode 42 of the switching thin film transistor T1 is electrically connected to the source region of the active layer 44 of the switching thin film transistor T1 through a first connection via Via1 penetrating the opening layer 73, the first insulating layer 71, and the second insulating layer 72; the drain electrode 43 of the switching thin film transistor T1 is electrically connected to the drain region of the active layer 44 of the switching thin film transistor T1 through a second connection via Via2 penetrating the opening layer 73, the first insulating layer 71, and the second insulating layer 72; the source electrode 52 of the driving thin film transistor T2 is electrically connected to the source region of the active layer 54 of the driving thin film transistor T2 through a third connection via penetrating the opening layer 73, the first insulating layer 71, and the second insulating layer 72; and the drain electrode 53 of the driving thin film transistor T2 is electrically connected to the drain region of the active layer 54 of the driving thin film transistor T2 through a fourth connection via penetrating the opening layer 73, the first insulating layer 71, and the second insulating layer 72. The first electrode 31 (i.e., anode) of the first light-emitting device OLED1 is electrically connected to the drain electrode 43 of the switching thin-film transistor T1 through a fifth connection via Via5 that penetrates the planar layer 74. The drain electrode 43 of the switching thin-film transistor T1 or the gate electrode 51 of the driving thin-film transistor T2 is electrically connected to the first plate Cst1 of the storage capacitor Cst through a sixth connection via Via6 that penetrates the perforated layer 73 and the second insulating layer 72.

[0081] The switching thin film transistor T1 and the driving thin film transistor T2 of the present disclosure can be P-type transistors or N-type transistors. The embodiments of the present disclosure are described using P-type transistors as an example. That is, in the description of the present disclosure, the switching thin film transistor T1 and the driving thin film transistor T2 are both P-type transistors. However, it should be understood that the thin film transistors of the embodiments of the present disclosure are not limited to P-type transistors. Those skilled in the art can also use N-type transistors to implement the functions of one or more thin film transistors in the embodiments of the present disclosure according to actual needs.

[0082] In some examples, such as Figure 7aAs shown, the display panel 100 further includes a buffer layer 75 disposed on a side of the first semiconductor layer close to the base substrate 01, and a first insulating layer 71 disposed between the first semiconductor layer and the first conductive layer. The buffer layer 75 can prevent or reduce the diffusion of metal atoms and / or impurities from the base substrate 01 into the first semiconductor layer. In the embodiment of the present disclosure, the buffer layer 75 can include an inorganic material such as silicon oxide (SiOx), silicon nitride (SiNx), and / or silicon oxynitride (SiON), and can be formed as a multilayer or single layer.

[0083] The second electrode 22 of the second light-emitting device OLED2 in the same pixel unit group is electrically connected to the gate line through a connecting via hole; the connecting via hole (ie, the seventh connecting via hole) sequentially passes through the first insulating layer 71, the buffer layer 75 and the second pixel definition layer 76. Figure 8 A schematic diagram of the connection structure of the second electrode of a second light-emitting device provided in an embodiment of the present disclosure is shown as follows: Figure 8 As shown, taking the pixel driving circuit 111 having a 2T1C structure as an example, the second electrode 22 of the second light-emitting device OLED2 and the gate electrode 41 of the switching thin film transistor T1 in the same pixel unit group 10 are electrically connected via a gate line G and a connecting via (i.e., a seventh connecting via Via7). The gate electrodes 41 of the switching thin film transistors T1 in different pixel unit groups 10 in the same row are electrically connected via the gate line G.

[0084] In some examples, such as Figure 7a As shown, the display panel 100 further includes a third conductive layer, a first pixel definition layer 77, and a fourth conductive layer, sequentially disposed on the side of the drive circuit layer 02 facing away from the base substrate 01. The first light-emitting device OLED1 includes a first electrode 31, a second electrode 32, and a first evaporated layer 33 sandwiched between the first electrode 31 and the second electrode 32. The first electrode 31 of the first light-emitting device OLED1 is located in the third conductive layer; the second electrode 32 of the first light-emitting device OLED1 is located in the fourth conductive layer. The first electrode 31 of the first light-emitting device OLED1 is a reflective electrode, while the second electrode 32 of the first light-emitting device OLED1 is a transmissive electrode. The first evaporated layer 33 is located in the first pixel definition layer 77, and the orthographic projection of the second electrode 32 of the first light-emitting device OLED1 on the base substrate 01 overlaps the orthographic projection of the first evaporated layer 33 on the base substrate 01, so that all light emitted by the first evaporated layer 33 is transmitted through the transmissive electrode 32.

[0085] In the embodiments disclosed herein, the first electrode is used as the anode and the second electrode is used as the cathode. The transmissive electrode, also known as the transparent cathode, can transmit light emitted by the vapor-deposited layer; the reflective electrode, also known as the reflective anode, can reflect light emitted by the vapor-deposited layer and reflect it out through the transparent cathode.

[0086] like Figure 4 、 Figure 7a and Figure 7b As shown, the source electrode 52 of the driving thin film transistor T2 is connected to the first power signal line Vdd and loaded with voltage. The active layer 44 of the switching thin film transistor T1 has a source region, a drain region, and a channel region sandwiched between the source region and the drain region. When the gate electrode 41 of the switching thin film transistor T1 is at a low potential V 负 When the channel region of the active layer 44 of the switch thin film transistor T1 is turned on, a carrier channel is formed; if a high potential V is applied to the source 42 of the switch thin film transistor T1 正 , the data signal transmitted by the data line S is transmitted to the drain region of the switch thin film transistor T1 through the channel region, and then transmitted to the anode 31 of the first light emitting device OLED1 through the drain electrode 43 of the switch thin film transistor T1. At this time, the anode 31 of the first light emitting device OLED1 is at a high potential V 正 , and the potential of the cathode 32 of the first light-emitting device OLED1 is 0, acting on the first evaporated layer 33, causing the first evaporated layer 33 to emit light and realize front light emission through the transparent cathode 32. At the same time, the voltage of the source 42 of the switching thin film transistor T1 is stored in the storage capacitor Cst, and the potential of the anode 31 of the first light-emitting device OLED1 is maintained, so that the first evaporated layer 33 can continue to emit light.

[0087] In some examples, such as Figure 7a As shown, the display panel 100 further includes a fifth conductive layer, a second pixel definition layer 76, and a sixth conductive layer, sequentially disposed on the side of the drive circuit layer 02 near the base substrate 01. The second light-emitting device OLED2 includes a first electrode 21, a second electrode 22, and a second evaporated layer 23 sandwiched between the first and second electrodes. The first electrode 21 of the second light-emitting device OLED2 is located on the fifth conductive layer; the second electrode 22 of the second light-emitting device OLED2 is located on the sixth conductive layer. The first electrode 21 of the second light-emitting device OLED2 is a reflective electrode, while the second electrode 22 of the second light-emitting device OLED2 is a transmissive electrode. The second evaporated layer 23 is located on the second pixel definition layer 76, and the orthographic projection of the second electrode 22 of the second light-emitting device OLED2 on the base substrate 01 overlaps the orthographic projection of the second evaporated layer 23 on the base substrate 01, so that all light emitted by the second evaporated layer 23 is transmitted through the transmissive electrode 22.

[0088] Regarding the evaporated layer, during the preparation process, the luminescent material can be evaporated into the opening of the pixel definition layer to form an evaporated layer, which contains three RGB pixels (where R represents red, G represents green, and B represents blue).

[0089] The luminescent material has a certain luminescence threshold voltage V 发光电压 , design the light-emitting threshold voltage V 发光电压 , let V正 +|V 负 |>V 发光电压 >V 正 or |V 负 |, when the voltage applied to the electrodes on both sides of the light emitting device is greater than V 发光电压 When , the luminescent material emits light.

[0090] like Figure 4 、 Figure 7a and Figure 7b As shown, the source electrode 52 of the driving thin film transistor T2 is connected to the first power signal line Vdd and loaded with voltage. The active layer 44 of the switching thin film transistor T1 has a source region, a drain region, and a channel region sandwiched between the source region and the drain region. When the gate electrode 41 of the switching thin film transistor T1 is at a low potential V 负 When the channel region of the active layer 44 of the switch thin film transistor T1 is turned on, a carrier channel is formed; if a high potential V is applied to the source 42 of the switch thin film transistor T1 正 , the data signal transmitted by the data line S is transmitted to the drain region of the switch thin film transistor T1 through the channel region, and then transmitted to the anode 31 of the first light emitting device OLED1 through the drain electrode 43 of the switch thin film transistor T1. At this time, the anode 31 of the first light emitting device OLED1 is at a high potential V 正 , and the cathode 32 of the first light-emitting device OLED1 has a potential of 0, acting on the first evaporated layer, the first evaporated layer 33 emits light and realizes the front light emission through the transparent cathode 32. At the same time, since the gate 41 of the switching thin film transistor T1 is connected to the cathode 22 of the second light-emitting device OLED2, the cathode 22 of the second light-emitting device OLED2 is at a low potential V 负 The source electrode 42 of the switching thin film transistor T1 is connected to the data line S and is electrically connected to the anode 21 of the second light emitting device OLED2. The anode 21 of the second light emitting device OLED2 is at a high potential V 正 , the anode 21 and cathode 22 of the second light emitting device OLED generate a voltage difference V 正 -V 负 =V 正 +|V 负 |>V 发光电压 , and acts on the second evaporated layer 23, the second evaporated layer 23 emits light and realizes light emission on the back side through the transparent cathode 22.

[0091] When the gate 41 of the switching thin film transistor T1 is turned on, that is, at a low potential V 负 , the source 42 of the switch thin film transistor T1 is not connected, that is, when the voltage is 0, the first light emitting device OLED1 does not emit light. At the same time, the voltage of the electrodes on both sides of the second light emitting device OLED3 is 0-V 负 <V 发光电压, so the second light emitting device OLED2 does not emit light.

[0092] When the gate electrode 41 of the switching thin film transistor T1 is not connected, that is, the voltage is 0, and the source electrode 42 of the switching thin film transistor T1 is connected, that is, the voltage is V 正 At this time, the first light emitting device OLED1 does not emit light. At the same time, the voltage of the electrodes on both sides of the second light emitting device OLED2 is V 正 -0<V 发光电压 , so the second light emitting device OLED2 does not emit light.

[0093] It should be noted that the second light emitting device OLED2 can be located in the same pixel unit group 10 as the pixel driving circuit 111, or in another pixel unit group 10 in the same row but different column as the pixel driving circuit 111. Figure 3 circuit connection relationship.

[0094] Figure 9 This is a schematic diagram of the film layer connection structure of the first pixel unit and the second pixel unit provided in an embodiment of the present disclosure, wherein: Figure 9 Shown Figure 3 Part of the film layer of the first pixel unit A in the second row and second column and the second pixel unit B in the second row and third column, as shown Figure 9 As shown, the gate electrode 41 of the switching transistor T1 of the first pixel unit A is electrically connected to the reflective anode 21 of the second light-emitting device OLED2 of the second pixel unit B through the second gate line G2; the source electrode 42 of the switching thin film transistor T1 of the first pixel unit A is electrically connected to the transparent cathode 22 of the second light-emitting device OLED2 of the second pixel unit B through the second data line S2.

[0095] In some examples, such as Figure 7a As shown, a spacer layer 78 is provided between the first pixel definition layer and the second electrode of the first light emitting device. The spacer layer 78 can increase the path for external water vapor or oxygen to enter the display area DA, thereby protecting the light emitting device in the display area DA.

[0096] In some examples, such as Figure 7a As shown, an encapsulation layer 79 is provided on the side of the first light-emitting device facing away from the substrate. The encapsulation layer 79 can be a single-layer structure or a multi-layer structure. When the encapsulation layer 79 is a multi-layer structure, the encapsulation layer 79 can include a first inorganic encapsulation layer, an organic encapsulation layer, and a second inorganic encapsulation layer, such as silicon nitride SiN + ink + silicon nitride SiN, arranged in sequence.

[0097] Furthermore, the encapsulation layer 79 extends to the peripheral region to cover various film layers of the pixel unit.

[0098] In a second aspect, based on the same inventive concept, an embodiment of the present disclosure further provides a display device, which includes the display panel described in any one of the above-mentioned first aspects.

[0099] The principle of solving the problem by the display panel included in the display device is similar to that of the display panel in the above embodiment. The specific structure can be referred to the above display panel, and the repeated parts will not be repeated.

[0100] In the third aspect, based on the same inventive concept, the present disclosure also provides a method for manufacturing a display panel. The film layer structures of the display panel can be seen in Figure 7a As shown in the figure, the specific preparation process of each film layer is as follows:

[0101] S1. Forming a sixth conductive layer (ie, the transmissive cathode 22 of the second light-emitting device OLED2) on the base substrate 01.

[0102] The process of forming the sixth conductive layer includes but is not limited to processes such as coating photoresist-exposure-development-etching-stripping and the like.

[0103] S2. Form a second pixel definition layer 76 on the side of the sixth conductive layer facing away from the base substrate 01 , and open a predetermined position on the second pixel definition layer 76 .

[0104] S3 , evaporating a light-emitting material at the opening of the second pixel definition layer 76 to form a second evaporated layer 23 .

[0105] S4 . Form a fifth conductive layer (ie, the reflective anode 21 of the second light-emitting device OLED2 ) on the side of the second evaporated layer 23 facing away from the base substrate 01 .

[0106] S5. Form a buffer layer 75 on a side of the fifth conductive layer facing away from the base substrate 01.

[0107] S6. Form a semiconductor layer on the side of the buffer layer 75 away from the base substrate 01, and prepare the active layer (ie, the first semiconductor layer) of the thin film transistor by coating photoresist-exposure-development-etching-stripping and other processes on the semiconductor layer.

[0108] S7 . Form a first insulating layer 71 (which may be a gate insulating layer GI1 ) on a side of the first semiconductor layer facing away from the substrate 01 .

[0109] S8. Form a first conductive layer (including the gate of the thin film transistor, each row of gate lines, and the first plate of the storage capacitor) on the side of the first insulating layer 71 facing away from the base substrate 01.

[0110] S9. Form a second insulating layer 72 (which may be a gate insulating layer GI2) on a side of the first conductive layer facing away from the base substrate 01.

[0111] S10 , for the first plate Cst1 of the storage capacitor Cst, a second plate Cst2 of the storage capacitor Cst is formed on a side of the first plate Cst1 facing the second insulating layer 72 and away from the base substrate 01 .

[0112] S11 , forming an open layer 73 on a side of the second insulating layer 72 facing away from the base substrate 01 and on a side of the second electrode plate Cst2 facing away from the base substrate 01 .

[0113] S12 . Form a second conductive layer (including the source and drain of the thin film transistor) on the side of the opening layer 73 facing away from the base substrate 01 .

[0114] S13 , forming a planar layer 74 on a side of the second conductive layer facing away from the base substrate 01 .

[0115] S14 , forming a third conductive layer (including the reflective anode 31 of the first light emitting device OLED1 ) on the side of the planar layer 74 away from the base substrate 01 .

[0116] S15 , forming a first pixel definition layer 77 on a side of the third conductive layer facing away from the base substrate 01 , and openings are formed at predetermined positions on the first pixel definition layer 77 .

[0117] S16 , evaporating a light-emitting material at the opening of the first pixel definition layer 77 to form a first evaporated layer 33 ; and forming a spacer layer 78 at the edge area of ​​the first pixel definition layer 77 .

[0118] S17 , forming a fourth conductive layer (ie, the transmissive cathode 32 of the first light-emitting device OLED1 ) on the side of the first pixel definition layer 77 and the spacer layer 78 facing away from the base substrate 01 .

[0119] S18 . Form an encapsulation layer 79 on a side of the fourth conductive layer facing away from the base substrate 01 .

[0120] For the above steps S1 to S18, holes are punched at the film layer positions where holes need to be punched to form the first connecting via Via1, the second connecting via Via2, the third connecting via, the fourth connecting via, the fifth connecting via Via5, the sixth connecting via Via6 and the seventh connecting via Via7.

[0121] It is understood that the above embodiments are merely exemplary embodiments for illustrating the principles of the present disclosure, and the present disclosure is not limited thereto. Those skilled in the art may make various modifications and improvements without departing from the spirit and substance of the present disclosure, and such modifications and improvements are also considered to be within the scope of protection of the present disclosure.

Claims

1. A display panel comprising a base substrate and a plurality of pixel unit groups arranged in an array on the base substrate, each of the pixel unit groups comprising a first pixel unit and a second pixel unit disposed on the base substrate; the first pixel unit comprising a pixel driving circuit and a first light-emitting device electrically connected thereto, and the second pixel unit comprising a second light-emitting device; wherein: For the pixel unit group located in the same row, each pixel driving circuit and the second electrode of each second light-emitting device are connected to the same gate line; For the pixel unit group located in the same column, each pixel driving circuit is connected to the same data line, and the first electrode of each second light emitting device is connected to the same data line; The plurality of pixel unit groups arranged in an array include M rows and N columns of the pixel unit groups; wherein M is a positive integer greater than or equal to 1, and N is a positive integer greater than or equal to 2; The N columns of pixel unit groups are arranged sequentially along the first direction, the N data lines are arranged sequentially along the first direction, and the pixel driving circuit in the i-th column is connected to the i-th data line; 0<i≤N, and i is a positive integer; The first electrode of the second light-emitting device in the j-th column is connected to the (N-j+1)-th data line; 1≤j≤N, where j is a positive integer.

2. The display panel according to claim 1, wherein The display panel further includes a connecting signal line; One of the data lines connected to the pixel driving circuit is connected to one of the connection signal lines, and the connection signal line passes through the routing area and is connected to the first electrode of the second light-emitting device; The orthographic projections of the connecting signal lines on the base substrate do not overlap.

3. The display panel according to claim 1, wherein: The display panel includes a driving circuit layer provided on the base substrate; The pixel driving circuit is located in the driving circuit layer; The first light emitting device is located on a side of the driving circuit layer away from the base substrate; the second light emitting device is located on a side of the driving circuit layer close to the base substrate; For one pixel unit group, the orthographic projection of the first light-emitting device on the base substrate and / or the orthographic projection of the second light-emitting device on the base substrate at least partially overlaps with the orthographic projection of the pixel driving circuit on the base substrate.

4. The display panel according to claim 3, wherein: Any two of the first light-emitting device, the second light-emitting device and the pixel driving circuit have overlapping orthographic projections on the base substrate.

5. The display panel according to claim 1, wherein: The pixel driving circuit includes a thin film transistor and a storage capacitor; The driving circuit layer includes a first semiconductor layer, a first conductive layer, and a second conductive layer, which are sequentially arranged on a side of the second light emitting device away from the base substrate; The active layer of the thin film transistor is located in the first semiconductor layer; The gate of the thin film transistor, the first electrode of the storage capacitor and the gate line are all located in the first conductive layer; The source and drain of the thin film transistor are both located in the second conductive layer. The display panel according to claim 5 , wherein: The display panel further includes a buffer layer disposed on a side of the first semiconductor layer close to the base substrate, and a first insulating layer disposed between the first semiconductor layer and the first conductive layer; The second electrode of the second light-emitting device in the same pixel unit group is electrically connected to the gate line through a connecting via hole; the connecting via hole sequentially passes through the second pixel definition layer, the buffer layer and the first insulating layer.

7. The display panel according to claim 3, wherein: The display panel further includes a third conductive layer, a first pixel definition layer, and a fourth conductive layer sequentially arranged on a side of the driving circuit layer away from the base substrate; The first electrode of the first light-emitting device is located in the third conductive layer; the second electrode of the first light-emitting device is located in the fourth conductive layer; the first electrode of the first light-emitting device is a reflective electrode, and the second electrode of the first light-emitting device is a transmissive electrode; The first evaporated layer of the first light-emitting device is located on the first pixel definition layer, and the orthographic projection of the second electrode of the first light-emitting device on the base substrate covers the orthographic projection of the first evaporated layer on the base substrate.

8. The display panel according to claim 3, wherein: The display panel further includes a fifth conductive layer, a second pixel definition layer, and a sixth conductive layer sequentially arranged on a side of the driving circuit layer close to the base substrate; The first electrode of the second light-emitting device is located in the fifth conductive layer; the second electrode of the second light-emitting device is located in the sixth conductive layer; the first electrode of the second light-emitting device is a reflective electrode, and the second electrode of the second light-emitting device is a transmissive electrode; The second evaporated layer of the second light-emitting device is located on the second pixel definition layer, and the orthographic projection of the second electrode of the second light-emitting device on the base substrate covers the orthographic projection of the second evaporated layer on the base substrate.

9. A display device comprising the display panel according to any one of claims 1 to 8.

Images