Display panel, manufacturing method thereof, and display device

Abstract

The present application discloses a display panel, a manufacturing method thereof, and a display device, which belong to the field of display technology. The display panel may include: a substrate, a plurality of sub-pixels, a plurality of pads, an inorganic insulating layer, and an organic insulating layer. Since the inorganic insulating layer has a connection groove located between two adjacent pads, and the organic insulation on the side of the inorganic insulating layer facing away from the substrate can be located within these connections. Therefore, it can be ensured that the contact area between the adjacent inorganic insulating layer and the organic insulating layer is large, so that the tightness of the connection between the inorganic insulating layer and the organic insulating layer is high, so as to ensure that the probability of separation between the inorganic insulating layer and the organic insulating layer is low, thereby effectively reducing the probability of corrosion of the part of the pad located between the inorganic insulating layer and the organic insulating layer, so that the conductive performance of the pad is better. In this way, the yield rate of the display panel can be effectively improved.

Description

Technical Field

[0001] The present application relates to the field of display technology, and in particular to a display panel and a manufacturing method thereof, and a display device. Background Art

[0002] With the advancement of display technology, display devices are becoming increasingly common. Common display devices include smartphones, tablets, televisions, and monitors. Display devices typically include a display panel and a driver chip. After the display panel is manufactured, a bonding process is typically required to bond the driver chip to the display panel, ensuring electrical connection between the display panel and the driver chip. Summary of the Invention

[0003] The present invention provides a display panel, a manufacturing method thereof, and a display device. The present invention can solve the problem of low yield of display panels in the prior art. The technical solution is as follows:

[0004] In one aspect, a display panel is provided, the display panel having a display area and a non-display area located outside the display area, the display panel comprising:

[0005] substrate;

[0006] a plurality of sub-pixels, the plurality of sub-pixels being located on one side of the substrate and within the display area;

[0007] an inorganic insulating layer and an organic insulating layer stacked at least in the non-display area, the inorganic insulating layer being closer to the substrate than the organic insulating layer;

[0008] and, a plurality of pads located in the non-display area and electrically connected to the plurality of sub-pixels, at least part of the pads being located on a side of the organic insulating layer facing away from the substrate;

[0009] The inorganic insulating layer has a connection groove between two adjacent pads, and a portion of the organic insulating layer is located in the connection groove.

[0010] Optionally, an inner wall of the connecting groove has a recessed structure, and a portion of the organic insulating layer is also located in the recessed structure.

[0011] Optionally, the inorganic insulating layer includes: a first inorganic layer and a second inorganic layer stacked together, wherein the second inorganic layer is closer to the substrate than the first inorganic layer;

[0012] The connecting groove passes through the first inorganic layer and at least a portion of the second inorganic layer. A side of the first inorganic layer close to the connecting groove protrudes from a side of the second inorganic layer close to the connecting groove.

[0013] Optionally, the connection groove includes: a first sub-connection groove located in the first inorganic layer, and a second sub-connection groove located in the second inorganic layer;

[0014] The orthographic projection of the first sub-connection groove on the substrate is located within the orthographic projection of the second sub-connection groove on the substrate, and the outer boundary of the orthographic projection of the first sub-connection groove on the substrate does not overlap with the outer boundary of the orthographic projection of the second sub-connection groove on the substrate.

[0015] Optionally, a distance between an outer boundary of an orthographic projection of the first sub-connection groove on the substrate and an outer boundary of an orthographic projection of the second sub-connection groove on the substrate ranges from 0.7 micrometers to 1 micrometer.

[0016] Optionally, a depth of the second sub-connection groove in a direction perpendicular to the substrate is less than or equal to a thickness of the second inorganic layer.

[0017] Optionally, when the depth of the second sub-connection groove in the direction perpendicular to the substrate is less than the thickness of the second inorganic layer, the distance between the bottom surface of the second sub-connection groove and the side of the second inorganic layer close to the substrate ranges from 500 angstroms to 1000 angstroms.

[0018] Optionally, the film density of the first inorganic layer is greater than the film density of the second inorganic layer.

[0019] Optionally, the pad includes: a first sub-pad, a second sub-pad, and a third sub-pad stacked in a direction perpendicular to and away from the substrate;

[0020] The first sub-pad is located between the second inorganic layer and the first inorganic layer, the second sub-pad is located on a side of the first inorganic layer away from the substrate, and the third sub-pad is located on a side of the second sub-pad away from the substrate;

[0021] The second inorganic layer has a first via hole, the second sub-pad is overlapped with the first sub-pad through the first via hole, and the second sub-pad is also overlapped with the third sub-pad.

[0022] Optionally, the display panel also includes: an auxiliary inorganic insulating layer located on the side of the organic insulating layer away from the substrate, the third sub-pad is located on the side of the auxiliary inorganic insulating layer away from the substrate, the auxiliary inorganic insulating layer has a second via hole, and the third sub-pad is overlapped with the second sub-pad through the second via hole.

[0023] Optionally, a surface of the organic insulating layer facing away from the substrate is flush with a surface of the second sub-pad facing away from the substrate.

[0024] Optionally, at least one sub-pixel among the plurality of sub-pixels includes: a thin film transistor, a switching electrode, and a light-emitting device;

[0025] The switching electrode is located on a side of the thin film transistor away from the substrate, and the light emitting device is located on a side of the switching electrode away from the substrate;

[0026] The thin film transistor includes an active layer located on the substrate, a gate located on a side of the active layer facing away from the substrate, and a source and a drain located on a side of the gate facing away from the substrate, and one of the source and the drain is electrically connected to the light-emitting device through the transfer electrode;

[0027] The first sub-pad is provided in the same layer as the source electrode and the drain electrode and is made of the same material, and the second sub-pad is provided in the same layer as the transfer electrode and is made of the same material.

[0028] Optionally, the display panel further includes: an encapsulation layer for encapsulating the light-emitting device, and a touch layer located on a side of the encapsulation layer facing away from the substrate, the touch layer including: a touch electrode layer and a bridging electrode layer;

[0029] The third sub-pad is provided in the same layer as the bridging electrode layer and is made of the same material.

[0030] In another aspect, a method for manufacturing a display panel is provided, the method comprising:

[0031] forming a plurality of sub-pixels, an inorganic insulating layer, an organic insulating layer, and a plurality of pads on a substrate;

[0032] The display panel has a display area and a non-display area located outside the display area, the multiple sub-pixels are located on one side of the substrate and within the display area, and at least a portion of the inorganic insulating layer, at least a portion of the organic insulating layer, and the multiple pads are all located within the non-display area;

[0033] The plurality of pads are electrically connected to the plurality of sub-pixels, and at least part of the pads are located on a side of the organic insulating layer facing away from the substrate;

[0034] The inorganic insulating layer is closer to the substrate than the organic insulating layer, and the inorganic insulating layer has a connection groove between two adjacent pads, and a portion of the organic insulating layer is located in the connection groove.

[0035] On the other hand, a display device is provided, including: a driving chip, and a display panel electrically connected to the driving chip, wherein the display panel is the display panel described above.

[0036] The beneficial effects of the technical solutions provided in the embodiments of the present application include at least:

[0037] A display panel may include: a substrate, multiple sub-pixels, multiple solder pads, an inorganic insulating layer, and an organic insulating layer. Because the inorganic insulating layer has a connection groove located between two adjacent solder pads, and the organic insulating layer on the side of the inorganic insulating layer facing away from the substrate can be located within these connections, the contact area between the adjacent inorganic insulating layer and the organic insulating layer can be ensured to be large, resulting in a high degree of tightness in the connection between the inorganic insulating layer and the organic insulating layer, thereby ensuring a low probability of separation between the inorganic insulating layer and the organic insulating layer, thereby effectively reducing the probability of corrosion in the portion of the solder pad located between the inorganic insulating layer and the organic insulating layer, and improving the conductive performance of the solder pad. In this way, the yield rate of the display panel can be effectively improved. BRIEF DESCRIPTION OF THE DRAWINGS

[0038] In order to more clearly illustrate the technical solutions in the embodiments of the present application, the following briefly introduces the drawings required for use in the description of the embodiments. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without any creative work.

[0039] Figure 1 is a top view of a display device;

[0040] Figure 2 yes Figure 1 The schematic diagram of the film layer of the display device at AA' is shown;

[0041] Figure 3 is a top view of a display panel provided in an embodiment of the present application;

[0042] Figure 4 yes Figure 3 The schematic diagram of the film layer of the display panel at AA' is shown;

[0043] Figure 5 yes Figure 3 A schematic diagram of another film layer structure of a display panel at AA' is shown;

[0044] Figure 6 yes Figure 5 A partial enlarged view of the display panel at position B is shown;

[0045] Figure 7 yes Figure 3 A schematic diagram of another film layer structure of a display panel at AA' is shown;

[0046] Figure 8 This is a schematic diagram of the film structure of the display area of ​​a display panel provided in an embodiment of the present application;

[0047] Figure 9 is a top view of a display device provided in an embodiment of the present application;

[0048] Figure 10 yes Figure 9 The diagram shows the film structure of the display device at CC'. DETAILED DESCRIPTION

[0049] In order to make the objectives, technical solutions and advantages of this application clearer, the implementation methods of this application will be further described in detail below with reference to the accompanying drawings.

[0050] Please refer to Figure 1 and Figure 2 , Figure 1 is a top view of a display device, Figure 2 yes Figure 1 The display device generally includes a display panel 00 and a driver chip 11. The driver chip 11 can be bonded to the display panel 00 through a bonding process, so that the display panel 00 can be electrically connected to the driver chip 11.

[0051] The display panel 00 has a display area 0a and a non-display area 0b located outside the display area 0a. The display panel 00 may include a substrate 01, a plurality of sub-pixels located in the display area 0a, and a plurality of pads 02 located in the non-display area 0b.

[0052] The plurality of pads 02 can be electrically connected to the plurality of sub-pixels disposed within the display area 0a. For example, the pads 02 can be electrically connected to the sub-pixels via signal traces (e.g., data lines and power signal lines). The display panel 00 can be electrically connected to the driver chip 11 via the pads 02. In this way, the driver chip 11 provides electrical signals to the pads 02, causing the sub-pixels within the display area 0a to emit corresponding light, thereby enabling the display panel 00 to display a corresponding image.

[0053] The display panel 00 may further include: an inorganic insulating layer 03 and an organic insulating layer 04 located within the non-display area 0b. The inorganic insulating layer 03 is closer to the substrate 01 than the organic insulating layer 04. A portion of the pad 02 is located on the side of the organic insulating layer 04 facing away from the substrate 01, so that the pad 02 can be bonded and connected to the driver chip 11. For example, after the driver chip 11 is bonded to the non-display area 0b of the display panel 00 through a bonding process, the multiple solder pins 11a provided on the driver chip 11 can be electrically connected one-to-one with the multiple pads 02 provided in the non-display area 0b through the conductive particles L.

[0054] However, when the driver chip 11 is attached to the non-display area 0b of the display panel 00, a pressing force is applied to the driver chip 11. Because the inorganic insulating layer 03 in the non-display area 0b is made of an inorganic material, and the organic insulating layer 04 is made of an organic material, the stress in the inorganic insulating layer 03 and the organic insulating layer 04 are mismatched. This pressing force can easily cause separation between the inorganic insulating layer 03 and the organic insulating layer 04.

[0055] Furthermore, after attaching the driver chip 11 to the non-display area 0b of the display panel 00, the display panel 00 must be placed in a high-temperature, high-humidity environment for testing. Because the expansion coefficients of inorganic materials differ from those of organic materials, the inorganic insulating layer 03 and the organic insulating layer 04 may deform differently during testing of the display panel 00, exacerbating the separation between the inorganic insulating layer 03 and the organic insulating layer 04.

[0056] Because a portion of the pad 02 is located between the inorganic insulating layer 03 and the organic insulating layer 04, after the inorganic insulating layer 03 and the organic insulating layer 04 are separated, water and oxygen (i.e., water vapor and oxygen) in the external environment can easily enter the display panel 00 through the gap between the inorganic insulating layer 03 and the organic insulating layer 04, causing the portion of the pad 02 located between the inorganic insulating layer 03 and the organic insulating layer 04 to be easily corroded, thereby affecting the conductive performance of the pad 02. This results in a low yield rate for the display panel 00.

[0057] Please refer to Figure 3 and Figure 4 , Figure 3 This is a top view of a display panel provided in an embodiment of the present application. Figure 4 yes Figure 3 A schematic diagram of the film layers of a display panel at line AA' is shown. Display panel 000 has a display area 00a and a non-display area 00b located outside display area 00a. Display panel 000 may include: a substrate 100, multiple sub-pixels (not shown), multiple pads 200, an inorganic insulating layer 300, and an organic insulating layer 400.

[0058] The plurality of sub-pixels in the display panel 000 may all be located on one side of the substrate 100 and may all be located within the display region 00 a .

[0059] The plurality of pads 200 in the display panel 000 may all be located in the non-display area 00b and may be electrically connected to the plurality of sub-pixels. Here, the plurality of pads 200 may be arrayed in at least one row in the non-display area 00b.

[0060] For example, Figure 3As shown, the display panel 000 may further include: a plurality of data signal lines L1 and a plurality of gate lines L2 located in the display area 00a, and a plurality of fan-out leads L3 and a plurality of transfer leads L4 located in the non-display area 00b.

[0061] Here, the extension direction of the data signal line L1 distributed in the display area 00a can be perpendicular to the extension direction of the gate line L2. In this way, any two adjacent data signal lines L1 and any two adjacent gate lines L2 can enclose a sub-pixel region P, each sub-pixel region P can have at least one sub-pixel distributed therein, and the sub-pixels distributed therein can be electrically connected to an adjacent data signal line L1 and an adjacent gate line L2. For example, the sub-pixels distributed therein can include: a pixel driving circuit, and a light-emitting device electrically connected to the pixel driving circuit, and the pixel driving circuit can be electrically connected to the adjacent data signal line L1 and the adjacent gate line L2.

[0062] The plurality of data signal lines L1 arranged in the display area 00a can be electrically connected to the plurality of fan-out leads L3 in the non-display area 00b, and the plurality of fan-out leads L3 can be electrically connected to a portion of the plurality of pads 200. In this way, a portion of the plurality of pads 200 can be electrically connected to the plurality of sub-pixels in the display area 00a in sequence through the plurality of fan-out leads L3 and the plurality of data signal lines L1.

[0063] The display panel 000 typically further includes a gate driver on array (GOA) circuit 00b1 disposed within the non-display area 00b. Multiple gate lines L2 arranged within the display area 00a can all be electrically connected to the GOA circuit 00b1. Furthermore, the GOA circuit 00b1 can be electrically connected to another portion of the plurality of pads 200 via multiple transfer leads L4. Thus, another portion of the plurality of pads 200 can be electrically connected to a plurality of sub-pixels within the display area 00a in sequence via the multiple transfer leads L4, the GOA circuit 00b1, and the multiple gate lines L2.

[0064] In the present application, after the driver chip is attached to the non-display area 00b of the display panel 000, the multiple solder pins within the driver chip can be electrically connected in a one-to-one correspondence with the multiple solder pads 200 provided within the non-display area 00b. Therefore, the driver chip can send corresponding drive signals to the multiple data signal lines L1 and the multiple gate lines L2 via the multiple solder pads 200, enabling the pixel drive circuits in the sub-pixels to function normally, thereby enabling the pixel drive circuits in the sub-pixels to drive the light-emitting devices to emit light normally, thereby ensuring that the display panel 000 can display the corresponding image.

[0065] At least a portion of the inorganic insulating layer 300 and at least a portion of the organic insulating layer 400 in the display panel 000 may be stacked in the non-display region 00b. Here, the inorganic insulating layer 300 is closer to the substrate 100 than the organic insulating layer 400.

[0066] The inorganic insulating layer 300 has a connection groove U between two adjacent pads 200 , and a portion of the organic insulating layer 300 is located in the connection groove U in the inorganic insulating layer 300 .

[0067] In the embodiment of the present application, the inorganic insulating layer 300 has a connection groove U located between two adjacent pads 200, and the organic insulating layer 400 on the side of the inorganic insulating layer 300 facing away from the substrate 100 can be located within these connection grooves 300. Therefore, the contact area between the adjacent inorganic insulating layer 300 and the organic insulating layer 400 can be ensured to be large, so that the connection between the inorganic insulating layer 300 and the organic insulating layer 400 is highly tight, thereby ensuring that the probability of separation between the inorganic insulating layer 300 and the organic insulating layer 400 is low, thereby effectively reducing the probability of corrosion of the portion of the pad 200 located between the inorganic insulating layer 300 and the organic insulating layer 400, and improving the conductive performance of the pad 200. In this way, the yield rate of the display panel 000 can be effectively improved.

[0068] In summary, the display panel provided in the example of the present application includes: a substrate, a plurality of sub-pixels, a plurality of pads, an inorganic insulating layer and an organic insulating layer. Since the inorganic insulating layer has a connection groove located between two adjacent pads, and the organic insulation on the side of the inorganic insulating layer facing away from the substrate can be located within these connections. Therefore, it can be ensured that the contact area between the adjacent inorganic insulating layer and the organic insulating layer is large, so that the tightness of the connection between the inorganic insulating layer and the organic insulating layer is high, so as to ensure that the probability of separation between the inorganic insulating layer and the organic insulating layer is low, thereby effectively reducing the probability of corrosion of the portion of the pad located between the inorganic insulating layer and the organic insulating layer, so that the conductive performance of the pad is better. In this way, the yield rate of the display panel can be effectively improved.

[0069] In the examples of this application, please refer to Figure 5 , Figure 5 yes Figure 3 A schematic diagram of another film layer structure of a display panel at line AA' is shown. The inner wall of the connection groove U of the inorganic insulating layer 300 in the display panel 000 has a recessed structure O. Portions of the organic insulating layer 400 in the display panel 000 are not only located within the connection groove U, but may also be located within the recessed structure O provided on the inner wall of the connection groove U.

[0070] In this case, when a recessed structure O is provided on the inner wall of the connection groove U of the inorganic insulating layer 300, and the organic insulating layer 400 is formed on the side of the inorganic insulating layer 300 facing away from the substrate 100 by an inkjet printing process, a portion of the organic insulating layer 400 can be located within the recessed structure O. In this way, the recessed structure O provided in the inorganic insulating layer 300 and the portion of the organic insulating layer 400 located within the recessed structure O can form a mutually engaging structure similar to a snap-fit ​​between the inorganic insulating layer 300 and the organic insulating layer 400, further improving the tightness of the connection between the inorganic insulating layer 300 and the organic insulating layer 400, thereby further reducing the probability of corrosion of the portion of the pad 200 located between the inorganic insulating layer 300 and the organic insulating layer 400.

[0071] In this application example, Figure 5 As shown, the inorganic insulating layer 300 in the display panel 000 may include a first inorganic layer 301 and a second inorganic layer 302 stacked together, wherein the second inorganic layer 302 is closer to the substrate 100 than the first inorganic layer 301 .

[0072] In the present application, the connection groove U provided between the two pads 200 in the inorganic insulating layer 300 may penetrate the first inorganic layer 301 of the inorganic insulating layer 300 and may penetrate at least a portion of the second inorganic layer 302. Here, the side of the first inorganic layer 301 close to the connection groove 300 protrudes from the side of the second inorganic layer 302 close to the connection groove 300.

[0073] In this way, when the connecting groove U penetrates the entire second inorganic layer 302, the protruding part of the first inorganic layer 301 relative to the second inorganic layer 302, the side of the second inorganic layer 302 and the bottom of the connecting groove U close to the substrate 100 can form a recessed structure O; when the connecting groove U only penetrates a part of the second inorganic layer 302 and does not penetrate another part of the second inorganic layer 302, the protruding part of the first inorganic layer 301 relative to the second inorganic layer 302, the part of the second inorganic layer 302 not penetrated by the connecting groove U and the part of the second inorganic layer 302 covered by the first inorganic layer 301 form a recessed structure O.

[0074] Here, the first inorganic layer 301 can be prepared using a high-density inorganic material, and the second inorganic layer 302 can be prepared using a low-density inorganic material. That is, the film density of the first inorganic layer 301 is greater than the film density of the second inorganic layer 302. For example, the first inorganic layer 301 and the second inorganic layer 302 can both be made of silicon nitride material. During the process of forming the first inorganic layer 301 and the second inorganic layer 302 through a deposition process, the deposition process parameters can be adjusted to make the distribution density of the nitrogen-silicon chemical bonds in the first inorganic layer 301 higher and the distribution density of the nitrogen-silicon chemical bonds in the second inorganic layer 302 lower, thereby making the silicon nitride film of the first inorganic layer 301 more compact and the silicon nitride film of the second inorganic layer 302 more loose.

[0075] In this case, since both the first inorganic layer 301 and the second inorganic layer 302 are made of silicon nitride, during the etching process to form the connection groove U, an etching material capable of etching silicon nitride can be used to sequentially etch the first inorganic layer 301 and the second inorganic layer 302. Furthermore, since the film density of the first inorganic layer 301 is greater than that of the second inorganic layer 302, the etching material has a slower etching rate for the first inorganic layer 301 and a faster etching rate for the second inorganic layer 302. Thus, after the etching material has completed etching the first inorganic layer 301, it can continue etching the second inorganic layer 302. Since the etching material has a faster etching rate for the second inorganic layer 302, during the etching process, the etching material can not only etch the second inorganic layer 302 vertically but also laterally. To this end, after the etching material has completed etching the second inorganic layer 302 , a recessed structure O may be formed on the sidewall of the connecting groove U.

[0076] In this application example, Figure 6 As shown, Figure 6 yes Figure 5 In the enlarged partial view of the display panel at point B, the connection groove U provided in the inorganic insulating layer 300 may include: a first sub-connection groove U1 located in the first inorganic layer 301 and a second sub-connection groove U2 located in the second inorganic layer 302. The orthographic projection of the first sub-connection groove U1 on the substrate 100 is located within the orthographic projection of the second sub-connection groove U2 on the substrate 100, and the outer boundary of the orthographic projection of the first sub-connection groove U1 on the substrate 100 does not overlap with the outer boundary of the orthographic projection of the second sub-connection groove U2 on the substrate 100. In this way, the sidewalls of the first sub-connection groove U1 in the first inorganic layer 301 protrude from the sidewalls of the second connection groove U2 in the second inorganic layer 302, that is, a recessed structure O can be formed on the sidewalls of the connection groove U.

[0077] Optionally, the distance d between the outer boundary of the orthographic projection of the first connection groove U1 on the substrate 100 and the outer boundary of the orthographic projection of the second sub-connection groove U2 on the substrate 100 ranges from 0.7 microns to 1 micron. This ensures that the inorganic insulating layer 300 and the organic insulating layer 400 have a high engagement strength through the groove structure O and the portion of the organic insulating layer 400 located within the groove structure O, thereby ensuring a high connection strength between the inorganic insulating layer 300 and the organic insulating layer 400. It also ensures that the width of the portion of the first inorganic layer 301 in the inorganic insulating layer 300 that protrudes relative to the second organic layer 302 is small, thereby preventing the portion of the first inorganic layer near the first connection groove U1 from collapsing, thereby ensuring a relatively stable structure of the connection groove U.

[0078] In the embodiments of this application, Figure 5 and Figure 6 As shown, the depth of the second sub-connection groove U2 in the second inorganic layer 302 in the direction perpendicular to the substrate 100 is less than or equal to the thickness of the second inorganic layer 302. That is, when the depth of the second sub-connection groove U2 in the direction perpendicular to the substrate 100 is equal to the thickness of the second inorganic layer 302, the second sub-connection groove U2 needs to penetrate the entire second inorganic layer 302; when the depth of the second sub-connection groove U2 in the direction perpendicular to the substrate 100 is less than the thickness of the second inorganic layer 302, the second sub-connection groove U2 only penetrates a portion of the second inorganic layer 302 and does not penetrate another portion of the second inorganic layer 302.

[0079] Optionally, when the depth of the second sub-connection groove U2 in a direction perpendicular to the substrate 100 is less than the thickness of the second inorganic layer 302, the distance between the bottom surface of the second sub-connection groove U2 and the side of the second inorganic layer 302 close to the substrate 100 ranges from 500 angstroms to 1000 angstroms. In other words, the thickness of the portion of the second inorganic layer 302 not penetrated by the second sub-connection groove U2 ranges from 500 angstroms to 1000 angstroms. Here, the bottom surface of the second sub-connection groove U2 refers to the side of the second sub-connection groove U2 parallel to the substrate 100. In this case, the portion of the second inorganic layer 302 not penetrated by the second sub-connection groove U2 can block water and oxygen entering from the bottom of the connection groove U, thereby further reducing the probability of water and oxygen corroding the pad 200 and causing corrosion of the pad 200.

[0080] In this application, the first inorganic layer 301 and the second inorganic layer 302 in the inorganic insulating layer 300 are both made of silicon nitride. Although silicon nitride has good water and oxygen barrier properties, it has poor toughness. Therefore, in order to improve the toughness of the display panel 000, it is necessary to provide an insulating layer with good toughness in the display panel 000. For example, Figure 5As shown, the inorganic insulating layer 300 may further include: a third inorganic layer 303 located on a side of the second inorganic layer 302 close to the substrate 100. The third inorganic layer 303 is made of silicon oxide material with good toughness.

[0081] Here, although the silicon oxide material has good toughness, the water and oxygen barrier capacity of the silicon oxide material is poor. For this reason, when the depth of the second sub-connection groove U2 in the direction perpendicular to the substrate 100 is less than the thickness of the second inorganic layer 302, the portion of the third inorganic layer 303 located between two adjacent pads 200 can be covered by the portion of the second inorganic layer 302 that is not penetrated by the second sub-connection groove U2, and the other portions of the third inorganic layer 303 can be covered by the portion of the second inorganic layer 302 that is not provided with the second sub-connection groove U2. For this reason, any position of the third inorganic layer 303 can be covered by the second inorganic layer 302, and the water and oxygen absorbed by the third inorganic layer 303 can be blocked by the second inorganic layer 302, further reducing the probability of water and oxygen corroding the pad 200 and causing the pad 200 to be corroded. In this way, the display panel 000 provided in the embodiment of the present application not only has good toughness, but also has good water and oxygen barrier capacity.

[0082] In this application, if Figure 7 As shown, Figure 7 yes Figure 3 The pad 200 in the display panel 000 includes a first sub-pad 201 , a second sub-pad 202 , and a third sub-pad 203 stacked vertically and away from the substrate 100 .

[0083] The first sub-pad in the pad 200 is located between the second inorganic layer 302 and the first inorganic layer 301 in the inorganic insulating layer 300. The second sub-pad 202 in the pad 200 is located on the side of the first inorganic layer 201 facing away from the substrate 100. The third sub-pad 203 in the pad 200 is located on the side of the second sub-pad 202 facing away from the substrate 10.

[0084] Here, the second inorganic layer 302 has a first via hole V1, and the second sub-pad 202 can overlap with the first sub-pad 201 through the first via hole V1, and the second sub-pad 202 can also overlap with the third sub-pad 203. In this way, the first sub-pad 201, the second sub-pad 202, and the third sub-pad 203 can be overlapped in sequence, so that the resistance of the pad 200 composed of the first sub-pad 201, the second sub-pad 202, and the third sub-pad 203 is relatively low, which effectively improves the conductivity of the pad 200, so that the subsequent driver chip can drive the light-emitting device in the sub-pixel set in the display area 00a to emit light through the pad 200. The effect is better, thereby improving the display effect of the display panel 000.

[0085] In the embodiments of this application, Figure 7 As shown, the display panel 000 may further include: an auxiliary inorganic insulating layer 500 located on the side of the organic insulating layer 400 facing away from the substrate 100. The third sub-pad 203 in the pad 200 may be located on the side of the auxiliary inorganic insulating layer 500 facing away from the substrate 100, and the auxiliary inorganic insulating layer 500 has a second via hole V2. In this way, the third sub-pad 203 in the pad 200 may overlap with the second sub-pad 202 through the second via hole V2. In the present application, after the auxiliary inorganic insulating layer 500 is provided on the side of the organic insulating layer 400 facing away from the substrate 100, the auxiliary inorganic insulating layer 500 may block water and oxygen entering from the front of the display panel 000, so that the probability of water and oxygen entering the organic insulating layer 400 is low, thereby reducing the probability of water and oxygen invading the light-emitting device through the organic insulating layer 400 due to water and oxygen invading the organic insulating layer 400.

[0086] Optionally, the side of the organic insulating layer 400 in the display panel 000 facing away from the substrate 100 is flush with the side of the second sub-pad 202 in the pad 200 facing away from the substrate 100. That is, the side of the organic insulating layer 400 facing away from the substrate 100 and the side of the second sub-pad 202 facing away from the substrate 100 are coplanar. In this case, the flatness of the auxiliary inorganic insulating layer 500 provided on the side of the organic insulating layer 400 facing away from the substrate 100 can be ensured to be good, thereby reducing the step difference of the third sub-pad 203 provided on the side of the auxiliary inorganic insulating layer 500 facing away from the substrate 100. When the driver chip is subsequently bonded to the non-display area 00b of the display panel 000, the solder pins of the driver chip need to be electrically connected to the third sub-pad 203 in the pad 200. Therefore, when the step difference of the third sub-pad 203 is small, the pressing force applied to the driver chip during the process of binding the driver chip to the non-display area 00b of the display panel 000 will not cause the non-display area 00b of the display panel 000 to produce a relatively concentrated stress phenomenon, thereby ensuring that the pad 200 will not be damaged under the action of the pressing force, thereby further improving the conductive performance of the pad 200.

[0087] In the embodiments of this application, Figure 8 As shown, Figure 8Schematic diagram of the membrane structure of a display panel in the display area provided by an embodiment of the present application. The display panel 000 may further include: a pixel definition layer 600, an anode layer 700, a light-emitting layer 800, and a cathode layer 900 located on the substrate 100. Here, the pixel definition layer 600 has a plurality of pixel openings 601, and the anode layer 700 has a plurality of anode blocks corresponding to the plurality of pixel openings 601, and each anode block can be located in a corresponding pixel opening 601. For any one pixel opening 601, the portion of the corresponding anode block in the anode layer 700 located in the pixel opening 601, the portion of the light-emitting layer 800 located in the pixel opening 601, and the portion of the cathode layer 900 located in the pixel opening are used to constitute a light-emitting device in a sub-pixel.

[0088] Optional, such as Figure 8 As shown, the pixel driving circuit 1000 in at least one of the multiple sub-pixels may include: a switching electrode 1002 and a thin-film transistor 1001. The switching electrode 1002 may be located on the side of the thin-film transistor 1001 facing away from the substrate 100. Within the same sub-pixel, the light-emitting device in this sub-pixel may be located on the side of the switching electrode 1002 facing away from the substrate 100. It should be noted that the number of thin-film transistors 1001 in the pixel driving circuit 1000 is typically multiple.

[0089] Here, the thin film transistor 1001 may include: a source electrode S, a drain electrode D, a gate electrode G, and an active layer Act. The source electrode S and the drain electrode D of the thin film transistor 1001 may be electrically connected to the active layer Act, and the gate electrode G of the thin film transistor 1001 may be insulated from the active layer Act. For example, the gate electrode G of the thin film transistor 1001 and the active layer Act may be insulated by a gate insulating layer 1003. One of the source electrode S and the drain electrode D of the thin film transistor 1001 may be electrically connected to the anode in the corresponding light-emitting device via a transfer electrode 1002, and the other may be electrically connected to a data signal line.

[0090] In this application, the source S and drain D of the thin film transistor 1001 are arranged in the same layer and made of the same material. The thin film transistor 1001 is a top-gate transistor, that is, the active layer Act of the thin film transistor 1001 is closer to the substrate 100 than the gate G.

[0091] In this case, the active layer Act of the thin film transistor 1001 can be located on the substrate 100, the gate G of the thin film transistor 1001 can be located on the side of the active layer Act away from the substrate 100, and the source S and drain D of the thin film transistor 1001 can both be located on the side of the gate G away from the substrate 100.

[0092] Furthermore, an insulating layer exists between the conductive layer where the source S and drain D of the thin film transistor 1001 are located and the conductive layer where the gate G is located. For example, the insulating layer may be a first interlayer dielectric layer 1004 and a second interlayer dielectric layer 1005 stacked together. The second interlayer dielectric layer 1005 is closer to the substrate 100 than the first interlayer dielectric layer 1004. It should be noted that in other possible implementations, the thin film transistor 1001 may also be a bottom-gate transistor, which is not limited in this embodiment of the present application.

[0093] In the embodiment of the present application, in order to protect the thin film transistor 1001, a passivation layer 1006 can be set on the side of the thin film transistor 1001 facing away from the substrate 100. The passivation layer 1006 can protect the thin film transistor 1001 to improve the stability of the thin film transistor 1001.

[0094] In this application, a first planarization layer 1007 is provided between the conductive layer where the source and drain electrodes of the thin-film transistor 1001 are located and the conductive layer where the transfer electrode 1002 is located. A second planarization layer 1008 is provided between the conductive layer where the transfer electrode 1002 is located and the anode layer 700. The first planarization layer 1007 improves the planarity of the conductive layer where the transfer electrode 1002 is located, thereby improving the signal transmission performance of the signal line provided in the conductive layer where the transfer electrode 1002 is located. The second planarization layer 1008 improves the planarity of the subsequently formed light-emitting device, thereby ensuring stable light emission from the light-emitting device.

[0095] Optional, such as Figure 8 As shown, the display panel 000 may further include: an encapsulation layer 1100 for encapsulating the light-emitting device, and a touch layer 1200 located on a side of the encapsulation layer 1100 facing away from the light-emitting device. The touch layer 1200 may be distributed within the display area 00a. The touch layer 1200 enables the display panel 000 to implement a touch function.

[0096] In the embodiment of the present application, the touch layer 1200 may include a touch electrode layer 1201 and a bridging electrode layer 1202. For example, the touch electrode layer 1201 and the bridging electrode layer 1202 may be provided in different layers, for example, a touch insulating layer 1203 may be provided between the touch electrode layer 1201 and the bridging electrode layer 1202.

[0097] Here, the touch electrode layer 1201 may include: multiple touch drive electrodes and multiple touch sensing electrodes arranged in the same layer. Every two adjacent touch drive electrodes in a row of touch drive electrodes may be electrically connected, and every two adjacent touch sensing electrodes in a column of touch sensing electrodes may be electrically connected. For example, the touch electrode layer 1201 may also include: connecting electrodes. When every two adjacent touch drive electrodes are directly electrically connected via the connecting electrodes, every two adjacent touch sensing electrodes may be electrically connected via a bridging electrode in the bridging electrode layer 1202. Alternatively, when every two adjacent touch sensing electrodes are directly electrically connected via the connecting electrodes, every two adjacent touch drive electrodes may be electrically connected via a bridging electrode in the bridging electrode layer 1202.

[0098] In the present application, the touch electrode layer 1201 can be made of a transparent conductive material, and the bridging electrode layer 1202 can be made of a metal material. The bridging electrodes in the bridging electrode layer 1202 can all be arranged outside the pixel opening 601. In this way, while ensuring that the touch layer 1200 in the device within the display panel 000 does not affect the normal display of the display panel 000, the metal-made bridging electrode layer 1202 can improve its electrical signal transmission performance, thereby achieving a better touch signal effect of the touch layer 1200.

[0099] In combination with the above embodiment, in order to simplify the manufacturing process of the display panel 000 , a portion of the structure in the display area 00 a and a portion in the non-display area 00 b may be formed by the same patterning process.

[0100] For example, the first sub-pad 201 in the pad 200 can be set in the same layer and made of the same material as the source and drain of the thin film transistor 1001 (that is, the source S and the drain D); the second sub-pad 202 in the pad 200 can be set in the same layer and made of the same material as the transfer electrode 1002; the third sub-pad 203 in the pad 200 can be set in the same layer and made of the same material as the bridging electrode layer 1202 in the touch layer 1200.

[0101] In this case, the first inorganic layer 301 in the inorganic insulating layer 300 disposed in the non-display area 00b can be disposed in the same layer and made of the same material as the passivation layer 1006 disposed in the display area 00a. The second inorganic layer 302 in the inorganic insulating layer 300 disposed in the non-display area 00b can be disposed in the same layer and made of the same material as the first interlayer dielectric layer 1004 disposed in the display area 00a. The third inorganic layer 303 in the inorganic insulating layer 300 disposed in the non-display area 00b can be disposed in the same layer and made of the same material as the second interlayer dielectric layer 1005 disposed in the display area 00a. The organic insulating layer 400 disposed in the non-display area 00b can be disposed in the same layer and made of the same material as the second planarizing layer 1008 disposed in the display area 00a. The auxiliary inorganic insulating layer 500 disposed in the non-display area 00b can be disposed in the same layer and made of the same material as the touch insulating layer 1203 disposed in the display area 00a.

[0102] It should be noted that in the embodiments of the present application, two parts being disposed in the same layer and made of the same material means that the two parts are formed using the same patterning process. For example, the second sub-pad 201 and the transfer electrode 1002 being disposed in the same layer and made of the same material means that the second sub-pad 201 and the transfer electrode 1002 are formed using the same patterning process. Here, a single patterning process may include thin film formation, photoresist coating, exposure, development, etching, and photoresist stripping.

[0103] In summary, the display panel provided in the example of the present application includes: a substrate, a plurality of sub-pixels, a plurality of pads, an inorganic insulating layer and an organic insulating layer. Since the inorganic insulating layer has a connection groove located between two adjacent pads, and the organic insulation on the side of the inorganic insulating layer facing away from the substrate can be located within these connections. Therefore, it can be ensured that the contact area between the adjacent inorganic insulating layer and the organic insulating layer is large, so that the tightness of the connection between the inorganic insulating layer and the organic insulating layer is high, so as to ensure that the probability of separation between the inorganic insulating layer and the organic insulating layer is low, thereby effectively reducing the probability of corrosion of the portion of the pad located between the inorganic insulating layer and the organic insulating layer, so that the conductive performance of the pad is better. In this way, the yield rate of the display panel can be effectively improved.

[0104] The present invention also provides a method for manufacturing a display panel. Figure 4 The display panel 000 is shown. The manufacturing method of the display panel may include:

[0105] A plurality of sub-pixels, an inorganic insulating layer, an organic insulating layer, and a plurality of pads are formed on a substrate.

[0106] The display panel has a display area and a non-display area located outside the display area, multiple sub-pixels are located on one side of the substrate and within the display area, at least part of the inorganic insulating layer, at least part of the organic insulating layer and multiple pads are all located within the non-display area.

[0107] The plurality of pads are electrically connected to the plurality of sub-pixels, and at least a portion of the pads is located on a side of the organic insulating layer facing away from the substrate.

[0108] The inorganic insulating layer is closer to the substrate than the organic insulating layer, and the inorganic insulating layer has a connecting groove between two adjacent pads, and a portion of the organic insulating layer is located in the connecting groove.

[0109] Those skilled in the art will clearly understand that, for the convenience and brevity of description, the specific principles of the display panel described above can refer to the corresponding contents in the aforementioned embodiment of the display panel structure, and will not be repeated here.

[0110] In summary, the manufacturing method of the display panel provided in the example of the present application includes: forming a plurality of sub-pixels, a plurality of pads, an inorganic insulating layer and an organic insulating layer on a substrate. Since the inorganic insulating layer has a connection groove located between two adjacent pads, and the organic insulation on the side of the inorganic insulating layer facing away from the substrate can be located within these connections. Therefore, it can be ensured that the contact area between the adjacent inorganic insulating layer and the organic insulating layer is large, so that the tightness of the connection between the inorganic insulating layer and the organic insulating layer is high, so as to ensure that the probability of separation between the inorganic insulating layer and the organic insulating layer is low, thereby effectively reducing the probability of corrosion of the portion of the pad located between the inorganic insulating layer and the organic insulating layer, so that the conductive performance of the pad is better. In this way, the yield rate of the display panel can be effectively improved.

[0111] The present application also provides a display device. Figure 9 and Figure 10 , Figure 9 is a top view of a display device provided in an embodiment of the present application, Figure 10 yes Figure 9 A schematic diagram of the film structure of a display device at position C-C' is shown. The display device can be any product or component with a display function, such as a mobile phone, tablet computer, television, monitor, laptop computer, digital photo frame, or navigation system. The display device can include a driver chip 111 and a display panel 000. The display panel 000 can be an organic light-emitting diode (OLED) display panel or an active matrix organic light-emitting diode (AM-OLED) display panel.

[0112] In the embodiment of the present application, the display panel 000 may be the display panel 000 in the above embodiment. For example, it may be Figure 4 、 Figure 5 or Figure 7 The display panel shown. The plurality of solder pins 111a on the driver chip 111 can be electrically connected to the plurality of solder pads 200 provided in the non-display area 00b of the display panel 000 in a one-to-one correspondence. For example, each solder pin 111a can be electrically connected to the corresponding solder pad 200 via conductive particles L. The driver chip 111 is used to provide electrical signals to the display panel 000 so that the display panel 000 can display images.

[0113] It should be noted that in the accompanying drawings, the sizes of layers and regions may be exaggerated for clarity of illustration. It will also be understood that when an element or layer is referred to as being "on" another element or layer, it may be directly on the other element, or there may be an intermediate layer. In addition, it will be understood that when an element or layer is referred to as being "under" another element or layer, it may be directly under the other element, or there may be more than one intermediate layer or element. In addition, it will also be understood that when a layer or element is referred to as being "between" two layers or elements, it may be the only layer between the two layers or elements, or there may also be more than one intermediate layer or element. Similar reference numerals throughout the text indicate similar elements.

[0114] In this application, the terms "first" and "second" are used for descriptive purposes only and should not be understood as indicating or implying relative importance. The term "plurality" refers to two or more than two, unless expressly limited otherwise.

[0115] The above description is merely an optional embodiment of the present application and is not intended to limit the present application. Any modifications, equivalent replacements, improvements, etc. made within the spirit and principles of the present application shall be included in the scope of protection of the present application.

Claims

1. A display panel, characterized in that: The display panel has a display area and a non-display area located outside the display area, and the display panel includes: substrate; a plurality of sub-pixels, the plurality of sub-pixels being located on one side of the substrate and within the display area; an inorganic insulating layer and an organic insulating layer stacked at least in the non-display area, the inorganic insulating layer being closer to the substrate than the organic insulating layer; and, a plurality of pads located in the non-display area and electrically connected to the plurality of sub-pixels, at least part of the pads being located on a side of the organic insulating layer facing away from the substrate; The inorganic insulating layer has a connection groove located between two adjacent pads, a portion of the organic insulating layer is located in the connection groove, and the connection groove is formed by an etching process; an inner wall of the connection groove has a recessed structure, and a portion of the organic insulating layer is also located in the recessed structure; The inorganic insulating layer includes: a first inorganic layer and a second inorganic layer stacked together, the second inorganic layer being closer to the substrate than the first inorganic layer; the first inorganic layer and the second inorganic layer being both made of silicon nitride material, and the film density of the first inorganic layer being greater than that of the second inorganic layer; the connecting groove passing through the first inorganic layer and at least a portion of the second inorganic layer, with a side of the first inorganic layer near the connecting groove protruding from a side of the second inorganic layer near the connecting groove; The inorganic insulating layer further includes: a third inorganic layer located on a side of the second inorganic layer close to the substrate, and the third inorganic layer is made of a silicon oxide material with good toughness.

2. The display panel according to claim 1, wherein: The connection groove includes: a first sub-connection groove located in the first inorganic layer, and a second sub-connection groove located in the second inorganic layer; The orthographic projection of the first sub-connection groove on the substrate is located within the orthographic projection of the second sub-connection groove on the substrate, and the outer boundary of the orthographic projection of the first sub-connection groove on the substrate does not overlap with the outer boundary of the orthographic projection of the second sub-connection groove on the substrate.

3. The display panel according to claim 2, wherein: A distance between an outer boundary of an orthographic projection of the first sub-connection groove on the substrate and an outer boundary of an orthographic projection of the second sub-connection groove on the substrate is in a range of 0.7 micrometers to 1 micrometer.

4. The display panel according to claim 2, wherein: A depth of the second sub-connection groove in a direction perpendicular to the substrate is less than or equal to a thickness of the second inorganic layer.

5. The display panel according to claim 4, wherein: When the depth of the second sub-connection groove in the direction perpendicular to the substrate is less than the thickness of the second inorganic layer, the distance between the bottom surface of the second sub-connection groove and the side of the second inorganic layer close to the substrate ranges from 500 angstroms to 1000 angstroms.

6. The display panel according to any one of claims 1 to 5, characterized in that: The pads include: a first sub-pad, a second sub-pad, and a third sub-pad stacked in a direction perpendicular to and away from the substrate; The first sub-pad is located between the second inorganic layer and the first inorganic layer, the second sub-pad is located on a side of the first inorganic layer away from the substrate, and the third sub-pad is located on a side of the second sub-pad away from the substrate; The second inorganic layer has a first via hole, the second sub-pad is overlapped with the first sub-pad through the first via hole, and the second sub-pad is also overlapped with the third sub-pad.

7. The display panel according to claim 6, wherein: The display panel also includes: an auxiliary inorganic insulating layer located on the side of the organic insulating layer away from the substrate, the third sub-pad is located on the side of the auxiliary inorganic insulating layer away from the substrate, the auxiliary inorganic insulating layer has a second via hole, and the third sub-pad is overlapped with the second sub-pad through the second via hole.

8. The display panel according to claim 7, wherein: A surface of the organic insulating layer facing away from the substrate is flush with a surface of the second sub-pad facing away from the substrate.

9. The display panel according to claim 7 or 8, characterized in that: At least one sub-pixel among the plurality of sub-pixels comprises: a thin film transistor, a switching electrode and a light emitting device; The switching electrode is located on a side of the thin film transistor away from the substrate, and the light emitting device is located on a side of the switching electrode away from the substrate; The thin film transistor includes an active layer located on the substrate, a gate located on a side of the active layer facing away from the substrate, and a source and a drain located on a side of the gate facing away from the substrate, and one of the source and the drain is electrically connected to the light-emitting device through the transfer electrode; The first sub-pad is provided in the same layer as the source electrode and the drain electrode and is made of the same material, and the second sub-pad is provided in the same layer as the transfer electrode and is made of the same material.

10. The display panel according to claim 9, wherein: The display panel further includes: an encapsulation layer for encapsulating the light-emitting device, and a touch layer located on a side of the encapsulation layer away from the substrate, wherein the touch layer includes: a touch electrode layer and a bridging electrode layer; The third sub-pad is provided in the same layer as the bridging electrode layer and is made of the same material.

11. A method for manufacturing a display panel, characterized in that: The method comprises: forming a plurality of sub-pixels, an inorganic insulating layer, an organic insulating layer, and a plurality of pads on a substrate; The display panel has a display area and a non-display area located outside the display area, the multiple sub-pixels are located on one side of the substrate and within the display area, and at least a portion of the inorganic insulating layer, at least a portion of the organic insulating layer, and the multiple pads are all located within the non-display area; The plurality of pads are electrically connected to the plurality of sub-pixels, and at least part of the pads are located on a side of the organic insulating layer facing away from the substrate; The inorganic insulating layer is closer to the substrate than the organic insulating layer, and the inorganic insulating layer has a connection groove located between two adjacent pads, a portion of the organic insulating layer is located in the connection groove, and the connection groove is formed by an etching process; an inner wall of the connection groove has a recessed structure, and a portion of the organic insulating layer is also located in the recessed structure; The inorganic insulating layer includes: a first inorganic layer and a second inorganic layer stacked together, the second inorganic layer being closer to the substrate than the first inorganic layer; the first inorganic layer and the second inorganic layer being both made of silicon nitride material, and the film density of the first inorganic layer being greater than that of the second inorganic layer; the connecting groove passing through the first inorganic layer and at least a portion of the second inorganic layer, with a side of the first inorganic layer near the connecting groove protruding from a side of the second inorganic layer near the connecting groove; The inorganic insulating layer further includes: a third inorganic layer located on a side of the second inorganic layer close to the substrate, and the third inorganic layer is made of a silicon oxide material with good toughness.

12. A display device, characterized in that: include: A driving chip, and a display panel electrically connected to the driving chip, wherein the display panel is the display panel according to any one of claims 1 to 10.

Images