A multi-layer cascaded neural network microfluidic chip and a preparation method thereof

By combining multi-layer cascade neural network microfluidic chips with microelectrode arrays and microfluidic technology, the complexity of in vitro research on brain neuronal network connections has been solved, simplified simulation and detection of advanced brain functions have been achieved, and precise control and regulation of information transmission in neuronal networks has been provided.

CN115216405BActive Publication Date: 2025-10-24AEROSPACE INFORMATION RES INST CAS
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Patent Information

Application Number
CN202210809837.5
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2022-07-11
Publication Date
2025-10-24
Estimated Expiration
2042-07-11

AI Technical Summary

Technical Problem

Existing technologies make it difficult to effectively simulate and study the high-level functional connections of the brain's neuronal networks in vitro, leading to complexity and limitations in our understanding of brain function.

Method used

A multi-layer cascaded neural network microfluidic chip is used, combined with microelectrode arrays and microfluidic technology, to connect different neuronal networks through microchannels, and use synaptic control chambers for chemical and physical regulation to achieve precise control and detection of synaptic connections.

Benefits of technology

It has achieved in vitro simulation of the information transmission and function of the brain's neuronal network, provided a simplified model for studying the principles of the brain's advanced functions, and can detect and regulate the electrophysiological dynamics of the neuronal network, simulate synaptic damage, and other situations.

✦ Generated by Eureka AI based on patent content.

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Abstract

The application discloses a multilayer cascade neural network microfluidic chip and a preparation method thereof, and relates to the technical field of sensor manufacturing. The chip system is composed of a microelectrode array chip for electrophysiological detection and regulation and a microfluidic chip for partitioned neuron network culture. The microelectrode array chip comprises a microelectrode, a counter electrode and the like. The microfluidic chip comprises a plurality of cell culture grooves, a plurality of groups of microchannels connected with the culture grooves and a synapse control chamber and the like. The chip is integrated, has the functions of culturing different neuron networks in different regions and has the ability of detecting and regulating neuron networks in time and space. The neuron networks in different regions are directionally interconnected in the connected microchannels, and the connection relationship between brain neural networks can be simply simulated. The synapse control chamber can be used for accurately regulating the synapse. The microelectrode at the bottom can be used for detecting the change of the electrical activity of the neuron network after being stimulated and regulated.
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Description

TECHNICAL FIELD

[0001] The present application relates to the field of microfabrication of biosensors and the field of biological cell culture and detection, and is a multi-level cascade neural network microfluidic chip and a preparation method thereof. BACKGROUND

[0002] The brain is the most complex structure on earth. In addition to perceiving the external world and controlling the reflex activities of the body, the brain also has high-level functions such as language, learning, memory and thinking. However, human understanding of brain function is still very limited. Therefore, in-depth understanding of the complex structure of the brain is of great significance for human understanding of the brain and further development of the brain.

[0003] Neural electrophysiology research is one of the important ways to evaluate brain function. The microelectrode array prepared by microfabrication technology provides a high signal-to-noise ratio and high-throughput means for recording and regulating neural electrophysiological information, and is an important research tool in many fields such as neural science, neural network development, neural information coding, transmission, response and storage mechanism research, treatment research of neurological diseases, high-throughput drug screening and neuropharmacology research. Therefore, the use of microelectrode arrays for in vitro detection of neuronal network electrophysiological information has become an important means to understand some simple functions of the brain and the underlying neural mechanisms.

[0004] However, the understanding of the basic principles of brain function is still a major challenge in neurophysiology research. Due to the high connectivity, this research at the brain level will bring high complexity. On the contrary, the level of a single or a few neurons cannot provide enough functional connections. In this sense, in vitro research on neuronal networks has become one of the ways to understand the basic principles of brain high-level functions.

[0005] Microfluidic chips prepared based on microfabrication technology can finely fabricate small fluid structures, making it possible to design the connections of neural networks in vitro. This provides a method for constructing the connection relationship of the brain in vitro. In recent years, neural chips combining microfluidic chips and microelectrode arrays have made important achievements in the study of brain neural mechanisms due to their ability to detect and regulate the neural electrophysiological information of custom-designed networks. SUMMARY

[0006] The application aims to provide a multi-layer cascaded neural network microfluidic chip and a preparation method thereof. The chip is cultured with five relatively independent neuron networks on a microelectrode array by a microfluidic method, and synapse connections between different neuron networks are generated through microchannels, so as to realize information transmission between different neuron networks, and the synapses formed between two different neuron networks in the microchannels can be chemically and physically regulated through a synapse control chamber. The microelectrode array under the microfluidic chip can realize evaluation of the electrophysiological dynamics of the neuron networks, so as to understand the transmission of neural information between the neuron networks and the realization of functions. The application makes the chip capable of realizing simple simulation of different brain regions in vitro, and is of great significance for understanding the transmission of neural information and further understanding the basic principles of high-level functions of the brain.

[0007] To achieve the above object, the application adopts the following technical scheme:

[0008] The multi-layer cascaded neural network microfluidic chip comprises two-layer sub-chips, i.e., a first-layer sub-chip and a second-layer sub-chip, wherein the first-layer sub-chip is a first-layer microelectrode array chip, and the second-layer sub-chip is a second-layer microfluidic chip; the first-layer microelectrode array chip comprises an insulating substrate, a plurality of microelectrodes, a counter electrode, connecting wires, contact sites and an insulating layer; the insulating substrate (1) is a carrier of the whole neural network microfluidic chip; the microelectrodes (2) are divided into four groups, and the microelectrodes are located on both sides of microchannels (8); the counter electrode (3) is arranged around each group of microelectrodes (2); the counter electrode (3) and the microelectrodes (2) are extended through the connecting wires (4) and connected to the contact sites (5) on the periphery of the insulating substrate; and the surfaces of all the connecting wires (4) are covered with the insulating layer (6).

[0009] The second-layer microfluidic chip comprises five cell culture grooves, four groups of microchannels for connecting different cell culture grooves and a synapse control chamber for regulating synapses; the synapse control chamber (9) can be used for chemically or physically regulating and modeling the growth of synapses in the microchannels (8); and the packaging of the microelectrode array chip and the microfluidic chip of the chip is completed under a bonding process.

[0010] The two-layer sub-chips are the first-layer microelectrode array chip and the second-layer microfluidic chip.

[0011] The insulating substrate is a carrier of the whole neural network microfluidic chip; the microelectrodes are divided into four groups, and the microelectrodes are located on both sides of microchannels; the counter electrode is arranged around each group of microelectrodes; the counter electrode and the microelectrodes are extended through the connecting wires and connected to the contact sites on the periphery of the insulating substrate; and the surfaces of all the connecting wires are covered with the insulating layer.

[0012] Five cell culture grooves in the microfluidic chip are used for culturing nerve cells and are connected through micro-channels.

[0013] The material of the insulating substrate of the multi-layer cascaded neural network microfluidic chip is quartz glass; the material of the microelectrode is a biocompatible conductive film, which can be one of gold, platinum, titanium nitride, indium tin oxide and nanowire; and the material of the insulating layer is a biocompatible insulating material, which is one of silicon dioxide, silicon nitride and SU8.

[0014] The diameter of the microelectrode of the multi-layer cascaded neural network microfluidic chip is 5-30 mu m, and the microelectrode spacing is 50-500 mu m.

[0015] The five cell culture grooves (7) of the microfluidic chip are independent of each other and are connected only through micro-channels (8) with a width of about 5-15 mu m and a height of about 5-15 mu m, so that the neuron networks cultured in different cell culture grooves (7) can be regarded as independent neuron networks connected only through axons and dendrites, which can be simply simulated as independent networks in the brain.

[0016] The material of the second layer microfluidic chip of the multi-layer cascaded neural network microfluidic chip is polymethylsiloxane or polymethyl methacrylate with biocompatibility.

[0017] The cell culture groove (7) of the second layer microfluidic chip of the multi-layer cascaded neural network microfluidic chip is a circular hole with a diameter of 4-8 mm; the micro-channels (8) are divided into four groups, each group having 10-30 channels, and the length is 400-900 mu m, which are used for connecting the cell culture grooves.

[0018] The synapse control chamber (9) of the second layer microfluidic chip of the multi-layer cascaded neural network microfluidic chip has two circular control chambers with different sizes, with a diameter of 1-4 mm, and the two chambers are connected through a channel with a width of 20-50 mu m.

[0019] The first layer microelectrode array chip and the second layer microfluidic chip of the multi-layer cascaded neural network microfluidic chip are bonded on an alignment instrument through heating bonding or plasma bonding.

[0020] The application also provides a method for preparing the neural network microfluidic chip as described in any one of the above, which comprises preparing a first layer microelectrode array chip and preparing a second layer microfluidic chip.

[0021] A first layer of microelectrode array chip is prepared, comprising the following steps:

[0022] (1) cleaning the glass substrate to obtain a clean and insulating substrate (1);

[0023] (2) spin-coating a layer of photoresist on the cleaned insulating substrate (1) to a thickness of 1-2 μm, and after photoresist development, a pattern of microelectrode (2), counter electrode (3), connecting wire (4) and contact site (5) is formed;

[0024] (3) depositing a layer of platinum conductive layer on the photoresist patterned surface by sputtering; optionally, a titanium seed layer can be pre-sputtered to increase the adhesion of the conductive layer substrate;

[0025] (4) removing the excess conductive layer in an organic solvent using a lift-off process, leaving the desired microelectrode (2), counter electrode (3), connecting wire (4) and contact site (5);

[0026] (5) depositing a layer of silicon oxide or silicon nitride insulating layer (6) on the substrate by plasma-enhanced chemical vapor deposition;

[0027] (6) exposing the microelectrode (2), counter electrode (3) and contact site (5) by photoetching and plasma beam etching, while retaining the insulating layer covering the surface of all connecting wires (4);

[0028] A second layer of microfluidic chip is prepared, comprising the following steps:

[0029] (1) spin-coating photoresist on the cleaned silicon wafer to pattern the alignment marks for subsequent photoetching, and then generating the alignment marks on the silicon wafer by sputtering platinum;

[0030] (2) photoetching the microchannel (8) on the silicon wafer using photoresist by photoetching process;

[0031] (3) photoetching the cell culture tank (7) and synapse control chamber (9) on the silicon wafer;

[0032] (4) after photoetching, completing the hard mold process on a hot plate to obtain the finished mold;

[0033] (5) mixing PDMS pre-polymer and catalyst and pouring into the mold dish, removing bubbles in a vacuum dryer, and then heating and curing;

[0034] (6) separating the microfluidic device from the mold, and using a puncher to make the cell culture tank (7) and synapse control chamber (9) in the microfluidic device.

[0035] Further, the method further comprises the following steps: surface activation of the first layer microelectrode array chip and the second layer microfluidic chip in an oxygen ion cleaning machine; and alignment of the first layer microelectrode array chip and the second layer microfluidic chip in an alignment instrument after activation to obtain the final neural network microfluidic chip.

[0036] The experimental method of the multi-layer cascaded neural network microfluidic chip comprises the following specific steps:

[0037] (a) Select ICR (Institute of Cancer Research) mice at 15-18 days of pregnancy, euthanize the mice by cervical dislocation, disinfect the abdominal skin of the pregnant mice with 75% alcohol, and then remove the uterus by surgery and place it in pre-cooled HBSS buffer. Peel off the fetal mouse, cut off the head and place it in pre-cooled HBSS buffer. Carefully separate the hippocampal brain region, remove the meninges and chop.

[0038] (b) Peel off the hippocampal brain region of the fetal mouse and place it in DMEM buffer for dissociation for 15 minutes. Use a pipette tip to gently blow the tissue to disperse it. Collect the supernatant of the buffer and centrifuge it in a centrifuge for 5 minutes. Resuspend the cells with Neurobasal Plus Medium and count the resuspended cells using a hemocytometer.

[0039] (c) Seed the neural cells on different cell culture grooves (7) of the chip, and culture the neural cells in vitro for 2-3 weeks. After the axon dendrites of adjacent cell culture grooves (7) form synaptic connections in the microchannel, perform electrophysiological detection.

[0040] The multi-layer cascaded neural network microfluidic chip and the preparation method thereof provided by the application combine the technologies of microelectrode array and microfluidic, can construct a neuron network group connected according to personal ideas in vitro, and each neuron network is relatively independent. The flow direction of neural information between different neuron networks can be detected through the microelectrode array. The chip also has the functions of accurately controlling and detecting the synaptic region. The neuron network of synaptic damage type connection can be simulated in vitro by adding chemical or physical stimulation to the synaptic control region. Therefore, the application provides a simplified model of the brain, which is of great value for understanding the information transmission of neuron networks and further understanding the basic principles of the advanced functions of the brain. BRIEF DESCRIPTION OF DRAWINGS

[0041] In order to make the purpose, characteristics and advantages of the application more clear, the application will be further described in detail below in combination with the drawings, in which:

[0042] Figure 1 Fig. 1 is a structural schematic diagram of the multi-layer cascaded neural network microfluidic chip of the application;

[0043] Figure 2 A first layer chip microelectrode array chip structure diagram of a multi-layer cascaded neural network microfluidic chip of the present application;

[0044] Figure 3 A first layer chip microelectrode array chip partial enlarged view of a multi-layer cascaded neural network microfluidic chip of the present application;

[0045] Figure 4 A second layer chip microfluidic chip structure diagram of a multi-layer cascaded neural network microfluidic chip of the present application;

[0046] Figure 5 A second layer chip microfluidic chip plane diagram of an integrated microfluidic, microelectrode array brain-like function of the present application;

[0047] Figure 6 A partial enlarged view of a multi-layer cascaded neural network microfluidic chip of the present application;

[0048] Figure 7 A process flow chart of a first layer microelectrode array chip of a multi-layer cascaded neural network microfluidic chip of the present application;

[0049] Figure 7 a is a cleaning quartz glass sheet;

[0050] Figure 7 b is a quartz glass sheet surface coated with AZ1500 photoresist;

[0051] Figure 7 c is photoetching AZ1500 photoresist to expose the conductive layer pattern;

[0052] Figure 7 d is sputtering Ti / Pt conductive layer;

[0053] Figure 7 e is a lift-off process to form a conductive layer pattern to leave the required electrodes, leads and contacts diagram;

[0054] Figure 7 f is PECVD deposition of silicon oxide and silicon nitride;

[0055] Figure 7 g is etching the insulating layer to obtain a microelectrode array chip;

[0056] BRIEF DESCRIPTION OF DRAWINGS

[0057] a is a microelectrode array chip, b is a microfluidic chip.

[0058] 1 is the insulating base, 2 is the microelectrode, 3 is the counter electrode, 4 is the connecting wire, 5 is the contact site, 6 is the insulating layer, 7 is the cell culture tank, 8 is the microchannel, and 9 is the synaptic control chamber. DETAILED DESCRIPTION

[0059] The technical solution of the present invention is further described below with reference to the accompanying drawings and specific embodiments. The following embodiments do not constitute a limitation of the present invention.

[0060] like Figure 1 、 2 As shown in Figures 4 and 5, the present invention provides a multi-layer cascade neural network microfluidic chip. The entire chip system includes two layers of sub-chips: a first layer sub-chip and a second layer sub-chip; the first layer sub-chip is a first layer microelectrode array chip, and the second layer sub-chip is a second layer microfluidic chip.

[0061] The first-layer microelectrode array chip a includes: an insulating substrate 1 , a plurality of microelectrodes 2 , a counter electrode 3 , connecting wires 4 , contact sites 5 and an insulating layer 6 .

[0062] The second layer of the microfluidic chip b includes five cell culture tanks 7, four groups of microchannels 8 for connecting different cell culture tanks, and a group of synapse control chambers 9 for regulating synapses.

[0063] The insulating substrate 1 is a glass substrate. Microelectrodes 2, counter electrodes 3, connecting wires 4, contact sites 5, an insulating layer 6, a cell culture tank 7, microchannels 8, and a synaptic control chamber 9 are disposed on the insulating substrate 1. Microchannels 8 are microfluidic chip channels. Synaptic control chambers 9 are synaptic control chambers of the microfluidic chip.

[0064] like Figure 2 、 3 As shown, the quartz glass insulating substrate 1 is the carrier of the entire chip system, with a thickness of about 1.5 mm, a length of about 5 cm, and a width of about 5 cm. The microelectrodes 2 are divided into four groups. The microelectrodes 2 are located in the central area of ​​the quartz glass insulating substrate 1 and are distributed near each group of microchannels 8 ( Figure 6 ), microelectrodes 2 are connected to contact sites 5 on the periphery of the substrate via connecting wires 4. The diameter of the microelectrodes is approximately 20 μm. Counter electrodes 3 are located near each set of microelectrodes 2 on either side of the microchannel 8. Counter electrodes 3 extend through connecting wires 4 and connect to contact sites 5 on the periphery of the insulating substrate. All connecting wires 4 are covered with an insulating layer 6.

[0065] like Figure 4 、 5 As shown, the cell culture grooves 7 of the second-layer microfluidic chip are circular holes. Cell culture grooves 7 are the main body for culturing neuronal networks and have a diameter of 4 mm. Five cell culture grooves 7 are used to culture neural cells. Microchannels 8 are approximately 5-15 μm wide and 5-15 μm high.

[0066] The micro-channels 8 are used to connect different cell culture grooves 7 to realize the directional connection between different neuron networks. The micro-channels 8 are divided into four groups, each group has 10-30 channels, and the length of each channel is 400-900 μm. The micro-channels are used to connect the cell culture grooves. The five cell culture grooves 7 of the micro-fluidic chip are independent of each other and are connected only through the micro-channels 8. Therefore, the neuron networks cultured in different cell culture grooves 7 can be regarded as independent neuron networks connected only through axons and dendrites, and can be simply simulated as independent networks in the brain.

[0067] For example, there are 20 micro-channels between adjacent cell culture grooves 7, and the length, width and height of each micro-channel are 600 μm, 10 μm and 5 μm, respectively. The synapse control chamber 9 is composed of a wide channel with a width of 50 μm and two circular holes with diameters of 2 μm and 1.5 μm. The two circular holes are connected through the wide channel. As shown in FIG. 2, the channel of the synapse control chamber 9 is located between the central cell culture groove 7 and the micro-channel 8 of one of the peripheral cell culture grooves connected to the central cell culture groove. The distance between the channel of the synapse control chamber 9 and the central cell culture groove and one of the peripheral cell culture grooves is 200 μm and 400 μm, respectively. The synapse control chamber 9 can be used to model the chemical or physical regulation of the growing synapses in the micro-channels 8. Figure 5 Figure 6 As shown in FIG. 3, after the micro-electrode array chip a and the micro-fluidic chip b are aligned and bonded, the micro-electrodes 2 on the micro-electrode array chip a are divided into four groups, and each group has 31 micro-electrodes 2 distributed near the micro-channels 8 of the micro-fluidic chip b. The specific distribution is as follows: 8 micro-electrodes 2 are distributed in each of the channels 100 μm away from both ends of the micro-channels 8, and the center-to-center distance between each micro-electrode 2 is 50 μm, and there are a total of 16 micro-electrodes 2; 15 micro-electrodes 2 are distributed on both sides of the micro-channels 8.

[0068] The material of the micro-electrodes 2 is a biocompatible conductive film, which can be one of gold, platinum, titanium nitride, indium tin oxide and nanowire. The material of the insulating layer 6 is a biocompatible insulating material, which can be one of silicon dioxide, silicon nitride and SU8.

[0069] The material of the second layer micro-fluidic chip is a biocompatible polydimethylsiloxane or polymethyl methacrylate.

[0070] The first layer micro-electrode array chip and the second layer micro-fluidic chip are bonded together on an alignment instrument by heating bonding or plasma bonding.

[0071] The preparation of the neuron network micro-fluidic chip can be divided into two parts: the preparation of the first layer micro-electrode array chip and the preparation of the second layer micro-fluidic chip.

[0072] ​The specific preparation process of the first layer microelectrode array chip a of the present invention is as follows Figure 7 , described in detail as follows:

[0073] 1. Before the process, the existing piranha liquid cleaning size is 5*5cm 2 Glass insulating substrate 1, obtaining an insulating substrate 1 with a clean surface ( Figure 7 a).

[0074] 2. Spin-coat a layer of positive photoresist AZ1500 on the surface of the quartz glass sheet with a thickness of 1.5 μm. After photolithography and development, the pattern of all microelectrodes 2, counter electrodes 3, connecting wires 4 and contact sites 5 on the mask is formed ( Figure 7 bc).

[0075] 3. Sputter a 30nm thick Cr metal seed layer on the surface of the photoresist pattern to increase the adhesion of the Au conductive film layer to the silicon wafer substrate, and then sputter a 250nm thick Au film layer ( Figure 7 d).

[0076] 4. Remove the excess Cr / Au film layer using a stripping process, leaving the required microelectrode 2, counter electrode 3, connecting wire 4 and contact site 5 ( Figure 7 e).

[0077] 5. Deposit a silicon oxide or silicon nitride insulating layer on the surface of the Au thin film by plasma enhanced chemical vapor deposition. The thickness of the silicon oxide insulating layer is 300nm. The thickness of the silicon nitride insulating layer is 500nm. Finally, by photolithography and SF6 plasma etching, the microelectrode 2, the counter electrode 3, and the contact site 5 are exposed, and the insulating layer on the surface of all connecting wires 4 is retained ( Figure 7 fg).

[0078] The detailed description of the specific preparation process of the second layer of the microfluidic chip part b of the present invention is as follows:

[0079] 1. A 1-2μm thick AZ1500 photoresist pattern is spin-coated onto a 4-inch silicon wafer that has been cleaned with piranha solution. Alignment marks are patterned using a subsequent photolithography and development process. Platinum is then sputtered onto the silicon wafer to form alignment marks for subsequent processes.

[0080] 2. Using SU8 5 type photoresist, a micro-channel 8 of about 10 μm is photoetched on the silicon wafer through a photolithography process;

[0081] 3. Use SU8 2100 to photoetch out the cell culture groove 7 and synaptic control chamber 9 of about 100 μm;

[0082] 4. After the photolithography is completed, heat it on a hot plate at 175 degrees Celsius for 2 hours to complete the mold hardening process and obtain the finished mold;

[0083] 5. Mix PDMS prepolymer and catalyst (Dow Corning 184; Dow Corning 184 silicone rubber is a two-component kit product consisting of a base component and a curing agent; the PDMS prepolymer refers to the base component, and the catalyst refers to the curing agent) in a weight ratio of 10:1 into a mold-equipped culture dish (Corning, diameter 150 mm), and after removing bubbles in a vacuum dryer, place it in an 80-degree Celsius oven for curing.

[0084] 6. Separate the microfluidic device from the mold with a tool, and use a puncher to make cell culture grooves 7 and synapse control chambers 9 in the microfluidic device, to obtain a PDMS microfluidic chip.

[0085] After the above process is completed, the microelectrode array chip a and the PDMS microfluidic chip b are surface-activated in an oxygen ion cleaning machine for 1 minute. After activation, the microelectrode array chip a and the PDMS microfluidic chip b are aligned in an alignment instrument to obtain the final neural network microfluidic chip.

[0086] The use steps of a multi-layer cascaded neural network microfluidic chip are as follows:

[0087] 1. Before using the chip, add deionized water to the cell culture grooves 7, and then extract air in the connected cell culture grooves 7 through an air pump, so that the deionized water fills the microchannels 8;

[0088] 2. Remove the deionized water in the chip, and add a polylysine solution to the cell culture grooves 7. After the solution fills the microchannels 8, wait for 30 minutes for the polylysine to modify the surface, and then remove the solution.

[0089] 3. Add the primary neuron cell solution to different cell culture grooves 7, and culture for 3-7 days. The axons and dendrites of the different cell culture groove neural modules will form functional connections in the microchannels 8.

[0090] Example 1:

[0091] Isolated primary cortical excitatory neurons and gamma-aminobutyric acid (GABA) inhibitory neurons are obtained from the embryos of ICR rats at 15-18 days of pregnancy, the primary cortical excitatory neurons are cultured in the four cell culture grooves 7 at the periphery of the chip of the application, and the GABA inhibitory neurons are cultured in the cell culture groove 7 at the center of the chip of the application. After the neurons are cultured in a CO2 incubator for 2-3 weeks, the neuron network in vitro begins to mature.

[0092] After the neuron network is mature, the neuron can be detected by using the 128 channel electrophysiological detector of the American blackrock company. The neuron network detection experiment can be divided into the following steps:

[0093] 1. In the stable state without adding any regulation, the electrophysiological dynamic characteristics of the neuron network of each cell culture tank are recorded;

[0094] 2. Glutamate (Glu) which is an excitatory stimulus for neurons is added to a cell culture tank around the chip, and the electrophysiological characteristics of the neuron network of the cell culture tank, the central cell culture tank and the cell culture tank opposite to the cell culture tank with added Glu are continuously recorded after the addition. Focus on the transmission of excitatory signals between different neuron networks and how the central inhibitory neuron network processes the excitatory signals and transmits them to the next level of neuron network;

[0095] 3. A double-channel point is used to set up an electrical stimulator to apply a bipolar electrical stimulation with a frequency of 1 Hz or 50 Hz and an amplitude of 300 mV on the microelectrode of a cell culture tank around the chip. The plasticity of neurons is evaluated by recording the electrophysiological dynamics of the neuron network after electrical stimulation, and the transmission time and efficiency of information between two adjacent neuron networks of the application are calculated by analyzing the neuron discharge characteristics detected by the microelectrodes at both ends of the microchannel.

[0096] This embodiment can simulate the transmission of neural information between different neuron networks in the brain in vitro.

[0097] Embodiment 2:

[0098] Primary hippocampal neurons are obtained from the embryos of ICR rats at 15-18 days of pregnancy, and the primary hippocampal neurons are cultured in the cell culture tank 7 of the chip. After the neurons are cultured in vitro for 2-3 weeks, the neuron network in vitro begins to mature.

[0099] After the neuron network is mature, it can be detected by electrophysiology. The neuron network detection experiment can be divided into the following steps:

[0100] 1. In the stable state without adding any regulation, the electrophysiological dynamic characteristics of the neuron network of each cell culture tank are recorded;

[0101] 2. A nerve inhibitor (such as GABA, etc.) is added to the synapse control chamber 9, which flows through the microchannel connected to the two cell culture tanks and inhibits the interaction of neural information between the two neuron networks through the microchannel.

[0102] This embodiment can evaluate the changes of electrophysiological dynamics of the brain neuron network before and after injury in vitro, and further provide a basis for the treatment of nerve injury and degenerative diseases.

[0103] The above examples are only for illustrative purposes and are not intended to limit the present application. Many modifications and changes can be made to the present application based on the above description, and the modifications and changes made, as well as the method of selecting other functional materials, should be included in the scope of protection of the claims of the present application.

Claims

1. A multi-layered cascaded neural network microfluidic chip, characterized in that, The neural network microfluidic chip comprises two layers of sub-chips: a first layer of sub-chip and a second layer of sub-chip, wherein the first layer of sub-chip is a microelectrode array chip, and the second layer of sub-chip is a microfluidic chip; The microelectrode array chip comprises: an insulating substrate (1), a plurality of microelectrodes (2), a counter electrode (3), a connecting wire (4), a contact site (5) and an insulating layer (6); the insulating substrate (1) is a carrier of the entire neural network microfluidic chip; the microelectrodes (2) are divided into four groups, and the microelectrodes are located on both sides of a microchannel (8); each group of microelectrodes (2) is provided with a counter electrode (3); the counter electrode (3) and the microelectrode (2) are extended through the connecting wire (4) and connected to the contact site (5) on the periphery of the insulating substrate; the surfaces of all the connecting wires (4) are covered with the insulating layer (6); The microfluidic chip comprises: five cell culture grooves (7), four groups of microchannels (8) for connecting different cell culture grooves and a synapse control chamber (9) for regulating synapses; the five cell culture grooves (7) in the microfluidic chip are used for culturing nerve cells, and the central cell culture groove is connected to the four peripheral cell culture grooves through the microchannels (8); the synapse control chamber (9) is composed of two circular holes with hole diameters of 2 μm and 1.5 μm and a channel with a width of 50 μm, and the two circular holes are connected through the channel with a width of 50 μm; the channel of the synapse control chamber (9) is located between the central cell culture groove (7) and the microchannel (8) of one peripheral cell culture groove connected to the central cell culture groove; the synapse control chamber (9) can be used for chemically or physically regulating and modeling the growing synapses in the microchannel (8); The packaging of the microelectrode array chip and the microfluidic chip is completed under a bonding process.

2. The neural network microfluidic chip of claim 1, wherein: The material of the insulating substrate (1) is quartz glass; The material of the microelectrode (2) is a biocompatible conductive film, and the material of the microelectrode (2) is one of gold, platinum, titanium nitride, indium tin oxide and nanowire; The material of the insulating layer (6) is a biocompatible insulating material, and the material of the insulating layer (6) is one of silicon dioxide and silicon nitride.

3. The neural network microfluidic chip of claim 1, wherein: The diameter of the microelectrode is 5 μm-30 μm.

4. The neural network microfluidic chip of claim 1, wherein: The five cell culture grooves (7) of the microfluidic chip are independent of each other and are connected only through the microchannels (8) with a width of 5-15 μm and a height of 5-15 μm.

5. The neural network microfluidic chip of claim 1, wherein: The material of the microfluidic chip is a biocompatible polymethylsiloxane or polymethyl methacrylate.

6. The neural network microfluidic chip of claim 1, wherein: The cell culture groove (7) of the microfluidic chip is a circular hole with a diameter of 4-8 mm; the microchannels (8) are divided into four groups, each group having 10-30 channels, and the length of each channel is 400-900 μm, which are used for connecting the cell culture grooves.

7. The neural network microfluidic chip of claim 1, wherein: The microelectrode array chip and the microfluidic chip are bonded together on an alignment instrument through heating bonding or plasma bonding.

8. A method of fabricating a neural network microfluidic chip as claimed in any one of claims 1 to 7, characterized in that, The method comprises preparing a microelectrode array chip and preparing a microfluidic chip; The method for preparing the microelectrode array chip comprises the following steps: (1) cleaning the glass substrate to obtain a clean insulating substrate (1); (2) A layer of photoresist is spin-coated on the cleaned insulating substrate (1) to a thickness of 1-2 μm, and after photoresist development, a pattern of microelectrode (2), counter electrode (3), connecting wire (4) and contact site (5) is formed; (3) A layer of platinum or gold conductive layer is deposited on the photoresist patterned surface by sputtering; (4) The excess conductive layer is removed in an organic solvent by a stripping process, leaving the required microelectrode (2), counter electrode (3), connecting wire (4) and contact site (5); (5) A silicon oxide or silicon nitride insulating layer (6) is deposited on the substrate by plasma-enhanced chemical vapor deposition; (6) The microelectrode (2), counter electrode (3) and contact site (5) are exposed by photoetching and plasma beam etching, and the insulating layer covering the surface of all connecting wires (4) is retained; The microfluidic chip is prepared by the following steps: (1) A layer of photoresist is spin-coated on the cleaned silicon wafer to pattern the alignment marks for subsequent photoetching, and then platinum is sputtered on the silicon wafer to form the alignment marks; (2) The microchannel (8) is photoetched on the silicon wafer by photoresist photoetching; (3) The cell culture tank (7) and the synapse control chamber (9) are photoetched on the silicon wafer; (4) After photoetching, the hardening process is completed on a hot plate to obtain the prepared mold; (5) The PDMS pre-polymer and catalyst are mixed and poured into the mold dish, and after removing the bubbles in the vacuum dryer, they are heated and cured; (6) The microfluidic device is separated from the mold, and a puncher is used to make the cell culture tank (7) and the synapse control chamber (9) in the microfluidic device.

9. The method of claim 8, wherein, The method further comprises the following steps: after the above process is completed, the microelectrode array chip and the microfluidic chip are surface-activated in an oxygen ion cleaning machine; and after activation, the microelectrode array chip and the microfluidic chip are aligned in an alignment instrument to obtain the final neural network microfluidic chip.

Citation Information

Patent Citations

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    CN113684133A