Bus control system, method and electronic device

Abstract

Provided are a bus control system, method, and electronic device. The bus control system comprises: a first master device and a second master device, which are connected through a system bus; and a first access controller, which is arranged between the first master device and the system bus and is configured to perform access control on an access request sent by the second master device to the first master device. Embodiments of the application implement access permission control between master devices by arranging access controllers between the master devices and the system bus, which helps to reduce access risks and improve the security and stability of the system.

Description

TECHNICAL FIELD

[0001] Embodiments of the present application relate to the technical field of bus control, and more particularly, to a bus control system, a bus control method and an electronic device. BACKGROUND

[0002] A bus is a set of common information transmission lines that can be shared by multiple devices / components in time-sharing mode. Multiple devices can be connected to the bus. A device that can initiate information transmission on the bus is called a master device, and a device that cannot actively initiate communication on the bus and can only receive and query bus information is called a slave device. In the access control design of a system on chip (SoC), access permission of a slave device is generally judged by a slave side access filter (SlvAF) downstream of a system bus to arbitrate whether the request is valid.

[0003] There are also scenarios of resource access between master devices upstream of the system bus. In the access control system based on slave devices downstream of the bus, if the master device upstream of the bus is attacked or the master device itself has a security vulnerability, resources in other master devices will be illegally intruded or leaked, causing data infringement and system abnormalities. SUMMARY

[0004] Embodiments of the present application provide a bus control system, a bus control method and an electronic device. Each aspect of the embodiments of the present application is introduced below.

[0005] In a first aspect, a bus control system is provided, comprising: a first master device and a second master device, the first master device and the second master device being connected through a system bus; and a first access controller, disposed between the first master device and the system bus, configured to perform access control on an access request sent by the second master device and directed to the first master device.

[0006] In a second aspect, a bus control method is provided, applied to a bus control system, the bus control system comprising: a first master device and a second master device, the first master device and the second master device being connected through a system bus; and a first access controller, disposed between the first master device and the system bus, configured to perform access control on an access request sent by the second master device and directed to the first master device. The method comprises: transmitting the access request sent by the second master device and directed to the first master device through the system bus; and performing access control on the access request by using the first access controller.

[0007] In a third aspect, an electronic device is provided, comprising the bus control system of the first aspect.

[0008] The application embodiment sets an access controller between the host device and the system bus to perform access control on the visiting request, realizes permission control of access between the host devices, helps to avoid illegal access caused by the host device due to a bug or attack, reduces the access risk, and improves the security and stability of the system. BRIEF DESCRIPTION OF DRAWINGS

[0009] Figure 1 FIG. 1 is a schematic diagram of an access control system based on a bus downstream slave device.

[0010] Figure 2 FIG. 2 is a schematic diagram of a bus control system provided by the application embodiment.

[0011] Figure 3 FIG. 3 is a schematic diagram of a bus control system provided by the application embodiment. Figure 2 FIG. 4 is a schematic diagram of a possible implementation of the system.

[0012] Figure 4 FIG. 5 is a flowchart of a bus control method provided by the application embodiment.

[0013] Figure 5 FIG. 6 is a structural schematic diagram of an electronic device provided by the application embodiment. DETAILED DESCRIPTION

[0014] The technical solutions in the application embodiments will be described clearly and completely below with reference to the drawings in the application embodiments. Obviously, the described embodiments are only some of the application embodiments, but not all the embodiments.

[0015] A bus is a set of public information transmission lines that can be shared by multiple devices or components in time. The bus can be connected within a chip, between chips, between boards, or between computer systems. Multiple devices can be connected on the bus. A device that can initiate information transmission on the bus is called a host device. A device that cannot actively initiate communication on the bus and can only receive and query bus information is called a slave device.

[0016] With the continuous development of integrated circuits, system-on-chip is more and more widely used in smart terminals such as mobile phones and electronic products. System-on-chip, also known as system-on-a-chip, is a micro system that integrates microprocessors, analog IP cores, digital IP cores, and memories (or off-chip memory control interfaces) on a single chip.

[0017] In the current access control design of SoC, the slave side access filter (SlvAF) is generally used to judge the access permission of the slave device based on the initiator identification, physical address information, security attribute and read / write request downstream of the system bus, so as to arbitrate whether the request is valid. The SlvAF belongs to a kind of hardware intellectual property (IP) and is used to realize the function of access control.

[0018] Figure 1 Fig. 1 is a schematic diagram of an access control system based on the slave device downstream of the bus in SoC. As shown in Fig. 1, the bus access control system comprises a first master device 110, a second master device 120, a system bus 130, a first slave device 140 and a first slave access filter, etc. Figure 1

[0019] The first master device 110 is connected with the system bus 130 and can initiate access information. The first master device 110 can be, for example, a processor or a wireless receiving device. The second master device 120 is connected with the system bus 130 and can initiate access information. The second master device 120 can be, for example, a signal audio processing device or a wireless receiving device.

[0020] The system bus 130 is used to transmit control information and can comprise control signals and timing signals. The system bus 130 is usually a communication path between the CPU and the memory and the input / output device.

[0021] The first slave device 140 is connected with the system bus 130 and is used to receive and query the bus information. The first slave device 140 can be, for example, a printing device or an audio playing device.

[0022] One end of the first slave access filter 150 is connected with the port on the system bus 130, and the other end is connected with the first slave device 140. The first slave access filter 150 can perform access control or check on the visiting instruction of the first slave device 140.

[0023] ​The basic idea of the access control system based on the bus downstream slave device is to check the four elements of the secure master identification (SecMID) of the master device, the physical address information to be accessed, the read / write request, and the security attribute for the permission check of each access request. The secure master identification is also called the secure hardware identification of the master device, which is generally a fixed identification assigned to each master device during the SoC integration stage and cannot be changed after the chip is taped out. The physical address information to be accessed generally refers to the physical start address and the physical end address of the request to be accessed. The read / write request is generally used to indicate that the current request is to read data or write data. The security attribute is generally the request attribute of secure (S) or non-secure (NS).

[0024] Based on the above four elements, an access permission table can be established for each access request, as shown in the following table. The access permission table is used to limit the specified physical address range, which can only be accessed by a specific SecMID carrying a specific security attribute for a specified read or write access. In this way, when the bus downstream accesses the specific slave device, only after the access permission table in the SlvAF is checked, the target slave device can be accessed for data access. If the access permission table check in the SlvAF is rejected, the data is returned with the preset value in the virtual slave device, which will not cause the back pressure of the bus request, and the request will not reach the target slave device. In some processing methods, the access request can also reach the target slave device, but when the data is returned through the SlvAF, the data will be replaced with the preset value. Figure 1

[0025] For example, when the first master device 110 accesses the first slave device 140 through the system bus 130, only after the access permission table is checked by the first slave access filter 150, the first slave device 140 can be accessed for data access. If the access permission check of the first slave access filter 150 fails and is rejected, the data is returned with the preset value in the virtual slave device, which will not cause the back pressure of the system bus 130 request, and the request will not reach the first slave device 140. In some processing methods, the access request can also reach the first slave device 140, but when the data is returned through the first slave access filter 150, the data will be replaced with the preset value.

[0026] ​The access control system based on the downstream slave device of the bus generally does not perform authority management on the upstream master device of the bus, cannot manage the access between the upstream master devices of the bus, and cannot form a perfect access control system. However, there are also resource access scenarios between the upstream master devices of the system bus, for example, the first master device 110 accesses the second master device 120. Once one of the master devices is attacked or performs an exception, the resources of the master device will be illegally invaded and information will be leaked. Moreover, the request sent by the master device at this time is untrusted, which will cause intentional or unintentional reading and writing of resources in other master devices, leading to data leakage or malicious rewriting of data, and further causing data infringement and system exceptions.

[0027] It should be noted that the above-mentioned problem of data leakage and data infringement in the access between the upstream master devices of the SOC bus is only an example, and the embodiments of the present application can be applied to any type of scene in which the access between the upstream master devices of the system bus is risky.

[0028] Therefore, how to develop a scheme with small access risk between the upstream master devices of the system bus is a problem to be solved.

[0029] Based on this, the embodiments of the present application propose a bus control system, which will be described in detail below.

[0030] Figure 2 is a schematic diagram of a bus control system provided by the embodiments of the present application. The bus control system 200 can include a first master device 210, a second master device 220, a system bus 230, and a first access filter 240.

[0031] The first master device 210 is connected to the system bus 230 and can initiate access request information through the system bus 230 or receive incoming request information through the system bus 230. The first master device 210 can refer to any one of the plurality of master devices connected to the system bus 230, for example, a processor, a memory, or a wireless receiving device.

[0032] The second master device 220 is connected to the system bus 230 and can initiate access request information through the system bus 230 or receive incoming request information through the system bus 230. The second master device 220 can refer to any one of the plurality of master devices connected to the system bus 230, different from the first master device 210, for example, a memory, an audio signal processing device, or a wireless receiving device.

[0033] The system bus 230 is used to transmit control information such as access request, and the control information can include control signals and timing signals. The system bus 230 is usually a communication path between the CPU and the interface of the memory and the input / output device.

[0034] The first access controller 240 is located between the first master device 210 and the system bus 230, and is used to check or control access requests from the first master device 210. For example, it can control access requests sent by the second master device 220 to the first master device 210. The first access controller 240 can also be called an access filter (AF).

[0035] Access requests typically include an access permission table. As shown in Table 1, the access permission table may include elements such as the master device security identifier, the physical address information to be accessed, read / write requests, and security attributes. The first access controller 240 can arbitrate whether an access request sent to the first master device 210 is secure based on the physical address information, initiator identifier, security attributes, read / write request, and other access permissions.

[0036] Table 1

[0037] Address information Master security identification Read / write Secure / insecure 0x0000_0000 - 0x0000_0FFF 0x1 Read only S 0x0000_1000 - 0x0000_1FFF 0x2 Write only NS 0x0000_2000 - 0x0000_2FFF 0x3 Read, write S 0x0000_3000 - 0x0000_3FFF 0x4 Read, write NS

[0038] like Figure 2 As shown by the dashed lines, the process of the access request sent by the second master device 220 to the first master device 210 can be divided into the following steps:

[0039] Step 1: The second master device 220 sends an access request to the first master device 210 through the system bus 230. This access request may include an access permission table, which may include access permission elements such as the master device security identifier and the physical address information to be accessed.

[0040] Step two, the system bus 230 transmits this access request to the first access controller 240.

[0041] Step three: The first access controller 240 performs an access permission check on the access request. If the access request passes the access permission check, the second master device 220 can access the resources within the first master device 210. If the access request fails the access permission check, it will be rejected by the first access controller 240, triggering an exception report. The first access controller 240 may return a preset value, such as a preset value from the virtual master device. In some embodiments, the access request may also reach the first master device 210, but the data will be replaced with the preset value when it passes through the first access controller 240. When the second master device 220 gains unauthorized access to the first master device 210 due to a vulnerability or attack, the first access controller 240 can filter out unauthorized access requests that do not meet the access permission requirements, thereby achieving access control between master devices and reducing access risks.

[0042] In some implementations, there can also be a scenario where the first master 210 accesses the second master 220, and an access controller can be arranged between the second master 220 and the system bus 230, which can also be configured as the first access controller 240 for access control on the access request sent by the first master 210 to the second master 220. Thus, the access right control between the masters is realized, and the access risk is reduced.

[0043] In some implementations, the bus control system 200 can further include a plurality of slave devices connected to the system bus 230. The slave devices can only receive query information through the system bus 230, such as memories and audio playback devices. The first slave device is any one of the plurality of slave devices. An access controller on the slave device side can be arranged between the slave device and the system bus 230 for access control on the access request sent to the slave device. The second access controller can be any one of the plurality of slave device side access controllers. For example, the second access controller is arranged between the first slave device and the system bus 230 for access control on the access request sent to the first slave device.

[0044] The first access controller 240 can not only perform access control on the access request of the first master 210, but also receive the access request sent by the first master 210 and configure the access right of the access request sent by the first master 210. The access request sent by the first master 210 is also referred to as the first access request. In some embodiments, the first access request sent by the first master 210 can be for the first slave device. In some embodiments, the first access request sent by the first master 210 can be for the second master. The embodiments of the present application are based on the access control on the upstream master side of the bus, which makes up for the lack of functionality and completeness of only SlvAF on the downstream side of the bus, forms comprehensive bus access control, and greatly reduces the system access risk.

[0045] The first access controller 240 usually performs access control according to the configuration information of the access right. After the first access request sent by the first master 210 passes through the first access controller 240, the first access request should have the access right items required to be checked by the second access controller on the slave device side, such as the four elements of SecMID information, destination physical address information, read / write information, and security attribute information.

[0046] The second access controller arranged in front of the first slave device performs access right check on the first access request, and only the first access request that passes the check can actually access the resources of the first slave device. Otherwise, the second access controller triggers rejection, performs abnormal reporting, and can also return a preset value.

[0047] In some implementations, a complex SoC design integrates master IP from different vendors, and the vendor-proprietary architecture design does not have a unified standard, so some bus transmissions from the master IP do not support security attributes. For masters that do not support security attributes, additional mechanisms are needed to add security attributes, otherwise the downstream permission check mechanism cannot be met, and the arbitration conditions of the access control downstream cannot be met. This will further cause the overall access control system of the chip system to be difficult to meet the completeness and flexibility, and will threaten the personal privacy information and data security of the user, and ultimately affect the user's safety experience and product trust. The first access controller 240 can add security attributes in the first access request, help the master that does not support security attributes to send the expected security signal, and meet the permission check requirements of the access controller on the downstream slave side. The first access controller 240 can flexibly integrate security solutions of different IP vendors, build a perfect access control system on the master and slave sides of the SoC system, and help to further increase security and reduce attack surface.

[0048] The configuration of the first access controller 240 is usually completed before the corresponding master is initialized, and the access controller on the slave side also has similar process constraints.

[0049] The permission access table and security attribute information in the first access controller 240 are usually configured in a trusted execution environment (TEE). The TEE can be a TEE environment in the power-on startup phase of the SoC, or a runtime TEE environment. Generally, the configuration of the first access controller 240 should be limited to the TEE environment, and the function of locking the configuration is supported.

[0050] In some implementations, the first access controller 240 can support a locking function for each address region in the permission configuration table of the access request, as shown in Table 2. After the permission configuration is locked, the permission configuration table can be edited again only after the system is reset. Alternatively, the first access controller 240 can lock the configuration of a certain address region according to the demand for physical address changes, and the configuration cannot be changed before the system is reset. Alternatively, the first access controller 240 can also not lock the configuration of a certain address region, for dynamic changes at runtime.

[0051] Table 2

[0052] Address information Master security identification Read / write Secure / insecure Locking 0x0000_0000 - 0x0000_0FFF 0x1 Read only S Yes 0x0000_1000 - 0x0000_1FFF 0x2 Write only NS No 0x0000_2000 - 0x0000_2FFF 0x3 Read, write S Yes 0x0000_3000 - 0x0000_3FFF 0x4 Read, write NS No

[0053] In some implementations, the first access controller 240 can specify a specific address region for the first access request, which corresponds to issuing a security attribute of S or NS. That is, the first access controller 240 can switch the security attribute according to the physical address. Alternatively, the first access controller 240 can also pass through the security attribute in the original request of the master device. Pass-through refers to transparent transmission in communication, which refers to transmitting the content from the source address to the destination address without any change to the business data content regardless of the content of the transmitted business.

[0054] In some implementations, the first access controller 240 can set which address region in the accessed master device can be accessed by the external specific master device. For example, for the first access request issued by the first master device 210, the first access controller 240 can set that some address region in the first master device 210 can be accessed by the external specific master device. Alternatively, the first access controller 240 can also not set the external specific master device access object for some address region in the first master device 210.

[0055] In some implementations, the SoC integration stage does not allocate a master device security hardware identifier to all master devices. In the trusted execution environment, the first access controller 240 can modify the master device security hardware identifier in the first access request. Alternatively, the first access controller 240 can add the master device security hardware identifier in the first access request. In this way, the access request issued by the master device without the master device security hardware identifier can meet the access check requirements of the downstream slave device access controller.

[0056] Alternatively, the requirements of the master device for the function of the system bus are different, and the first access controller 240 can support the parameterized configuration of the function when instantiating the IP, and the first access controller 240 can also support the parameterized configuration of the function when calling the sub-module of the IP. This helps to further reduce the physical area and thus reduce the power consumption.

[0057] Alternatively, the first access controller 240 can support multiple system bus protocols, including but not limited to the advanced microcontroller bus architecture (AMBA), the advanced extension interface (AXI) protocol, and the like.

[0058] The application embodiment sets an access controller between the master device and the system bus to perform access control on the access request, and realizes permission control of access between master devices. The application embodiment is based on the access control design on the upstream master device side of the bus, which is complementary to the conventional access control of the slave device, forms a combined control system of the upstream and downstream of the bus, avoids illegal access caused by vulnerabilities or attacks of the master device, helps to reduce access risks, improves system security and stability, and improves user experience and trust.

[0059] Figure 3 is Figure 2 A schematic diagram of a possible implementation of a bus control system. As Figure 3 shown, the bus control system can include a first master device 310, a second master device 320, a system bus 330, a first access filter 340, a third access filter 350, a second access filter 360, and a first slave device 370.

[0060] The first master device 310 is connected to the system bus 330 and can initiate access request information through the system bus 330 or receive incoming request information through the system bus 330.

[0061] The second master device 320 is connected to the system bus 330 and can initiate access request information through the system bus 330 or receive incoming request information through the system bus 330.

[0062] The system bus 330 is used to transmit control information such as access request, and the control information can include control signals and timing signals.

[0063] The first access controller 340 is arranged between the first master device 310 and the system bus 330, and is used to perform access control or check on the access request sent to the first master device 310, for example, the access control on the access request sent by the second master device 320 to the first master device 310. The first access controller 340 can also be called an access filter (AF). The first access controller 340 can also receive the access request sent by the first master device 310, and configure the access permission of the first access request sent by the first master device 310.

[0064] The third access controller 350 is arranged between the second master device 320 and the system bus 330, and is used to perform access control on the access request sent to the second master device 320, for example, the access control on the access request sent by the first master device 310 to the second master device 320. The third access controller 350 can also receive the access request sent by the second master device 350, and configure the access permission of the access request sent by the second master device 350.

[0065] The second access controller 360 is arranged between the first master device 370 and the system bus 330, and can perform access checking on a visiting instruction sent to the first slave device 370.

[0066] The first slave device 370 is connected to the system bus 130, and is configured to receive and query bus information. The first slave device 370 can be, for example, an audio playing device.

[0067] The access process between the master devices and the access process between the master and slave devices will be described in detail below.

[0068] In the first embodiment, the second master device 320 sends an access request to the first master device 310. As shown by the dashed line in FIG. 3, the access request process can include the following steps: Figure 3

[0069] Step 1: The third access controller 350 receives the access request sent by the second master device 350, and configures the access permission of the access request sent by the second master device 350. The configured access permission can include master device security identification, physical address information to be accessed, read / write request, security attribute, and other elements.

[0070] Step 2: The third access controller 350 sends an access request to the first master device 310 through the system bus 330. The access request can include a permission access table, and the permission access table includes the configured access permission.

[0071] Step 3: The system bus 330 transmits the access request to the first access controller 340.

[0072] Step 4: The first access controller 340 performs access permission checking on the access request, which can include master device security identification, physical address information to be accessed, read / write request, security attribute, and other access permission checking. If the access request passes the access permission checking, the access request of the second master device 320 can access the resources inside the first master device 310. If the access request does not pass the access permission checking, the first access controller 340 triggers a rejection, and the first access controller 340 sends an exception report, and can return a preset value, such as a preset value in a virtual master device.

[0073] Optionally, the third access controller 240 can support a locking function for each address region in the permission configuration table of the access request. After the permission configuration is locked, the permission configuration table can be edited again only after a system reset of the SoC. Optionally, the first access controller 240 can lock the configuration of a certain address region according to the demand for physical address changes, and the configuration of the address region cannot be changed before the system reset of the SoC. Optionally, the first access controller 240 can also not lock the configuration of a certain address region, which is used for dynamic changes at runtime. For example,​Figure 3 The access right table in the upper right position shows that the permission configuration lock function is added. Figure 3 The access right table in the lower right position shows that the permission configuration lock function is not added.

[0074] Embodiment two, the first master device 310 sends an access request to the second master device 320. As shown in the figure, the flow of the access request can be divided into the following steps: Figure 3

[0075] Step one, the first access controller 340 receives the access request issued by the first master device 310, and configures the access right of the access request issued by the first master device 310. The configured access right can include master device security identifier, physical address information to be accessed, read / write request, security attribute and other elements.

[0076] Optionally, if the bus transmission issued by the first master device 310 does not support the security attribute. The first access controller 340 can add the security attribute in the first access request, help the first master device 310 which does not support the security attribute to issue the expected security signal, and meet the permission check requirements of the third access controller 350 on the target master device side.

[0077] Step two, the first access controller 340 issues an access request to the second master device 320 through the system bus 330. The access request can include an access right table, and the access right table includes the configured access right.

[0078] Step three, the system bus 330 transmits the access request to the third access controller 350.

[0079] Step four, the third access controller 350 performs access right check on the access request. The access right check can include master device security identifier, physical address information to be accessed, read / write request, security attribute and other elements. If the access request passes the access right check, the access request of the first master device 310 can access the resources inside the second master device 320. If the access request does not pass the access right check, the third access controller 350 will trigger rejection, and the third access controller 350 issues an exception report, which can return a preset value, such as using the preset value in the virtual master device to return data.

[0080] Embodiment three, the first master device 310 sends a first access request to the first slave device 370. As shown in the figure, the flow of the access request can be divided into the following steps: Figure 3

[0081] ​​Step one: The first access controller 340 receives the first access request from the first master device 310 and configures the access permissions for the first access request. The configured access permissions may include elements such as the master device security identifier, the physical address information to be accessed, read / write requests, and security attributes.

[0082] Optionally, if the first master device 310 does not support security attributes in bus transmission, the first access controller 340 can add security attributes to the first access request to help the first master device 310, which does not support security attributes, send the desired security signal to satisfy the permission check requirements of the second access controller 360 on the destination slave device side.

[0083] Step two, the first access controller 340 issues a first access request for the first slave device 370 via the system bus 330. The first access request may include a permission access table, which includes configured access permissions.

[0084] Step 3: The system bus 330 transmits the first access request to the second access controller 360.

[0085] Step four: The second access controller 360 performs an access permission check on the first access request. This check may include access permission information such as the master device's security identifier, the physical address to be accessed, read / write requests, and security attributes. If the first access request passes the access permission check, the access request from the first master device 310 can access the resources within the first slave device 360. If the first access request fails the access permission check, it triggers a rejection by the second access controller 360, which issues an exception report and may return a preset value, such as a preset value from the virtual slave device.

[0086] This application's embodiments, based on the access control design of the upstream master device side of the bus, realize permission control for access between master devices. This complements the conventional slave device access control, forming a combined upstream and downstream control system on the bus. This avoids unauthorized access to the master device due to vulnerabilities or attacks, reducing access risks. This application's embodiments also address the issue of master devices not supporting security attributes, allowing for flexible integration of security solutions from different IP vendors. This constructs a comprehensive access control system for both the master and slave devices of the SoC system, further enhancing security and reducing the attack surface.

[0087] The above text combined Figures 1-3 The system embodiments of this application are described in detail below, in conjunction with... Figure 4 The present application describes in detail the method embodiments. It should be understood that the description of the method embodiments corresponds to the description of the system embodiments; therefore, any parts not described in detail can be referred to the foregoing system embodiments.

[0088] Figure 4 is a flowchart of a method of bus control provided by an embodiment of the present application. Figure 4 The method of can be applied to the bus control system described in any of the preceding embodiments. The bus control system can include a first master device and a second master device connected through a system bus; a first access controller disposed between the first master device and the system bus, configured to perform access control on an access request sent by the second master device to the first master device. Figure 4 The method of includes steps S410 to S420, which are described in detail below.

[0089] In step S410, an access instruction of the second master device to the first master device is transmitted through the bus.

[0090] In step S420, the access instruction to the first master device is controlled by the first access filter.

[0091] If the access instruction passes the access permission check, the second master device can access the resources inside the first master device. If the access instruction does not pass the access permission check, a rejection of the first access controller is triggered, and the first access controller reports an exception or returns a preset value.

[0092] Optionally, the bus control system can further include a first slave device and a second access controller. The first slave device is connected to the system bus, and the second access controller is disposed between the first slave device and the system bus, configured to perform access control on an access request sent to the first slave device. In some embodiments, the first master device sends a first access request to the first slave device, and the second access controller performs access control on the first access request sent to the first slave device.

[0093] Optionally, the first access request sent by the first master device is received, and the first access request is used to access the first slave device. If the first master device 310 does not support security attributes, security attributes can be added to the first access request.

[0094] Optionally, the permission configuration of the first access request can be locked to enable the permission configuration to be performed in a trusted execution environment.

[0095] Optionally, in the trusted execution environment, the first access controller can modify the master device security hardware identifier in the first access request, and / or add the master device security hardware identifier.

[0096] Optionally, the first access controller can support parameterized configuration of functions when IP instantiation.

[0097] Optionally, the first access controller can support multiple system bus protocols.

[0098] The access controller proposed in the embodiments of the present application is implemented by a hardware IP inside a chip, and it is difficult to reflect in physical appearance. The access control logic of a system bus can be inferred through code, flow and debugging means, so as to distinguish from the bus control method based on a slave device.

[0099] Figure 5 is a structural schematic diagram of an electronic device provided by the embodiments of the present application. As shown in Figure 5 the electronic device can include the bus control system 510 as described in any of the foregoing.

[0100] It should be noted that the electronic device mentioned in the embodiments of the present application is an electrical device composed of microelectronic devices, which refers to a device that can be composed of integrated circuits, transistors, electron tubes and other electronic components, and plays a role by applying electronic technology (including software). The electronic device can be a random device, and the electronic device can be referred to as a terminal, a portable terminal, a mobile terminal, a communication terminal, a portable communication terminal, a portable mobile terminal, a touch screen, etc. For example, the electronic device can be a smart phone, a portable phone, a game machine, a television, a display unit, a head-up display unit for a vehicle, a notebook computer, a laptop computer, a personal computer (PC), a personal media player (PMP), a personal digital assistant (PDA), a robot controlled by an electronic computer, a numerical control or program-controlled system, etc. The electronic device can also be a portable communication terminal with a wireless communication function and a pocket size. In addition, the electronic device can be a flexible device or a flexible display device.

[0101] It should be understood that in various embodiments of the present application, "first", "second", etc. are used to distinguish different objects, not to describe a specific order, and the size of the serial number of the above processes does not mean the order of execution. The execution order of each process should be determined by its function and internal logic, and should not constitute any limitation on the implementation process of the embodiments of the present application.

[0102] In several embodiments provided in the present application, it should be understood that the disclosed system, device and method can be implemented in other manners. For example, the described device embodiments are merely schematic. For example, the division of the units is only a logical function division. There can be another division manner for the actual implementation, for example, multiple units or components can be combined or integrated into another system, or some features can be ignored or not executed. In addition, the displayed or discussed mutual couplings or direct couplings or communication connections between different parts can be indirect couplings or communication connections through some interfaces, devices or units, and can be electric, mechanical or in other forms.

[0103] In several embodiments provided in the present application, it should be understood that when it is said that a part is "connected" or "connected" to another part, it means that the part can be "directly connected" or "electrically connected", and another element is involved. In addition, the term "connected" also means that the part is "physically connected" and "wirelessly connected". In addition, when it is said that a part "includes" an element, unless otherwise stated, it means that the part can include another element, rather than excluding the other element.

[0104] The units described as separate components can or can not be physically separated, and the components shown as units can or can not be physical units, i.e. they can be located in one place or distributed to multiple network units. Part or all of the units can be selected according to actual needs to achieve the purpose of the embodiment.

[0105] In addition, each functional unit in each embodiment of the present application can be integrated into a processing unit, or each unit can be physically present separately, or two or more units can be integrated into one unit.

[0106] The above is merely a specific implementation of the present application, but the protection scope of the present application is not limited thereto. Any person skilled in the art can easily think of changes or replacements within the technical scope disclosed in the present application, which should be covered within the protection scope of the present application. Therefore, the protection scope of the present application should be subject to the protection scope of the claims.

Claims

1. A bus control system, characterized by, Comprise: A first master device and a second master device, the first master device and the second master device are connected through a system bus; A first access controller is arranged between the first master device and the system bus, for access control of an access request sent by the second master device to the first master device, and for access permission configuration of an access request issued by the first master device and access control according to the access permission configuration information; Wherein, the access request for the first master device is transmitted to the first access controller by the system bus after being sent by the second master device to the system bus, and the first access controller is an access filter.

2. The bus control system according to claim 1, characterized by Also include: A first slave device connected to the system bus; A second access controller is arranged between the first slave device and the system bus, for access control of an access request sent to the first slave device.

3. The bus control system according to claim 2, characterized by The first access controller is further configured to perform the following operations: Receive the first access request sent by the first master device, the first access request is used to access the first slave device; Add security attributes in the first access request.

4. The bus control system according to claim 3, characterized by The first access controller is further configured to perform the following operations: Lock the permission configuration of the first access request, so that the permission configuration is performed in a trusted execution environment.

5. The bus control system according to claim 3, characterized by The first access controller is further configured to perform the following operations: In a trusted execution environment, modify the master device security hardware identifier in the first access request, and / or, Add the master device security hardware identifier.

6. A method of bus control, characterized by, Applied to a bus control system, the bus control system comprises: A first master device and a second master device, the first master device and the second master device are connected through a system bus; A first access controller is arranged between the first master device and the system bus, for access control of an access request sent by the second master device to the first master device, and for access permission configuration of an access request issued by the first master device and access control according to the access permission configuration information; The method comprises: Receive the access request sent by the second master device through the system bus; Send the access request to the first access controller through the system bus; Access control is performed on the access request by using the first access controller; Access permission configuration of an access request issued by the first master device is performed by using the first access controller; Access control is performed according to the access permission configuration information by using the first access controller.

7. The method of claim 6, wherein, The bus control system further comprises: A first slave device connected to the system bus; A second access controller is arranged between the first slave device and the system bus; The method further comprises: Access control is performed on the access request sent to the first slave device by using the second access controller.

8. The method of claim 7, wherein, The method further comprises: Receive the first access request sent by the first master device, the first access request is used to access the first slave device; Add security attributes in the first access request.

9. The method of claim 8, wherein, The method further comprises: locking a permission configuration of the first access request, so that the permission configuration is under a trusted execution environment.

10. The method of claim 8, wherein, The method further comprises: under the trusted execution environment, modifying a host device security hardware identification in the first access request, and / or, adding the host device security hardware identification.

11. An electronic device, comprising: A bus control system comprising any of the claims 1-5.

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