VCSEL array-based three-dimensional photonic chip architecture and applications, dnn structure computation method
By using a three-dimensional photonic chip architecture based on VCSEL arrays, the problems of integration and high-speed data input of DNNs have been solved, achieving chip miniaturization and low-power computing, and promoting the development of various applications.
Patent Information
- Application Number
- CN202210893985.X
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2022-07-27
- Publication Date
- 2025-11-11
- Estimated Expiration
- 2042-07-27
AI Technical Summary
Existing DNNs are difficult to miniaturize and integrate, and the incoherence of the light source when using VCSEL arrays as light sources makes structural design difficult, failing to meet the requirements of high-speed data input and energy consumption.
A three-dimensional photonic chip architecture based on VCSEL arrays is adopted, including a data input layer, a data processing layer and a data output layer. An addressable VCSEL array is used as a light source, and DNNs structures are fabricated by 3D printing or microelectronics processes. Backpropagation algorithm and gradient descent method are used for iterative optimization.
It achieves on-chip integration of DNNs, shrinking the size to the millimeter or micrometer level, increasing the data input rate by 106 times, and consuming zero energy during operation. It is suitable for fields such as face recognition, optical computing, image classification, 6G communication, optical encryption, and autonomous driving.
Smart Images
Figure CN115222034B_ABST
Abstract
Description
Technical Field
[0001] This invention relates to the field of integrated circuit technology, specifically to a three-dimensional photonic chip architecture and application based on VCSEL array, and a DNN structure calculation method. Background Technology
[0002] With the rapid development of artificial intelligence (AI), the computing speed of current electronic chips based on the von Neumann architecture is gradually becoming insufficient to meet the needs of AI computing, and the excessive energy consumption of electronic chips may also lead to a serious energy crisis in the future. Currently, to address this issue, neuromorphic computing, which references the architecture of the human brain and is implemented in hardware, is gradually emerging. Among them, photonic neural networks (PNNs) are a type of neuromorphic computing that uses light as the information carrier. PNNs operate at the speed of light, and because the propagation of light is usually passive and energy-free, PNNs have significant advantages in speed and energy consumption compared to traditional electronic chips, and are widely recognized as the development direction of next-generation computing chips.
[0003] Currently, PNNs have evolved into various types, with diffractive neural networks (DNNs) being a unique type of optical network with a three-dimensional architecture. DNNs construct neuron connections based on light diffraction. Compared to other PNNs, their three-dimensional architecture offers advantages such as high neuron density and suitability for processing two-dimensional optical data. For example, when performing tasks such as image classification, DNNs do not need to flatten two-dimensional images into one-dimensional time-series data as other two-dimensional PNNs or electronic chips; they can directly perform image classification tasks. Therefore, their execution speed is far superior to other types of optical networks.
[0004] However, DNNs currently face challenges in miniaturization, integration, and chip-based deployment. Existing DNNs all operate by constructing large optical paths using various spatially separated optical instruments. Even though some research has integrated DNNs with CMOS imaging chips, large lasers and photomasks are still required for optical image input, making it impractical. The reported size of the entire working optical path in DNNs is in the tens of centimeters, or even meters or larger. Furthermore, the adjustable data input devices used in existing DNNs are spatial light modulators or digital micromirror arrays, with modulation rates capped at only kHz, far lower than the frequencies of existing electronic chips, making it difficult to meet the demands of high-speed data input.
[0005] The integration of DNNs onto chips is crucial for advancing their applications and is a pressing issue that needs to be addressed. This is because there is currently no suitable integration platform or chip architecture for 3D DNNs. Existing electronic and optical chips are all two-dimensional in architecture, and therefore cannot be used for the integrated design of DNNs.
[0006] Furthermore, for the design of DNNs structures using VCSEL (Vertical-cavity surface-emitting laser) arrays as light sources, traditional algorithms cannot be used to design DNNs structures because the light between VCSEL array units is incoherent, and there are no relevant literature reports. Summary of the Invention
[0007] To address the shortcomings of existing technologies, this invention provides a three-dimensional photonic chip architecture based on a VCSEL array, which can directly integrate the entire working optical path of DNNs on a single chip. Its size will be reduced from centimeter or meter level to millimeter or micrometer level. The data input rate of this chip is 10 times that of existing DNNs. 6 The chip can process more data in a shorter time, more than twice as much. In addition, this invention takes into account the special characteristics of VCSEL arrays and develops a DNNs structure design method specifically for VCSEL arrays as light sources.
[0008] To achieve the above objectives, the technical solution adopted by the present invention is as follows:
[0009] This invention provides a three-dimensional photonic chip architecture based on a VCSEL array, comprising:
[0010] A data input layer is used to generate two-dimensional optical data and input the optical data into the data processing layer; the data input layer is an addressable VCSEL array.
[0011] A data processing layer is used to perform calculations on the optical data input from the data input layer;
[0012] The data output layer is used to collect and output the calculation results of the data processing layer;
[0013] The data input layer, data processing layer, and data output layer are stacked sequentially to form the three-dimensional photonic chip architecture.
[0014] In the above scheme, the addressable VCSEL array includes a VCSEL array with front-facing light emission or a VCSEL array with rear-facing light emission.
[0015] In the above scheme, the addressable VCSEL array is controlled by a manual control power supply, an external programmable control power supply, or a CMOS chip.
[0016] In the above scheme, the data processing layer is a DNNs structure, which is integrated on the addressable VCSEL array.
[0017] In the above scheme, the 3D printing is achieved by printing DNNs structures on the VCSEL array and supporting the DNNs structures by printing support columns.
[0018] In the above scheme, the bonding includes setting adhesive points between the VCSEL array and the DNNs structure and integrating the two by applying pressure.
[0019] In the above scheme, the DNN structure is manufactured by 3D printing or microelectronic processes.
[0020] In the above scheme, the materials used to prepare the DNNs structure include at least one of organic materials, rigid transparent materials, photochromic materials, and phase change materials.
[0021] In the above scheme, the DNNs structure also includes spiking DNNs constructed from VCSEL arrays. The spiking DNNs consist of multiple diffraction layers, each of which is a VCSEL array, and each VCSEL array serves as a spiking neuron in the DNNs.
[0022] In the above scheme, the data output layer is a detector array or a regular optical screen.
[0023] In the above scheme, the detector array is integrated on the data processing layer by bonding.
[0024] Another aspect of the present invention provides an application of a three-dimensional photonic chip architecture based on a VCSEL array for use in face recognition, optical computing, image classification, 6G communication, optical encryption, and autonomous driving.
[0025] This invention also provides a method for calculating DNN structures based on VCSEL arrays, comprising the following steps:
[0026] Constructing the output light field of VCSEL array light in DNNs;
[0027] Calculate the amplitude distribution of the output light field;
[0028] The DNN structure is obtained by iteratively using the backpropagation algorithm and gradient descent method.
[0029] In the above scheme, the calculation of the amplitude distribution of the output light field includes: calculating the output light field obtained by each unit in the VCSEL array on the output plane after passing through DNNs, and then superimposing the absolute values of the amplitudes of the output light fields of all units in the VCSEL array to obtain the amplitude distribution of the superimposed output light field.
[0030] The beneficial effects of this invention are:
[0031] The three-dimensional photonic chip structure of this invention uses an addressable VCSEL array as the data input layer. Two-dimensional optical data with arbitrary content is directly input to the data processing layer for computation, and the computation results are then presented by the data output layer. This chip architecture allows for the direct on-chip integration of the entire working optical path of DNNs, reducing their size from centimeter or meter-level to millimeter or micrometer-level, greatly promoting the practical application of DNNs. Furthermore, utilizing the high modulation rate (GHz) of the VCSEL array, the data input rate of this chip will be 10 times that of existing DNN data input rates (kHz). 6 With a speed advantage of more than double, the chip can process significantly more data in a shorter time. Furthermore, based on the passive propagation characteristics of light, the chip consumes zero energy during computation, only during data input and output. This energy consumption is far lower than existing electronic chips, solving the energy problems faced by AI computing. This chip architecture can be used in various applications such as facial recognition, optical computing, image classification, 6G communication, optical encryption, and autonomous driving.
[0032] Based on the unique characteristics of VCSEL array light sources, this invention proposes a structural calculation method for DNNs. This method solves the problem that existing DNNs structural design algorithms cannot match the incoherent light sources emitted between VCSEL units, enabling the method to be used for the structural design of DNNs using VCSEL arrays as light sources. Attached Figure Description
[0033] Figure 1 A side view of the three-dimensional photonic chip architecture provided in Example 1;
[0034] Figure 1-1 This is a schematic diagram of the multi-layer holographic plate stacking structure in the DNNs structure of Example 1;
[0035] Figure 1-2 This refers to the DNN structure integrated in Example 1;
[0036] Figure 2 A side view of the three-dimensional photonic chip architecture provided in Example 2;
[0037] Figure 2-1 This is a schematic diagram of the structure after integrating the DNNs structure with the addressable VCSEL array in Example 2;
[0038] Figure 3 A side view of the three-dimensional photonic chip architecture provided in Example 3;
[0039] Figure 3-1 This is a schematic diagram of the VCSEL array for backlight emission in Example 3;
[0040] The components include: 1. Addressable VCSEL array; 2. DNNs structure; 3. Detector array; 4. Metal bonding point; 5. Light emission aperture; 6. Support column;
[0041] In the diagram, A—holographic version 1, B—holographic version 2, C—holographic version 3, and D—holographic version n. Detailed Implementation
[0042] To make the objectives, technical solutions, and advantages of this invention clearer, the invention will be further described in detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative and not intended to limit the invention. All other embodiments obtained by those skilled in the art based on the embodiments of this invention without inventive effort are within the scope of protection of this invention.
[0043] To achieve the above objectives, the technical solution adopted by the present invention is as follows:
[0044] This invention provides a three-dimensional photonic chip architecture based on a VCSEL array, comprising:
[0045] A data input layer is used to generate two-dimensional optical data and input the optical data into the data processing layer; the data input layer is an addressable VCSEL array.
[0046] A data processing layer is used to perform calculations on the optical data input from the data input layer;
[0047] The data output layer is used to collect and output the calculation results of the data processing layer;
[0048] The data input layer, data processing layer, and data output layer are vertically stacked to form the three-dimensional photonic chip architecture.
[0049] VCSEL is a type of semiconductor laser. Currently, commonly used infrared VCSELs are generally obtained by epitaxially growing the VCSEL structure onto GaAs wafers using epitaxial technology. The light emitted by a VCSEL exits perpendicular to the substrate surface, making it easy to realize two-dimensional arrays. Furthermore, the VCSEL array can be addressed and manipulated using independent electrodes, allowing any number and position of cells in the VCSEL array to be lit, thereby generating two-dimensional optical pattern data.
[0050] The addressable VCSEL array in this application has two functions. First, it serves as a data input layer to input data into the data processing layer, converting the input electrical signals into optical signals. The addressable VCSEL array can function similarly to a display screen, generating optical data of arbitrary content, which is then input into the DNN structure for computation. Second, the way the addressable VCSEL array emits lasers perpendicular to the substrate gives it the advantage of a flat surface. Specifically, all the light-emitting surfaces of all the units in the addressable VCSEL array are on a single plane, resulting in minimal surface undulation. Since the three-dimensional photonic chip architecture of this application is stacked, this makes the stacking between the data processing layer and the data input layer more compact and stable.
[0051] Furthermore, addressable VCSEL arrays can generate two-dimensional optical signals suitable for DNN structure processing. They are not only the easiest lasers to implement into arrays, but VCSELs also have the advantage of small size. The volume of a VCSEL array is only on the micrometer or millimeter scale, which meets the requirements of small chip size.
[0052] In some implementations, the addressable VCSEL array includes a front-emitting VCSEL array or a rear-emitting VCSEL array.
[0053] Furthermore, the addressable VCSEL array includes single-mode or multi-mode.
[0054] Furthermore, the addressable VCSEL array includes a VCSEL array with normal modulation bandwidth or a high-speed VCSEL array.
[0055] In some implementations, the addressable VCSEL array is controlled by a manual control power supply, an external programmable control power supply, or a CMOS chip.
[0056] Specifically, CMOS chip control refers to using CMOS integrated circuit chips to integrate the electrodes of addressable VCSEL arrays together through bonding, thereby controlling the addressable VCSEL arrays through the CMOS chip.
[0057] In some implementations, the data processing layer is a DNN structure integrated on the addressable VCSEL array.
[0058] This application integrates a DNN structure as a data processing layer onto the addressable VCSEL array. The optical image data generated by the addressable VCSEL array is directly irradiated into the DNN structure, eliminating the need for wires and connecting lines in electronic devices, as well as the need for optical waveguide structures on silicon photonic chips, to achieve the transmission and processing of optical data.
[0059] In some implementations, the DNNs structure is integrated onto the addressable VCSEL array by 3D printing or bonding.
[0060] Furthermore, the 3D printing involves printing DNNs structures on the VCSEL array and supporting the DNNs structures by printing support pillars; the bonding involves setting adhesive points between the VCSEL array and the DNNs structures and integrating them by applying pressure.
[0061] In some implementations, the DNNs structure is fabricated using 3D printing or microelectronic processes.
[0062] Since DNNs structures are themselves composed of multiple holographic plates stacked and cascaded, for 3D printed DNNs structures, multiple layers can be printed directly. In the process of printing multiple layers, at least three pillars need to be printed on the addressable VCSEL array to support the DNNs structure. However, for DNNs structures implemented by microelectronic processes, multiple holographic plates need to be integrated together by bonding.
[0063] Furthermore, when the DNNs structure is manufactured by 3D printing, the addressable VCSEL array is used as a substrate to complete the fabrication of the DNNs structure and the integration of the two. When the DNNs structure is manufactured by microelectronics process, it includes first processing the DNNs structure on other substrates, and then bonding the DNNs structure to the addressable VCSEL array. The bonding method includes, but is not limited to, adding adhesive points such as metal materials between the DNNs structure and the VCSEL array, and then pressing the two together under high pressure and specific temperature to achieve integration. The adhesive points are located in the peripheral area of the VCSEL array and will not block the transmission of light signals emitted by the VCSEL to the DNNs structure.
[0064] In some embodiments, the materials used to prepare the DNNs structure include at least one of organic materials, rigid transparent materials, photochromic materials, and phase change materials.
[0065] Furthermore, the organic material includes transparent photosensitive resin materials, including but not limited to photoresist, which are materials used to fabricate DNN structures using 3D printing.
[0066] Furthermore, hard transparent materials include, but are not limited to, one of quartz and sapphire, which are materials used in microelectronic processes to fabricate DNNs structures. Transparency refers to the fact that the material has a certain transmittance to the light emitted by VCSELs. Chips made using this type of material also have relatively excellent long-term stability.
[0067] Furthermore, photochromic materials are materials whose transmittance can be adjusted by light, and their characteristic is that this transmittance modulation can be recovered. Therefore, this property can be used to realize reconfigurable direct-access neural networks (DNNs). For organic materials and rigid transparent materials, once a DNN is manufactured, it can only perform its designed specific computational functions. However, for photochromic materials, the function of the DNN can be reset; that is, when the transmittance of the photochromic material returns to its initial state, the transmittance can be readjusted to realize a new DNN with new functions.
[0068] Furthermore, the phase change material can also achieve reconfigurable DNN functionality.
[0069] In some embodiments, the DNNs structure further includes spiking DNNs constructed from VCSEL arrays, wherein the spiking DNNs consist of multiple diffraction layers, each of which is a VCSEL array, and each VCSEL array serves as a spiking neuron in the DNNs.
[0070] In some implementations, the data output layer is a detector array or a conventional optical screen.
[0071] Preferably, the data output layer is a detector array. The function of the detector array is to collect the operation results of DNNs and to convert optical data into electrical signals for output as a data output port.
[0072] For a regular optical screen as the data output layer, the results of DNN structure operations can be directly presented on the screen in the form of light intensity distribution. For example, when a DNN structure performs a task to recognize four handwritten digits from 0 to 3, the task is to distinguish different handwritten digits. After the DNN structure operates, it outputs four light spots. When the input is the digit 0, the first light spot is the brightest. When the input is the digit 3, the fourth light spot is the brightest. The operation results can be read from the display results of the regular optical screen.
[0073] Furthermore, the detector array is integrated onto the data processing layer via bonding. Specifically, bonding points are set on the DNN structure, and these bonding points are located in the peripheral area of the optical signal transmission area, so as not to block the optical signal from being transmitted from the DNN structure to the detector array.
[0074] Another aspect of the present invention provides an application of a three-dimensional photonic chip architecture based on a VCSEL array for use in face recognition, optical computing, image classification, 6G communication, optical encryption, and autonomous driving.
[0075] This invention also provides a method for calculating DNN structures based on VCSEL arrays, comprising the following steps:
[0076] Constructing the output light field of VCSEL array light in DNNs;
[0077] Calculate the amplitude distribution of the output light field;
[0078] The DNN structure is obtained by iteratively using the backpropagation algorithm and gradient descent method.
[0079] In some implementations, calculating the amplitude distribution of the output light field includes: calculating the output light field of each unit in the VCSEL array after passing through DNNs on the output plane, and then superimposing the absolute values of the amplitudes of the output light fields of all units in the VCSEL array to obtain the amplitude distribution of the superimposed output light field.
[0080] Based on the special characteristics of VCSEL array light sources, this application proposes a structural calculation method for DNNs. This method solves the problem that existing DNNs structural design algorithms cannot match the incoherent light sources emitted between VCSEL units, enabling the method to be used for the structural design of DNNs with VCSEL arrays as light sources.
[0081] Example 1
[0082] A three-dimensional photonic chip architecture based on a VCSEL array includes:
[0083] A data input layer is used to generate two-dimensional optical data and input the optical data into the data processing layer; the data input layer is an addressable VCSEL array.
[0084] A data processing layer is used to perform calculations on the optical data input from the data input layer;
[0085] The data output layer is used to collect and output the calculation results of the data processing layer;
[0086] The data input layer, data processing layer, and data output layer are vertically stacked from bottom to top to form the three-dimensional photonic chip architecture. (See below) Figure 1 This is a side view of the three-dimensional photonic chip architecture provided in this embodiment.
[0087] In this embodiment, the data processing layer is a DNN structure 2, which is integrated through microelectronic fabrication. The DNN structure 2 is made of quartz material. Specifically, multiple layers of quartz holographic plates (A, B, C, D, i.e., holographic plate 1, holographic plate 2, holographic plate 3, and holographic plate n) are first arranged as follows: Figure 1-1 As shown, an integrated DNN structure is obtained by bonding under high pressure. Figure 1-2As shown, the integrated DNNs structure 2 and the addressable VCSEL array 1 are then integrated by setting a metal bonding point 4 between them. The metal bonding point 4 is located in the outer region of the VCSEL array and will not block the data transmission between the addressable VCSEL array 1 and the DNNs structure 2. The data output layer is the detector array 3, which is bonded by setting a metal bonding point 4 between the DNNs structure 2 and the detector array 3. The metal bonding point 4 is located in the outer region of the optical signal transmission and will not block the optical signal from the DNNs structure 2 to the detector array 3.
[0088] This application uses an addressable VCSEL array 1. VCSELs, as active devices, can generate lasers. The addressable VCSEL array 1 is a light source array consisting of multiple VCSELs arranged in a two-dimensional plane. By controlling the brightness of the VCSELs, two-dimensional optical image data can be generated. The addressable VCSEL array 1 is provided with a light-emitting aperture 5. The optical image data generated by the addressable VCSEL array 1 is directly irradiated into the DNNs structure 2 through the light-emitting aperture 5, where it propagates and completes the computational processing. Then, an optical signal with the computational result is output. This optical signal irradiates the detector array 3 and is represented by different light intensity distributions. The light irradiates different areas of the detector array, and the light intensity distribution represents the computational result of the data. The detector array 3 converts the optical signal into an electrical signal and outputs the computational result.
[0089] Addressable VCSEL arrays are VCSEL arrays that emit light from the front.
[0090] Furthermore, the addressable VCSEL array is single-mode or multi-mode, and the addressable VCSEL array includes VCSEL arrays with ordinary modulation bandwidth or high-speed VCSEL arrays.
[0091] In this embodiment, there are no restrictions on the operation method of the addressable VCSEL array, including manual power control, external programmable power control, and CMOS chip control.
[0092] The three-dimensional photonic chip architecture provided in this embodiment can be applied to the fields of face recognition, optical computing, image classification, 6G communication, optical encryption, and autonomous driving. For example, in a face recognition system, it can more quickly and accurately identify face information in a larger database to complete identity verification.
[0093] The three-dimensional photonic chip architecture of this embodiment can directly integrate the entire working optical path of DNNs on a single chip, reducing its size from centimeter or meter level to millimeter or micrometer level, greatly promoting the practical application of DNNs. Furthermore, utilizing the high modulation rate (GHz) of the VCSEL array, the data input rate of this chip will be 10 times that of existing DNNs (kHz). 6 With a speed of more than double, the chip can process more data in a short time; and based on the characteristics of passive light propagation, the chip consumes zero energy during operation, only consuming energy during data input and readout, which will be far lower than existing electronic chips, thus solving the energy problem faced by AI computing.
[0094] Example 2
[0095] A three-dimensional photonic chip architecture based on a VCSEL array includes:
[0096] A data input layer is used to generate two-dimensional optical data and input the optical data into the data processing layer; the data input layer is an addressable VCSEL array.
[0097] A data processing layer is used to perform calculations on the optical data input from the data input layer;
[0098] The data output layer is used to collect and output the calculation results of the data processing layer;
[0099] The data input layer, data processing layer, and data output layer are vertically stacked from bottom to top to form the three-dimensional photonic chip architecture. (See below) Figure 2 This is a side view of the three-dimensional photonic chip architecture provided in this embodiment.
[0100] In this embodiment, the data processing layer is a DNN structure 2, which is integrated via 3D printing. The DNN structure 2 is fabricated using photoresist. Specifically, multiple holographic plates, including A, B, D (holographic plate 1, holographic plate 2... holographic plate n (n > 2), are directly printed on an addressable VCSEL. Figure 2-1 As shown, by printing three support pillars 6 on the addressable VCSEL array 1, the DNNs structure is supported, and an integrated DNNs structure 2 is obtained. The support pillars 6 are located in the outer region of the VCSEL array and will not obstruct the data transmission between the addressable VCSEL array 1 and the DNNs structure 2. The data output layer is the detector array 3, which is bonded by setting metal bonding points 4 between the DNNs structure 2 and the detector array 3. The metal bonding points 4 are located in the outer region of the optical signal transmission and will not obstruct the optical signal from the DNNs structure 2 to the detector array 3.
[0101] This application uses an addressable VCSEL array 1. VCSELs, as active devices, can generate lasers. The addressable VCSEL array 1 is a light source array consisting of multiple VCSELs arranged in a two-dimensional plane. By controlling the brightness of the VCSELs, two-dimensional optical image data can be generated. The addressable VCSEL array 1 is provided with a light-emitting aperture 5. The optical image data generated by the addressable VCSEL array 1 is directly irradiated into the DNNs structure 2 through the light-emitting aperture 5, where it propagates and completes the computational processing. Then, an optical signal with the computational result is output. This optical signal irradiates the detector array 3 and is represented by different light intensity distributions. The light irradiates different areas of the detector array, and the light intensity distribution represents the computational result of the data. The detector array 3 converts the optical signal into an electrical signal and outputs the computational result.
[0102] Addressable VCSEL arrays are VCSEL arrays that emit light from the front.
[0103] Furthermore, the addressable VCSEL array is single-mode or multi-mode, and the addressable VCSEL array includes VCSEL arrays with ordinary modulation bandwidth or high-speed VCSEL arrays.
[0104] In this embodiment, there are no restrictions on the operation method of the addressable VCSEL array, including manual power control, external programmable power control, and CMOS chip control.
[0105] The three-dimensional photonic chip architecture provided in this embodiment can be applied to face recognition, optical computing, image classification, 6G communication, optical encryption, and autonomous driving.
[0106] The three-dimensional photonic chip architecture of this embodiment can directly integrate the entire working optical path of DNNs on a single chip, reducing its size from centimeter or meter level to millimeter or micrometer level, greatly promoting the practical application of DNNs. Furthermore, utilizing the high modulation rate (GHz) of the VCSEL array, the data input rate of this chip will be 10 times that of existing DNNs (kHz). 6 With a speed of more than double, the chip can process more data in a short time; and based on the characteristics of passive light propagation, the chip consumes zero energy during operation, only consuming energy during data input and readout, which will be far lower than existing electronic chips, thus solving the energy problem faced by AI computing.
[0107] Example 3
[0108] A three-dimensional photonic chip architecture based on a VCSEL array includes:
[0109] A data input layer is used to generate two-dimensional optical data and input the optical data into the data processing layer; the data input layer is an addressable VCSEL array.
[0110] A data processing layer is used to perform calculations on the optical data input from the data input layer;
[0111] The data output layer is used to collect and output the calculation results of the data processing layer;
[0112] The data input layer, data processing layer, and data output layer are vertically stacked from bottom to top to form the three-dimensional photonic chip architecture. (See below) Figure 3 This is a side view of the three-dimensional photonic chip architecture provided in this embodiment.
[0113] In this embodiment, the data processing layer is a DNNs structure 2, which is integrated through microelectronic processing. The DNNs structure 2 is made of photochromic material. Specifically, a multilayer photochromic material hologram is first bonded under high voltage to obtain the integrated DNNs structure 2. Then, a metal bonding point 4 is set between the integrated DNNs structure 2 and the addressable VCSEL array 1 to integrate the two. The metal bonding point 4 is located in the peripheral area of the VCSEL array and will not block the data transmission between the addressable VCSEL array 1 and the DNNs structure 2. The data output layer is a detector array 3, which is bonded between the DNNs structure 2 and the detector array 3 by setting a metal bonding point 4. The metal bonding point 4 is located in the peripheral area of the optical signal transmission and will not block the optical signal from the DNNs structure 2 to the detector array 3.
[0114] This application uses an addressable VCSEL array 1. VCSELs, as active devices, can generate lasers. The addressable VCSEL array 1 is a light source array consisting of multiple VCSELs arranged in a two-dimensional plane. By controlling the brightness of the VCSELs, two-dimensional optical image data can be generated. The addressable VCSEL array 1 is provided with a light-emitting aperture 5. The optical image data generated by the addressable VCSEL array 1 is directly irradiated into the DNNs structure 2 through the light-emitting aperture 5, where it propagates and completes the computational processing. Then, an optical signal with the computational result is output. This optical signal irradiates the detector array 3 and is represented by different light intensity distributions. The light irradiates different areas of the detector array, and the light intensity distribution represents the computational result of the data. The detector array 3 converts the optical signal into an electrical signal and outputs the computational result.
[0115] Addressable VCSEL arrays are VCSEL arrays with back-emitting light, such as... Figure 3-1As shown, this specifically refers to light passing through the substrate of the VCSEL and emitting from the other side. Using this structure, the excellent flatness of the back side of the VCSEL makes it easier to integrate with DNN structures.
[0116] Furthermore, the addressable VCSEL array is single-mode or multi-mode, and the addressable VCSEL array includes VCSEL arrays with ordinary modulation bandwidth or high-speed VCSEL arrays.
[0117] In this embodiment, there are no restrictions on the operation method of the addressable VCSEL array, including manual power control, external programmable power control, and CMOS chip control.
[0118] The three-dimensional photonic chip architecture provided in this embodiment can be applied to face recognition, optical computing, image classification, 6G communication, optical encryption, and autonomous driving.
[0119] The three-dimensional photonic chip architecture of this embodiment can directly integrate the entire working optical path of DNNs on a single chip, reducing its size from centimeter or meter level to millimeter or micrometer level, greatly promoting the practical application of DNNs. Furthermore, utilizing the high modulation rate (GHz) of the VCSEL array, the data input rate of this chip will be 10 times that of existing DNNs (kHz). 6 With a speed of more than double, the chip can process more data in a short time; and based on the characteristics of passive light propagation, the chip consumes zero energy during operation, only consuming energy during data input and readout, which will be far lower than existing electronic chips, thus solving the energy problem faced by AI computing.
[0120] Example 4
[0121] A method for calculating DNN structures based on VCSEL arrays includes the following steps:
[0122] S1. Construct the propagation process and output light field of VCSEL array light in DNNs;
[0123] S2. Calculate the amplitude distribution of the output light field: Calculate the output light field of each unit in the VCSEL array after passing through DNNs on the output plane, and then superimpose the absolute values of the amplitudes of the output light fields of all units in the VCSEL array to obtain the amplitude distribution of the superimposed output light field.
[0124] S3. The DNN structure is obtained by iteratively using the backpropagation algorithm and gradient descent method.
[0125] Based on the special characteristics of VCSEL array light sources, this embodiment proposes a DNNs structure calculation method. This method solves the problem that existing DNNs structure design algorithms cannot match the incoherent light sources emitted between VCSEL units, making the method applicable to the structure design of DNNs using VCSEL arrays as light sources.
[0126] The above are merely preferred embodiments of the present invention and do not limit the patent scope of the present invention. Any equivalent modifications made based on the content of the present invention's specification and drawings, or direct or indirect applications in other related technical fields, are similarly included within the patent protection scope of the present invention.
Claims
1. A three-dimensional photonic chip architecture based on a VCSEL array, characterized in that, include: The data input layer is used to generate two-dimensional optical data and input the optical data into the data processing layer; The data input layer is an addressable VCSEL array; A data processing layer is used to perform calculations on the optical data input from the data input layer; The data output layer is used to collect and output the calculation results of the data processing layer; The data input layer, data processing layer, and data output layer are stacked sequentially to form the three-dimensional photonic chip architecture. The data processing layer is a DNN structure, which is integrated on the addressable VCSEL array.
2. The three-dimensional photonic chip architecture based on a VCSEL array according to claim 1, characterized in that, The addressable VCSEL array includes a VCSEL array with front-emitting light or a VCSEL array with rear-emitting light.
3. The three-dimensional photonic chip architecture based on a VCSEL array according to claim 1, characterized in that, The addressable VCSEL array is controlled by a manual power supply, an external programmable power supply, or a CMOS chip.
4. The three-dimensional photonic chip architecture based on a VCSEL array according to claim 1, characterized in that, The DNNs structure is integrated onto the addressable VCSEL array via 3D printing or bonding.
5. A three-dimensional photonic chip architecture based on a VCSEL array according to claim 4, characterized in that, The 3D printing process involves printing DNNs structures on the VCSEL array and supporting the DNNs structures by printing support columns.
6. A three-dimensional photonic chip architecture based on a VCSEL array according to claim 4, characterized in that, The bonding process involves setting adhesive points between the VCSEL array and the DNNs structure and integrating them by applying pressure.
7. A three-dimensional photonic chip architecture based on a VCSEL array according to claim 1, characterized in that, The DNNs structure is manufactured using 3D printing or microelectronic processes.
8. A three-dimensional photonic chip architecture based on a VCSEL array according to claim 1, characterized in that, The materials used to prepare the DNNs structure include at least one of organic materials, hard transparent materials, photochromic materials, and phase change materials.
9. A three-dimensional photonic chip architecture based on a VCSEL array according to claim 8, characterized in that, The DNNs structure also includes spiking DNNs constructed from VCSEL arrays. The spiking DNNs consist of multiple diffraction layers, each of which is a VCSEL array, and each VCSEL array serves as a spiking neuron in the DNNs.
10. A three-dimensional photonic chip architecture based on a VCSEL array according to claim 1, characterized in that, The data output layer is a detector array or a regular optical screen.
11. A three-dimensional photonic chip architecture based on a VCSEL array according to claim 10, characterized in that, The detector array is bonded and integrated onto the data processing layer.
12. An application of the three-dimensional photonic chip architecture based on a VCSEL array according to any one of claims 1-11, characterized in that, Applications include facial recognition, optical computing, image classification, 6G communication, optical encryption, and autonomous driving.
13. A method for calculating the structure of DNNs based on VCSEL arrays, characterized in that, Includes the following steps: Constructing the output light field of VCSEL array light in DNNs; Calculate the amplitude distribution of the output light field; The DNNs structure is obtained by iteratively using the backpropagation algorithm and gradient descent method, and the DNNs structure is the DNNs structure described in any one of claims 1-11.
14. The method for calculating DNN structures based on VCSEL arrays according to claim 13, characterized in that, The calculation of the amplitude distribution of the output light field includes: calculating the output light field of each unit in the VCSEL array after passing through DNNs on the output plane, and then superimposing the absolute values of the amplitudes of the output light fields of all units in the VCSEL array to obtain the amplitude distribution of the superimposed output light field.
Citation Information
Patent Citations
Methods and apparatus for training optical deep diffractive neural networks
WO2020113240A2