IGBT driver chip protection circuit and driver circuit

Abstract

The present invention discloses an IGBT driver chip protection circuit and a driver circuit, comprising: an ACPL‑330J chip; a protection circuit connected to pins 13, 14, and 16 of the ACPL‑330J chip, comprising a decoupling capacitor group for providing a stable power supply for the chip, a first diode for preventing the forward bias of the body diode in the driver chip, and a short-circuit fault external detection circuit for detecting external circuit faults. A reverse recovery module is used for rapid reverse recovery, thereby realizing a protection function for the driver chip. When a voltage value higher than a preset voltage threshold is detected, an internal fault feedback channel is triggered, the circuit is cut off, and then automatic reset is achieved through the chip's self-reset function. The present invention utilizes the functions of the ACPL‑330J chip to realize the protection and self-recovery functions of the IGBT circuit, improve the stability of the circuit, and adopts a driver circuit to drive the normal operation of the IGBT module. The present invention uses the ACPL‑330J chip to realize real-time short-circuit protection and monitoring of the IGBT.

Description

Technical Field

[0001] The present invention relates to the field of power electronics, and in particular to a protection circuit and a driving circuit of a driving chip. Background Art

[0002] In power electronic devices, IGBT is the main power switching device. The reliability of its operation (including driving and protection) will directly affect the reliability of the entire device. Therefore, many different driving circuits have appeared in the IGBT driving industry.

[0003] Currently, the driver protection circuits of most IGBT modules are composed of TOSHIBA's IGBT driver optocoupler TLP350 / HCPL-3120 plus some peripheral circuits. Existing IGBT modules do not have protection circuits. If an IGBT short circuits, the circuit will be directly damaged, requiring the replacement of a new IGBT module and its driver circuit. In addition, the module has poor anti-interference capabilities.

[0004] From the above, it can be seen that how to provide a protection function in the driver chip is a problem that needs to be solved. Summary of the Invention

[0005] The purpose of the present invention is to provide an IGBT driver chip protection circuit and a driver circuit to solve the problem in the prior art that the driver chip lacks a protection circuit, resulting in circuit burnout.

[0006] To solve the above technical problems, the present invention provides an IGBT driver chip protection circuit, wherein the driver chip is an ACPL-330J chip, and the protection circuit comprises:

[0007] a decoupling capacitor group, comprising a first decoupling capacitor and a second decoupling capacitor, wherein one end of the first decoupling capacitor is connected to pin 16 of the driver chip, and the other end is connected to pin 12 of the driver chip; one end of the second decoupling capacitor is connected to pin 16 of the driver chip and one end of the first decoupling capacitor, and the other end is connected to pin 13 of the driver chip;

[0008] A first diode is used to protect the pin 14 of the driver chip from being burned by negative voltage, with its positive electrode connected to the zero potential reference point and the pin 16 of the driver chip, and its negative electrode connected to the pin 14 of the driver chip;

[0009] A first current limiting resistor is connected to pin 14 of the driver chip;

[0010] The short-circuit fault external detection circuit is composed of an overcurrent resistor and a blanking capacitor connected between pin 13 of the driver chip and pin 16 of the driver chip. One end of the blanking capacitor is connected to pin 16 of the driver chip, and the other end is connected to pin 14 of the driver chip. One end of the overcurrent resistor is connected to the first current limiting resistor, and the other end is connected to pin 13 of the driver chip. The short-circuit fault external detection circuit is used to blank and filter the DESATS signal after the short circuit, and at the same time determine the internal blanking time of the DESATS short-circuit detection;

[0011] a second diode, the anode of which is connected to the common terminal of the current limiting resistor and the positive power supply used to charge the blanking capacitor;

[0012] The reverse recovery module comprises two diodes connected in series, the input end of the reverse recovery module is connected to the cathode of the second diode, and the output end is connected to the collector of the IGBT module.

[0013] Preferably, it also includes:

[0014] The peripheral charging circuit includes: a charging output port, the current limiting resistor and the overcurrent resistor. The output charging port is connected to the pin 13 of the driver chip, and the current limiting resistor and the overcurrent resistor are also connected in series.

[0015] Preferably, it also includes:

[0016] A third diode, the anode of the third diode is connected to the cathode of the second diode, and the cathode is connected to pin 13 of the driver chip, for preventing the overvoltage of the blanking capacitor from being charged and damaging the driver chip when the reverse recovery module quickly shuts down the reverse recovery.

[0017] Preferably, it also includes:

[0018] A third decoupling capacitor, one end of which is connected to the cathode of the third diode, and the anode of which is connected to the driver chip pin 12 .

[0019] The present invention also provides a driving circuit, comprising:

[0020] Driver chip, the driver chip is ACPL-330J chip;

[0021] A primary fault output signal circuit is used to detect whether there is a fault in the circuit, and the circuit is connected to pins 1-4 of the driver chip;

[0022] The primary PWM input circuit is used to prevent the upper and lower bridges from being turned on simultaneously due to disordered or interference in the driving signal. This circuit is connected to pins 5-8 of the driver chip.

[0023] A secondary output circuit, used to output a drive signal to drive the IGBT, and connected to pins 9-13 of the driver chip;

[0024] And the IGBT driver chip protection circuit described in any one of the above items.

[0025] Preferably, the primary side fault output signal circuit includes:

[0026] A second current-limiting resistor, one end of which is connected to the VUO port, and the other end is connected to pin 1 and pin 4 of the driver chip respectively, to prevent the subsequent stage from short-circuiting and burning the chip or the optocoupler;

[0027] A pull-down resistor, one end of which is connected to the second current-limiting resistor and the VUO port respectively, and the other end of which is grounded, for ensuring that the port does not mistakenly output a fault level to the main control chip when there is no fault;

[0028] A filter capacitor, one end of which is respectively connected to the second current limiting resistor, the pull-down resistor and the VUO port, and the other end of which is grounded, is used to filter the signal.

[0029] Preferably, the primary PWM input circuit includes:

[0030] A protection resistor, one end of which is connected to pins 6 and 7 of the driver chip, and the other end of which is connected to pins 5 and 8 of the driver chip, to prevent electrostatic damage and erroneous switching of the optocoupler;

[0031] Chip capacitors, one end of which is connected to pins 6 and 7 of the driver chip, and the other end of which is connected to pins 5 and 8 of the driver chip, for reducing delay time and filtering high-frequency noise;

[0032] a first resistor, one end of which is connected to the drive signal PU+, and the other end of which is connected to pins 6 and 7 of the driver chip;

[0033] A second resistor, one end of the second resistor is connected to the driving signal PU-, and the other end of the second resistor is connected to pins 5 and 8 of the driving chip.

[0034] Preferably, the secondary side output circuit includes a push-pull circuit, and the push-pull circuit includes:

[0035] a third resistor, the third resistor being connected in series between pins 11 and 9 of the driver chip;

[0036] A base drive resistor, one end of which is connected to pin 11 of the driver chip;

[0037] A filter capacitor, one end of which is connected to the base drive resistor and the other end is connected to the negative power supply port for filtering;

[0038] an NPN transistor, wherein the base of the NPN transistor is connected to the other end of the base drive resistor, and the collector of the transistor is connected to the pin 13;

[0039] A PNP transistor, wherein the base of the PNP transistor is connected to the other end of the base drive resistor, the emitter of the PNP transistor is connected to the emitter of the NPN transistor, and the collector of the PNP transistor is connected to the negative power supply port.

[0040] Preferably, the secondary output circuit further includes an IGBT drive circuit, and the IGBT drive circuit includes:

[0041] a driving resistor, one end of the driving resistor being connected to the emitter of the NPN transistor and the other end being connected to the output port;

[0042] A bidirectional transient suppression TVS tube, one end of which is connected to the output port, and the other end of which is connected to the VE-U port, for ensuring that the IGBT gate voltage is within a normal range;

[0043] A gate discharge resistor, one end of which is connected to the GU+ port, and the other end of which is connected to the VE-U port, for releasing gate charge to prevent the IGBT from mis-turning on and electrostatic damage;

[0044] A gate absorption capacitor, one end of which is connected to the GU+ port, and the other end of which is connected to the VE-U port, is used to reduce the switching hardness of the IGBT and absorb high-frequency noise of the gate.

[0045] The present invention further provides a drive motor, which adopts any one of the drive circuits described above.

[0046] The present invention provides a drive protection circuit that uses an ACPL-330J chip to act on an IGBT module and employs a fault output signal circuit to protect the chip or optocoupler from burnout. Pin 14 of the ACPL-330J driver chip is connected to the protection circuit. When the IGBT is on, the circuit constantly detects whether the voltage is above a preset value. When the voltage is high, the fault feedback channel within the ACPL-330J chip is triggered, turning on the internal optocoupler, energizing Fault and VS. The UFO voltage rises to a high level, which is transmitted to the control board and blocks other PWM outputs. 26 microseconds after the fault occurs, the optocoupler automatically resets from the fault state. The ACPL-330J chip utilizes its functionality to drive and protect the IGBT module, providing a self-recovery function and improving the circuit's stability and anti-interference capabilities. The driver circuit drives the IGBT module for normal operation. The present invention utilizes the ACPL-330J chip to not only detect IGBT short circuits and protect against direct short circuits in the same IGBT bridge arm, but also drive the IGBT, achieving a multifunctional, integrated design. BRIEF DESCRIPTION OF THE DRAWINGS

[0047] In order to more clearly illustrate the embodiments of the present invention or the technical solutions of the prior art, the following briefly introduces the drawings required for use in the embodiments or the description of the prior art. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative work.

[0048] Figure 1 A circuit diagram of a driving circuit provided by the present invention;

[0049] Figure 2 This is an equivalent circuit diagram of the protection circuit provided by the present invention. DETAILED DESCRIPTION

[0050] The core of the present invention is to provide an IGBT driver chip protection circuit and a driver circuit. The driver circuit can not only drive the IGBT but also has a circuit protection function, thereby making the IGBT module more reliable.

[0051] In order to enable those skilled in the art to better understand the present invention, the present invention is further described in detail below with reference to the accompanying drawings and specific embodiments. Obviously, the embodiments described are only some embodiments of the present invention, not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative work are within the scope of protection of the present invention.

[0052] Please refer to Figure 1 , Figure 1This is a circuit diagram of a driving circuit provided by the present invention. Figure 1 As shown, the driving circuit includes: a fault output signal circuit, a PWM input circuit, a driving circuit, and a protection circuit.

[0053] The protection circuit includes:

[0054] A blanking capacitor C7, wherein both ends of the blanking capacitor C7 are electrically connected to pin 14 and pin 16 of the ACPL-330J chip respectively;

[0055] A diode D1, wherein the cathode of the diode D1 is connected to pin 14 of the ACPL-330J chip, and the anode of the diode D1 is connected to pin 16 of the ACPL-330J chip;

[0056] Resistor R6, one end of which is connected to pin 14 of the ACPL-330J chip;

[0057] Resistor R7, one end of which is connected to the resistor R6, and the other end of which is connected to pin 13 of the ACPL-330J chip;

[0058] a diode D2, wherein the anode of the diode D2 is connected to the resistor R6;

[0059] A diode D3, wherein the anode of the diode D3 is connected to the cathode of the diode D2, and the cathode of the diode D3 is connected to pin 13 of the ACPL-330J driver chip;

[0060] a diode D4, wherein the anode of the diode D4 is connected to the cathode of the diode D2 and the anode of the diode D3 respectively;

[0061] A diode D5 , wherein the anode of the diode D5 is connected to the cathode of the diode D4 , and the cathode of the diode D5 is connected to the DC+ port.

[0062] The selection of D4 and D5 mainly considers their fast recovery performance and reverse withstand voltage. Here, two BYV26EGP1A / 1000V are selected in series. Their reverse recovery time is 75nS, which is very small compared to the microsecond level and can be ignored. It meets the requirements of fast response protection. Its on-state voltage drop is 0.6V and the power consumption is low. The selection of D2 mainly considers the timeliness of IGBT protection. Here, BAV70LT1G is selected with a on-state voltage drop of 0.8V and a reverse recovery time of 6nS. When the collector-emitter voltage Vce of the IGBT exceeds 4.5V, the voltage on the optocoupler fault detection pin 14 is:

[0063] V DESAT =V ce +V FD4 +V FD5 +V FD2≥4.5+0.6+0.6+0.8=6.5V;

[0064] Among them, V ce is the IGBT saturation conduction voltage drop, V FD4 is the forward voltage drop VF of the ultrafast recovery diode in the Desat short-circuit detection circuit, V FD5 is the forward voltage drop VF of the ultrafast recovery diode in the Desat short-circuit detection circuit, V FD2 is the forward conduction voltage drop of the second diode.

[0065] The internal fault feedback channel works to output a fault signal; D1 is used to prevent the optocoupler's body diode from being forward biased (the Desat pin cannot accept negative voltage), and BAV70LT1G is selected;

[0066] R6 is a current-limiting resistor that protects the optocoupler. It is generally selected from 100Ω to 2K. The smaller the resistance, the faster the response speed. To ensure the response speed, R6 is set to 150Ω. R7 and C7 constitute the external detection circuit for IGBT short-circuit faults. The fault detection circuit must ensure that DESAT detection is invalid during the IGBT turn-on process to avoid false protection action at the moment of IGBT turn-on. The period during which DESAT is disabled is called blanking time. The blanking time calculation formula is:

[0067] t BLANK =C BLANK ×V DESAT / I CHG

[0068] Among them, I CHG is the output current of the internal constant current source, V DESAT Desat is the threshold voltage for short-circuit detection.

[0069] C BLANK That is C7. The chip data recommends selecting 100pf. Considering the improvement of the system's anti-interference ability, C7 is selected as 1000pf. In order to ensure the timeliness of short-circuit protection, the peripheral charging circuit VCC_U, R7, and R6 are added. When the IGBT changes from off to on, the charging current of C7 is composed of the constant current source Ichg=0.24mA inside the optocoupler and the charging current of VCC_U through R7 and R6.

[0070] Please refer to Figure 2 , Figure 2 The equivalent circuit is an RC circuit with dual power supply of voltage source and current source. When the switch is closed at t=0, according to KVL:

[0071] u R (t)+u C (t) = u S (t) (t≥0)

[0072] because

[0073] u R (t) = Ri R (t), and

[0074] Therefore

[0075]

[0076] Right now

[0077]

[0078] Solving the differential equation, we can get the circuit u c (t) The step response under zero energy storage state is

[0079]

[0080] Then there is

[0081]

[0082] where u s =VCC_U=17v,i s =i chg =0.24mA, R=R7+R6=7.65K, C=1000pF, u c =V DESAT =6.5v, substituting into the above formula, we get t = 3.34us. The IGBT turn-on time of our products is less than 3us. The blanking time can avoid false protection at the moment of IGBT turn-on. Under normal operating conditions of the IGBT, the voltage drop of resistor R7 is:

[0083] VCC_U-V D2 -V D4 -V D5 =16-0.6-0.8-0.8-2=11.6V

[0084] Then its power consumption is:

[0085]

[0086] The actual value selected is 0.1w to meet the power consumption derating requirement. D3 is used to prevent the IGBT's rapidly rising C-pole overvoltage from charging the blanking capacitor C7 when D4 and D5 are quickly turned off and reverse recovered. The reverse recovery time of D4 and D5 is 75nS, and the reverse recovery current Irr = 0.25A. The third diode D3 is a 1A / 600V diode.

[0087] This function of ACPL-330J can effectively prevent the upper and lower bridge arms from being directly connected due to the coupling interference of the driving circuit during the operation of the IGBT, or from being directly connected due to the parasitic turn-on caused by the fast shutdown process, thereby preventing the IGBT module from being damaged.

[0088] The fault output signal circuit includes: a current limiting resistor R1, one end of the current limiting resistor R1 is connected to the VUO port, and the other end is respectively connected to the pin 1 and the pin 4 of the ACPL-330J driver chip, which is used to prevent the subsequent stage from short-circuiting and burning the chip or optocoupler.

[0089] A pull-down resistor R2, one end of which is connected to the current limiting resistor R1 and the VUO port respectively, and the other end of which is grounded, to ensure that the port does not mistakenly output a fault level to the main control chip when there is no fault.

[0090] A filter capacitor C1 , one end of which is connected to the current limiting resistor R1 , the pull-down resistor R2 and the VUO port, and the other end of which is grounded, is used to filter the signal.

[0091] R1 is a current-limiting resistor to prevent the subsequent stage from short-circuiting and burning the chip or optocoupler. It is generally selected as 100Ω; R2 is a pull-down resistor, generally selected from 2 to 10K. Considering the voltage divider effect in the circuit, 10K is selected here; C1 is a filter capacitor. 10n is selected here to filter out high-frequency noise above 159KHz.

[0092] The PWM input circuit includes:

[0093] A protective resistor R4, one end of which is connected to the pin 6 and the pin 7 of the ACPL-330J chip, and the other end of which is connected to the pin 5 and the pin 8, to prevent electrostatic damage and misconduction of the optocoupler;

[0094] A chip capacitor C2, one end of which is connected to the pin 6 and the pin 7 of the ACPL-330J chip, and the other end of which is connected to the pin 5 and the pin 8, for reducing delay time and filtering high-frequency noise;

[0095] Resistor R3, one end of the resistor R3 is connected to the drive signal PU+, and the other end of the resistor R3 is connected to the pin 6 and the pin 7;

[0096] Resistor R5, one end of the resistor R5 is connected to the drive signal PU-, and the other end of the resistor R3 is connected to the pin 5 and the pin 8;

[0097] R3 and R5 are selected, the driving signal PU+ is 0V and PU- is 5V. According to the datasheet, the conduction voltage drop of the optocoupler LED is 1.6V, and the conduction current of the optocoupler is 8~12mA. R3 and R5 are selected as 150Ω resistors. When the driving signal is high, the current flowing through the optocoupler is:

[0098]

[0099] The optocoupler can conduct reliably, and the power consumed by a single resistor is:

[0100] P = 1.7 × 1.7 / 150 = 0.019w

[0101] Select a 1 / 10W resistor and the power is derated by 19%, which meets the power derating requirement.

[0102] Selection of R4 and C2. R4 is a protective resistor to prevent electrostatic damage to the optocoupler. Generally, 2 to 10k is selected. Here, 5.1k is selected. C2 is a 470pF chip capacitor. The filter cutoff frequency of the optocoupler input is:

[0103]

[0104] The PWM input signal delay time t = 423nS (3RC), which is negligible compared to the PWM wave dead time of 3 to 5us. The selection of C2 can ensure a very small delay time and filter out a certain amount of high-frequency noise.

[0105] PU+ and PU- are PWM signals input by the control board. The forward voltage drop of the internal optocoupler is 1.6V, and its reverse voltage is required to be less than 5V. The PWM signal amplitude is 5V. The optocoupler can be driven in a differential manner and ensure reliable operation of the optocoupler. The differential input method can avoid the simultaneous conduction of the upper and lower bridges of the IGBT caused by disorder or interference in the driving signal.

[0106] The control logic ACPL-330J chip can control whether the primary side light-emitting diode inside the chip emits light or not, thereby controlling whether the secondary side of the driver chip outputs +15V / -9V to turn on or off the controlled object IGBT module.

[0107] The drive circuit includes a push-pull circuit and an IGBT drive circuit. The push-pull circuit includes:

[0108] The resistor R9 is connected in series between the pin 11 and the pin 9 .

[0109] A base driving resistor R8 has one end connected to the pin 11 and the other end connected to the base of the transistor Q1 .

[0110] A filter capacitor C9 , one end of which is connected to the base drive resistor 8 , and the other end of which is connected to VEE_U, is used for filtering.

[0111] NPN transistor Q1 , the base of the NPN transistor Q1 is connected to the other end of the base drive resistor R8 , and the collector is connected to the pin 13 .

[0112] A PNP transistor Q2 , wherein the base of the PNP transistor Q2 is connected to the other end of the base drive resistor R8 , the emitter of the PNP transistor Q2 is connected to the emitter of the NPN transistor Q1 , and the collector of the PNP transistor Q2 is connected to VEE_U.

[0113] The selection of Q1 and Q2 mainly considers the IGBT gate operating current. Taking FF450R12KT4 as an example, when the IGBT switches from off to on, its maximum inrush current is:

[0114] I GP =(+U GE +|-U GE |) / (R G +R g )=(15+10) / (1.9+5.1)=3.57A

[0115] Among them, +U GE Positive power supply for IGBT gate turn-on, -U GE The negative power supply for IGBT gate turn-off, R G is the gate drive resistance inside the IGBT module, R g External drive resistor configured for the drive circuit.

[0116] Since the gate drive resistors of each IGBT are different, to ensure sufficient derating, Q1 and Q2 use the 2SC5103 NPN transistor with a current of 5A and the 2SA1952 PNP transistor. The peak current that can flow through the transistor is 10A, and the derating is 35.7% under the maximum current condition. As the IGBT gate-emitter capacitance charges, the current becomes smaller and smaller, and the transistor can meet the current derating. The value of R8, the base drive resistor of the transistor, affects the switching speed and operating range of the transistor. According to the 2SC5103 (same as 2SA1952) datasheet, its amplification factor in the amplification region is about 130 times. In order for the transistor to operate in the saturation region at the peak current, the following conditions must be met:

[0117] I B >10 / 130=0.077A

[0118] Right now:

[0119] R B<10 / 0.077=143Ω,

[0120] Considering that selecting a resistance value that is too small will cause large EMI and voltage spikes, R8 is selected as 68Ω. The maximum surge current of the resistor is:

[0121] I P =25 / (68+10)=0.32A

[0122] Less than the optocoupler output current of 1.5A. When Q1 operates in the deep saturation region, its maximum average base current I = 38mA. The power consumed by R8 is:

[0123] P=I 2 R=0.038×0.038×68=0.098w

[0124] The selected resistor is 1 / 3W with a derating of 30%. The filter capacitor C9 is generally selected from 100p to 10n. Considering the switching loss of the transistor and the voltage spike caused by di / dt, C9 is selected as 470p. Together with R8, it forms an RC filter with a time constant of:

[0125] τ=68×470×10 -12 =0.032us

[0126] Compared with the transistor's own turn-on time of 0.15us, it can be ignored; R9 is a protection resistor, selected as 20K. When the optocoupler is damaged, the transistor base input voltage can be pulled down to turn off Q1, ensuring that the IGBT is reliably turned off.

[0127] The IGBT drive circuit includes:

[0128] A driving resistor R10, one end of which is connected to the emitter of the NPN transistor Q1, and the other end of which is connected to the GU+ port;

[0129] A bidirectional transient suppression TVS tube Z1, one end of which is connected to the CU+ port, and the other end of which is connected to the VE-U port, to ensure that the voltage of the IGBT gate is within a normal range;

[0130] A gate discharge resistor R11, one end of which is connected to the GU+ port, and the other end of which is connected to the VE-U port, for releasing gate charge to prevent the IGBT from mis-turning on and electrostatic damage;

[0131] A gate absorption capacitor C10 , one end of which is connected to the GU+ port, and the other end of which is connected to the VE-U port, is used to reduce the switching hardness of the IGBT and absorb high-frequency noise of the gate.

[0132] To select the turn-on (turn-off) resistor R10, check the DATASHEET of the IGBT driven by the downstream stage and select the resistor value based on the curve of driving resistance and switching loss. Generally, choose 1.5 to 2 times the recommended value. The specific resistance value is further determined by testing the IGBT turn-on and turn-off time after installation. The power consumption of the resistor depends on the selected IGBT. Taking FF450R12KT4 as an example, the gate charge QG = 3.30uC, from which the gate capacitance can be calculated:

[0133]

[0134] When the gate drive voltage changes from -10V to 15V and the switching frequency is 8K, considering that the gate absorption capacitance C10 is 10nF, the gate drive power can be calculated as follows:

[0135] P G =f s (C G +C 10 )(U H +|U L |) 2 =8000×(110+10)×10 -9 ×(15+10) 2 =0.6W

[0136] Gate drive power (there are two energy storage links in each cycle, according to the capacitor energy storage formula It can be seen from the above formula that all the power is consumed in the driving resistor. A 2.7Ω / 2W resistor is selected, and the resistor power is derated by 30%. For the selection of gate protection devices, devices R11, C10, and Z1 are all used to protect the gate of the IGBT. Resistor R10 is a gate discharge resistor used to release gate charge to prevent the IGBT from mis-conduction and electrostatic damage. According to the recommendation of the data, 5.1K is selected here. Capacitor C10 is a gate absorption capacitor used to reduce the switching hardness of the IGBT and absorb the high-frequency noise of the gate. The size of C10 is compared with the Cies of the IGBT. For row selection, C10 should generally be smaller than the Cies of the IGBT. The Cies of the FF450R12KT4 IGBT is 28nF, so C10 = 10nF is selected. Z1 is a bidirectional transient suppression TVS tube, which is used to ensure that the IGBT gate voltage is within the normal range. When the IGBT is working, the normal gate voltage should be within ±20V. Z1 selects an 18V Zener diode, which can meet the 18V voltage regulation characteristics at a current of 1-20mA. Considering the forward conduction voltage drop of the diode, Z1 ensures that the IGBT gate is stable within ±18.7V.

[0137] The drive logic ACPL-330J chip outputs the IGBT switch signal, which is amplified by the push-pull circuit formed by Q1 and Q2 to drive the gate of the IGBT module, thereby turning on the IGBT module.

[0138] The driving protection circuit provided by the present invention has the following advantages:

[0139] The present invention adopts ACPL-330J chip as the core driver. The maximum output current of ACPL-330J chip is 1.5A, with strong driving capability, maximum transmission delay of 250ns, and maximum pulse width distortion of 100ns. The transmission delay time is shorter and the pulse distortion is lower. The operating temperature range is -40℃~+105℃, which is a wider operating temperature range. It has IGBT short-circuit desaturation detection and soft shutdown function, which reduces the voltage spike formed by di / dt and reduces IGBT shutdown damage. When VCM=1500V, the common mode suppression capability reaches 50kV / us, which enhances The system's anti-interference ability; short-circuit fault self-reset function (silent time 26us), effectively avoiding deadlock with other circuits; when the present invention detects that the voltage value is higher than the preset voltage threshold, it cuts off the output of the Darlington tube inside the ACPL-330J chip and turns on the internal soft-off MOS to "softly" discharge the IGBT gate, avoiding damage to the IGBT module due to voltage spikes caused by the sudden increase in hard-off current, and at the same time triggers the internal fault feedback channel to send the fault signal to the main control chip to block other PWM outputs, and automatically resets after 26us of silence through the chip's self-reset function. The present invention utilizes the functions of the ACPL-330J chip to realize the driving, protection and self-recovery functions of the IGBT module, thereby improving the stability and anti-interference ability of the driving circuit. The driving circuit implemented by the ACPL-330J chip can not only drive the normal operation of the IGBT module but also protect and monitor the IGBT module when a short circuit occurs.

[0140] An embodiment of the present invention further provides a drive motor, which adopts the drive circuit described in any of the above real-time examples.

[0141] An embodiment of the present invention further provides a wind power converter, wherein a drive motor of the wind power converter adopts the drive circuit described in any one of the above embodiments.

[0142] The above describes in detail the IGBT driver chip protection circuit and driver circuit provided by the present invention. This article uses specific examples to illustrate the principles and implementation methods of the present invention. The description of the above embodiments is only intended to help understand the method and core concept of the present invention. It should be noted that for those skilled in the art, without departing from the principles of the present invention, various improvements and modifications can be made to the present invention, and such improvements and modifications also fall within the scope of protection of the claims of the present invention.

Claims

1. A protection circuit for an IGBT driver chip, wherein the driver chip is an ACPL-330J chip, characterized in that: The protection circuit comprises: a decoupling capacitor group, comprising a first decoupling capacitor and a second decoupling capacitor, wherein one end of the first decoupling capacitor is connected to pin 16 of the driver chip, and the other end is connected to pin 12 of the driver chip; one end of the second decoupling capacitor is connected to pin 16 of the driver chip and one end of the first decoupling capacitor, and the other end is connected to pin 13 of the driver chip; A first diode is used to protect the pin 14 of the driver chip from being burned by negative voltage, with its positive electrode connected to the zero potential reference point and the pin 16 of the driver chip, and its negative electrode connected to the pin 14 of the driver chip; A first current limiting resistor is connected to pin 14 of the driver chip; The short-circuit fault external detection circuit is composed of an overcurrent resistor and a blanking capacitor connected between pin 13 of the driver chip and pin 16 of the driver chip. One end of the blanking capacitor is connected to pin 16 of the driver chip, and the other end is connected to pin 14 of the driver chip. One end of the overcurrent resistor is connected to the first current limiting resistor, and the other end is connected to pin 13 of the driver chip. The short-circuit fault external detection circuit is used to blank and filter the DESATS signal after the short circuit, and at the same time determine the internal blanking time of the DESATS short-circuit detection; a second diode, the anode of which is connected to the common terminal of the current limiting resistor and the positive power supply used to charge the blanking capacitor; The reverse recovery module comprises two diodes connected in series, the input end of the reverse recovery module is connected to the cathode of the second diode, and the output end is connected to the collector of the IGBT module.

2. The driver chip protection circuit according to claim 1, wherein: Also includes: The peripheral charging circuit includes: a charging output port, the current limiting resistor and the overcurrent resistor. The charging output port is connected to the pin 13 of the driver chip, and the current limiting resistor and the overcurrent resistor are also connected in series.

3. The driver chip protection circuit according to claim 1, wherein: Also includes: A third diode, the positive electrode of the third diode is connected to the negative electrode of the second diode, and the negative electrode of the third diode is connected to pin 13 of the driver chip, which is used to prevent the overvoltage of the blanking capacitor from being charged and damaging the driver chip when the reverse recovery module quickly shuts down the reverse recovery.

4. The driver chip protection circuit according to claim 3, wherein: Also includes: A third decoupling capacitor, one end of which is connected to the cathode of the third diode, and the anode of which is connected to the driver chip pin 12 .

5. A driving circuit, characterized in that: include: Driver chip, the driver chip is ACPL-330J chip; A primary fault output signal circuit is used to detect whether there is a fault in the circuit. The circuit is connected to pins 1-4 of the driver chip; The primary PWM input circuit is used to prevent the upper and lower bridges from being turned on simultaneously due to disordered or interfered driving signals. The primary PWM input circuit is connected to pins 5-8 of the driver chip. A secondary output circuit, used to output a drive signal to drive the IGBT, and connected to pins 9-13 of the driver chip; And the IGBT driver chip protection circuit according to any one of claims 1 to 4.

6. The driving circuit according to claim 5, wherein: The primary side fault output signal circuit includes: A second current-limiting resistor, one end of which is connected to the VUO port, and the other end is connected to pin 1 and pin 4 of the driver chip respectively, to prevent the subsequent stage from short-circuiting and burning the chip or the optocoupler; A pull-down resistor, one end of which is connected to the second current-limiting resistor and the VUO port respectively, and the other end of which is grounded, for ensuring that the VUO port does not mistakenly output a fault level to the main control chip when there is no fault; A filter capacitor, one end of which is respectively connected to the second current limiting resistor, the pull-down resistor and the VUO port, and the other end of which is grounded, is used to filter the signal.

7. The driving circuit according to claim 5, wherein: The primary side PWM input circuit comprises: A protection resistor, one end of which is connected to pins 6 and 7 of the driver chip, and the other end of which is connected to pins 5 and 8 of the driver chip, to prevent electrostatic damage and erroneous switching of the optocoupler; Chip capacitors, one end of which is connected to pins 6 and 7 of the driver chip, and the other end of which is connected to pins 5 and 8 of the driver chip, for reducing delay time and filtering high-frequency noise; a first resistor, one end of which is connected to the drive signal PU+, and the other end of which is connected to pins 6 and 7 of the driver chip; A second resistor, one end of the second resistor is connected to the driving signal PU-, and the other end of the second resistor is connected to pins 5 and 8 of the driving chip.

8. The driving circuit according to claim 5, wherein: The secondary side output circuit includes: a push-pull circuit, and the push-pull circuit includes: a third resistor, the third resistor being connected in series between pins 11 and 9 of the driver chip; A base drive resistor, one end of which is connected to pin 11 of the driver chip; A filter capacitor, one end of which is connected to the base drive resistor and the other end is connected to the negative power supply port for filtering; an NPN transistor, wherein the base of the NPN transistor is connected to the other end of the base drive resistor, and the collector of the transistor is connected to the pin 13; A PNP transistor, wherein the base of the PNP transistor is connected to the other end of the base drive resistor, the emitter of the PNP transistor is connected to the emitter of the NPN transistor, and the collector of the PNP transistor is connected to the negative power supply port.

9. The driving circuit according to claim 8, wherein: The secondary output circuit further includes an IGBT drive circuit, which includes: a driving resistor, one end of the driving resistor being connected to the emitter of the NPN transistor and the other end being connected to the output port; A bidirectional transient suppression TVS tube, one end of which is connected to the output port, and the other end of which is connected to the VE-U port, for ensuring that the IGBT gate voltage is within a normal range; A gate discharge resistor, one end of which is connected to the GU+ port, and the other end of which is connected to the VE-U port, is used to release gate charge to prevent the IGBT from mis-turning on and electrostatic damage; A gate absorption capacitor, one end of which is connected to the GU+ port, and the other end of which is connected to the VE-U port, is used to reduce the switching hardness of the IGBT and absorb high-frequency noise of the gate.

10. Application of the driving circuit according to any one of claims 5 to 9 in motor driving.

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