Method for manufacturing bipolar transistor

Abstract

The application discloses a manufacturing method of a bipolar transistor, comprising the following steps: step one, forming a first doped region in a selected region of a semiconductor substrate by a base region injection of a first conductive type, the first doped region being used for forming a base region; the base region injection has a first injection dose, and under the condition of the first injection dose, a first injection current is set according to a target value of a Beta coefficient and the Beta coefficient meets the requirement; step two, forming a second conductive type doped collector region in a selected region of the semiconductor substrate; and step three, forming a second conductive type doped emitter region on the surface of a selected region of the first doped region, and the base region is composed of the first doped region between the collector region and the emitter region. The application can improve the Beta coefficient of the device.

Description

Technical Field

[0001] This invention relates to a method for manufacturing semiconductor integrated circuits, and more particularly to a method for manufacturing bipolar transistors. Background Technology

[0002] like Figure 1 The diagram shows a cross-sectional view of an existing bipolar transistor. Figure 1 The bipolar transistor shown is a lateral structure. The following explanation uses a PNP transistor as an example; lateral PNP is also referred to as LPNP. An N-type doped deep well 103 is formed in the semiconductor substrate 101. The semiconductor substrate 101 is P-type doped. An N-type doped buried layer 102 is also formed between the deep well 103 and the semiconductor substrate 101. The doping concentration of the buried layer 102 is greater than that of the deep well 103 to isolate the semiconductor substrate 101 from any adverse effects on the deep well 103.

[0003] A first doped region 104, formed by N-type base implantation, is formed in a selected region of the deep well 103. The base region 104a is composed of the first doped region 104. The base region implantation is typically formed using an N-well implantation process.

[0004] A P-type doped collector region 105 is formed in a selected region of the semiconductor substrate 101. Since the bipolar transistor has a lateral structure, the collector region 105 is formed by P-type doped ion implantation and the collector region 105 extends through the first doped region 104. Figure 1 In the top view, the current collector region 105 surrounds the base region 104a on its inner side; that is, the first doped region 104 located inside the current collector region 105 forms the base region 104a. Typically, the ion implantation of the current collector region 105 employs a P-type trap implantation process.

[0005] A P-type doped emitter region 106 is formed on the surface of a selected region of the first doped region 104, and the base region 104a is composed of the first doped region 104 located between the collector region 105 and the emitter region 106. Figure 1 Since the collector region 105 surrounds the base region 104a on its inner side, the first doped regions 104 located inside the collector region 105 are all located between the collector region 105 and the emitter region 106. Therefore, the base region 104a is also a first doped region 104 located inside the collector region 105.

[0006] An N-type doped base region 107a is formed on the surface of a selected region of the base region 104a, and the doping concentration of the base region 107a is greater than that of the base region 104a.

[0007] Generally, a second N-type doped extraction region 107b is formed on the surface of the first doped region 104 outside the collector region 105.

[0008] A P-type doped collector extraction region 108 is formed on the surface of a selected region of the collector region 105, and the doping concentration of the collector extraction region 108 is greater than the doping concentration of the collector region 105.

[0009] The Beta coefficient of the bipolar transistor is the ratio of the collector current and the base current, and the Beta coefficient can be increased by reducing the thickness of the base region. Figure 1 As shown in the figure, the base region 104a needs to be formed by base region implantation, and the process structure of the base region 104a needs to be mainly adjusted by the implantation energy and the implantation dose of the base region implantation. In the actual process, even if the same implantation energy and implantation dose are used, the Beta coefficient formed often has a large deviation, especially the Beta coefficient of the bipolar transistor obtained after the base region implantation by different implantation machines has a large difference. Therefore, how to find the reason affecting the Beta coefficient and further improve the Beta coefficient when the process conditions such as the implantation energy and the implantation dose of the base region implantation are determined is the focus of the present application. SUMMARY

[0010] The technical problem to be solved by the present application is to provide a manufacturing method of a bipolar transistor, which can improve the Beta coefficient of the device and obtain a bipolar transistor with a high Beta coefficient.

[0011] To solve the above technical problem, the manufacturing method of the bipolar transistor provided by the present application comprises the following steps:

[0012] Step one, performing base region implantation of a first conductive type in a selected region of a semiconductor substrate to form a first doped region, the first doped region being used to form a base region; the base region implantation has a first implantation dose, under the condition of the first implantation dose, a first implantation current is set according to the target value of the Beta coefficient and the Beta coefficient meets the requirement, including: the first implantation dose is the product of the first implantation current and the first implantation time, by increasing the first implantation current to reduce the first implantation time and thereby reducing the heat process, impurity diffusion distance and thickness of the first doped region in the base region implantation process, the Beta coefficient is increased to the target value.

[0013] Step two, forming a collector region doped with a second conductive type in the selected region of the semiconductor substrate.

[0014] Step three, forming an emitter region of a second conductivity type doping on a surface of a selected region of said first doped region, said base region consisting of said first doped region between said collector region and said emitter region.

[0015] A further improvement is that said semiconductor substrate comprises a silicon substrate.

[0016] A further improvement is that said bipolar transistor is in a lateral structure, said collector region and said base region being in lateral contact.

[0017] A further improvement is that a deep well of a first conductivity type doping is formed in said semiconductor substrate, said collector region and said base region being formed in said deep well.

[0018] A further improvement is that in step two, said collector region is formed by ion implantation of a second conductivity type doping, said collector region penetrating said first doped region.

[0019] A further improvement is that in a top view, said collector region encloses said base region on an inner side.

[0020] A further improvement is that after step three, further comprising:

[0021] forming a base region extraction region of a first conductivity type doping on a surface of a selected region of said base region, said base region extraction region having a doping concentration greater than a doping concentration of said base region.

[0022] A further improvement is that after step three, further comprising:

[0023] forming a collector region extraction region of a second conductivity type doping on a surface of a selected region of said collector region, said collector region extraction region having a doping concentration greater than a doping concentration of said collector region.

[0024] A further improvement is that said base region extraction region is formed simultaneously with said base region extraction region, further comprising forming a second extraction region of a first conductivity type doping on a surface of said first doped region on an outer side of said collector region.

[0025] A further improvement is that in a top view, said base region extraction region encloses said emitter region on an inner side.

[0026] A further improvement is that said base region implantation is a first conductivity type well implantation process.

[0027] A further improvement is that said collector region ion implantation is a second conductivity type well implantation process.

[0028] Further improvement is that in step one, the base region injection is carried out on a selected ion implantation machine, the ion implantation machine has a corresponding injection current range for realizing safe production, the first injection current adopts the upper limit value of the injection current range of the ion implantation machine, so that the Beta coefficient is increased to the maximum.

[0029] Further improvement is that if the Beta coefficient is still less than the target value when the first injection current adopts the upper limit value of the injection current range of the ion implantation machine, the ion implantation machine is modified so that the upper limit value of the injection current range of the ion implantation machine is increased to the first injection current set according to the target value of the Beta coefficient; or, another ion implantation machine with the upper limit value of the injection current range greater than or equal to the first injection current set according to the target value of the Beta coefficient is used to carry out the base region injection.

[0030] Further improvement is that the first injection current is 500 mu A to tens of mA.

[0031] Further improvement is that the bipolar transistor is PNP, the first conductivity type is N type, and the second conductivity type is P type.

[0032] Or, the bipolar transistor is NPN, the first conductivity type is P type, and the second conductivity type is N type.

[0033] The application breaks through the limitation of the existing conventional thinking, adjusts the Beta coefficient of the device by optimizing the size of the injection current of the base region injection, and the principle is:

[0034] The thickness of the injection layer, i.e. the first doped region, of the base region injection is mainly determined by the conditions of the injection energy and the injection dose, i.e. the first injection dose of the application, of the base region injection. Usually, the thickness of the injection layer is adjusted by the injection energy. The first injection dose is the product of the first injection current and the first injection time. Therefore, under the condition of the first injection dose being determined, the first injection time is different when the first injection current is different, which will make the thermal process in the base region injection process different. The thermal process will cause the effect of thermal diffusion of the injection layer, so that the thickness of the injection layer after thermal diffusion will be different due to the different thermal processes, and finally the Beta coefficient will change greatly.

[0035] In the prior art, the Beta coefficients of bipolar transistors obtained after base region injection by different ion implanters have greater differences; this is because the injection current in the prior art is set according to the injection current range given by the ion implanter and is the value of the middle region of the injection current range; that is, in the prior art, the first injection current is usually selected according to the ion implanter, and then the first injection time is selected according to the first injection current, thereby obtaining the first injection dose; and the first injection current selected according to the requirements of the ion implanter is usually smaller than the first injection current set according to the required value of the Beta coefficient, that is, the first injection current is small, thereby increasing the first injection time and finally increasing the diffusion of the injection layer and the thickness of the injection layer, so that the Beta coefficient is small.

[0036] However, the present application breaks through the limitations of the conventional thinking corresponding to the above-mentioned prior art, and directly sets the first injection current according to the target value of the Beta coefficient, so that the first injection current can increase above the middle region of the injection current range of the ion implanter and directly use the upper limit value under better conditions, so compared with the prior art, the present application can increase the first injection current, reduce the first injection time, and thereby reduce the thermal process in the base region injection process, finally reduce the impurity diffusion distance of the injection layer, that is, the thermal diffusion distance, and the thickness of the injection layer will also be reduced. Since the thickness of the base region is thinner, the Beta coefficient will be larger, so the Beta coefficient will increase and increase above the target value, so the present application can improve the Beta coefficient of the device and obtain a bipolar transistor with a high Beta coefficient.

[0037] In addition, since the present application improves the Beta coefficient of the device by increasing the injection current of the base region injection, it does not affect other process conditions of the device, so the present application finally improves the comprehensive performance of the device. BRIEF DESCRIPTION OF DRAWINGS

[0038] The present application will be further described in detail below in combination with the drawings and specific embodiments:

[0039] Figure 1 is a schematic diagram of the cross-sectional structure of the prior art bipolar transistor;

[0040] Figure 2 is a flowchart of the manufacturing method of the bipolar transistor of the embodiment of the present application;

[0041] Figure 3 is a schematic diagram of the cross-sectional structure of the bipolar transistor formed by the manufacturing method of the bipolar transistor of the embodiment of the present application;

[0042] Figure 4 is a comparison chart of the Beta coefficients corresponding to different injection currents in the manufacturing method of the bipolar transistor of the embodiment of the present application. DETAILED DESCRIPTION

[0043] As Figure 2 shown in FIG. 1 is a flow chart of a manufacturing method of a bipolar transistor according to an embodiment of the present application; as Figure 3 shown in FIG. 2 is a cross-sectional structure diagram of a bipolar transistor formed by the manufacturing method of the bipolar transistor according to an embodiment of the present application; the manufacturing method of the bipolar transistor according to an embodiment of the present application comprises the following steps:

[0044] Step one, forming a first doped region 204 in a selected region of a semiconductor substrate 201 by a base region implantation of a first conductive type, the first doped region 204 is used to form a base region 204a; the base region implantation has a first implantation dose, under the condition determined by the first implantation dose, a first implantation current is set according to a target value of a Beta coefficient and the Beta coefficient meets the requirement, including: the first implantation dose is the product of the first implantation current and a first implantation time, by increasing the first implantation current to reduce the first implantation time and thereby reducing the heat process, impurity diffusion distance and thickness of the first doped region 204 in the base region implantation process, the Beta coefficient is increased to the target value.

[0045] In the embodiment of the present application, the semiconductor substrate 201 comprises a silicon substrate.

[0046] A deep well 203 doped with a first conductive type is formed in the semiconductor substrate 201, and the base region 204a is formed in the deep well 203.

[0047] In some embodiments, the semiconductor substrate 201 is doped with a second conductive type. A buried layer 202 doped with a first conductive type is further formed between the deep well 203 and the semiconductor substrate 201, and the doping concentration of the buried layer 202 is greater than the doping concentration of the deep well 203, so as to isolate the semiconductor substrate 201 from the adverse effects on the deep well 203.

[0048] In some embodiments, the base region implantation adopts a first conductive type well implantation process.

[0049] The base region implantation is performed on a selected ion implantation machine, the ion implantation machine has a corresponding implantation current range for realizing safe production, and the first implantation current adopts an upper limit value of the implantation current range of the ion implantation machine, so as to increase the Beta coefficient to the maximum.

[0050] In some embodiments, if the Beta coefficient is still less than the target value when the first implant current is at the upper limit of the ion implanter's implant current range, the ion implanter is modified to increase the upper limit of the ion implanter's implant current range to be above the first implant current set according to the target value of the Beta coefficient. In other embodiments, if there is another ion implanter available, the base region implant is performed using another ion implanter whose upper limit of the implant current range is greater than or equal to the first implant current set according to the target value of the Beta coefficient.

[0051] In some preferred embodiments, the first implant current is in the range of 500 μA to tens of mA.

[0052] The ion implanter can be classified into three major types: medium beam ion implanter, high energy ion implanter, and large beam ion implanter. In the embodiments of the present application, when the first implant current is below mA level, the ion implanter is usually a medium beam ion implanter. When the first implant current is above mA level, the ion implanter is usually a large beam ion implanter. The implant current of a large beam ion implanter is in the mA level, and the implant is relatively stable. However, the implant current is too large, and thus there are some negative problems caused by heating effect.

[0053] Step two, forming a second conductivity type doped collector region 205 in a selected region of the semiconductor substrate 201.

[0054] In the embodiments of the present application, the bipolar transistor is in a lateral structure, and the collector region 205 and the base region 204a are in lateral contact. The collector region 205 is also formed in the deep well 203.

[0055] The collector region 205 is formed by ion implantation of a second conductivity type, and the collector region 205 penetrates the first doped region 204.

[0056] In some embodiments, the ion implantation of the collector region 205 is performed by a second conductivity type well implantation process.

[0057] In a top view, the collector region 205 is on the inner side of the base region 204a.

[0058] Step three, forming a second conductivity type doped emitter region 206 in a selected region of the surface of the first doped region 204, and the base region 204a is composed of the first doped region 204 between the collector region 205 and the emitter region 206.

[0059] In some embodiments, the base region lead-out region 207a encircles the emitter region 206 on the top surface.

[0060] In some embodiments, after step three, the method further comprises:

[0061] A base region lead-out region 207a of the first conductivity type is formed on the surface of the selected region of the base region 204a, and the doping concentration of the base region lead-out region 207a is greater than the doping concentration of the base region 204a. In some embodiments, while forming the base region lead-out region 207a, the method further comprises forming a second lead-out region 207b of the first conductivity type on the surface of the first doped region 204 outside the collector region 205.

[0062] A collector region lead-out region 208 of the second conductivity type is formed on the surface of the selected region of the collector region 205, and the doping concentration of the collector region lead-out region 208 is greater than the doping concentration of the collector region 205.

[0063] In some embodiments, the bipolar transistor is PNP, the first conductivity type is N-type, and the second conductivity type is P-type. In other embodiments, the bipolar transistor can also be NPN, the first conductivity type is P-type, and the second conductivity type is N-type.

[0064] The embodiments of the present application break through the limitations of the conventional thinking, and adjust the Beta coefficient of the device by using the size of the injection current of the base region injection, and the principle is that:

[0065] The thickness of the injection layer of the base region injection, i.e., the first doped region 204, is mainly determined by the injection energy and the injection dose of the base region injection, i.e., the first injection dose of the present application. The thickness of the injection layer is usually adjusted by the injection energy. The first injection dose is the product of the first injection current and the first injection time. Therefore, under the condition of a determined first injection dose, the first injection time is different when the first injection current is different, which will make the thermal process in the base region injection process different. The thermal process will cause the effect of thermal diffusion of the injection layer, and the different thermal processes will also make the thickness of the injection layer after thermal diffusion different, and finally make the Beta coefficient change greatly.

[0066] In the prior art, the Beta coefficients of bipolar transistors obtained after base region injection by different ion implanters have greater differences; this is because the injection current in the prior art is set according to the injection current range given by the ion implanter and the middle region value of the injection current range is selected; that is, in the prior art, the first injection current is usually selected according to the ion implanter, and then the first injection time is selected according to the first injection current, so as to obtain the first injection dose; and the first injection current selected according to the requirement of the ion implanter is usually smaller than the first injection current set according to the required value of the Beta coefficient, that is, the first injection current is small, so as to increase the first injection time, and finally to increase the diffusion of the injection layer and the thickness, so as to make the Beta coefficient small.

[0067] However, the embodiment of the present application breaks through the limitation of the conventional thinking corresponding to the prior art, and directly sets the first injection current according to the target value of the Beta coefficient; in this way, the first injection current can increase the upper limit value of the middle region of the injection current range of the ion implanter and directly adopt the upper limit value under the optimal condition, so, compared with the prior art, the embodiment of the present application can increase the first injection current, reduce the first injection time, and thus reduce the thermal process in the base region injection process, finally reduce the impurity diffusion distance of the injection layer, that is, the thermal diffusion distance, and the thickness of the injection layer will also be reduced; since the thinner the thickness of the base region is, the greater the Beta coefficient will be, so the Beta coefficient will increase and increase to above the target value.

[0068] Since the embodiment of the present application improves the Beta coefficient of the device by improving the injection current of the base region injection, it does not affect other process conditions of the device, so the embodiment of the present application finally improves the comprehensive performance of the device.

[0069] As shown in FIG. 3, Figure 4 is a comparison diagram of the Beta coefficients corresponding to different injection currents in the manufacturing method of the bipolar transistor according to the embodiment of the present application. Figure 4 In FIG. 3, the abscissa represents the wafer number (ID), the curve 301 is a curve formed by connecting the injection currents of the base region injection of each wafer, the curve 302 is a curve formed by connecting the Beta coefficients of each wafer, and the curve 303 is a curve formed by connecting the injection times of the base region injection of each wafer.

[0070] The ordinate corresponding to the curve 301 is the right coordinate, and it can be seen that the injection currents of the wafers numbered 1 to 6 are all above 500 μA, the injection current of the wafer numbered 7 is not shown, and the injection currents of the wafers numbered 8 to 25 are between 435 μA and 465 μA.

[0071] The ordinate corresponding to the curve 302 is the left coordinate. It can be seen that the Beta coefficients of the wafers numbered 1 to 6 are above 20, and the Beta coefficients of the wafers numbered 8 to 25 are between 10 and 15. Therefore, the Beta coefficient can be increased by increasing the injection current.

[0072] The curve 303 does not show the corresponding ordinate. The injection time of the wafers numbered 1 to 6 and the injection time of the wafers numbered 8 to 25 are not much different.

[0073] The above has described the present application in detail through specific embodiments, but these do not constitute a limitation on the present application. Those skilled in the art can also make many modifications and improvements without departing from the principles of the present application, and these should also be considered as the protection scope of the present application.

Claims

1. A method for manufacturing a bipolar transistor, characterized in that, Includes the following steps: Step 1: A first doped region is formed by implanting a base region of a first conductivity type in a selected area of ​​the semiconductor substrate. The first doped region is used to form the base region. The base region implantation has a first implantation dose. Under the condition that the first implantation dose is determined, a first implantation current is set according to the target value of the Beta coefficient and the Beta coefficient is made to meet the requirements. This includes: the first implantation dose is the product of the first implantation current and the first implantation time. By increasing the first implantation current, the first implantation time is reduced, thereby reducing the thermal process, the impurity diffusion distance and thickness of the first doped region during the base region implantation process, and increasing the Beta coefficient above the target value. Step 2: Form a collector region doped with a second conductivity type in a selected area of ​​the semiconductor substrate; Step 3: Form an emitter region doped with a second conductivity type on the surface of a selected region of the first doped region, wherein the base region is composed of the first doped region located between the collector region and the emitter region.

2. The method for manufacturing a bipolar transistor as described in claim 1, characterized in that: The bipolar transistor has a lateral structure, and the collector region and the base region are in side contact. A deep well doped with a first conductivity type is formed in the semiconductor substrate, and both the collector region and the base region are formed in the deep well.

3. The method for manufacturing a bipolar transistor as described in claim 2, characterized in that: In step two, the current collector region is formed by ion implantation with a second conductivity type doped with ions, and the current collector region passes through the first doped region.

4. The method for manufacturing a bipolar transistor as described in claim 3, characterized in that: On a top-down view, the collector region surrounds the base region on the inside.

5. The method for manufacturing a bipolar transistor as described in claim 4, characterized in that: After step three, it also includes: A base region lead-out region doped with a first conductivity type is formed on the surface of a selected region of the base region, the doping concentration of the base region lead-out region being greater than the doping concentration of the base region; in top view, the base region lead-out region surrounds the emitter region on the inside; A collector region lead-out region with a second conductivity type is formed on the surface of a selected area of ​​the collector region, wherein the doping concentration of the collector region lead-out region is greater than the doping concentration of the collector region.

6. The method for manufacturing a bipolar transistor as described in claim 5, characterized in that: While forming the base region lead-out region, a second lead-out region with a first conductivity type doped is also formed on the surface of the first doped region outside the collector region.

7. The method for manufacturing a bipolar transistor as described in claim 3, characterized in that: The base region implantation employs a first conductivity type trap implantation process; the current collector region ion implantation employs a second conductivity type trap implantation process.

8. The method for manufacturing a bipolar transistor as described in claim 7, characterized in that: In step one, the base region implantation is performed on a selected ion implanter, which has an implantation current range that enables safe production. The first implantation current is the upper limit of the implantation current range of the ion implanter, so as to maximize the Beta coefficient.

9. The method for manufacturing a bipolar transistor as described in claim 8, characterized in that: If the Beta coefficient is still less than the target value when the first implantation current is the upper limit of the implantation current range of the ion implantation equipment, then the ion implantation equipment is modified to increase the upper limit of the implantation current range of the ion implantation equipment to the first implantation current set according to the target value of the Beta coefficient; or, the base region implantation is performed using another ion implantation equipment with an upper limit of the implantation current range greater than or equal to the first implantation current set according to the target value of the Beta coefficient.

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