Elastic wave device and module including the same

Abstract

An elastic wave device includes a wiring substrate, a device chip disposed opposite the wiring substrate, and a sealing portion that seals the wiring substrate and the device chip, the device chip including resonators, wiring patterns electrically connected to the resonators, bump pads electrically connected to the wiring patterns, and first sealing material intrusion prevention walls formed between the bump pads and having a height BH, the wiring substrate including wiring substrate side bump pads corresponding to the bump pads, and second sealing material intrusion prevention walls having a height CH; a distance between the wiring substrate and the device chip is A, A < BH + CH, A > BH, and A > CH; and when the elastic wave device is viewed in a thickness direction of the device chip, positions of the first sealing material intrusion prevention walls and the second sealing material intrusion prevention walls do not overlap. Thus, an elastic wave device and a module including the elastic wave device that eliminates or reduces damage and that prevents sealing material from intruding into an internal space of the elastic wave device can be provided.

Description

Technical Field

[0001] This disclosure relates to an elastic wave device and a module comprising the elastic wave device. Background Technology

[0002] Japanese Patent Document 1 (JP2020-102713) illustrates an elastic wave device. The elastic wave device includes a hollow portion formed therewith with a substrate, and a dam portion for preventing sealing material from entering the hollow portion from the outside.

[0003] From a top view, the dam that forms around the interdigital transducer (IDT) electrodes and connections prevents sealing material from intruding into the internal space of the elastic wave device.

[0004] However, forming a dam that almost completely encloses the internal space between the wiring substrate and the device chip is not easy. When performing flip-chip bonding with ultrasound while crushing bumps, there will be significant manufacturing errors in the distance between the wiring substrate and the device chip. Therefore, the device chip may collide with and be damaged by the dam during the bonding process.

[0005] Furthermore, forming a dam on the wiring substrate that is higher than the distance between the wiring substrate and the device chip hinders the miniaturization of the elastic wave device. During bonding, a distance must be maintained between the device chip and the mounting area of ​​the device chip to prevent collision between the device chip and the dam. Summary of the Invention

[0006] In view of the above-mentioned problems, this disclosure aims to provide an elastic wave device and a module comprising the elastic wave device that can eliminate or reduce damage and prevent sealing material from intruding into the internal space of the elastic wave device.

[0007] This disclosure discloses an elastic wave device, comprising: a wiring substrate, a device chip disposed opposite to the wiring substrate, and a sealing portion for sealing the wiring substrate and the device chip together. The device chip includes a plurality of resonators, a wiring pattern electrically connecting the plurality of resonators, a plurality of bump pads electrically connecting the wiring pattern, and a first sealing material intrusion prevention wall formed between the plurality of bump pads. The wiring substrate has a plurality of wiring substrate-side bump pads formed at positions corresponding to the plurality of bump pads, and a second sealing material intrusion prevention wall on the same side as the plurality of wiring substrate-side bump pads.

[0008] The distance between the wiring substrate and the device chip is A, the height of the first sealing material intrusion prevention wall is BH, and the height of the second sealing material intrusion prevention wall is CH.<BH+CH,A> BH, and A>CH; when viewed through the elastic wave device along the thickness direction of the device chip, the positions of the first sealing material intrusion prevention wall and the second sealing material intrusion prevention wall do not overlap.

[0009] In one embodiment of this disclosure, the BH of the first sealing material intrusion prevention wall is less than the CH of the second sealing material intrusion prevention wall.

[0010] In one embodiment of this disclosure, the height of the wiring pattern is the same as the BH of the first sealing material intrusion prevention wall.

[0011] In one embodiment of this disclosure, the second sealing material intrusion prevention wall continuously or intermittently forms and surrounds the plurality of said resonators.

[0012] In one embodiment of this disclosure, the second sealing material intrusion prevention wall is formed of a metal layer and / or an insulating layer.

[0013] In one embodiment of this disclosure, when the elastic wave device is viewed along the thickness direction of the device chip, a portion of the second sealing material intrusion prevention wall overlaps with the outer edge of the device chip.

[0014] In one embodiment of this disclosure, the second sealing material intrusion prevention wall is formed between the plurality of said wiring substrate side bump pads.

[0015] In one embodiment of this disclosure, the second sealing material intrusion prevention wall is positioned closer to the central region of the device chip than the first sealing material intrusion prevention wall.

[0016] In one embodiment of this disclosure, the second sealing material intrusion prevention wall includes an inner portion disposed closer to the central region of the device chip than the first sealing material intrusion prevention wall, and an outer portion disposed further away from the central region of the device chip than the first sealing material intrusion prevention wall.

[0017] In one embodiment of this disclosure, the device chip has a substrate formed by bonding a piezoelectric substrate to a substrate made of sapphire, silicon, alumina, spinel, crystal, or glass.

[0018] In one embodiment of this disclosure, the intrusion prevention wall of the first sealing material is finer than the wiring pattern.

[0019] In one embodiment of this disclosure, the plurality of resonators are elastic surface wave resonators, and a bandpass filter or duplexer is formed on the device chip.

[0020] In one embodiment of this disclosure, the plurality of resonators are thin-film acoustic resonators, and a bandpass filter or duplexer is formed on the device chip.

[0021] This disclosure module includes the elastic wave device.

[0022] The beneficial effects of the present invention are as follows: According to this disclosure, an elastic wave device and a module containing the elastic wave device can be provided that can eliminate or reduce damage and prevent sealing material from intruding into the internal space of the elastic wave device. Attached Figure Description

[0023] Figure 1 This is a cross-sectional view of the elastic wave device of the first embodiment.

[0024] Figure 2 This is a schematic diagram of the main surface of the device chip in the first embodiment.

[0025] Figure 3 It is along Figure 2 A cross-sectional view of section line DD.

[0026] Figure 4 This is a schematic diagram of the elastic wave device viewed from above, showing the outer edge of the device chip overlapping with a portion of the second sealing material intrusion prevention wall.

[0027] Figure 5 This is a schematic diagram of the second sealing material intrusion prevention wall intermittently forming and surrounding multiple resonators.

[0028] Figure 6 This is a schematic diagram showing that the second sealing material intrusion prevention wall is closer to the central region of the device chip than the first sealing material intrusion prevention wall.

[0029] Figure 7 This is a schematic diagram showing the second sealing material intrusion prevention wall positioned closer to and less close to the central region of the device chip than the first sealing material intrusion prevention wall.

[0030] Figure 8 This is a schematic diagram of the resonator of the elastic wave device in the first embodiment being an acoustic thin film resonator.

[0031] Figure 9 This is a cross-sectional view of a module of the second embodiment, which uses the elastic wave device. Detailed Implementation

[0032] The specific embodiments of the present invention will be described below with reference to the accompanying drawings. It should be noted that the same or equivalent parts in each figure are labeled with the same reference numerals. The descriptions of the same or equivalent parts will be appropriately simplified or omitted.

[0033] (First Embodiment)

[0034] Figure 1 This is a cross-sectional view of the elastic wave device 1 according to the first embodiment. The elastic wave device 1 includes a wiring substrate 2. As an example, the wiring substrate 2 may be a multilayer substrate containing resin.

[0035] In another example, the wiring substrate 2 may also be a low-temperature co-fired ceramic (LTCC) multilayer substrate formed of multiple dielectric layers. Passive components such as capacitors or inductors may also be formed inside the wiring substrate 2.

[0036] exist Figure 1 In the example, the upper surface of the wiring substrate 2, which serves as the component mounting surface, is provided with a plurality of wiring substrate side bump pads 2b. The lower surface of the wiring substrate 2 may be, for example, the mounting surface of a motherboard. The lower surface of the wiring substrate 2 is provided with a plurality of conductive pads 2c. The wiring substrate side bump pads 2b and the conductive pads 2c are connected through corresponding internal conductors 2a or through-hole conductors.

[0037] A device chip 3 electrically connected to the wiring substrate 2 is provided on the wiring substrate 2. The device chip 3 is a surface elastic wave device chip. The device chip 3 has a piezoelectric substrate 3a made of piezoelectric material.

[0038] As an example, the piezoelectric substrate 3a may be a substrate formed from a piezoelectric single crystal such as lithium tantalate, lithium niobate, or quartz. In another example, the piezoelectric substrate 3a may be a substrate formed from piezoelectric ceramic.

[0039] In yet another example, the piezoelectric substrate 3a may be a substrate formed by bonding a piezoelectric substrate and a support substrate. The support substrate may be, for example, a substrate formed of sapphire, silicon, alumina, spinel, crystal, or glass.

[0040] As an example, the piezoelectric substrate 3a serves as a substrate for mounting functional components. For instance, a receiving filter and a transmitting filter are provided on the side (lower surface) of the device chip 3 facing the wiring substrate 2.

[0041] The receiving filter is formed in a manner that allows electrical signals in the desired frequency band to pass through. For example, the receiving filter may be a trapezoidal filter formed by multiple series resonators and multiple parallel resonators.

[0042] The transmitting filter is formed in a manner that allows electrical signals in the desired frequency band to pass through. For example, the transmitting filter may be a trapezoidal filter formed by multiple series resonators and multiple parallel resonators.

[0043] Figure 1 The diagram shows that the main surface of the device chip 3 (i.e., the side facing the wiring substrate 2, the lower surface) is provided with a plurality of bump pads 3b and a plurality of periodically arranged electrodes 3c. As an example, the plurality of electrodes 3c are comb-shaped electrode fingers, i.e., IDT electrodes.

[0044] A high-frequency electric field is applied to the IDT electrode from the lead terminal on the power supply side to excite an elastic surface wave. The elastic surface wave is converted into a high-frequency electric field according to the piezoelectric effect, thus obtaining the characteristics of the filter.

[0045] The bump pad 3b and the wiring substrate side bump pad 2b are electrically connected via bump 4. The bump 4 is, for example, gold, conductive adhesive, or solder.

[0046] The elastic wave device 1 includes a sealing portion 5. The sealing portion 5 seals the device chip 3 and forms an internal space 6 between the wiring substrate 2 and the device chip 3. As an example, the device chip 3 is mounted on the wiring substrate 2, and then a resin layer is disposed on the device chip 3 in a manner that spans across the device chip 3.

[0047] As an example, the resin layer is a thin-film liquid epoxy resin. In another example, the resin layer may also be a synthetic resin such as polyimide, which is different from epoxy resin. A protective film made of polyethylene terephthalate (PET) may be disposed on the upper surface of the resin layer, or a base film made of polyester fiber may be disposed on the lower surface of the resin layer.

[0048] A resin layer is placed on the device chip 3 to temporarily fix the resin layer onto the device chip 3. Then, the structure having the device chip 3, the resin layer, and the wiring substrate 2 is subjected to a process where the resin layer is filled between the side surface of the device chip 3 and the upper surface of the wiring substrate 2 by means of an upper roller heated to at least the softening temperature of the resin layer and a lower roller. This method is called the hot rolling method.

[0049] As long as it can be like Figure 1 To achieve the lamination effect, methods other than hot rolling can also be used.

[0050] Next, in order to fully harden the resin layer, a hot pressing process is performed. For example, by using a hot press equipped with an upper mold and a lower mold that are heated to the curing temperature of the resin, the resin layer is pressed towards the wiring substrate 2, thereby hardening the resin while suppressing the expansion of air in the internal space 6.

[0051] According to the example, the resin layer is heated to a softening temperature and pressurized to deform it, allowing the resin layer to adhere tightly to the outer surface of the device chip 3 and the upper surface of the wiring substrate 2. Then, the shape is fixed by heating to a curing temperature, thus forming the sealing portion 5. For example, the sealing portion 5 makes the internal space 6 a sealed space and reinforces the adhesion of the wiring substrate 2 to the device chip 3.

[0052] exist Figure 1 In this example, the internal space 6 is a sealed space surrounded by the main surface of the device chip 3, the upper surface of the wiring substrate 2, and the sealing portion 5. Two or more device chips can be disposed on the wiring substrate 2. As an example, the sealing portion 5 is made of thermosetting resin.

[0053] According to yet another example, the sealing part 5 can also be formed using metal as the sealing material, or it can be formed using the aerosol deposition method. In particular, by using the aerosol deposition method and using metal or aluminum nitride as the sealing material, it is possible to produce an elastic wave device with high heat dissipation.

[0054] Figure 2 This is a schematic diagram of the main surface of the device chip 3. In this example, the main surface of the device chip 3 is provided with multiple resonators 31. Each resonator 31 has a reflector 32 on both sides. The thickness of the resonator 31 is, for example, 150nm to 400nm.

[0055] Furthermore, the device chip 3 is provided with a plurality of bump pads 3b and wiring patterns 3d electrically connecting the plurality of resonators 31. The bump pads 3b are electrically connected to the wiring patterns 3d, and the wiring patterns 3d can be made of suitable metals or alloys such as silver, aluminum, copper, titanium, and palladium. In another example, the bump pads 3b and the wiring patterns 3d can also be a laminated metal film formed by stacking multiple metal layers. The thickness of the wiring patterns 3d is, for example, between 1 μm and 8 μm.

[0056] A first sealant intrusion prevention wall B is provided between the plurality of bump pads 3b. The first sealant intrusion prevention wall B is formed approximately parallel to the edges of the slightly rectangular shape of the main surface of the device chip 3 between the four corner bump pads 3b. The first sealant intrusion prevention wall B is thinner than the wiring pattern 3d.

[0057] The first sealing material intrusion prevention wall B may not contact the bump pad 3b, or it may be connected to the bump pad 3bGND, which is a ground potential. When the first sealing material intrusion prevention wall B is formed of metal or the like, by appropriately connecting the first sealing material intrusion prevention wall B to the bump pad 3bGND, which is a ground potential, grounding enhancement or shielding effects can be obtained. Furthermore, sealing material intrusion into the gap GAP between the first sealing material intrusion prevention wall B and the bump pad 3bGND can also be suppressed.

[0058] like Figure 2 As shown, a second sealing material intrusion prevention wall C is formed on the wiring substrate 2. Figure 2 As shown, viewed from above, the elastic wave device 1 is surrounded by the device chip 3 by the second sealing material intrusion prevention wall C, and does not overlap with the first sealing material intrusion prevention wall B.

[0059] Figure 3 It is along Figure 2 A cross-sectional view of section line DD. (See attached image.) Figure 3 As shown, the wiring substrate 2 has a second sealing material intrusion prevention wall C on the same side as the plurality of wiring substrate side bump pads 2b.

[0060] The device chip 3 has the first sealing material intrusion prevention wall B. Here, the distance A between the wiring substrate 2 and the device chip 3 is smaller than the sum of the height BH of the first sealing material intrusion prevention wall B and the height CH of the second sealing material intrusion prevention wall C. Furthermore, the distance A is larger than the height BH of the first sealing material intrusion prevention wall B and larger than the height CH of the second sealing material intrusion prevention wall C.

[0061] According to the example, the sealing material constituting the sealing portion 5 can be prevented from intruding into the internal space 6 between the wiring substrate 2 and the device chip 3.

[0062] The distance A between the wiring substrate 2 and the device chip 3 is, for example, 35 μm. Furthermore, the height BH of the first sealing material intrusion prevention wall B is, for example, 4 μm to 8 μm. And the height CH of the second sealing material intrusion prevention wall C is, for example, 30 μm to 34 μm.

[0063] And, as Figure 2 As shown, the height of the bump pad 3b can be the same as the height BH of the first sealing material intrusion prevention wall B. Furthermore, as... Figure 2 As shown, the height of the wiring pattern 3d can also be the same as the height BH of the first sealing material intrusion prevention wall B.

[0064] according to Figure 3For example, the height BH of the first sealing material intrusion prevention wall B is smaller than the height CH of the second sealing material intrusion prevention wall C.

[0065] The first sealing material intrusion prevention wall B can be made of, for example, metal. When the first sealing material intrusion prevention wall B and the wiring pattern 3d are made of the same material and have the same height, they can be formed simultaneously.

[0066] The second sealing material intrusion prevention wall C is formed, for example, by an insulator such as solder resist (SR). Alternatively, it may be formed by a metal and / or an insulator.

[0067] Figure 4 This is a top-view view of the elastic wave device 1, showing the outer edge of the device chip 3 overlapping a portion of the second sealing material intrusion prevention wall C. Based on this example, a smaller elastic wave device can be provided.

[0068] Figure 5 This is a schematic diagram showing the second sealing material intruding to prevent the wall C from intermittently forming and surrounding the plurality of resonators 31. Furthermore, as... Figure 5 As shown, the second sealing material intrusion prevention wall C is formed on the plurality of said wiring substrate side bump pads 2b ( Figure 5 Not shown, such as Figure 1 (As shown). The above structure can be used where the sealing material will not penetrate the areas at the four corners of the device chip 3.

[0069] Figure 6 This is a schematic diagram showing that the second sealing material intrusion prevention wall C is closer to the central region of the device chip 3 than the first sealing material intrusion prevention wall B. Figure 6 As shown, when viewed from above, the elastic wave device 1 is shown to have the second sealing material intrusion prevention wall C completely falling within the area of ​​the device chip 3 and continuously surrounding the plurality of resonators 31.

[0070] According to the example, the intrusion of sealing material can be suppressed without increasing the volume of the elastic wave device 1.

[0071] Figure 7 This is a schematic diagram of the second sealing material intrusion prevention wall C. The second sealing material intrusion prevention wall C includes an inner portion C(IN) located closer to the central region of the device chip 3 than the first sealing material intrusion prevention wall B, and an outer portion C(OUT) located further away from the central region of the device chip 3 than the first sealing material intrusion prevention wall B.

[0072] like Figure 7As shown, when viewed from above, the inner portion C(IN) of the second sealing material intrusion prevention wall C falls completely within the area of ​​the device chip 3, and intermittently forms and surrounds a plurality of the resonators 31.

[0073] Furthermore, by forming intermittently, even if the first sealing material intrusion prevention wall B is at the same height as the wiring pattern 3d, the wiring pattern 3d will not collide with the second sealing material intrusion prevention wall C.

[0074] like Figure 7 As shown, viewed from above, the outer portion C(OUT) of the second sealing material intrusion prevention wall C overlaps with the outer edge of the device chip 3. According to this example, the intrusion of the sealing material can be further suppressed.

[0075] The resonator can be a surface acoustic wave resonator, and a bandpass filter or duplexer can be formed on the device chip. Alternatively, the resonator can be a thin-film acoustic resonator, and a bandpass filter or duplexer can be formed on the device chip. Then, by means of... Figure 8 This illustrates an example of a thin-film acoustic resonator. Figure 8 This is a schematic diagram of the resonator of the elastic wave device in the first embodiment being an acoustic thin film resonator.

[0076] like Figure 8 As shown, the chip substrate 60 functions as a device for the chip 3. For example, the chip substrate 60 is a semiconductor such as silicon, or an insulating substrate such as sapphire, alumina, spinel, or glass.

[0077] The chip substrate 60 is provided with a piezoelectric film 62. The material of the piezoelectric film 62 is, for example, aluminum nitride.

[0078] The lower electrode 64 and the upper electrode 66 sandwich the piezoelectric film 62 therein. The lower electrode 64 and the upper electrode 66 are made of metals such as ruthenium.

[0079] A gap 68 is formed between the lower electrode 64 and the chip substrate 60.

[0080] In the acoustic diaphragm resonator, the lower electrode 64 and the upper electrode 66 excite elastic waves in the piezoelectric diaphragm 62 in a thickness longitudinal vibration mode.

[0081] In this embodiment, a single device chip is used for illustration; however, in other examples, the elastic wave device may also include multiple device chips. For instance, the elastic wave device may further include a second device chip that has a bandpass filter with multiple elastic surface wave resonators. According to another example, the elastic wave device may further include a second device chip that has a bandpass filter with multiple acoustic diaphragm resonators.

[0082] (Second Embodiment)

[0083] Figure 9 This is a cross-sectional view of a module according to the second embodiment, which uses the elastic wave device. Furthermore, the same or equivalent parts as in the first embodiment are marked with the same reference numerals. Descriptions of the same or equivalent parts are omitted.

[0084] exist Figure 9 In the module 100, there are wiring substrate 130, integrated circuit element IC, elastic wave device 1, inductor 111, and sealing part 117.

[0085] The wiring substrate 130 is the same as the wiring substrate 2 in the first embodiment.

[0086] Although not shown in the figure, the integrated circuit element IC is mounted inside the wiring substrate 130. The integrated circuit element IC includes a switching circuit and a low-noise amplifier.

[0087] The elastic wave device 1 is installed on the main surface of the wiring substrate 130.

[0088] The inductor 111 is mounted on the main surface of the wiring substrate 130. The inductor 111 is mounted for impedance matching. For example, the inductor 111 is an integrated passive device (IPD).

[0089] The sealing part 117 seals multiple electronic components, including the elastic wave device 1.

[0090] According to the second embodiment described above, the module 100 includes the elastic wave device 1. Therefore, a module 100 with a smaller installation area can be provided.

[0091] While at least one embodiment has been described above, it should be understood that various changes, modifications, or improvements will readily occur to those skilled in the art. These changes, modifications, or improvements are also part of this disclosure and fall within the scope of this invention.

[0092] It should be understood that the embodiments of the methods or apparatus described herein are not limited to the architecture and arrangement of the constituent components described above or illustrated in the accompanying drawings. The methods and apparatus can be installed or performed in other embodiments.

[0093] The embodiments described are for illustrative purposes only and are not intended to be limiting.

[0094] The descriptions and terms used in this disclosure are for illustrative purposes only and are not intended to be limiting. The use of "including," "possessing," "having," "comprise," and variations thereof here means to include the items listed below, their equivalents, and additional items.

[0095] The word “or”, or any word used in a description, may be interpreted as one, more than one, or all of the descriptive words.

[0096] The references to front, back, left, right, top, bottom, upper, lower, and horizontal and vertical are for ease of description and are not intended to limit the position and spatial configuration of any component in this invention. Therefore, the above description and drawings are merely exemplary.

Claims

1. An elastic wave device, characterized in that... The device includes: a wiring substrate, a device chip disposed opposite to the wiring substrate, and a sealing portion that seals the wiring substrate and the device chip together. The device chip includes a plurality of resonators, a wiring pattern electrically connecting the plurality of resonators, a plurality of bump pads electrically connecting the wiring pattern, and a first sealing material intrusion prevention wall formed between the plurality of bump pads. The wiring substrate has a plurality of wiring substrate-side bump pads formed at positions corresponding to the plurality of bump pads, and a second sealing material intrusion prevention wall on the same side as the plurality of wiring substrate-side bump pads. The distance between the wiring substrate and the device chip is A, the height of the first sealing material intrusion prevention wall is BH, and the height of the second sealing material intrusion prevention wall is CH.<BH+CH,A> BH, and A>CH; when viewed through the elastic wave device along the thickness direction of the device chip, the positions of the first sealing material intrusion prevention wall and the second sealing material intrusion prevention wall do not overlap.

2. The elastic wave device according to claim 1, characterized in that: The BH of the first sealing material intrusion prevention wall is less than the CH of the second sealing material intrusion prevention wall.

3. The elastic wave device according to claim 1, characterized in that: The height of the wiring pattern is the same as the BH of the first sealing material intrusion prevention wall.

4. The elastic wave device according to claim 1, characterized in that: The second sealing material intrusion prevents the formation of walls, either continuously or intermittently, and surrounds the plurality of resonators.

5. The elastic wave device according to claim 1, characterized in that: The second sealing material intrusion prevention wall is formed by a metal layer and / or an insulating layer.

6. The elastic wave device according to claim 1, characterized in that: Viewing the elastic wave device along the thickness direction of the device chip, a portion of the second sealing material intrusion prevention wall overlaps with the outer edge of the device chip.

7. The elastic wave device according to claim 1, characterized in that: The second sealing material intrusion prevention wall is formed between the multiple wiring substrate side bump pads.

8. The elastic wave device according to claim 1, characterized in that: The second sealing material intrusion prevention wall is positioned closer to the central region of the device chip than the first sealing material intrusion prevention wall.

9. The elastic wave device according to claim 1, characterized in that: The second sealing material intrusion prevention wall includes an inner portion located closer to the central region of the device chip than the first sealing material intrusion prevention wall, and an outer portion located further away from the central region of the device chip than the first sealing material intrusion prevention wall.

10. The elastic wave device according to claim 1, characterized in that: The device chip has a substrate formed by bonding a piezoelectric substrate to a substrate made of sapphire, silicon, alumina, spinel, crystal or glass.

11. The elastic wave device according to claim 1, characterized in that: The first sealing material intrusion prevention wall is finer than the wiring pattern.

12. The elastic wave device according to claim 1, characterized in that: Multiple of the resonators are elastic surface wave resonators, and bandpass filters or duplexers are formed on the device chip.

13. The elastic wave device according to claim 1, characterized in that: Multiple of the resonators are thin-film acoustic resonators, and bandpass filters or duplexers are formed on the device chip.

14. A module comprising the elastic wave device according to any one of claims 1 to 13.

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