Subqueue insertion schemes executable by a queue manager and related systems and operations

Abstract

Disclosed herein are insertion schemes that enable the division of a queue into one or more sub-queues to more efficiently manage the insertion of queue elements. Typically, a computing device will have a primary buffer populated with queue elements for execution by a processor. However, the amount of contiguous memory space allocated for the primary buffer is fixed. To address this issue, a queue manager can insert an indicator linked to a secondary buffer into the primary buffer to extend the number of active entries in the primary buffer.

Description

[0001] Cross Reference to Related Applications

[0002] This application claims priority to U.S. Provisional Application No. 62 / 968,467, filed January 31, 2020, entitled “Hardware Queue Manager with Sub-Queue Insertions for Task and Sub-Task Controls and Processing,” the entirety of which is incorporated by reference herein in its entirety. TECHNICAL FIELD

[0003] Various embodiments relate to methods of nesting sub-queues within queues to allow for more efficient management of elements queued for execution. BACKGROUND

[0004] Generally, a wireless network system has two paths of communication - an uplink path and a downlink path. When data is transmitted along the downlink path from a base station (e.g., a cellular base station) to a computing device, the computing device receives the data packet and then processes it according to a protocol stack. The term “protocol stack” refers to a computing device’s software implementation of a suite of communication protocols. Individual protocols in a suite of communication protocols can be designed for a single purpose; however, because each protocol typically communicates with at least one other protocol, protocols are generally viewed as layers in a stack. In a protocol stack, the lowest layer is responsible for interacting with the underlying hardware, and each layer higher in the stack adds additional functionality.

[0005] One example of a protocol stack is the Evolved Universal Mobile Telecommunications System (UMTS) Terrestrial Radio Access (E-UTRA) protocol stack developed for Long Term Evolution (LTE). As shown in FIG. 1, the E-UTRA protocol stack includes a physical layer 102, a medium access control (MAC) layer 104, a radio link control (RLC) layer 106, a packet data convergence protocol (PDCP) layer 108, a service data adaptation protocol (SDAP) layer 110, and a new radio (NR) radio resource control (RRC) layer 112. Figure 1As shown, the E-UTRA protocol stack includes a Medium Access Control (MAC) layer, a Radio Link Control (RLC) layer, and a Packet Data Convergence Protocol (PDCP) layer. The MAC layer controls the physical hardware responsible for interacting with the transport channels of the transmission medium. The RLC layer sits above the MAC layer, but below the PDCP layer, thus acting as an interface between the MAC layer and the PDCP layer. Some of the main functions of the RLC layer are to segment upper layer Service Data Units (SDUs) into RLC Protocol Data Units (PDUs), and to desegmentation (also known as "concatenation") lower layer PDUs into RLC SDUs. SUMMARY

[0006] What is introduced here is a method that is capable of dividing a queue into one or more sub-queues to more efficiently manage information units and tasks. For example, assume that a queue manager determines that a new queue element should be executed before existing queue elements previously populated in an entry of a primary buffer. In this case, the queue manager can store the existing queue elements to storage space, then insert a special queue element in the entry that, when executed, routes the processor to a secondary buffer. The queue manager can then populate the new queue element and the existing queue elements into the secondary buffer, such that the processor executes the new queue element before the existing queue elements.

[0007] Sub-queues can also be used to expand the available capacity of a primary buffer in which queue elements are populated for execution by a processor. For example, in some embodiments, a queue manager is configured to monitor the available capacity of a primary buffer. Upon determining that the available capacity of the primary buffer has fallen below a threshold, the queue manager can insert a special queue element into the primary buffer that, when executed, routes the processor to a secondary buffer in which queue elements can be populated. BRIEF DESCRIPTION OF DRAWINGS

[0008] Figure 1 A portion of an E-UTRA protocol stack developed for LTE is shown.

[0009] Figure 2 A high-level block diagram showing how a queue manager implements an insertion scheme to manage a primary queue buffer (or simply "primary buffer") is included.

[0010] Figure 3How queues are nested into each other using insertion indicators to extend the number of valid entries in a primary buffer is shown.

[0011] Figure 4 How a Queuing Element (QE) is formatted in some embodiments is shown.

[0012] Figure 5 How Not Empty (NE) indications for a queue (or group of queues) are merged into a hierarchical bitmap usable by a queue manager is shown.

[0013] Figure 6 How Overflow (OF) indications for a queue (or group of queues) are merged into a hierarchical bitmap usable by a queue manager is shown.

[0014] Figure 7 How underflow (UF) indications for a queue (or group of queues) are merged into a hierarchical bitmap usable by a queue manager is shown.

[0015] Figure 8 An example of a data structure in which a timer (more specifically, a timer identifier) is associated with a threshold duration is shown.

[0016] Figure 9 An example of a data structure in which information / statistics related to a queue can be stored is shown.

[0017] Figure 10 An example of a data structure representing an ordered list of primary buffers managed by a queue manager is shown.

[0018] Figure 11 A flowchart of a process to replace existing queuing elements in a primary buffer with special queuing elements that include insertion indicators for secondary buffers is shown.

[0019] Figure 12 A flowchart of another process to replace existing queuing elements in a primary buffer with special queuing elements that include insertion indicators for secondary buffers is shown.

[0020] Figure 13 A high-level block diagram including a queue manager implemented on a computing device.

[0021] Figure 14 A high-level block diagram including an example of a computing system in which at least some of the operations described herein can be implemented is shown.

[0022] The various features of the technology described herein will become apparent to one of ordinary skill in the art upon reading the detailed description of the specific embodiments. Embodiments are illustrated in the drawings with similar reference numerals representing similar elements. Although the various embodiments are illustrated with respect to specific embodiments, one skilled in the art will recognize that the technology can be embodied with alternative embodiments without departing from the spirit of the technology. Thus, although the technology is described with respect to specific embodiments, it will be readily apparent to one of ordinary skill in the art that it can be practiced with modification and alteration. DETAILED DESCRIPTION

[0023] Similar to the layers in the protocol suite of 4G and 5G wireless communication standards, in the MAC layer, a single information unit or a single processing task (or simply “task”) often has to be divided into multiple sub-units or sub-tasks. This can happen, for example, when performing segmentation or de-segmentation. To process the sub-units and sub-tasks more efficiently, several software-implemented methods have been developed. However, these software-implemented methods have significant drawbacks. For example, these software-implemented methods consume relatively high power due to the additional computations involved, and require more data buffers (or simply “buffers”) to temporarily store the sub-units or sub-tasks. Furthermore, the performance of these software-implemented methods tends to be quite slow, thus resulting in significant latency.

[0024] To speed up the processing of the sub-units and sub-tasks, more efficient control of the underlying hardware is needed. Thus, introduced herein are methods that enable the division of a queue into one or more sub-queues to more efficiently manage the information units and tasks. For illustrative purposes, embodiments can be described in the context of queue elements, which are loaded into entries in a queue for processing. The terms “queue element” and “element” as used herein refer to a sub-task, sub-unit, or any other information that needs to be processed.

[0025] As described below, the present disclosure is directed to hardware-implemented methods for dividing a main queue (or simply “queue”) into one or more sub-queues, where queue elements can be populated into the sub-queues. These methods facilitate the design of an acceleration engine, which is configured to segment or de-segment an RLC layer, as well as implement the segmentation and de-segmentation protocols. As an example, a single RLC PDU can be split into multiple RLC PDU segments, which are populated into the sub-queues, or multiple PLC PDU segments in the sub-queues can be concatenated into a single RLC PDU.

[0026] Embodiments can be described with reference to specific types of network technology, protocol stacks, procedures, etc. However, those skilled in the art will recognize that these features are similarly applicable to other types of network technology, protocol stacks, etc. For example, while embodiments are described in the context of an LTE protocol stack, features of these embodiments can be extended to protocol stacks developed for 4G / 5G network technology. As another example, while methods described herein can be described in the context of preventing overflow, features of these methods can also be used to ensure that certain actions (e.g., retransmission of data packets) need to occur at a certain point in a queue that has already been scheduled.

[0027] Aspects of the technology can be implemented using special- purpose hardware (e.g., circuitry), using software and / or firmware programmed to perform the various processes, or using a combination of special-purpose hardware and programmed, general-purpose hardware. Accordingly, embodiments can include a machine-readable medium having instructions stored therein, which when executed by a computing device, cause the computing device to perform a process of inserting a special queue element into a queue, the control information of a sub-queue being pointed to upon reading the special queue element. Entries can be populated in the sub-queue for processing. Further, the control information can include a return pointer indicating a location to return to in the queue after all entries in the sub-queue have been processed.

[0028] Terminology

[0029] Reference in the specification to “an embodiment” or “one embodiment” means that a particular feature, structure, or characteristic described is included in at least one embodiment. The appearance of the phrase “in an embodiment” or “in one embodiment” in various places in the specification are not necessarily all referring to the same embodiment, nor are they necessarily referring to a common, alternative embodiment.

[0030] The words “comprise,” “comprising,” “include,” “including,” and the like are to be construed in an inclusive sense, as opposed to an exclusive or exhaustive sense, unless explicitly indicated to be a exclusive or exhaustive sense by context. Similarly, the term “based on” is intended to be interpreted as “based, at least in part, on” unless explicitly indicated to be a exclusive or exhaustive sense by context.

[0031] The terms “connected,” “coupled,” or any variant thereof, are intended to include any connection or coupling, either direct or indirect, between two or more elements. The connection / coupling can be physical, logical, or a combination thereof. For example, objects can be electrically coupled or communicatively coupled to one another, although not sharing a physical connection.

[0032] The word “or” as used herein is intended to encompass all possible combinations of the items connected by the word “or.” For example, the phrase “A or B” is intended to encompass A, B, or both A and B.

[0033] The order of steps performed in any process described herein is exemplary. However, unless contrary to physical possibilities, these steps can be performed in various orders and combinations. For example, steps can be added or removed from the processes described herein. Similarly, steps can be substituted or reordered. Therefore, any description of a process is open-ended.

[0034] Overview of the insertion scheme

[0035] Figure 2 This includes a high-level block diagram illustrating how a queue manager implements an insertion scheme to manage a primary queue buffer (or simply "primary buffer") 202. For illustrative purposes, the insertion scheme will be described in the context of a single primary buffer (also referred to as the "master buffer"). However, those skilled in the art will recognize that a queue manager can manage any number of primary buffers.

[0036] Primary buffer 202 can be any region of physical memory storage where data can be temporarily stored. For example, primary buffer 202 can be a circular buffer (also called a "periodic buffer" or "ring buffer"), which represents a data structure using a fixed-size buffer as if it were end-to-end connected. A circular buffer is a bounded queue with independent indices (write_pointer, read_pointer) for inserting and deleting data. Therefore, these indices continue to work within the bounded queue as if the buffer were inherently contiguous. Such a data structure helps buffer the data stream because individual queue elements do not need to be shuffled when a single queue element is consumed. When the read pointer reads a queue element from an entry in the circular buffer, the read pointer can advance only to the next entry in the circular buffer. Conversely, if primary buffer 202 were a non-circular buffer, all queue elements would have to be moved when one queue element is consumed. In the protocol stack applicable to 4G / 5G network technologies, the primary buffer 202 can be used as a queue for incoming traffic after flow classification, or the primary buffer 202 can be used as a queue for QoS traffic after Quality of Service (QoS) classification.

[0037] like Figure 2 As shown, the primary buffer 202 may have a status register 206, which can be used as a control parameter by the queue manager. This status register 206 includes read and write pointers, control indicators (also called "control flags") indicating whether the queue is full, empty, or its size, and related interrupts for controlling the Central Processing Unit (CPU) (also called the "processor"). See below for reference.Figures 5-8 Further discussion of these status registers. The read and write pointers can be updated while queue elements in the primary buffer 202 are being enqueued and dequeued. Each entry in the primary buffer 202 can temporarily store a queue element containing information about a task or object. For example, the queue element can be a descriptor for a data packet or a command for operating hardware.

[0038] Queue elements can be stored in contiguous memory space so that multiple queue elements can be dequeued at once. For example, multiple queue elements can be dequeued at once if the execution of one queue element depends on the execution result of the previous queue element. Storing queue elements in contiguous memory space (e.g., a circular buffer) improves the efficiency of the bus to which the queue manager is communicatively connected and avoids excessive delay due to delays in accessing system data. This also makes the control scheme easier to implement in hardware. However, one problem with conventional control schemes is that the hardware-implemented buffer exists in contiguous memory space, which makes it difficult to perform insertion between adjacent queue elements. If it is necessary to add a new queue element to the primary buffer at a certain position in the queue (e.g., between a pair of existing queue elements), there is no direct way to do so efficiently using conventional control schemes.

[0039] The present disclosure introduces an insertion scheme that addresses this problem. Assume that the primary buffer 202 includes a sequence of queue elements stored in contiguous memory space allocated for the queue. Further, assume that each entry is of the same size and format. To implement the insertion scheme, the queue manager can insert a special queue element, in which a field is defined as an “insertion indicator,” which is actually a pointer to storage space in which subqueue control information can be stored.

[0040] In Figure 2 In the following, there are two subqueues referred to as secondary queue buffers 204a-b (or simply “secondary buffers”). In terms of basic features, each secondary buffer 204a-b can be similar to the primary buffer 202. For example, each secondary buffer 204a-b can have its own set of read and write pointers and other status registers for control information such as size, type, etc. However, each secondary buffer 204a-b can also have unique information defined in the control information, namely a return pointer (subq_return). The return pointer indicates the location to which the subqueue will return. If the return pointer points to the control information of the primary buffer 202, the subqueue will return to the primary buffer 202 when all queue elements in the subqueue have been completely processed. Alternatively, the return pointer can point to the control information of another subqueue, as discussed below with reference to Figure 3Therefore, the insertion indicator can be used to nest sub-queues within the primary buffer 202 without restriction.

[0041] If the capacity of primary buffer 202 exceeds a threshold, the insertion indicator can also be used to expand primary buffer 202. For example, the insertion indicator can be used to ensure that primary buffer 202 does not run out of its allocated memory space. For example, if the queue manager determines that a write pointer may overwrite an existing queue element in primary buffer 202, the queue manager can remove the most recently filled queue element from primary buffer 202, insert the insertion indicator to expand the amount of available memory space, and then have the removed queue element written to the secondary buffer pointed to by the insertion indicator.

[0042] Figure 3 This demonstrates how to use the insertion indicator to nest queues to expand the number of valid entries in primary buffer 202. Figure 3 In this diagram, two insertion indicators have been inserted into the queue of primary buffer 302. Each of these insertion indicators points to a different secondary queue buffer 304a-b (or simply "secondary buffer"). Two insertion indicators have been inserted into the queue of one secondary buffer (i.e., secondary buffer 304a), while one insertion indicator has been inserted into the queue of another secondary buffer (i.e., secondary buffer 304b). Each of these insertion indicators points to a different tertiary queue buffer 306a-b (or simply "tertiary buffer"). The terms "primary," "secondary," and "tertiary" are used to describe the fact that the primary queue may have different levels of sub-queue nesting. Those skilled in the art will recognize that the insertion scheme described herein can be used to insert any number of sub-queues along any level. Therefore, although the embodiments are described in the context of "secondary buffers" of "primary buffers," these features are similarly applicable to "tertiary buffers" of "secondary buffers."

[0043] Before inserting the queue elements into a sub-queue (e.g., one of the secondary buffers 304a-b or the tertiary buffers 306a-c), the queue manager can first organize the queue elements. For example, assume that the queue manager intentionally adds queue elements to the primary buffer 302 at a desired location. In the primary buffer 302 at the location where the queue elements are to be added, two different scenarios can occur. First, the secondary buffer can replace the queue elements in the primary buffer 302 at that location. In this case, the queue manager changes the queue elements in the primary buffer 302 to special queue elements that include an insertion indicator that points to the control information of the secondary buffer. Second, the secondary buffer can be inserted before the regular queue elements in the primary buffer 302. In this case, the regular queue elements are saved into a storage space (e.g., a register) and then replaced with special queue elements that include an insertion indicator. The insertion indicator will point to the control information of the secondary buffer to be inserted into the primary buffer 302. The regular queue elements can then be populated into the secondary buffer. The location in the secondary buffer where the regular queue elements are populated depends on the order in which the queue manager wants the queue elements to be processed. For example, the regular queue elements can be populated at the end of the secondary buffer so as to be executed immediately before returning to the primary buffer 302. In some embodiments, the queue manager is configured to dynamically increase the size of the secondary buffer (e.g., by one queue element) to indicate the saved queue elements copied from the primary buffer 302. As described below, the control and statistics information for the primary buffer 302 can be updated after the special queue elements are inserted into the primary buffer 302.

[0044] To perform these operations, the queue manager can implement a special command to merge the secondary buffer. The special command can be different from the normal enqueue and dequeue commands. The special command can define the entry point in the primary buffer 302 and the special queue element to be inserted. In addition, the special command can instruct the queue manager to update the statistics information of the primary buffer 302 using the additional information about the secondary buffer pointed to by the special element.

[0045] Figure 4How a queue element (QE) 400 is formatted in some embodiments is shown. In this example format, there are various fields for different types of information. For example, the queue element 400 includes a type field 402 that specifies the type, i.e., whether the queue element 400 is a normal queue element (also referred to as a "regular queue element") or a special queue element. If the type field 402 indicates that the queue element 400 is a special queue element, then one of the other fields will be used as a pointer to control information for a corresponding sub-queue. For example, the last 32 bits of one of the information fields 404a-d can include an insertion indicator that points to storage space for storing control information for a corresponding sub-queue. For example, in this insertion indicator is included in the information field labeled "QE Info 4."

[0046] Figure 5 How a non-empty (NE) indication for a queue (or group of queues) is merged into a hierarchical bitmap 500 that is usable by a queue manager is shown. A master NE indicator 502 indicates to the queue manager whether any of the queues managed by the queue manager is non-empty.

[0047] In some embodiments, the queue manager is responsible for managing a group of primary buffers. In such embodiments, the master NE indicator 502 will indicate non-empty as long as at least one of the primary buffers is not empty. However, it is noted that as described above, some of these primary buffers can have secondary buffers nested within them. To account for the secondary buffers, the hierarchical bitmap 500 can indicate which groups of queues are non-empty. For example, here NE0 is the NE indicator for queue group 0, which is used as a logical OR operator for all of the queues in queue group 0. Queue group 0 can represent a single queue (e.g., a primary buffer), or queue group 0 can represent multiple queues (e.g., a primary buffer and one or more secondary buffers). Thus, NE0 will indicate that queue group 0 is non-empty as long as one of the queues in queue group 0 is non-empty. NE1, NE2, and NE3 are the NE indicators for queue group 1, queue group 2, and queue group 3, respectively. It is noted that the number of queues in each group need not be the same.

[0048] The master NE indicator 502 can be used as a logical OR operator for all of the groups of queues. Thus, the master NE indicator 502 can indicate non-empty if any of the NE indicators for the groups of queues indicate non-empty. The hierarchy and interval size of the queues / groups can be highly programmable.

[0049] Figure 6How the overflow (OF) indicators 600 for queues (or groups of queues) are merged into a hierarchical bitmap 600 that can be used by the queue manager is shown. The main OF indicator 602 indicates to the queue manager whether overflow has occurred for any of the queues managed by the queue manager. The term "overflow" as used herein refers to a write event that occurs when a queue is full. If the queue is a circular buffer, the overflow can cause an existing queue element to be overwritten with a new queue element by the write pointer.

[0050] In some embodiments, the queue manager is responsible for managing a group of primary buffers. In these embodiments, the main OF indicator 602 will indicate overflow as long as at least one of the primary buffers is full. Similar to the hierarchical bitmap 500 in Figure 5 The queue manager can use the hierarchical bitmap 600 in Figure 6 to indicate which queues (or groups of queues) overflow. For example, here OF0 is the OF indicator for queue group 0, which acts as a logical OR operator for all queues in queue group 0. Queue group 0 can represent a single queue (e.g., a primary buffer), or queue group 0 can represent multiple queues (e.g., a primary buffer and one or more secondary buffers). Thus, if any of the queues in queue group 0 is overflowing, OF0 will indicate that queue group 0 is overflowing. OF1, OF2, and OF3 are the OF indicators for queue group 1, queue group 2, and queue group 3, respectively. Note that the number of queues in each group does not have to be the same.

[0051] The main OF indicator 602 can act as a logical OR operator for all queue groups. Thus, if any of the OF indicators for the queue groups indicates overflow, the main OF indicator 602 can indicate overflow. The hierarchy and interval size of the queues / groups can be highly programmable.

[0052] Figure 7 How the underflow (UF) indicators are merged into a hierarchical bitmap 700 that can be used by the queue manager is shown. The main UF indicator 702 indicates to the queue manager whether underflow has occurred for any of the queues managed by the queue manager. The term "underflow" as used herein refers to a read event that occurs when a queue is empty. Thus, underflow only occurs when a queue is completely empty of queue elements.

[0053] In some embodiments, the queue manager is responsible for managing a group of primary buffers. In these embodiments, the main UF indicator 702 will indicate underflow if any of the primary buffers is experiencing underflow (i.e., is empty). Similar to the hierarchical bitmaps 500, 600 in Figures 5-6 The queue manager can use the hierarchical bitmap 700 in Figure 7The UF indicators in the hierarchical bitmap 700 can be used to indicate which queues (or groups of queues) are underflowing. For example, UF0 is the UF indicator for queue group 0, and is used as a logical OR operator for all queues in queue group 0. Queue group 0 can represent a single queue (e.g., a primary buffer), or queue group 0 can represent multiple queues (e.g., a primary buffer and one or more secondary buffers). Thus, if any of the queues in queue group 0 underflow, UF0 will indicate that queue group 0 is underflowing. UF1, UF2, and UF3 are the UF indicators for queue group 1, queue group 2, and queue group 3, respectively. It is noted that the number of queues in each group need not be the same.

[0054] The master UF indicator 702 can act as a logical OR operator for all queue groups. Thus, if any of the UF indicators for the queue groups indicate underflow, the master UF indicator 702 can indicate underflow. The hierarchy and interval size of the queues / groups can be highly programmable.

[0055] Each queue managed by the queue manager can be associated with a set of timers to indicate timeout events. Figure 8 An example of a data structure in which timers (more specifically, timer identifiers) are associated with threshold durations is shown. The timers can be used to indicate that a timeout exception has occurred in operating on the queues described above, thereby violating a particular time limit. The timers can be count-down timers or count-up timers configured to generate an interrupt upon expiration.

[0056] Queue information and statistics can be maintained in a data structure (e.g., a table) that is searchable using, for example, a queue identifier. Figure 9 An example of a data structure in which information / statistics related to queues can be stored is shown. A queue identifier can uniquely identify a corresponding queue from among all queues managed by the queue manager, from among all queues included in a computing device, etc. Typically, individual primary buffers are associated with different queue identifiers, and information / statistics associated with each primary buffer can be associated with the corresponding queue identifier. For example, in Figure 9 In the example shown in FIG. 7, each row in the table is associated with a different queue.

[0057] As described above, if any secondary buffers are nested within a primary buffer, the queue manager can be responsible for ensuring that the information / statistics associated with each primary buffer are updated. Thus, each time the queue manager adds or removes a secondary buffer, the data structures are updated. These data structures can be stored in memory (storage) and accessible to software and / or firmware executing on a computing device to which the queue manager belongs. As described above, the queue manager can be responsible for ensuring that the information / statistics associated with each primary buffer are updated. Thus, each time the queue manager adds or removes a secondary buffer, the data structures are updated. These data structures can be stored in memory (storage) and accessible to software and / or firmware executing on a computing device to which the queue manager belongs. As described above, the queue manager can be responsible for ensuring that the information / statistics associated with each primary buffer are updated. Thus, each time the queue manager adds or removes a secondary buffer, the data structures are updated. These data structures can be stored in memory (storage) and accessible to software and / or firmware executing on a computing device to which the queue manager belongs. As described above, the queue manager can be responsible for ensuring that the information / statistics associated with each primary buffer are updated. Thus, each time the queue manager adds or removes a secondary buffer, the data structures are updated. These data structures can be stored in memory (storage) and accessible to software and / or firmware executing on a computing device to which the queue manager belongs. Figure 9As shown, the data structure can include information / statistical information such as queue size, queue type, queue priority.

[0058] In some embodiments, the queue manager is configured to automatically order the primary buffers it is responsible for managing according to size. Thus, the queue manager can generate a list of primary buffers ordered from largest to smallest, or vice versa. In other words, the queue manager can order the list of primary buffers in ascending or descending order, so the first entry can be the largest queue or the smallest queue, depending on the order configured. Figure 10 An example of a data structure representing an ordered list of primary buffers managed by the queue manager is shown. As Figure 10 As shown, each primary buffer can be identified in the data structure by its queue identifier (Queue ID), which enables the ordered list to be easily retrieved from memory.

[0059] As mentioned above, there are at least two cases in which the queue manager can implement an insertion scheme. Figures 11-12 These cases are discussed.

[0060] First, the queue manager can choose to replace a bounded existing queue element in the primary buffer with the secondary buffer. In this case, the queue manager needs to change the bounded existing queue element to a special queue element that, when executed, routes the processor to the secondary buffer. The term "bounded" as used herein refers to one existing queue element before and after the existing queue element. When the existing queue element is bounded, inserting a new queue element is difficult to implement as it requires rearranging multiple existing queue elements.

[0061] Figure 11 A flowchart of a process 1100 to replace a bounded existing queue element in the primary buffer with a special queue element that includes an insertion indicator for the secondary buffer is shown. Initially, the queue manager determines that the new queue element is to be executed before a bounded existing queue element in the primary buffer (step 1101). As an example, assume that the primary buffer includes five queue elements to be executed, and the queue manager has determined that the new queue element should be executed after the third queue element and before the fourth queue element. In such a case, the second, third, and fourth queue elements are "bounded".

[0062] The queue manager can save the bounded existing queue element to storage space instead of rearranging the plurality of queue elements (step 1102). For example, the queue manager can temporarily save the bounded existing queue element to a register. The queue manager can then insert the special queue element into the primary buffer to replace the bounded existing queue element (step 1103). More specifically, the queue manager can cause the special queue element to be written into the same entry in the primary buffer, thereby overwriting the bounded existing queue element. As described above, the special queue element can include an insertion indicator that, when executed, routes the processor to the secondary buffer.

[0063] Thereafter, the queue manager can populate the secondary buffer with the new queue element and the existing queue element such that the processor will execute the new queue element before executing the existing queue element (step 1104). The location in the secondary buffer in which the new queue element and the existing queue element are populated can depend on the order in which the queue manager desires these queue elements to be executed. For example, the existing queue element can be populated in the last entry of the secondary buffer such that it is executed immediately before the processor redirects from the secondary buffer to the primary buffer. As another example, the new queue element can be populated in the first entry of the secondary buffer such that it is executed immediately after the processor redirects from the primary buffer to the secondary buffer.

[0064] For illustrative purposes, again referring to the example described above in which the primary buffer includes five queue elements to be executed and the queue manager has determined that the new queue element should be executed after the third queue element and before the fourth queue element. In this case, the queue manager can temporarily save the fourth queue element to storage (e.g., a register), insert the special queue element in place of the fourth queue element, and then populate the secondary buffer with the new queue element and the fourth queue element. The new queue element can be populated in any entry of the secondary buffer above the fourth queue element. For example, the new queue element can be populated in the first entry of the secondary buffer and the fourth queue element can be populated in the second entry of the secondary buffer, or the new queue element can be populated in the first entry of the secondary buffer and the fourth queue element can be populated in the last entry of the secondary buffer.

[0065] Alternatively, the queue manager can populate the existing queue element directly into the secondary buffer instead of into storage as described above with reference to step 1102. In such embodiments, in response to determining that the new queue element should be executed before the existing queue element, the queue manager can populate the existing queue element directly into a predetermined entry in the secondary buffer. The predetermined entry can be, for example, the first entry or the last entry in the secondary buffer.

[0066] In some embodiments, the queue manager is configured to increase the size of the secondary buffer to account for existing queue elements copied from the primary buffer. For example, the queue manager can dynamically increase the size of the secondary buffer by one entry to account for an existing queue element. Further, as described above, in some embodiments, information about the primary buffer can be maintained (e.g., in a register). In such embodiments, the queue manager can ensure that the information is updated to account for the nesting of the secondary buffer within the primary buffer.

[0067] Second, the queue manager can choose to insert the secondary buffer before an existing queue element to avoid overwriting (e.g., due to overflow). In this case, the queue manager needs to replace the existing queue element with a special queue element that, when executed, routes the processor to the secondary buffer.

[0068] Figure 12 A flowchart illustrating another process 1200 of replacing an existing queue element in the primary buffer with a special queue element that includes an insertion indicator for the secondary buffer is shown. Initially, the queue manager can monitor the available capacity of the primary buffer, which is filled with queue elements for the processor to execute (step 1201). While monitoring the available capacity, the queue manager can determine that the available capacity of the primary buffer has fallen below a predetermined threshold (step 1202). For example, the queue manager can continuously check an overflow (OF) indicator associated with the primary buffer to discover when all entries in the primary buffer are filled. As another example, the queue manager can continuously check the primary buffer itself to determine when there is one or zero entries unfilled.

[0069] The queue manager can then allocate memory space for the secondary buffer in which a queue element can be filled (step 1203), and insert a special queue element into the primary buffer that, when executed, routes the processor to the secondary buffer (step 1204). More specifically, the queue manager can identify an existing queue element that was most recently filled into the primary buffer, save the existing queue element to storage space (such as a register), and then fill the existing queue element into the secondary buffer. Thus, the queue manager can copy the most recently filled queue element from the primary buffer into the secondary buffer to expand the number of valid entries in the primary buffer. Typically, the existing queue element is filled into the first entry of the secondary buffer. However, the existing queue element can also be filled into another entry of the secondary buffer.

[0070] As described above with respect to step 1203, memory space can be allocated for a secondary buffer as needed. However, when a secondary buffer is no longer needed, the queue manager desires to release the previously allocated memory space. In other words, because a secondary buffer is intended to be used temporarily for overflow, in response to determining that there is no longer an overflow, the queue manager desires to release the memory space allocated to the secondary buffer. Thus, the queue manager can monitor the available capacity of the secondary buffer (step 1205). For example, the queue manager can continually check the underflow (UF) indicator or not empty (NE) indicator associated with the secondary buffer. If the queue manager determines that at least one entry in the secondary buffer has not been executed, the queue manager does not take further action. However, if the queue manager determines that all entries in the secondary buffer have been executed, the queue manager can release the memory space allocated to the secondary buffer (step 1206). Thus, the queue manager can dynamically allocate and release memory space based on the number of secondary buffers needed over a period of time.

[0071] The steps of these processes can be performed in various orders. For example, Figure 12 Steps 1203 and 1205-1206 of process 1200 can be included in process 1100 of FIG. 11. Figure 11 Other steps can also be included in some embodiments.

[0072] There are several alternatives to the methods described herein.

[0073] One alternative involves copying all queue elements below the location where a new queue element is to be inserted. For example, assume that a new queue element is to be inserted into a primary buffer that includes five queue elements, which are arranged consecutively in the queue. If the queue manager determines that the new queue element should be placed above the second queue element, then the queue manager can copy the second, third, fourth, and fifth queue elements (e.g., for inclusion in a secondary buffer). However, this approach is computationally complex, slow, and power intensive.

[0074] Another alternative involves representing each queue as a contiguous list of memory blocks. This approach allows the entire queue to be represented as a linked list of memory blocks. To add to the list at any time, the queue manager need only create another link in the linked list of memory blocks. While this approach is relatively simple, to insert into the middle of the memory blocks, the queue manager must split the memory blocks into two memory blocks and then insert a new memory block between the two memory blocks. Alternatively, the queue manager can use the insertion scheme described herein. This alternative has several advantages, namely: (1) it allows a tradeoff between the performance of contiguous memory blocks and the flexibility; (2) if the linked list of memory blocks is deallocated, the linked list can easily deallocate the freed memory blocks and relink the list. Thus, this approach provides efficient space allocation / deallocation since the free memory block area shrinks as memory blocks are reallocated back into the pool. The disadvantage of this approach is that it is difficult for hardware to handle a linked list of memory blocks. At a high level, the simple memory blocks complicate the normal enqueue and dequeue operations, so a circular buffer tends to be more efficient for hardware-implemented queue operations.

[0075] Overview of the queue manager

[0076] Figure 13 A high-level block diagram of the queue manager 1302 implemented on the computing device 1300. Under normal operation, the buffer space will initially be created by the queue manager 1302 since the number of primary buffers (and the size of these primary buffers) is known. However, once subqueues are added to the primary buffers, the buffer space can be allocated dynamically and then freed by the buffer deallocator 1304. The allocation of buffers can be based on external operations as the subqueues are constructed. After the subqueues are finished, the queue manager 1302 can be responsible for freeing the corresponding buffers back to the buffer deallocator 1304 via the buffer manager 1306.

[0077] The queue manager 1302 can maintain a register set 1308 for some or all of the control registers. For example, the queue manager 1302 can maintain a separate register set for each queue (e.g., the registers 206 of FIG. 2), although the information included in the register set can depend on whether the queue represents a primary buffer or a secondary buffer. These register sets 1308 can be programmed through a register bus 1310 that is communicatively connected to the queue manager 1302. Figure 2

[0078] ​The event processing engine 1312 can be responsible for enqueuing and dequeuing elements, including special elements with insertion indicators, into buffers allocated by the buffer releaser 1304. In some embodiments, the queue manager 1302 also includes a dedicated module for computing statistics, ordering queues, and the like. This dedicated module can be referred to as a “compute and order engine 1314” and can be implemented by hardware, firmware, software, or any combination thereof. As noted above, the buffer releaser 1304 can be responsible for interacting with the buffer manager 1306 to allocate buffers and / or release buffers when necessary after the end of a queue.

[0079] In some embodiments, the queue manager 1302 is communicatively connected to the system bus 1316 via a direct memory access (DMA) channel 1318. Such a design is only necessary when the queue is shared with software executing in the system memory 1320 of the computing device 1300, although this is a common way for queue managers.

[0080] Advantages of the insertion scheme

[0081] Multiple advantages can be obtained by using the insertion scheme described herein. These advantages include:

[0082] • reduced power consumption due to efficient operation of hardware-implemented queues;

[0083] • higher speed processing by hardware-implemented queues compared to fully software-implemented queues, thereby improving processing speed;

[0084] • flexible and efficient management of lists in hardware design; and

[0085] • flexible and efficient use of memory (e.g., additional memory for sub-queues can be dynamically added / removed as sub-queues are added / removed).

[0086] These advantages can be particularly useful for portable computing devices (also referred to as “mobile computing devices”), such as mobile phones, routers, and the like. For example, the insertion scheme can be used for high-performance, low-cost, and / or low-power modems designed for 4G / 5G network technologies (also referred to as “4G modems” or “5G modems”).

[0087] Computing system

[0088] Figure 14 A high-level block diagram including an example of a computing system 1400 in which a queue manager can be implemented is shown. Thus, components of the computing system 1100 can host a queue manager (e.g., the queue manager 1302 of Figure 13 the computing device (e.g.,Figure 13 on the computing device 1300.

[0089] The computing system 1400 can include a processor 1402, a main memory 1406, a non-volatile memory 1410, a network adapter 1412 (e.g., a network interface), a video display 1418, input / output devices 1420, a control device 1422 (e.g., a keyboard, pointing device, or mechanical input such as a button), a drive unit 1424 including a storage medium 1426, and a signal generation device 1430 communicatively coupled to a bus 1416. The bus 4116 is represented as an abstraction, which represents one or more physical busses and / or point-to-point connections, utilizing any suitable bus or interconnect also bridged, adapted, or controlled by other hardware or software. As such, the bus 1416 can include a system bus, Peripheral Component Interconnect (PCI) bus, PCI-Express bus, HyperTransport® bus, Industry Standard Architecture (ISA) bus, Small Computer System Interface (SCSI) bus, Universal Serial Bus (USB), Inter-Integrated Circuit (I2C) bus, or Institute of Electrical and Electronics Engineers (IEEE) standard 1394 bus, among others.

[0090] The computing system 1400 can share similar computer processor architectures with a server, a router, a desktop computer, a tablet computer, a mobile phone, an electronic game machine, a wearable electronic device (e.g., a watch or a fitness tracker), a network-connected (“smart”) device (e.g., a television or a home assistant device), an augmented or virtual reality system (e.g., a head-mounted display), or another electronic device capable of executing a set of instructions (sequential or otherwise) that specify actions to be taken by that device.

[0091] While the main memory 1406, the non-volatile memory 1410, and the storage medium 1424 are illustrated as single media, the terms “storage medium” and “machine-readable medium” should be taken to include a single or multiple media that store the set or sets of instructions 1426. The terms “storage medium” and “machine-readable medium” should also be taken to include any media that is capable of storing, encoding or carrying a set of instructions for execution by the processing system 1400.

[0092] In general, the routines executed to implement the embodiments of the disclosure can be implemented as part of an operating system or a specific application, component, program, object, module or sequence of instructions (collectively referred to as "computer programs"). The computer programs typically comprise one or more instructions (e.g., instructions 1404, 1408, 1428) set at various times in various memory and storage devices in a computing device, such as computer 1400. When read and executed by processor 1402, these instructions cause the computing system 1400 to perform operations to execute steps according to the aspects of the disclosure.

[0093] Although embodiments have been described in the context of fully functioning computing devices, those skilled in the art will appreciate that the various embodiments are capable of being distributed as a program product in a variety of forms. The disclosure applies equally regardless of the particular type of machine or computer-readable media used to actually effect the distribution. Examples of machines include, inter alia, personal computers, server computers, handheld computing devices, and tablets. Examples of computer-readable media include, but are not limited to, volatile and non-volatile, removable and non-removable media implemented in a method or technology for the storage and / or transmission of information such as computer software, program code or executable instructions. The computer-readable media also includes, but is not limited to, RAM, ROM, EEPROM, flash memory or other memory technology, CD-ROM, digital versatile disks (DVD) or other optical disk storage, magnetic cassettes, magnetic tape, magnetic disk storage or other magnetic storage devices, or any other medium which can be used to store the desired information and which can be accessed by a computer.

[0094] Network adapters 1412 facilitate communication in a network 1414 to or from the computing system 1400 for which the network adapter 1412 provides data communication through a communication channel. The network adapter 1412 can include a network adapter card, a wireless network interface card, a switch, a protocol converter, a gateway, a bridge, a hub, a receiver, a repeater, or a transceiver including an integrated circuit (e.g., enabling both transmission and reception of signals, or or communicating).

[0095] The techniques introduced herein can be implemented, at least in part, in hardware, software, firmware or any combination thereof. For example, various aspects of the disclosure can be implemented using an application specific integrated circuit (ASIC), a programmable logic device (PLD), a field programmable gate array (FPGA), and / or the like.

[0096] Addendum

[0097] The foregoing description of various embodiments has been presented for the purposes of illustration and description. It is not intended to be exhaustive or to limit the claimed subject matter to the precise form disclosed. Many modifications and variations are possible in light of the above teaching. Embodiments were chosen and described in order to best describe the principles of the application and its practical application to thereby enable others skilled in the art to best utilize the claimed subject matter, various embodiments, and various modifications as are suited to the particular use contemplated.

[0098] While the DETAILED DESCRIPTION describes various embodiments, it can be appreciated that the technology can be practiced in many ways. Embodiments can vary in many details. Specific terminology used in describing certain features or aspects of various embodiments should not be taken to indicate that the technology is limited to the specific features or aspects described, but should be taken to be the descriptive term broadly and generically applying to many embodiments. The description should not be construed as limiting the technology to the embodiments described in this specification, nor should the description be construed as limiting the technology to only those embodiments specifically described in the following claims. Thus, the actual scope of the technology is not limited to only the embodiments disclosed in this specification, but is defined by the appended claims along with their full scope of equivalents.

[0099] The language used in the specification is intended to be illustrative and instructive and not to limit the subject matter. Accordingly, the scope of the present technology is not limited to the embodiments disclosed in the specification, but rather the scope of the technology is limited only by the claims presented herewith. Thus, the disclosure of various embodiments is intended to be illustrative, but not limiting of the scope of the technology.

Claims

1. A method for managing a primary buffer in which queue elements are populated for execution by a processor, the method comprising: determining that a new queue element is to be executed before an existing queue element previously populated in an entry of the primary buffer; saving the existing queue element to storage; inserting a special queue element in the entry, which when executed, routes the processor to a secondary buffer; and populating the new queue element and the existing queue element into the secondary buffer such that the processor executes the new queue element before the existing queue element.

2. The method of claim 1, wherein, the existing queue element is populated in a last entry of the secondary buffer such that the processor executes immediately before redirecting from the secondary buffer to the primary buffer.

3. The method of claim 1, wherein, the new queue element is populated in a first entry of the secondary buffer such that the processor executes immediately after redirecting from the primary buffer to the secondary buffer.

4. The method of claim 1, wherein, the primary buffer is a circular buffer of fixed size.

5. The method of claim 1, wherein, the method further comprising: increasing a size of the secondary buffer by one entry to account for containing the existing queue element.

6. The method of claim 1, wherein, the method further comprising: updating information about the primary buffer in response to the populating to account for nesting the secondary buffer within the primary buffer, wherein the information is maintained in a register.

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