Light emitting component, light emitting element array chip, and light measuring device

Abstract

Provided are a light emitting component, a light emitting element array chip, and a light measuring device. The light emitting component has: a substrate; a plurality of light emitting elements disposed on the substrate, which emit light in a direction intersecting a face of the substrate; a plurality of hole portions disposed around each of the plurality of light emitting elements; and a gate electrode electrically connected to each of the plurality of light emitting elements and controlled in a manner that causes the plurality of light emitting elements to turn on and off together.

Description

Technical Field

[0001] This invention relates to light-emitting components, light-emitting element array chips, and photometers. Background Technology

[0002] Japanese Patent Application Publication No. 1-238962 describes a light-emitting element array comprising multiple light-emitting elements arranged in one-dimensional, two-dimensional or three-dimensional order in which threshold voltage or threshold current can be controlled externally, electrodes for controlling the threshold voltage or threshold current of each light-emitting element being electrically connected to each other, and a clock line for applying voltage or current from the outside being connected to each light-emitting element.

[0003] Japanese Patent Application Publication No. 2009-286048 discloses a self-scanning type light source head having a substrate, an array of surface-emitting semiconductor lasers arranged on the substrate, and thyristors arranged on the substrate as switching elements that selectively turn the surface-emitting semiconductor lasers on / off.

[0004] In 3D sensing and similar applications, a light-emitting section using a light-emitting element head is employed, which is equipped with multiple light-emitting elements. These light-emitting elements are not composed of a single unit, but rather of multiple elements, and are arranged in an array to synchronize their lighting and extinguishing. In this case, the configuration for lighting and extinguishing the array of multiple light-emitting elements is sometimes also a configuration for synchronized operation. Summary of the Invention

[0005] The purpose of this invention is to enable the lighting and extinguishing of multiple arrayed light-emitting elements to be synchronized.

[0006] According to a first aspect of the present invention, a light-emitting component is provided, comprising: a substrate; a plurality of light-emitting elements disposed on the substrate and emitting light in a direction intersecting a surface of the substrate; a plurality of holes disposed around each of the plurality of light-emitting elements; and a gate electrode electrically connected to each of the plurality of light-emitting elements and controlled in such a manner that the lighting and extinguishing of the plurality of light-emitting elements are performed simultaneously.

[0007] According to a second aspect of the present invention, the light-emitting element has a layered structure having a thyristor and a light-emitting layer disposed between the layers constituting the thyristor and emitting light.

[0008] According to a third aspect of the invention, the gate layer of the thyristor is located between the plurality of holes, connected as a common layer among the plurality of light-emitting elements, and electrically connected to the gate electrode.

[0009] According to a fourth aspect of the invention, the uppermost layer of the thyristor is located between the plurality of holes and is connected as a common layer among the plurality of light-emitting elements.

[0010] According to a fifth aspect of the invention, the thyristor has a current narrowing layer that is oxidized via the aperture to narrow the current flowing through the light-emitting layer.

[0011] According to a sixth aspect of the invention, the aperture has a depth at least reaching the lower surface of the gate electrode.

[0012] According to a seventh aspect of the invention, the aperture has a depth that further reaches the lowest layer of the light-emitting element having a thyristor structure.

[0013] According to the eighth aspect of the present invention, in order to form a current narrowing layer that is oxidized through the aperture and narrows the current flowing through the light-emitting layer of the plurality of light-emitting elements into a circular shape, the plurality of apertures are arranged in a circular shape around the light emission outlet of the light-emitting element at a predetermined interval.

[0014] According to a ninth aspect of the invention, the light-emitting component further comprises a thyristor stacked on the light-emitting element.

[0015] According to a 10th aspect of the invention, the thyristor is stacked on the light-emitting element with a tunnel junction layer or a III-V compound layer having metallic conductivity in between.

[0016] According to the eleventh aspect of the present invention, a light-emitting element array chip is provided, comprising: a column of light-emitting components arranged in a column-like manner in the main scanning direction; and a driving unit for inputting and outputting signals for driving the light-emitting components.

[0017] According to a 12th aspect of the present invention, a photometer is provided, comprising: a light-emitting component; a light-receiving component that receives reflected light from an object irradiated by light from the light-emitting component; and a processing unit that processes information related to the light received by the light-receiving component and measures the distance from the light-emitting component to the object or the shape of the object.

[0018] (Effect)

[0019] According to the first scheme, the lighting and extinguishing of multiple arrayed light-emitting elements can be synchronized.

[0020] According to the second scheme, the construction of the light-emitting element can be simplified.

[0021] According to the solutions in the third and fourth sections, the efficiency of the switch is improved.

[0022] According to the fifth scheme, current can flow through the emission outlet of the emitted light.

[0023] According to the sixth scheme, it is easy to separate the light-emitting points of multiple light-emitting elements.

[0024] According to the seventh scheme, it is easy to further separate the light-emitting points of the multiple light-emitting elements.

[0025] According to the eighth scheme, the injection port can be made approximately circular.

[0026] According to the ninth scheme, the light-emitting layer and the transmission thyristor can be separated.

[0027] According to the 10th scheme, the voltage used to drive the light-emitting element can be reduced.

[0028] According to the 11th solution, a light-emitting element array chip can be provided that enables the simultaneous lighting and extinguishing of multiple arrayed light-emitting elements.

[0029] According to the 12th scheme, a photometer device that enables the light-emitting elements to be lit in parallel can be obtained. Attached Figure Description

[0030] Figure 1 It is an equivalent circuit diagram illustrating the circuit structure of the light-emitting component.

[0031] Figure 2 Here are examples of a plan view and a cross-sectional view of the light-emitting component according to this embodiment. (a) is a plan view of the light-emitting component, and (b) is a cross-sectional view of line IIB-IIB of (a).

[0032] Figure 3 This is an enlarged view of the surface-emitting laser element in the light-emitting component of this embodiment.

[0033] Figure 4 This is an enlarged view of the light-emitting element in the light-emitting component of this embodiment.

[0034] Figure 5 It is a timing diagram illustrating the operation of the light-emitting component.

[0035] Figure 6 This is a diagram showing a modified example of the light-emitting element in the light-emitting component of this embodiment.

[0036] Figure 7 This diagram illustrates the points that must be considered when constructing a surface-emitting laser element with a layered structure and setting up a thyristor.

[0037] Figure 8 This is a top view of a light-emitting device equipped with a light-emitting chip that uses light-emitting components.

[0038] Figure 9 This is a diagram illustrating an example of the structure of a light-emitting chip, the structure of the signal generation circuit of the light-emitting device, and the structure of wiring (lines) on the circuit board.

[0039] Figure 10 This is a diagram illustrating a photometer that uses a light-emitting device.

[0040] Figure 11 This is a diagram illustrating an image forming apparatus that uses a light-emitting device. Detailed Implementation

[0041] The embodiments of the present invention will now be described in detail with reference to the accompanying drawings.

[0042] In addition, aluminum will be represented by Al and other element symbols below.

[0043] Here, the light-emitting component 10 will be described first. In this embodiment, the light-emitting component 10 has a plurality of surface-emitting laser elements (VCSELs) arranged in a row on the front side of a substrate 80 with a rectangular surface shape.

[0044] (Circuit structure of light-emitting component 10)

[0045] Figure 1 This is an equivalent circuit diagram illustrating the circuit structure of the light-emitting component 10. The components described below, except for the terminals ( terminal, Terminal, Vgk terminal, Apart from the terminals, the layout on the light-emitting component 10 (see below) Figure 2 The configuration is as follows. Furthermore, the Vsub terminal provided on the back side of the substrate 80 is shown to be led out to the outside of the substrate 80.

[0046] The light-emitting component 10 has a light-emitting part 102 composed of surface-emitting laser elements VCSEL1 to VCSEL128.

[0047] Furthermore, the light-emitting component 10 has transmission thyristors T1 to T128 arranged in a row, similar to the surface-emitting laser elements VCSEL1 to VCSEL128 (hereinafter referred to as transmission thyristors T1).

[0048] In addition, here, as an example of a transmission element, a transmission thyristor T is used for explanation. However, any element that is sequentially turned on can be used, or other circuit elements can be used. For example, a circuit element obtained by combining a shift register and multiple transistors can also be used.

[0049] Furthermore, in the light-emitting component 10, the transmission thyristors T1 to T128 are arranged in pairs according to their numbering order, and each pair is connected by coupling diodes D1 to D127 (referred to as coupling diodes D1 to D27 without distinction).

[0050] Furthermore, the light-emitting component 10 has power line resistances Rg1 to Rg128 (hereinafter referred to as power line resistance Rg) without distinction.

[0051] Furthermore, the light-emitting component 10 has a startup diode SD. It also has current-limiting resistors R1 and R2, which are used to prevent the transmission of the first transmission signal from being sent (described later). The first transmission signal line 72 and the second transmission signal being sent It is configured to allow excess current to flow through the second transmission signal line 73.

[0052] Here, the drive unit 101 is formed by transmitting thyristors T1 to T128, power line resistors Rg1 to Rg128, coupling diodes D1 to D127, start-up diode SD, and current limiting resistors R1 and R2.

[0053] In addition, as will be discussed later. Figure 2 As shown in (b), the surface-emitting laser elements VCSEL1 to VCSEL128, the transmission thyristors T1 to T128, the power line resistors Rg1 to Rg128, the coupling diodes D1 to D127, the start-up diode SD, and the current limiting resistors R1 and R2 are arranged in a row on the substrate 80.

[0054] The surface-emitting laser elements VCSEL1 to VCSEL128 in the light-emitting section 102, the driving section 101, and the transmission thyristors T1 to T128 are in Figure 1 The components are arranged in numerical order from left to right. Furthermore, coupling diodes D1 to D127 and power line resistors Rg1 to Rg128 are also arranged in numerical order from left to right in the diagram.

[0055] In this embodiment, the number of surface-emitting laser elements (VCSELs), transmission thyristors (Ts), and power line resistors (Rg) in the light-emitting unit 102 is 128 each. Additionally, the number of coupling diodes (Ds) is 127, which is one less than the number of transmission thyristors (Ts).

[0056] The number of surface-emitting laser elements (VCSELs) is not limited to the above-mentioned number; it can be set to a predetermined number. Furthermore, the number of transmission thyristors (Ts) can be greater than the number of surface-emitting laser elements (VCSELs).

[0057] The aforementioned coupling diode D and start-up diode SD are semiconductor devices with two terminals, namely a diode structure with an anode terminal (anode) and a cathode terminal (cathode). The surface-emitting laser element VCSEL and the transmission thyristor T are semiconductor devices with a thyristor structure having three terminals, namely an anode terminal (anode), a gate terminal (gate), and a cathode terminal (cathode).

[0058] Furthermore, surface-emitting laser elements (VCSELs), coupling diodes (D), start-up diodes (SD), and transmission thyristors (T) may not always have anode, gate, and cathode terminals as electrodes. Therefore, the terminals will sometimes be omitted in the following description.

[0059] Next, the electrical connections of each element in the light-emitting component 10 will be explained.

[0060] The anodes of the surface-emitting laser element VCSEL and the transmitting thyristor T are connected to the substrate 80 of the light-emitting component 10 (the anodes are shared).

[0061] These anodes are located via Vsub terminals, i.e., back electrodes 89, disposed on the back side of the substrate 80 (see below). Figure 2 (b) is connected to power line 200a. Power line 200a is supplied with reference potential Vsub from reference potential supply section 160.

[0062] Furthermore, this connection is the structure when using a p-type substrate 80. When using an n-type substrate, the polarity is reversed. When using an intrinsic (i) type substrate without added impurities, a terminal connected to the power line 200a that supplies the reference potential Vsub is provided on the side of the substrate where the driving part 101 and the light-emitting part 102 are provided.

[0063] Along the arrangement of the transmission thyristors T, the cathodes of odd-numbered transmission thyristors T1, T3, ... are connected to the first transmission signal line 72. Furthermore, the first transmission signal line 72 is connected to... via a current-limiting resistor R1. Terminal connection. In this... The terminal is connected to the first transmission signal line 201, and the first transmission signal is transmitted from the transmission signal generation unit 120.

[0064] On the other hand, along the arrangement of the transmission thyristors T, the cathodes of even-numbered transmission thyristors T2, T4, ... are connected to the second transmission signal line 73. Furthermore, the second transmission signal line 73 is connected to... via the current limiting resistor R2. Terminal connection. In this... The terminal is connected to the second transmission signal line 202, and the second transmission signal is sent from the transmission signal generation unit 120.

[0065] The cathodes of each of the surface-emitting laser elements VCSEL1 to VCSEL128 are connected to the illumination signal line 75. Illumination signal line 75 is connected to... Terminal connection. In the light-emitting component 10, The terminal is connected to the lighting signal line 204 via a current limiting resistor RI disposed on the outside of the light-emitting component 10, and a lighting signal is sent from the lighting signal generating unit 140. Light up signal The current is supplied to the surface-emitting laser elements VCSEL1 to VCSEL128 for lighting.

[0066] Each of the gates Gt1 to Gt128 (referred to as gate Gt) of the transmission thyristors T1 to T128 is connected one-to-one with the gates Gs1 to Gs128 (referred to as gate Gs) of the surface-emitting laser elements VCSEL1 to VCSEL128 with the same number. Therefore, gates with the same number have the same potential for gates Gt1 to Gt128 and gates Gs1 to Gs128. Thus, for example, stating gate Gt1 (gate Gs1) indicates that they have the same potential.

[0067] Coupling diodes D1 to D127 are connected between the gates Gt1 to Gt128 of the transmission thyristors T1 to T128 in pairs, arranged in numerical order. That is, coupling diodes D1 to D127 are connected in series, sandwiched between the gates Gt1 to Gt128. Furthermore, coupling diode D1 is connected in the direction that allows current to flow from gate Gt1 to gate Gt2. The other coupling diodes D2 to D127 are connected in the same manner.

[0068] The gate Gt (gate Gs) of the transmission thyristor T is connected to the power supply line 71 via a power supply line resistor Rg, which is provided corresponding to the transmission thyristor T. The power supply line 71 is connected to the Vgk terminal. A power supply line 200b is connected to the Vgk terminal, and a power supply potential Vgk is supplied from the power supply potential supply unit 170.

[0069] Furthermore, the gate Gt1 of the transmission thyristor T1 is connected to the cathode terminal of the start-up diode SD. On the other hand, the anode of the start-up diode SD is connected to the second transmission signal line 73.

[0070] (Specific structure of the light-emitting component 10)

[0071] Figure 2 This is an example of a plan view and a cross-sectional view of the light-emitting component 10 according to this embodiment. Furthermore, Figure 3 This is an enlarged view of the surface-emitting laser element VCSEL in the light-emitting component 10 of this embodiment.

[0072] Additionally, for ease of explanation, the upper side of the diagram will sometimes be referred to as the upper side and the lower side as the lower side. However, the actual orientation will not necessarily be referred to as the upper or lower side.

[0073] in, Figure 2 (a) is a plan view of the light-emitting component 10. Figure 2 (b) is Figure 2 (a) A sectional view of line IIB-IIB. Figure 2 In (a), the right side of the paper is the x-direction, the top of the paper is the y-direction, and the surface direction of the paper is the z-direction. Furthermore, the plane is the surface observed from the surface side of the paper (z-direction). Therefore, in Figure 2 In (b), the left side of the paper is the z direction, and the top of the paper is the y direction.

[0074] exist Figure 2 In (a), the portion centered on the surface-emitting laser elements VCSEL1 to VCSEL4 and the transmission thyristors T1 to T4 is shown. In addition, the Vsub terminal (back electrode 89) provided on the back side of the substrate 80 is shown extending to the outside of the substrate 80.

[0075] exist Figure 2 The sectional view of line IIB-IIB in (a) is... Figure 2 In (b), the surface-emitting laser element VCSEL1, the transmission thyristor T1, the coupling diode D1, and the power line resistor Rg1 are shown from the bottom of the figure. Furthermore, in Figure 2 In figures (a) and (b), the main components and terminals are described by name. In addition, on the front side of the substrate 80, surface-emitting laser elements VCSELs (VCSEL1 to VCSEL4) are arranged in the x-direction.

[0076] like Figure 2 and Figure 3 As shown, in this embodiment, the surface-emitting laser element (VCSEL) is composed of multiple light-emitting elements Hs. Each of these multiple light-emitting elements Hs functions as a surface-emitting laser element (VCSEL) and emits light from multiple emission ports 50. Here, for simplicity, five light-emitting elements Hs1 to Hs5 are illustrated as multiple light-emitting elements Hs; however, in practice, for example, 40 light-emitting elements Hs are provided to constitute a surface-emitting laser element (VCSEL).

[0077] First, according to Figure 2 (b) describes the cross-sectional structure of the light-emitting component 10.

[0078] A p-type DBR layer 81 (pDBR layer 81), an n-type gate layer 82 (n gate layer 82), a light-emitting layer 83, a p-type gate layer 84 (p gate layer 84), and an n-type DBR layer 85 (nDBR layer 85) constituting a surface-emitting laser element VCSEL, a transmission thyristor T, a coupling diode D1, and a power line resistor Rg1 are sequentially disposed on a p-type substrate 80 (substrate 80). The descriptions in parentheses will be used below. The same applies to other cases. Here, the semiconductor layer formed by stacking pDBR layer 81, n gate layer 82, light-emitting layer 83, p gate layer 84, and nDBR layer 85 will be described as a semiconductor stack.

[0079] Moreover, such as Figure 2 As shown in (b), a protective layer 90 made of a light-transmitting insulating material is provided on the light-emitting component 10 in a manner that covers the front and sides of these stacked structures. Figure 2 In (b), the direction of light emission from the surface-emitting laser element VCSEL is shown by an arrow. Here, it is the direction that intersects with the surface of the substrate 80 (here, the z-direction). Here, "surface" refers to the front or back of the light-emitting component 10.

[0080] Furthermore, the wiring of these stacked structures and the power line 71, the first transmission signal line 72, the second transmission signal line 73, the lighting signal line 75, etc., is via through holes provided in the protective layer 90 (in Figure 2 (a) is indicated by ○. ) connects. In the following description, the descriptions related to the protective layer 90 and the through-hole are omitted.

[0081] In addition, such as Figure 2 As shown in (b), a back electrode 89, which serves as a Vsub terminal, is provided on the back side of the substrate 80.

[0082] The pDBR layer 81, n-gate layer 82, light-emitting layer 83, p-gate layer 84, and nDBR layer 85 are semiconductor layers, which are stacked monolithically by epitaxial growth. Furthermore, the semiconductor layers between the stacked structures are removed by etching (mesa etching), resulting in multiple electrically separated stacked structures (islands) (stacked structures 301, 302, 303, ... described later). Alternatively, the multiple stacked structures can also be electrically separated by ion implantation or other methods, rather than etching.

[0083] Here, the descriptions of pDBR layer 81 and nDBR layer 85 correspond to their functions in the case of a surface-emitting laser element (VCSEL). Specifically, pDBR layer 81 functions as both the anode and the DBR layer of the VCSEL. Similarly, nDBR layer 85 functions as both the cathode and the DBR layer of the VCSEL. In other words, the VCSEL has a thyristor structure with both an anode and a cathode. Alternatively, the VCSEL can be described as having a layered structure, which includes a thyristor and a light-emitting layer 83 disposed between the layers constituting the thyristor for emitting light.

[0084] In addition, when the coupling diode D and the power line resistor Rg are configured, they have different functions as will be described later.

[0085] As described below, multiple stacked structures include stacked structures that do not have a portion of any of the multiple layers, namely pDBR layer 81, n-gate layer 82, light-emitting layer 83, p-gate layer 84, and nDBR layer 85. For example, stacked structure 301 has portions that do not have a portion of pDBR layer 81, n-gate layer 82, light-emitting layer 83, p-gate layer 84, or nDBR layer 85.

[0086] Next, according to Figure 2 (a) describes the planar layout of the light-emitting component 10.

[0087] A surface-emitting laser element VCSEL1 is provided in the stacked structure 301. A transmission thyristor T1 and a coupling diode D1 are provided in the stacked structure 302. A power line resistor Rg1 is provided in the stacked structure 303. A start-up diode SD is provided in the stacked structure 304. A current limiting resistor R1 is provided in the stacked structure 305, and a current limiting resistor R2 is provided in the stacked structure 306.

[0088] Furthermore, multiple stacked structures identical to the stacked structures 301, 302, and 303 are formed in parallel on the light-emitting component 10. Similar to the stacked structures 301, 302, and 303, these stacked structures are provided with surface-emitting laser elements VCSEL2, VCSEL3, VCSEL4, ..., transmission thyristors T2, T3, T4, ..., and coupling diodes D2, D3, D4, ...

[0089] Here, according to Figure 2 (a) and (b) provide a detailed description of the stacked structures 301 to 306.

[0090] like Figure 2As shown in (b), the surface-emitting laser element VCSEL1 disposed on the stacked structure 301 is composed of a pDBR layer 81, an n-gate layer 82, an emitting layer 83, a p-gate layer 84, and an nDBR layer 85.

[0091] like Figure 2 As shown in the blackened portion of (b), the pDBR layer 81 of the surface-emitting laser element VCSEL includes a current-restricting layer (described later) that narrows the current flowing through the light-emitting layer 83. Figure 4 The current-restricting layer (81b) is provided to confine the current flowing through the surface-emitting laser element (VCSEL) to the central part of the VCSEL. That is, due to mesa etching, the peripheral part of the VCSEL has more defects. Therefore, non-emitting recoupling is easily caused. Therefore, a current-restricting layer is provided so that the central part of the VCSEL becomes a current-passing part (region) α where current easily flows, and the peripheral part becomes a current-blocking part (region) β where current does not easily flow. Furthermore, the current-blocking part β is sometimes described as a current-restricted region.

[0092] When a current blocking section β is provided, the power consumed by non-light-emitting recoupling is suppressed, thus achieving low power consumption and improving light extraction efficiency. Furthermore, light extraction efficiency is the amount of light that can be converted per unit of power.

[0093] Furthermore, the current-limiting layer will be discussed later.

[0094] Furthermore, an exit point 50 is provided in the surface-emitting laser element VCSEL for emitting light from the light-emitting elements Hs1 to Hs5 of the VCSEL, in order to suppress light loss caused by the passage of light emitted from the VCSEL. In addition, the exit point 50 can also be described as the part of the surface-emitting laser element VCSEL where the amount of light emitted is strongest.

[0095] Furthermore, multiple apertures 55 are provided around each of the light-emitting elements Hs1 to Hs5 disposed in the surface-emitting laser element VCSEL. Here, eight apertures 55 are provided for each of the light-emitting elements Hs1 to Hs5. The eight apertures 55 are arranged to surround the emission outlet 50. Similar to the stacked structure, the pDBR layer 81, n-gate layer 82, light-emitting layer 83, p-gate layer 84, and nDBR layer 85 are removed from the apertures 55. As described later, the current-blocking layer 81b is oxidized through the edge portion of the stacked structure 301 and the apertures 55 to form a current-blocking portion β. In addition, the edge portion of the stacked structure 301 refers to the end portion of the stacked structure 301 formed by removing the semiconductor stack. That is, the edge portion of the stacked structure 301 is the side surface of the semiconductor stack exposed in the stacked structure 301.

[0096] Furthermore, an n-type ohmic electrode 321 (n-ohm electrode 321) disposed on the nDBR layer 85 (region 311) is designated as the cathode electrode. Additionally, the n-ohm electrode 321 is configured to surround the ejector 50 between the ejector 50 and the aperture 55. Furthermore, a p-type ohmic electrode 331 (p-ohm electrode 331) disposed on the p-gate layer 84 exposed after removing the nDBR layer 85 is designated as the gate Gs1. The p-type ohmic electrode 331 is an example of a gate electrode, and it is electrically connected to multiple light-emitting elements, which will be described in detail later, to control the simultaneous lighting and extinguishing of multiple light-emitting elements Hs.

[0097] Furthermore, multiple light-emitting elements Hs contained in the same VCSEL are connected to each other by a p-gate layer 84. However, a via 56 is formed between light-emitting elements Hs in one VCSEL and light-emitting elements Hs in other VCSELs, so that the p-gate layer 84 is not connected between them. For example, a via 56 is formed between the light-emitting elements Hs contained in VCSEL1 and the light-emitting elements Hs contained in the adjacent VCSEL2, so that the p-gate layer 84 is not connected between them.

[0098] The transmission thyristor T1 is composed of a stacked pDBR layer 81, an n-gate layer 82, a light-emitting layer 83, a p-gate layer 84, and an nDBR layer 85. Furthermore, the n-ohm electrode 323 disposed on the nDBR layer 85 (region 313) is designated as the cathode terminal. And the p-ohm electrode 332 disposed on the p-gate layer 84 exposed after removing the nDBR layer 85 is designated as the terminal of the gate Gt1 (sometimes referred to as the gate terminal Gt1).

[0099] Similarly, the coupling diode D1 disposed in the stacked structure 302 is composed of a p-gate layer 84 and an nDBR layer 85. Furthermore, the n-ohm electrode 324 disposed on the nDBR layer 85 (region 314) is designated as the cathode terminal. And the p-ohm electrode 332 disposed on the p-gate layer 84 exposed after removing the nDBR layer 85 is designated as the anode terminal. Here, the anode terminal of the coupling diode D1 is the same as the gate Gt1 (gate terminal Gt1).

[0100] The power line resistor Rg1 disposed in the stacked structure 303 is composed of a p-gate layer 84. That is, the power line resistor Rg1 is provided by using the p-gate layer 84, which is disposed between the p-ohm electrode 333 and the p-ohm electrode 334 on the p-gate layer 84 exposed after the nDBR layer 85 is removed, as a resistor.

[0101] The startup diode SD disposed in the stacked structure 304 is composed of a p-gate layer 84 and an nDBR layer 85. That is, the startup diode SD uses an n-ohm electrode 325 disposed on the nDBR layer 85 (region 315) as the cathode terminal. And uses a p-ohm electrode 335 disposed on the p-gate layer 84 exposed after removing the nDBR layer 85 as the anode terminal.

[0102] The current limiting resistor R1 in the stacked structure 305, the current limiting resistor R2 in the stacked structure 306, and the power line resistor Rg1 in the stacked structure 303 are configured in the same way, with the p gate layer 84 between the two p-ohm electrodes (unlabeled) serving as the resistor.

[0103] exist Figure 2 In section (a), the connection relationships between the components are explained.

[0104] The illumination signal line 75 has a main stem 75a and multiple branches 75b. The main stem 75a is configured to extend in the column direction of the surface-emitting laser element (VCSEL). The branches 75b branch from the main stem 75a and connect to the cathode terminal, i.e., the n-ohm electrode 321, of the surface-emitting laser element (VCSEL) 1 disposed in the stacked structure 301. The cathode terminals of other surface-emitting laser elements (VCSELs) are the same.

[0105] The lighting signal line 75 is connected to the side of the surface-emitting laser element VCSEL1. Terminal connection.

[0106] The first transmission signal line 72 is connected to the cathode terminal, i.e., the n-ohm electrode 323, of the transmission thyristor T1 disposed in the laminated structure 302. The first transmission signal line 72 is also connected to the cathode terminals of other odd-numbered transmission thyristors T disposed in the same laminated structure as 302. The first transmission signal line 72 is connected to the current limiting resistor R1 disposed in the laminated structure 305. Terminal connection.

[0107] On the other hand, the second transmission signal line 73 is connected to the cathode terminal, i.e., the n-ohm electrode (unlabeled), of the even-numbered transmission thyristor T disposed in the unlabeled stacked structure. The second transmission signal line 73 is connected to the current limiting resistor R2 disposed in the stacked structure 306. Terminal connection.

[0108] Power line 71 is connected to one terminal, namely the p-ohm electrode 334, of power line resistor Rg1, which is disposed in the stacked structure 303. One terminal of other power line resistors Rg is also connected to power line 71. Power line 71 is connected to the Vgk terminal.

[0109] Furthermore, the p-ohm electrode 331 (gate terminal Gs1) disposed on the stacked structure 301 is connected to the p-ohm electrode 332 (gate terminal Gt1) of the stacked structure 302 via the connection wiring 76.

[0110] Furthermore, the p-ohm electrode 332 (gate terminal Gt1) is connected to the p-ohm electrode 333 (another terminal of the power line resistor Rg1) of the stacked structure 303 via the connection wiring 77.

[0111] The n-ohm electrode 324 (the cathode terminal of the coupling diode D1) disposed in the stacked structure 302 is connected to the gate terminal Gt2 of the adjacent transmission thyristor T2, i.e., the p-type ohm electrode (not labeled), through the connecting wiring 79.

[0112] Explanation is omitted here, but the same applies to other surface-emitting laser elements such as VCSELs, transmission thyristors (T), and coupling diodes (D).

[0113] The p-ohm electrode 332 (gate terminal Gt1) of the stacked structure 302 is connected to the n-ohm electrode 325 (cathode terminal of the start-up diode SD) disposed in the stacked structure 304 via the connection wiring 78. The p-ohm electrode 335 (anode terminal of the start-up diode SD) is connected to the second transmission signal line 73.

[0114] Furthermore, the above-described connection and structure are for when using a p-type substrate 80; the polarity is reversed when using an n-type substrate. Additionally, when using an i-type substrate, a terminal connected to the power supply line 200a supplying the reference potential Vsub is provided on the side of the substrate where the driving section 101 and the light-emitting section 102 are located. Moreover, the connection and structure are the same as in either the case using a p-type substrate or the case using an n-type substrate.

[0115] Here, refer to Figure 2 (b) describes the manufacturing method of the light-emitting component 10.

[0116] First, on a p-type substrate 80, a pDBR layer 81, an n-gate layer 82, a light-emitting layer 83, a p-gate layer 84, and an nDBR layer 85 are epitaxially grown sequentially to form a semiconductor stack. Here, the substrate 80 is described using p-type GaAs as an example, but it can also be n-type GaAs or intrinsic (i)-type GaAs without impurities.

[0117] The DBR layer is achieved through, for example, Al. 0.9 Ga 0.1 As with a high Al content and a low refractive index layer, and for example, Al 0.2 Ga 0.8It is constructed by combining a low-Al content high-refractive-index layer of As. The film thickness (optical path length) of each of the low-refractive-index layer and the high-refractive-index layer is set, for example, to 0.25 (1 / 4) of the center wavelength. In addition, the Al content ratio of the low-refractive-index layer to the high-refractive-index layer can be varied in the range of 0 to 1.

[0118] pDBR layer 81 is constructed by sequentially stacking the lower pDBR layer 81a, the current-restricting layer 81b, and the upper pDBR layer 81c (see below). Figure 4 (b)). The lower pDBR layer 81a and the upper pDBR layer 81c have, for example, an impurity concentration of 1×10⁻⁶. 18 / cm 3 The current-narrowing layer 81b is, for example, AlAs or p-type AlGaAs with a high concentration of Al impurities. This can be achieved by increasing the resistance and narrowing the current path through Al₂O₃ oxidation.

[0119] nDBR layer 85, for example, has an impurity concentration of 1×10⁻⁵. 18 / cm 3 .

[0120] For example, the n-gate layer 82 has an impurity concentration of 1×10⁻⁶. 17 / cm 3 n-type Al 0.9 The Al composition of GaAs can also be changed within the range of 0 to 1.

[0121] The emitting layer 83 is a quantum well structure composed of alternating well layers and barrier layers. Examples of well layers include GaAs, AlGaAs, InGaAs, GaAsP, AlGaInP, GaInAsP, and GaInP, while barrier layers include AlGaAs, GaAs, GaInP, and GaInAsP. Alternatively, the emitting layer 83 can also be a quantum wire (quantum wire) or a quantum box (quantum dot).

[0122] For example, the p-gate layer 84 has an impurity concentration of 1×10⁴. 17 / cm 3 p-type Al 0.9 The Al composition of GaAs can also be changed within the range of 0 to 1.

[0123] These semiconductor layers are stacked, for example, by methods such as Metal-Organic Chemical Vapor Deposition (MOCVD) and Molecular Beam Epitaxy (MBE), to form a semiconductor stack.

[0124] Next, n-ohm electrodes 321, 323, 324, etc., are formed on the nDBR layer 85. The n-ohm electrodes (n-ohm electrodes 321, 323, 324, etc.) are, for example, Au (AuGe), which contains Ge and readily makes ohmic contact with the n-type semiconductor layer such as the nDBR layer 85. The n-ohm electrodes (n-ohm electrodes 321, 323, 324, etc.) are formed, for example, by a lift-off method.

[0125] Next, the nDBR layer 85, p-gate layer 84, light-emitting layer 83, n-gate layer 82, and pDBR layer 81 are etched sequentially to separate the stacked structures 301, 302, etc. Simultaneously, the aperture 55 in the stacked structure 301 is formed. This etching can be performed using a sulfuric acid-based etching solution (in a weight ratio of sulfuric acid:hydrogen peroxide:water = 1:10:300), or, for example, using anisotropic dry etching (RIE) with boron chloride. This etching to separate the stacked structures is sometimes also called mesa etching or pillar etching.

[0126] Next, in the edge portion and the hole portion 55 of the stacked structure, the current-limiting layer 81b exposed on the side is oxidized from the side to form a current-blocking portion β. For example, the Al in the current-limiting layer 81b of AlAs, AlGaAs, etc., is oxidized by water vapor oxidation at 300-400°C, thereby oxidizing the current-limiting layer 81b. At this time, oxidation is performed from the exposed side to form the current-blocking portion β, which is an oxide of Al, namely Al2O3. The unoxidized portion of the current-limiting layer 81b becomes the current-passing portion α.

[0127] Next, the nDBR layer 85 is etched to expose the p-gate layer 84. This etching can be performed by wet etching using a sulfuric acid-based etchant (in a weight ratio of sulfuric acid:hydrogen peroxide:water = 1:10:300), or by anisotropic dry etching using boron chloride, for example. Then, p-ohmic electrodes (p-ohmic electrodes 331, 332, etc.) are formed on the p-gate layer 84. The p-ohmic electrodes are, for example, Au (AuZn) containing Zn, which readily makes ohmic contact with the p-type semiconductor layer such as the p-gate layer 84. Moreover, the p-ohmic electrodes (p-ohmic electrodes 331, 332, etc.) are formed, for example, by a stripping method.

[0128] Next, a protective layer 90 is formed, for example, by covering the surface of the laminated structures 301, 302, etc. with an insulating material such as SiO2, SiON, or SiN. Then, through-holes (openings) are provided in the protective layer 90 above the n-ohm electrodes (n-ohm electrodes 321, 323, 324, etc.) and p-ohm electrodes (p-ohm electrodes 331, 332, etc.). Furthermore, wiring (power line 71, first transmission signal line 72, second transmission signal line 73, lighting signal line 75, etc.) and a back electrode 89 are formed to connect the n-ohm electrodes (n-ohm electrodes 321, 323, 324, etc.) and p-ohm electrodes (p-ohm electrodes 331, 332, etc.) through the through-holes provided in the protective layer 90. The wiring and the back electrode 89 are made of materials such as Al and Au.

[0129] The light-emitting component 10 is manufactured as described above.

[0130] Alternatively, substrate 80 can also be made of InP, GaN, InAs, semiconductor substrates made of other III-V or II-VI materials, sapphire, Si, Ge, etc. When the substrate is changed, the material of the semiconductor stack layered monolithically on the substrate is a material whose lattice constant is approximately matched to that of the substrate (lattice constant and other lattice properties, including strain structure, strain mitigation layer, metamorphic growth, etc.). For example, InAs, InAsSb, GaInAsSb, etc. are used on InAs substrates; InP, InGaAsP, etc. are used on InP substrates; GaN, AlGaN, InGaN are used on GaN or sapphire substrates; and Si, SiGe, GaP, etc. are used on Si substrates. However, when the semiconductor material is bonded to other support substrates after crystal growth, it is not necessary to achieve approximately lattice matching with respect to the support substrate.

[0131] (Layered structure of the light-emitting element Hs in a surface-emitting laser element VCSEL)

[0132] Figure 4 This is an enlarged view of the light-emitting element Hs in the light-emitting component 10 of this embodiment. Figure 4 (a) is a top view of the light-emitting element Hs. Figure 4 (b) is Figure 4 (a) A cross-sectional view of the IVB-IVB line. Figure 4 (c) is Figure 4 (a) A cross-sectional view of the IVC-IVC line.

[0133] like Figure 4 As shown in (a), eight holes 55 are provided around the light-emitting element Hs. These holes 55 are called trenches, and thus, the surface-emitting laser element VCSEL with this structure is also called a trench type. Figure 4As shown in (b), the via 55 is configured such that the nDBR layer 85, p-gate layer 84, light-emitting layer 83, n-gate layer 82, and pDBR layer 81 are removed by etching to reach the substrate 80. The current-restricting layer 81b disposed on the pDBR layer 81 is oxidized via the via 55. Oxidation then proceeds from the via 55 outwards from its center. That is, the central portion surrounded by the eight vias 55 becomes the unoxidized portion (current-passing portion α).

[0134] like Figure 4 As shown in (b) and (c), except for the current passage α in the ejection port 50, the current narrowing layer 81b is oxidized from between adjacent holes 55 and the outer side of the stacked structure 301.

[0135] Multiple apertures 55 are arranged in a circular shape to surround the emission port 50, thereby making the planar shape of the unoxidized portion (current passage α) nearly circular. In a surface-emitting laser element VCSEL, the smaller the diameter of the emission port 50, the easier it is to oscillate in a single mode, and the easier it is for the intensity distribution to become a single peak. Therefore, the multiple apertures 55 can be arranged in a circular shape, and the current passage α is nearly circular. That is, in this case, the current narrowing layer 81b is also formed in a circular shape around the apertures 55. Moreover, it can be said that in order to form the current narrowing layer 81b in a circular shape, the apertures 55 are arranged in a circular shape around the emission port 50 of the light-emitting element Hs with a predetermined interval.

[0136] The nDBR layer 85, p-gate layer 84, light-emitting layer 83, n-gate layer 82, and pDBR layer 81 outside the aperture 55 of the light-emitting element Hs function as setting thyristors for turning the surface-emitting laser element VCSEL on / off. Furthermore, the nDBR layer 85, p-gate layer 84, light-emitting layer 83, n-gate layer 82, and upper pDBR layer 81c located above the current narrowing layer 81b function as current paths. Therefore, the larger the area outside the aperture 55 of the light-emitting element Hs, the smaller the resistance to the current flowing through the surface-emitting laser element VCSEL. Thus, the number of apertures 55 can be set according to the shape of the unoxidized portion (current-passing portion α) and the resistance of the current path flowing through the surface-emitting laser element VCSEL. Furthermore, the number of apertures 55 need to be at least four. In addition, the planar shape of the apertures 55 is... Figure 4 In (a), it is set to a square, but it can also be a circle, rectangle, or other shapes.

[0137] Furthermore, it is preferable that the aperture 55 has a depth at a position that reaches at least the lower surface of the gate electrode, i.e., the p-type ohmic electrode 331. That is, it is preferable that the aperture 55 at least penetrates the nDBR layer 85 and reaches the upper surface of the p-gate layer 84. As a result, the light-emitting points of multiple light-emitting elements can be easily separated.

[0138] Furthermore, it is more preferable to have a depth reaching the lowest layer of the light-emitting element Hs with a thyristor structure. That is, it is more preferable that the aperture 55 has a depth reaching the pDBR layer 81. Additionally, in Figure 4 In (b), it is shown that the hole 55 not only reaches the pDBR layer 81, but also penetrates the pDBR layer 81 to reach the substrate 80. Alternatively, the hole 55 may not penetrate the pDBR layer 81 and may stop at the location where it reaches the pDBR layer 81. When configured in this way, the etching time is shortened; on the other hand, when it penetrates the pDBR layer 81, it is easier to separate the individual light-emitting points of the multiple light-emitting elements Hs.

[0139] In addition, such as Figure 4 As shown in (c), the p-gate layer 84 in the thyristor-structured light-emitting element Hs is connected as a common layer between multiple light-emitting elements Hs via multiple vias 55. Furthermore, it is electrically connected to the gate electrode, i.e., the p-type ohmic electrode 331. That is, as... Figure 4 As shown in (b), the p-gate layer 84 has a portion that is cut off by the via 55, however, as Figure 4 As shown in (c), in the areas where the aperture 55 is absent, the elements are interconnected and electrically connected. Thus, the upper gate layer of the thyristor, i.e., the p-gate layer 84, is connected as a common layer among the multiple light-emitting elements Hs, functioning as a common gate layer among the multiple light-emitting elements Hs. Furthermore, the upper gate layer refers to the upper gate layer of the two gate layers of the thyristor, and the lower gate layer refers to the lower gate layer of the two gate layers of the thyristor.

[0140] Furthermore, the uppermost layer of the thyristor structure, the nDBR layer 85, is connected as a common layer between multiple light-emitting elements Hs via multiple vias 55. That is, as... Figure 4 As shown in (b), the nDBR layer 85 has a portion that is truncated by the via 55, however, as Figure 4 As shown in (c), in the areas where there is no hole 55, they are connected to each other and electrically connected.

[0141] By adopting this structure, the efficiency of the switch based on the p-type ohmic electrode 331 is improved. As a result, even if multiple light-emitting elements Hs are used, they can be turned on and off at approximately the same time. This can also be described as enabling the timing of the turning on and off of multiple light-emitting elements Hs to be consistent.

[0142] <thyristor>

[0143] Next, the basic operation of a thyristor (a surface-emitting laser element VCSEL, a transmission thyristor T) will be explained. As mentioned above, a thyristor is a semiconductor device having three terminals: an anode terminal (anode), a cathode terminal (cathode), and a gate terminal (gate). For example, it is constructed by stacking p-type semiconductor layers (pDBR layer 81, p-gate layer 84) and n-type semiconductor layers (n-gate layer 82, nDBR layer 85) based on GaAs, GaAlAs, AlAs, etc., on a substrate 80. That is, the thyristor has a pnpn structure. Here, as an example, the forward potential (diffusion potential) Vd of the pn junction formed by the p-type semiconductor layer and the n-type semiconductor layer will be 1.5V for explanation.

[0144] Below, as an example, the material supplied to the Vsub terminal, i.e., the back electrode 89 (see reference) Figure 2 The reference potential Vsub is set to 0V as a high level potential (hereinafter referred to as "H"), and the power supply potential Vgk supplied to the Vgk terminal is set to -5V as a low level potential (hereinafter referred to as "L"). Therefore, it is sometimes described as "H" (0V) and "L" (-5V).

[0145] First, the operation of a single thyristor will be explained. Here, we assume that the anode of the thyristor is 0V.

[0146] For a thyristor in the off state where no current flows between the anode and cathode, it transitions to the on state (conducting) when a potential lower than the threshold voltage (a negative potential with a large absolute value) is applied to the cathode. Here, the threshold voltage of the thyristor is the value obtained by subtracting the forward potential Vd (1.5V) of the pn junction from the potential of the gate.

[0147] When the thyristor is in the ON state, the gate of the thyristor is at a potential close to that of the anode terminal. Here, the anode is 0V, therefore, the gate is set to 0V. Furthermore, the cathode of the thyristor in the ON state is at a potential close to that obtained by subtracting the forward potential Vd (1.5V) of the pn junction from the anode potential. Here, the anode is 0V, therefore, the cathode of the thyristor in the ON state is at a potential close to -1.5V (a negative potential with an absolute value greater than 1.5V). Additionally, the cathode potential is set according to the relationship between the cathode potential and the power supply that supplies current to the thyristor in the ON state.

[0148] When the cathode of a thyristor in the ON state becomes a potential higher than that required to maintain the ON state (the aforementioned potential close to -1.5V) (a negative potential with a small absolute value, 0V, or a positive potential), it transitions to the OFF state (OFF).

[0149] On the other hand, when a potential lower than that required to maintain the on state (a negative potential with a larger absolute value) is applied to the cathode of the thyristor that is continuously in the on state, and a current that can maintain the on state (maintaining current) is supplied, the thyristor remains in the on state.

[0150] Furthermore, the voltage shown above is one example, and it varies depending on the emission wavelength and intensity of the surface-emitting laser element (VCSEL). In this case, the illumination signal... The potential ("L") can be adjusted.

[0151] Furthermore, since thyristors are made of semiconductors such as GaAs, they sometimes emit light between the n-gate layer 82 and the p-gate layer 84 when in the ON state. The amount of light emitted by the thyristor is determined by the area of ​​the cathode and the current flowing between the cathode and anode. Therefore, when light emission from the thyristor is not needed, unwanted light can be suppressed, for example, by reducing the area of ​​the cathode or by using materials that form the electrodes or wiring.

[0152] (Action of the light-emitting component 10)

[0153] Next, the operation of the light-emitting component 10 will be explained.

[0154] <Sequence Diagram>

[0155] Figure 5 This is a timing diagram illustrating the operation of the light-emitting component 10.

[0156] exist Figure 5 The diagram shows a timing diagram of the part that controls the lighting (oscillation) or non-lighting of the five surface-emitting laser elements VCSELs (VCSEL1 to VCSEL5) of the light-emitting component 10 (referred to as lighting control). Additionally, in Figure 7 In the process, the surface-emitting laser elements VCSEL1, VCSEL2, VCSEL3, and VCSEL5 of the light-emitting component 10 are lit, while the surface-emitting laser element VCSEL4 is turned off (not lit).

[0157] exist Figure 5 In the above, time is set to pass from time a to time k in alphabetical order. Surface-emitting laser element VCSEL1 is controlled to be lit or not lit during period T(1) (lighting control), surface-emitting laser element VCSEL2 is controlled to be lit or not lit during period T(2) (lighting control), surface-emitting laser element VCSEL3 is controlled to be lit or not lit during period T(3) (lighting control), and surface-emitting laser element VCSEL4 is controlled to be lit or not lit during period T(4) (lighting control). The lighting control of surface-emitting laser elements VCSELs numbered 5 and above is performed in the same manner below.

[0158] Here, periods T(1), T(2), T(3), ... are set as periods of the same length, and are called periods T when they are not distinguished from each other.

[0159] Send to Terminal (refer to Figure 1 , Figure 2 The first transmission signal and sent to Terminal (refer to Figure 1 , Figure 2 The second transmission signal It is a signal with two potentials: "H" (0V) and "L" (-5V). Furthermore, the first transmission signal... and the second transmission signal Repeat the waveform in units of two consecutive periods T (e.g., period T(1) and period T(2)).

[0160] In the following, "H" (0V) and "L" (-5V) are sometimes omitted and replaced with "H" and "L".

[0161] First transmission signal At the beginning of period T(1), b transitions from “H” (0V) to “L” (-5V), and at time f, f transitions from “L” to “H”. Then, at the end of period T(2), i transitions from “H” to “L”.

[0162] Second transmission signal At the beginning of period T(1), time b is “H” (0V), and at time e, it transitions from “H” (0V) to “L” (-5V). Then, between the end of period T(2) and time j, it transitions from “L” to “H”.

[0163] In the first transmission signal and the second transmission signal During the comparison, the second transmission signal This is equivalent to making the first transmission signal The signal obtained by shifting backward by a period T on the time axis. On the other hand, regarding the second transmitted signal... The waveform shown by the dashed line in period T(1) and the waveform in period T(2) are repeated after period T(3). Second transmission signal The waveform during period T(1) is different from the waveform after period T(3) because period T(1) is the period during which the light-emitting component 10 starts to operate.

[0164] As will be described later, the first transmission signal and the second transmission signal This set of transmission signals propagates the on / off state of the transmission thyristor T in numerical order, thereby designating the surface-emitting laser element VCSEL with the same number as the transmission thyristor T in the on / off state as the object of control for lighting (oscillation) or not lighting (lighting control).

[0165] Next, the light sent to the light-emitting component 10 Terminal illumination signal Explanation. Light-up signal. It is a signal with two potentials: "H" (0V) and "L" (-5V).

[0166] Here, during the lighting control period T(1) of the surface-emitting laser element VCSEL1 of the light-emitting component 10, the lighting signal is... Explanation. Light-up signal. During the period T(1), the initial time b is “H” (0V), and at time c it transitions from “H” (0V) to “L” (-5V). Then, at time d it transitions from “L” to “H”, and at time e it remains “H”.

[0167] Reference Figure 1 and according to Figure 5 The timing diagram shown illustrates the operation of the light-emitting component 10. Furthermore, the periods T(1) and T(2) for controlling the illumination of the surface-emitting laser elements VCSEL1 and VCSEL2 will be explained below.

[0168] (1) Time a

[0169] At time a, the reference potential supply unit 160 of the signal generation circuit 110 of the light-emitting component 10 sets the reference potential Vsub to "H" (0V). The power supply potential supply unit 170 sets the power supply potential Vgk to "L" (-5V). Therefore, the power supply line 200a of the light-emitting component 10 becomes "H" (0V) of the reference potential Vsub, and the Vsub terminal of the light-emitting component 10 becomes "H". Similarly, the power supply line 200b becomes "L" (-5V) of the power supply potential Vgk, and the Vgk terminal of the light-emitting component 10 becomes "L" (see reference). Figure 1 Therefore, the power line 71 of the light-emitting component 10 becomes "L" (see reference). Figure 1 ).

[0170] Then, the transmission signal generation unit 120 of the signal generation circuit 110 transmits the first transmission signal. Second transmission signal They are respectively set to "H" (0V). Therefore, the first transmission signal line 201 and the second transmission signal line 202 become "H" (refer to...). Figure 1 Therefore, the light-emitting component 10 Terminals and The terminal is designated "H". It is connected to the current-limiting resistor R1. The potential of the first transmission signal line 72 connected to the terminal is also called "H", which is connected to the current limiting resistor R2. The second transmission signal line 73 connected to the terminal is also called "H" (see reference). Figure 1 ).

[0171] Furthermore, the lighting signal generation unit 140 of the signal generation circuit 110 generates a lighting signal. They are each set to "H" (0V). Therefore, signal line 204 becomes "H" (refer to...). Figure 1 Therefore, the light-emitting component 10 The terminal is designated "H" via the current-limiting resistor RI, and... The terminal connection for the lighting signal line 75 is also designated as "H" (0V) (see reference). Figure 1 ).

[0172] The anode (pDBR layer 81) of the surface-emitting laser element VCSEL is connected to the Vsub terminal set to "H".

[0173] The anode (pDBR layer 81) of the transmission thyristor T is connected to the Vsub terminal set to "H".

[0174] The cathodes of odd-numbered transmission thyristors T1, T3, T5, ... are each connected to the first transmission signal line 72 and are set to "H" (0V). The cathodes of even-numbered transmission thyristors T2, T4, T6, ... are each connected to the second transmission signal line 73 and are set to "H". Therefore, both the anode and cathode of transmission thyristor T are set to "H", and transmission thyristor T is in the off state.

[0175] The cathode terminal of the surface-emitting laser element VCSEL is connected to the "H" (0V) lighting signal line 75. Therefore, both the anode and cathode of the surface-emitting laser element VCSEL are "H", and the VCSEL is in the off state.

[0176] As described above, the gate Gt1 is connected to the cathode of the startup diode SD. The gate Gt1 is connected to the power supply line 71 at the power supply potential Vgk (“L” (-5V)) via the power supply line resistor Rg1. Furthermore, the anode terminal of the startup diode SD is connected to the second transmission signal line 73, and is connected to the “H” (0V) power supply line 73 via the current limiting resistor R2. Terminal connections. Thus, the startup diode SD is forward biased, and the cathode (gate Gt1) of the startup diode SD becomes -1.5V, obtained by subtracting the forward potential Vd (1.5V) of the pn junction from the potential of the anode ("H" (0V)) of the startup diode SD. Furthermore, when the gate Gt1 is -1.5V, the anode (gate Gt1) of the coupling diode D1 is -1.5V, and the cathode is connected to the power line 71 ("L" (-5V)) via the power line resistor Rg2, thus becoming forward biased. Therefore, the potential of the gate Gt2 becomes -3V, obtained by subtracting the forward potential Vd (1.5V) of the pn junction from the potential of the gate Gt1 (-1.5V). And, the anode (gate Gt1) of the coupling diode D2 is -3V, and the cathode is connected to the power line 71 ("L" (-5V)) via the power line resistor Rg3, thus becoming forward biased. Therefore, the potential of gate Gt3 becomes -4.5V, obtained by subtracting the forward potential Vd (1.5V) of the pn junction from the potential of gate Gt2 (-3V). However, the effect of the anode of the startup diode SD being "H" (0V) does not affect gates Gt numbered 4 and above, whose potentials become the potential of power line 71, i.e., "L" (-5V).

[0177] Furthermore, since gate Gt is gate Gs, the potential of gate Gs is the same as that of gate Gt. Therefore, the threshold voltage of the surface-emitting laser element VCSEL and the transmission thyristor T is obtained by subtracting the forward potential Vd (1.5V) of the pn junction from the potentials of gates Gt and Gs. That is, the threshold voltage of transmission thyristor T1 is -3V, the threshold voltage of surface-emitting laser element VCSEL2 and transmission thyristor T2 is -4.5V, the threshold voltage of surface-emitting laser element VCSEL3 and transmission thyristor T3 is -6V, and the threshold voltage of surface-emitting laser elements VCSELs and transmission thyristors T numbered 4 and above is -6.5V.

[0178] (2) Time b

[0179] exist Figure 5 At time b, the first transmission signal is shown. The voltage shifts from "H" (0V) to "L" (-5V). This activates the light-emitting component 10.

[0180] In the first transmission signal When transitioning from "H" to "L", via With the terminals and current limiting resistor R1 connected, the potential of the first transmission signal line 72 shifts from "H" (0V) to "L" (-5V). Therefore, the voltage applied to the transmission thyristor T1 is -3.3V, and thus, the transmission thyristor T1, with a threshold voltage of -3V, is turned on. With the transmission thyristor T1 turned on, the potential of the first transmission signal line 72 becomes a potential close to -3.2V (a negative potential with an absolute value greater than 3.2V), obtained by subtracting the positive potential Vd (1.5V) of the pn junction from the potential of the anode of the transmission thyristor T1.

[0181] Furthermore, the threshold voltage of the transmission thyristor T3 is -6V, and the threshold voltage of the transmission thyristors T with odd numbers above 5 is -6.5V. The voltage applied to the transmission thyristor T3 and the transmission thyristors T with odd numbers above 5 is -1.5V, which is obtained by adding the voltage of 1.7V applied to the surface-emitting laser element VCSEL to -3.2V. Therefore, the transmission thyristor T3 and the transmission thyristors T with odd numbers above 5 are not conducting.

[0182] On the other hand, regarding the even-numbered transmitting thyristor T, the second transmitting signal The second transmission signal line 73 is "H" (0V), therefore it cannot be connected.

[0183] When the transmission thyristor T1 is turned on, the potential of the gate Gt1 / Gs1 becomes the potential of the anode of the transmission thyristor T1, i.e., "H" (0V). Moreover, the potential of the gate Gt2 (gate Gs2) becomes -1.5V, the potential of the gate Gt3 (gate Gs3) becomes -3V, the potential of the gate Gt4 (gate Gs4) becomes -4.5V, and the potential of the gate Gt (gate Gl) numbered 5 or above becomes "L".

[0184] Therefore, the threshold voltage of the surface-emitting laser element VCSEL1 becomes -1.5V, the threshold voltage of the transmission thyristor T2 and surface-emitting laser element VCSEL2 becomes -3V, the threshold voltage of the transmission thyristor T3 and surface-emitting laser element VCSEL3 becomes -4.5V, the threshold voltage of the transmission thyristor T4 and surface-emitting laser element VCSEL4 becomes -6V, and the threshold voltage of the transmission thyristor T and surface-emitting laser element VCSEL numbered 5 or above becomes -6.5V.

[0185] However, the first transmission signal line 72 becomes -1.5V through the on-state transmission thyristor T1, therefore, the odd-numbered transmission thyristors T in the off-state do not conduct. The second transmission signal line 73 is "H" (0V), therefore, the even-numbered transmission thyristors T do not conduct. The lighting signal line 75 is "H" (0V), therefore, none of the surface-emitting laser elements (VCSELs) are lit.

[0186] Immediately after time b (this refers to the point where the signal at time b has changed due to the change in the potential of the thyristor, etc., and then reached a stable state; the same applies to other cases), the transmitting thyristor T1 is in the ON state, while the other transmitting thyristors T1 and the surface-emitting laser element VCSEL are in the OFF state.

[0187] (3) Time c

[0188] At time c, the signal is lit. Shift from "H" (0V) to "L" (-5V).

[0189] Light up the signal When transitioning from "H" to "L", the current is limited by the resistor RI and Terminal 75 switches from "H" (0V) to "L" (-5V). Consequently, -3.3V, obtained by adding the voltage of 1.7V applied to the surface-emitting laser element VCSEL1, is applied to VCSEL1. VCSEL1, with a threshold voltage of -1.5V, conducts and illuminates. Therefore, the potential of the lighting signal line 75 becomes close to -3.2V. Furthermore, while the threshold voltage of surface-emitting laser element VCSEL2 is -3V, the voltage applied to VCSEL2 becomes -1.5V, obtained by adding the voltage of 1.7V applied to VCSEL1 and -3.2V. Therefore, VCSEL2 does not conduct.

[0190] Immediately after time c, the transmission thyristor T1 and the surface-emitting laser element VCSEL1 are in the ON state, and the surface-emitting laser element VCSEL1 is lit (emitting light).

[0191] (4) Time d

[0192] At time d, the signal is lit. Shift from "L" (-5V) to "H" (0V).

[0193] Light up the signal When transitioning from "L" to "H", the current is limited by the resistor RI and Terminal 75, the potential of the lighting signal line 75, shifts from -3.2V to "H". Therefore, the anode of the surface-emitting laser element VCSEL1 becomes "H", and thus, the surface-emitting laser element VCSEL1 is turned off (not lit). The lighting period of the surface-emitting laser element VCSEL1 is determined by the lighting signal. From the moment c when the signal transitions from "H" to "L" to the lighting signal The lighting signal up to time d when the signal transitions from "L" to "H". The period is "L".

[0194] Immediately after time d, the transmission thyristor T1 is turned on.

[0195] (5) Time e

[0196] At time e, the second transmission signal... The voltage level shifts from "H" (0V) to "L" (-5V). Here, the period T(1) for controlling the illumination of the VCSEL1 surface-emitting laser element ends, and the period T(2) for controlling the illumination of the VCSEL2 surface-emitting laser element begins.

[0197] In the second transmission signal When transitioning from "H" to "L", via At terminal 73, the potential of the second transmission signal line 73 shifts from "H" to "L". As described above, the threshold voltage of the transmission thyristor T2 becomes -3V, thus turning it on.

[0198] Therefore, the potential of gate terminal Gt2 (gate terminal Gs2) becomes "H" (0V), the potential of gate Gt3 (gate Gs3) becomes -1.5V, the potential of gate Gt4 (gate Gs4) becomes -3V, and the potential of gate Gt5 (gate Gs5) becomes -4.5V. Moreover, the potential of gate Gt (gate Gs) numbered 6 and above becomes -5V.

[0199] Immediately after time e, the transmission thyristors T1 and T2 are in the ON state.

[0200] (6) Time f

[0201] At time f, the first transmission signal is... Shift from "L" (-5V) to "H" (0V).

[0202] In the first transmission signal When transitioning from "L" to "H", via At the terminal, the potential of the first transmission signal line 72 changes from "L" to "H". Therefore, both the anode and cathode of the on-state transmission thyristor T1 become "H", and the transmission thyristor T1 is turned off.

[0203] Therefore, the potential of gate Gt1 (gate Gs1) changes to the power supply potential Vgk ("L" (-5V) of power supply line 71 via power supply line resistor Rg1. Consequently, coupling diode D1 is reverse-biased, meaning a potential is applied in the direction that does not allow current flow. Therefore, the effect of gate Gt2 (gate Gs2) being "H" (0V) does not affect gate Gt1 (gate Gs1). That is, the threshold voltage of the transmission thyristor T with gate Gt connected by the reverse-biased coupling diode D becomes -6.5V, even for the first transmission signal. Or the second transmission signal If it becomes "L" (-5V), the transmission thyristor T will not conduct.

[0204] Immediately after time f, the transmission thyristor T2 is turned on.

[0205] (7) Other

[0206] At time g, the signal is lit. When transitioning from "H" (0V) to "L" (-5V), similar to the surface-emitting laser element VCSEL1 at time c, the surface-emitting laser element VCSEL2 is turned on and illuminated (emitting light).

[0207] Then, at time h, the lighting signal is activated. When transitioning from "L" (-5V) to "H" (0V), similar to the surface-emitting laser element VCSEL1 at time d, surface-emitting laser element VCSEL2 is turned off and extinguished.

[0208] Furthermore, at time i, the first transmitted signal When transitioning from "H" (0V) to "L" (-5V), the transmission thyristor T3, with a threshold voltage of -3V, is turned on, similar to the transmission thyristor T1 at time b or the transmission thyristor T2 at time e. At time i, the period T(2) for controlling the illumination of the surface-emitting laser element VCSEL2 ends, and the period T(3) for controlling the illumination of the surface-emitting laser element VCSEL3 begins.

[0209] From now on, we will repeat the content explained previously.

[0210] Additionally, when the VCSEL (Video Surface Emitting Laser) element is kept off (not lit) without being illuminated, such as... Figure 5 The lighting signal shown in time j to time k during the period T(4) for controlling the lighting of the VCSEL4 light-emitting laser element is as follows: That way, the signal will be lit. The voltage should remain "H" (0V). Therefore, even if the threshold voltage of the surface-emitting laser element VCSEL4 is -1.5V, VCSEL4 will not conduct and will remain off (not lit).

[0211] As explained above, the gate terminals Gt of the transmission thyristor T are connected to each other via coupling diode D. Therefore, when the potential of the gate Gt changes, the potential of the gate Gt connected to the changing gate Gt via the forward-biased coupling diode D also changes. Furthermore, the threshold voltage of the transmission thyristor T, which has a gate with a changed potential, changes. When the threshold voltage of the transmission thyristor T is higher than -3.3V (a negative value with a small absolute value), the transmission thyristor T transmits the first signal... Or the second transmission signal Timing switch from "H" (0V) to "L" (-5V).

[0212] Furthermore, the threshold voltage of the surface-emitting laser element VCSEL, whose gate Gs is connected to the gate Gt of the transmission thyristor T in the on-state, is -1.5V. Therefore, in the lighting signal... When switching from "H" (0V) to "L" (-5V), the VCSEL (Voltage-Conductivity Laser) element is turned on and illuminates (emits light).

[0213] That is, by turning on the transmission thyristor T, the "L" (-5V) lighting signal of the surface-emitting laser element VCSEL, which is designated as the object to be lit, is transmitted. Turn on the VCSEL, the surface-emitting laser element that is controlled to be lit, and make the VCSEL light up (emit light).

[0214] Additionally, the "H" (0V) light-up signal The surface-emitting laser element (VCSEL) is kept off and not lit. That is, the lighting signal... Set the on (illuminate) / off (non-illuminate) state of the surface-emitting laser element (VCSEL).

[0215] In this way, the lighting signal is set according to the image data. The lighting or non-lighting of VCSELs (Variable Cell Lasers) on each surface is controlled.

[0216] As described above, the light-emitting component 10 is configured as a self-scanning light-emitting element array (SLED: Self-Scanning Light Emitting Device).

[0217] (Variation Example 1)

[0218] In the above embodiment, a surface-emitting laser element VCSEL with an emissive layer 83 inside the thyristor structure is shown. However, the thyristor structure and the emissive layer 83 can also be constructed separately. Here, a surface-emitting laser element VCSEL in which the upper and lower portions of the emissive layer 92 are constructed as an upper DBR layer and a lower DBR layer, respectively, is described, in which the thyristor structure and the emissive layer 92 described below are separated.

[0219] Figure 6 This is a diagram showing a modified example of the light-emitting element Hs in the light-emitting component 10 of this embodiment. Figure 6 (a) is a top view of the light-emitting element Hs. Figure 6 (b) is Figure 6 (a) A cross-sectional view of the VIB-VIB line. Figure 6 (c) is Figure 6 (a) A cross-sectional view of the VIC-VIC line.

[0220] In the light-emitting element Hs of Modification 1, an anode layer 91 (p-anode (DBR) layer 91), a light-emitting layer 92, and an n-type DBR structure cathode layer 93 (n-cathode (DBR) layer 93) constituting a surface-emitting laser element VCSEL are provided on a p-type substrate 80 (substrate 80). Furthermore, a tunnel junction (tunnel diode) layer 94 (tunnel junction layer 94) is provided on the n-type DBR structure cathode layer 93 (n-cathode (DBR) layer 93). Additionally, a p-type anode layer 95 (p-anode layer 95), an n-type gate layer 96 (n-gate layer 96), a p-type gate layer 97 (p-gate layer 97), and an n-type cathode layer 98 (n-cathode layer 98) constituting a setting thyristor S for setting (controlling) the on / off state of the surface-emitting laser element VCSEL are sequentially provided on the tunnel junction layer 94. Furthermore, the descriptions in parentheses will be used below. The same applies to other cases. Here, the semiconductor layer having a p-anode (DBR) layer 91, a light-emitting layer 92, an n-cathode (DBR) layer 93, a tunnel junction layer 94, a p-anode layer 95, an n-gate layer 96, a p-gate layer 97, and an n-cathode layer 98 stacked is described as a semiconductor stack.

[0221] Here, the descriptions of the p-anode (DBR) layer 91 and the n-cathode (DBR) layer 93 correspond to their functions (operations) in the case of a surface-emitting laser element (VCSEL). That is, the p-anode (DBR) layer 91 functions as the anode of the VCSEL, and the n-cathode (DBR) layer 93 functions as the cathode of the VCSEL. In other words, the VCSEL has a diode structure that includes both an anode and a cathode.

[0222] The descriptions of the p-anode layer 95, n-gate layer 96, p-gate layer 97, and n-cathode layer 98 correspond to their functions (operations) when the thyristor S is configured. That is, the p-anode layer 95 functions as the anode, the n-gate layers 96 and 97 function as the gates, and the n-cathode layer 98 functions as the cathode.

[0223] Furthermore, an n-type ohmic electrode 321 (n-ohmic electrode 321) disposed on the n-cathode layer 98 is designated as the cathode electrode. Additionally, the n-ohmic electrode 321 is disposed such that it surrounds the ejection port 50 between the ejection port 50 and the aperture 55. Furthermore, a p-type ohmic electrode 331 (p-ohmic electrode 331) disposed on the p-gate layer 97 exposed after removing the n-cathode layer 98 is designated as the gate Gs1.

[0224] In the p-anode (DBR) layer 91 of the surface-emitting laser element VCSEL, such as Figure 6 As shown in black in (b), it contains a current-narrowing layer 91b that narrows the current.

[0225] Specifically, the p-anode (DBR) layer 91 is formed by sequentially stacking the lower p-anode (DBR) layer 91a, the current narrowing layer 91b, and the upper p-anode (DBR) layer 91c.

[0226] The thickness (optical path length) of the current-restricting layer 91b of the p-anode (DBR) layer 91 is determined by the desired structure. When extraction efficiency and process reproducibility are important, it is preferable to set the thickness (optical path length) to an integer multiple of the thicknesses (optical path lengths) of the low-refractive-index and high-refractive-index layers constituting the DBR layer, for example, 0.75 (3 / 4) of the center wavelength. Furthermore, in the case of odd multiples, the current-restricting layer 91b only needs to be sandwiched between two high-refractive-index layers. And, in the case of even multiples, the current-restricting layer 91b only needs to be sandwiched between a high-refractive-index layer and a low-refractive-index layer. That is, the current-restricting layer 91b only needs to be configured to suppress the periodic disturbance of the refractive index caused by the DBR layer. Conversely, when it is desirable to reduce the influence (refractive index or strain) of the oxidized portion, the thickness of the current-restricting layer 91b is preferably tens of nanometers, and the current-restricting layer is preferably located at the node of the standing wave generated by the DBR layer.

[0227] Furthermore, eight holes 55 are provided around the light-emitting element Hs. For example... Figure 6As shown in (b), the vias 55 are configured to reach the substrate 80 by etching away the n-cathode layer 98, p-gate layer 97, n-gate layer 96, p-anode layer 95, tunnel junction layer 94, n-cathode (DBR) layer 93, light-emitting layer 92, and p-anode (DBR) layer 91. The current-limiting layer 91b disposed on the p-anode (DBR) layer 91 is oxidized via the vias 55. As a result, the central portion surrounded by the eight vias 55 becomes an unoxidized portion (current-passing portion α). Furthermore, this surrounding area becomes a current-blocking portion β.

[0228] like Figure 6 As shown in (b) and (c), except for the current passage α of the injection port 50, the current narrowing layer 91b is oxidized from between adjacent holes 55 and the outer side of the stacked structure 301.

[0229] Figure 7 This diagram illustrates the points that must be considered when constructing a surface-emitting laser element (VCSEL) with a layered structure and setting the thyristor S. Figure 7 (a) is a schematic performance band diagram of the stacked structure of a surface-emitting laser element (VCSEL) and a set thyristor (S). Figure 7 (b) is the band structure diagram of tunnel layer 94 under reverse bias. Figure 7 (c) shows the current-voltage characteristics of the tunnel junction 94.

[0230] like Figure 7 As shown in the band diagram of (a), when in Figure 6 When a voltage is applied between the n-ohm electrode 321 and the back electrode 89 in such a way that the surface-emitting laser element VCSEL and the thyristor S are in a forward bias, the n++ layer 94a and the p++ layer 94b of the tunnel junction 94 become reverse biased.

[0231] The tunnel junction 94 is a junction of an n++ layer 94a with a high concentration of n-type impurities and a p++ layer 94b with a high concentration of p-type impurities. Therefore, when the width of the depletion region narrows and becomes a forward bias, electrons pass from the conduction band on the n++ layer 94a side through the valence band on the p++ layer 94b side. At this time, it exhibits negative resistance characteristics.

[0232] On the other hand, such as Figure 7 As shown in (b), when the tunnel junction layer 94 (tunnel junction) is reverse biased (-V), the potential Ev of the valence band on the p++ layer 94b side is higher than the potential Ec of the conduction band on the n+ layer 94a side. Furthermore, electrons cross from the valence band of the p+ layer 94b to the conduction band of the n++ layer 94a side. Moreover, the more the reverse bias voltage (-V) increases, the easier it is for electrons to cross. That is, as... Figure 7As shown in (c), the tunnel junction 94 (tunnel junction) is easily supplied with current under reverse bias.

[0233] Therefore, as Figure 7 As shown in (a), when the set thyristor S is turned on, even if the tunnel junction 94 is reverse biased, current will flow between the surface-emitting laser element VCSEL and the set thyristor S. As a result, the surface-emitting laser element VCSEL emits light (lights up).

[0234] When the connected transmission thyristor T is turned on, the thyristor S is set to a state that can transition to the on state. Moreover, when the lighting signal φI is "L", the thyristor S is turned on and the surface-emitting laser element VCSEL is lit (set to be lit).

[0235] Alternatively, a III-V compound layer with metallic conductivity and epitaxially grown on a III-V compound semiconductor layer can be used instead of the tunnel junction layer 94. InNAs, for example, have a negative bandgap energy in the InN composition ratio x range of about 0.1 to about 0.8. Furthermore, InNSb, for example, has a negative bandgap energy in the InN composition ratio x range of about 0.2 to about 0.75. A negative bandgap energy means that there is no bandgap. Therefore, the same conductive properties (conduction properties) as metals are exhibited. That is, metallic conductive properties (conduction) mean that, like metals, current flows if there is a potential gradient.

[0236] Furthermore, the lattice constants of III-V compounds (semiconductors) such as GaAs and InP are in the range of The range. Moreover, this lattice constant is approximately the same as the lattice constant of Si. The approximation of the lattice constant of Ge near.

[0237] In contrast, the lattice constant of InN, also a group III-V compound, is approximately [value missing] in the zincblende structure. The lattice constant of InAs is approximately Therefore, the lattice constant of InNAs, which are compounds of InN and InAs, can be similar to that of GaAs, etc. A value close to the target value.

[0238] Furthermore, the lattice constant of InSb, as a group III-V compound, is approximately... Therefore, since the lattice constant of InN is approximately Therefore, the lattice constant of InNSb, a compound of InSb and InN, can be similar to that of GaAs, etc. A value close to the target value.

[0239] That is, InNAs and InNSb can be epitaxially grown monolithically relative to layers of III-V compound (semiconductor) such as GaAs. Furthermore, layers of III-V compound (semiconductor) such as GaAs can be stacked monolithically on layers of InNAs or InNSb via epitaxial growth.

[0240] Therefore, if the thyristor S and the surface-emitting laser element VCSEL are stacked in series via a conductive III-V compound layer of metal instead of the tunnel junction layer 94, it is possible to suppress the n-cathode (DBR) layer 93 of the surface-emitting laser element VCSEL and the p-anode layer 95 of the thyristor S from becoming reverse biased.

[0241] Based on the detailed description above, the lighting and extinguishing of multiple arrayed light-emitting elements Hs can be synchronized.

[0242] Furthermore, in the above example, a surface-emitting laser element VCSEL is shown as the light-emitting element Hs, but it is not limited to this. For example, a light-emitting thyristor can also be used as the light-emitting element Hs.

[0243] Furthermore, in the above example, the current-limiting layer is disposed on pDBR layers 81 and 91; however, it can be disposed on any layer other than the light-emitting layers 83 and 92. However, compared to an n-type layer, it is preferable to be disposed on a p-type layer. Moreover, it is preferable to be disposed on a layer closer to the light-emitting layers 83 and 92.

[0244] (Variation Example 2)

[0245] In Modification 2, the aforementioned light-emitting component 10 is used as the light-emitting chip C. That is, the structure in which the light-emitting component 10 is mounted is chip-shaped. Furthermore, a case in which the light-emitting chip C is arranged in a row and configured as a light-emitting device 65 will be described.

[0246] Figure 8 This is a top view of a light-emitting device 65 equipped with a light-emitting chip C using a light-emitting component 10.

[0247] exist Figure 8 In the light-emitting device 65 shown as an example, the light source unit 63 consists of 40 light-emitting chips C1 to C40 (referred to as light-emitting chips C0 without distinction) arranged in two staggered rows in the X direction on the circuit board 62. The structures of the light-emitting chips C1 to C40 can also be the same.

[0248] In this specification, "~" indicates multiple structural elements distinguished by number, meaning the structural elements described before and after "~" and their numbers in between. For example, light-emitting chips C1 to C40 include light-emitting chips C1 to C40 in numerical order.

[0249] Furthermore, in this modified example 2, a total of 40 light-emitting chips C were used, but it is not limited to this.

[0250] Furthermore, the light-emitting device 65 is equipped with a signal generation circuit 110 that drives the light-emitting chip C. The signal generation circuit 110 is an example of a driving unit that inputs and outputs signals driving the light-emitting chip C. The signal generation circuit 110 is, for example, composed of an integrated circuit (IC). Alternatively, the light-emitting device 65 may not be equipped with the signal generation circuit 110. In this case, the signal generation circuit 110 is located outside the light-emitting device 65 and supplies control signals for controlling the light-emitting chip C via cables or the like. Here, the light-emitting device 65 will be described with the signal generation circuit 110.

[0251] Figure 9 This is a diagram illustrating an example of the structure of the light-emitting chip C, the structure of the signal generation circuit 110 of the light-emitting device 65, and the structure of the wiring (lines) on the circuit board 62. Figure 9 (a) shows the structure of the light-emitting chip C. Figure 9 (b) shows the structure of the signal generation circuit 110 of the light-emitting device 65 and the structure of the wiring (lines) on the circuit board 62. Additionally, in Figure 9 In (b), portions of light-emitting chips C1 to C9 in the light-emitting chips C1 to C40 are shown.

[0252] First of all, Figure 9 The structure of the light-emitting chip C shown in (a) will be explained.

[0253] The light-emitting chip C has a light-emitting portion 102 on the surface of a rectangular substrate 80. This light-emitting portion 102 is configured to include a plurality of surface-emitting laser elements (VCSELs 1 to 128) arranged in a row along one side near the long side. The plurality of surface-emitting laser elements (VCSELs) is an example of a row of light-emitting components arranged in the main scanning direction. Furthermore, the light-emitting chip C has multiple bonding pads, i.e., terminals, at both ends of the long side of the substrate 80 surface for transmitting various control signals, etc. terminal, Terminal, Vgk terminal, Terminals). Furthermore, these terminals extend from one end of the substrate 80 according to... terminal, The terminals are arranged sequentially, starting from the other end of the substrate 80, in the order of Vgk terminal, ... The terminals are arranged sequentially. Furthermore, the light-emitting part 102 is located at... Terminals and Between the terminals. Furthermore, a back electrode 89 is provided on the back side of the substrate 80 (see reference). Figure 2 ) is used as a Vsub terminal. Here, on the front side of the substrate 80, the direction in which the surface-emitting laser elements VCSEL1 to VCSEL128 are arranged is set as the x-direction, and the direction orthogonal to the x-direction is set as the y-direction.

[0254] In addition, "list" is not limited to Figure 9 The case shown in (a) where multiple surface-emitting laser elements (VCSELs) are arranged in a straight line can also be a case where the multiple VCSELs are arranged with different offsets relative to each other in a direction orthogonal to the column direction. For example, each VCSEL can also be arranged with an offset in a direction orthogonal to the column direction. Furthermore, adjacent VCSELs can be arranged alternately or in a zigzag pattern.

[0255] Next, according to Figure 9 (b) The structure of the signal generation circuit 110 of the light-emitting device 65 and the structure of the wiring (line) on the circuit board 62 will be described.

[0256] As described above, a signal generation circuit 110 and light-emitting chips C1 to C40 are mounted on the circuit board 62 of the light-emitting device 65, and wiring (lines) connecting the signal generation circuit 110 and the light-emitting chips C1 to C40 are provided.

[0257] First, the structure of the signal generation circuit 110 will be explained.

[0258] Various data and control signals are input to the signal generation circuit 110. The signal generation circuit 110 performs data rearrangement and light quantity correction, etc., based on these various data and control signals.

[0259] Furthermore, the signal generation circuit 110 includes a transmission signal generation unit 120, which sends a first transmission signal to the light-emitting chips C1 to C40 according to various control signals. Second transmission signal

[0260] Furthermore, the signal generation circuit 110 includes a lighting signal generation unit 140, which sends lighting signals to the light-emitting chips C1 to C40 respectively according to various control signals. (Described as a lighting signal without distinction) ).

[0261] In addition, the signal generation circuit 110 has a reference potential supply section 160 that supplies a reference potential Vsub, which serves as a potential reference, to the light-emitting chips C1 to C40, and a power supply potential supply section 170 that supplies a power supply potential Vgk for driving the light-emitting chips C1 to C40.

[0262] Next, the arrangement of the light-emitting chips C1 to C40 will be explained.

[0263] Odd-numbered light-emitting chips C1, C3, C5, ... are arranged in a row with intervals along the long side of each substrate 80. Even-numbered light-emitting chips C2, C4, C6, ... are also arranged in a row with intervals along the long side of each substrate 80. Furthermore, the odd-numbered light-emitting chips C1, C3, C5, ... and the even-numbered light-emitting chips C2, C4, C6, ... are arranged alternately with their long sides facing each other on the light-emitting portion 102 side of the light-emitting chip C, rotated 180° relative to each other. Moreover, surface-emitting laser elements (VCSELs) are positioned between the light-emitting chips C at predetermined intervals along the main scanning direction (X direction). Additionally, in... Figure 9 In (b) of the light-emitting chips C1 to C40, the arrows indicate... Figure 9 The direction of the arrangement of the surface-emitting laser elements (VCSELs) of the light-emitting part 102 shown in (a) (numbered in the order of VCSEL1 to VCSEL128).

[0264] The wiring (wires) connecting the signal generation circuit 110 and the light-emitting chips C1 to C40 is described.

[0265] A power line 200a is provided on the circuit board 62. This power line 200a connects to the Vsub terminal, i.e., the back electrode 89, located on the back side of the substrate 80 of the light-emitting chip C (see reference). Figure 2 Connect to supply the reference potential Vsub.

[0266] Furthermore, a power line 200b is provided on the circuit board 62, which is connected to the Vgk terminal provided on the light-emitting chip C to supply a power potential Vgk for driving.

[0267] The circuit board 62 is provided with a signal generation unit 120 for transmitting signals from the signal generation circuit 110 to the light-emitting chips C1 to C40. The terminal sends the first transmission signal. The first transmission signal line 201, and the signal line for transmitting signals to the light-emitting chips C1 to C40 The terminal sends the second transmission signal. The second transmission signal line 202. The first transmission signal Second transmission signal Send the signal to the light-emitting chips C1 to C40 in parallel.

[0268] Furthermore, lighting signal lines 204-1 to 204-40 (referred to as lighting signal lines 204 unless otherwise specified) are provided on the circuit board 62. These lighting signal lines 204 transmit signals from the lighting signal generation section 140 of the signal generation circuit 110 to each of the light-emitting chips C1 to C40 via current limiting resistors RI. Terminal sends lighting signal

[0269] As explained above, a reference potential Vsub and a power supply potential Vgk are supplied to all the light-emitting chips C1 to C40 on the circuit board 62. First transmission signal. Second transmission signal It also sends signals to the light-emitting chips C1 through C40 in parallel. On the other hand, it sends the lighting signal. They are sent separately to the light-emitting chips C1 to C40.

[0270] [Optical Measurement Device 1]

[0271] The aforementioned light-emitting device 65 can be used for photometry.

[0272] Figure 10 This is a diagram illustrating the photometer 1 using the light-emitting device 65.

[0273] The optical measuring device 1 includes the aforementioned light-emitting device 65, a light-receiving section 11, and a processing section 12 for processing data. Furthermore, a measuring object (object) 13 is disposed opposite the optical measuring device 1. Additionally, in Figure 10 In this case, as an example, the object of measurement 13 is a person. Moreover, Figure 10 This is a view taken from above.

[0274] The light-emitting device 65 illuminates the surface-emitting laser element VCSEL as described above. As shown by the solid line, the direction of light illumination is moved vertically around the light-emitting device 65, and the light is emitted in a straight line in the left-right direction in the figure. That is, the light illuminates the object to be measured 13 in a scanning manner.

[0275] The light-receiving part 11 is a device that receives light reflected by the object being measured 13. As shown by the dashed line, the light-receiving part 11 receives light that is incident on it. The light-receiving part 11 can be an imaging device that receives light from a two-dimensional direction.

[0276] The processing unit 12 is configured as a computer having an input / output unit for inputting and outputting data. Furthermore, the processing unit 12 processes light-related information and calculates the distance between itself and the object to be measured 13 and the three-dimensional shape of the object to be measured 13.

[0277] The processing unit 12 of the photometer 1 controls the light-emitting device 65 to emit light. The processing unit 12 then calculates the optical path length from the light emitted by the light-emitting device 65 to the light-receiving unit 11 after reflection from the object 13, based on the time difference between the timing of the light emission from the light-emitting device 65 and the timing of the light received by the light-receiving unit 11. The positions of the light-emitting device 65 and the light-receiving unit 11, and the interval between them, are predetermined. Therefore, the processing unit 12 calculates the distance between itself and the object 13 based on the distance from the light-emitting device 65 and the light-receiving unit 11, or a reference point. The reference point is a point set at a predetermined position from the light-emitting device 65 and the light-receiving unit 11.

[0278] This method is based on the measurement of the time of arrival of light and is known as the Time-of-Flight (TOF) method.

[0279] If this method is applied to multiple points on the object to be measured 13, the three-dimensional shape of the object to be measured 13 is measured. As described above, the emitted light from the light-emitting device 65 is irradiated onto the object to be measured 13. Then, reflected light from the portion of the object to be measured 13 that is closer to the light-emitting device 65 is rapidly incident on the light-receiving part 11. When using the imaging device described above for acquiring two-dimensional images, bright spots are recorded in the frame image at the portions where the reflected light reaches. Based on the bright spots recorded in a series of multiple frame images, the optical path length is calculated for each bright spot. Then, the distance from the light-emitting device 65, the light-receiving part 11, or the distance from a point set as a reference (reference point) is calculated. That is, the three-dimensional shape of the object to be measured 13 is calculated.

[0280] The optical measuring device 1 described above can be used to calculate the distance between itself and an object. Furthermore, by calculating the shape of an object, it can be used for object recognition. Moreover, by calculating the shape of a person's face, it can be used for facial recognition (facial authentication). Furthermore, by mounting it on a vehicle, it can be used for detecting obstacles in front, behind, and to the sides. Thus, the optical measuring device 1 can be widely used for calculating distances or shapes.

[0281] [Image forming apparatus 2]

[0282] The aforementioned light-emitting device 65 can be used for image formation.

[0283] Figure 11 This is a diagram illustrating the image forming apparatus 2 using the light-emitting device 65.

[0284] The image forming apparatus 2 includes the aforementioned light-emitting device 65, drive control unit 21, and light-receiving screen 22.

[0285] The operation of the image forming apparatus 2 will be explained.

[0286] As described above, the light-emitting device 65 sets the surface-emitting laser element (VCSEL) to be on / off. Then, as shown by the solid line, the illumination direction of the light is moved vertically around the light-emitting device 65, and the light is emitted in a straight line in the left-right direction in the figure. That is, the light illuminates the screen 22 in a scanning manner. As a result, a two-dimensional still image (two-dimensional image) is obtained. Then, when an image signal is received as input, in order to form a two-dimensional image, the drive control unit 21 of the light-emitting device 65 is driven according to the image signal, and the on-time maintenance period is set as a frame, and the frames are rewritten sequentially, thereby obtaining a dynamic image of the two-dimensional image. These two-dimensional still images or dynamic images are projected onto the screen 22.

[0287] The above description illustrates this embodiment; however, the scope of the present invention is not limited to the scope described in the above embodiments. As can be seen from the claims, embodiments obtained by applying various modifications or improvements to the above embodiments are also included within the scope of the present invention.

Claims

1. A light-emitting component, comprising: substrate; Multiple light-emitting elements are disposed on the substrate and emit light in a direction intersecting with the surface of the substrate; Multiple apertures are disposed around each of the multiple light-emitting elements; as well as A gate electrode is electrically connected to each of the plurality of light-emitting elements, and is controlled in such a way that the lighting and extinguishing of the plurality of light-emitting elements are performed simultaneously. The light-emitting element has a layered structure, which includes a thyristor and a light-emitting layer disposed between the layers constituting the thyristor and emitting light. The gate layer of the thyristor is located between the plurality of holes, is connected as a common layer among the plurality of light-emitting elements, and is electrically connected to the gate electrode.

2. The light-emitting component according to claim 1, wherein, The uppermost layer of the thyristor is located between the plurality of holes and is connected as a common layer among the plurality of light-emitting elements.

3. The light-emitting component according to claim 1, wherein, The thyristor has a current narrowing layer that is oxidized through the aperture, thereby narrowing the current flowing through the light-emitting layer.

4. The light-emitting component according to claim 1, wherein, The aperture has a depth that reaches at least to the lower surface of the gate electrode.

5. The light-emitting component according to claim 4, wherein, The aperture has a depth that further reaches the lowest layer of the light-emitting element having a thyristor structure.

6. The light-emitting component according to claim 5, wherein, In order to form a current-narrowing layer, which is oxidized through the apertures and narrows the current flowing through the light-emitting layer of the plurality of light-emitting elements, into a circular shape, the plurality of apertures are arranged in a circular shape around the light emission outlet of the light-emitting element at a predetermined interval.

7. The light-emitting component according to claim 1, wherein, The light-emitting component also has a thyristor stacked on the light-emitting element.

8. The light-emitting component according to claim 7, wherein, The thyristor is stacked on the light-emitting element through a tunnel junction layer or a III-V compound layer with metallic conductivity.

9. A light-emitting element array chip, comprising: A column of light-emitting components, comprising the light-emitting components according to any one of claims 1 to 8 arranged in a column along the main scanning direction; and A driving unit is used to input and output signals that drive the light-emitting component.

10. A photometric device, comprising: The light-emitting component according to any one of claims 1 to 8; The light-receiving part receives reflected light from an object that has been illuminated by light from the light-emitting component; and The processing unit processes information related to the light received by the light-receiving unit and measures the distance from the light-emitting component to the object or the shape of the object.

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