OPC Correction Hot Spot Pattern Inspection Method

Abstract

The present invention discloses an OPC correction hot spot pattern inspection method, including: Step 1, performing N+M times of OPC correction on the original layout to obtain a first corrected layout; N is the expected convergence times, and M is the additional loop times. Step 2, performing N times of OPC correction on the original layout to obtain a second corrected layout. Step 3, performing a difference inspection on the first and second corrected layouts and obtaining the layout pattern difference. Step 4, classifying the size of the layout pattern difference and obtaining the OPC correction hot spot pattern of the corresponding type according to the classification. The present invention does not need to use an OPC model for simulation operations, can save the OPC hot spot pattern retrieval time, is convenient for quickly positioning problems and optimizing solutions, and thus can significantly improve the efficiency of OPC development and optimization in OPC development and optimization.

Description

Technical Field

[0001] The present invention relates to a method for manufacturing a semiconductor integrated circuit, and particularly to a method for inspecting hot spot patterns of Optical Proximity Correction (OPC). Background Art

[0002] In the lithography process, the graphic structure corresponding to the layout on the mask (reticle) is projected into the photoresist through the exposure system and a corresponding graphic structure is formed in the photoresist. However, due to optical reasons during the exposure process or chemical reactions of the photoresist, there is a deviation between the graphic structure formed in the photoresist and the graphic structure on the mask. This deviation needs to be corrected by pre-modifying the graphic structure on the mask through OPC. When using the mask after OPC correction for exposure, the graphic structure formed in the photoresist will conform to the designed graphic structure and meet the requirements of process production.

[0003] OPC includes rule-based OPC and model-based OPC.

[0004] Early rule-based OPC was widely used due to its simplicity and fast calculation. However, this method requires manual formulation of OPC rules, and as optical distortion intensifies, these rules become extremely complex and difficult to continue.

[0005] At this time, model-based OPC came into being. The correction method of this model-based OPC establishes an accurate calculation model through optical simulation, and then adjusts the edges of the graphics and continuously simulates and iterates until it approaches the ideal graphic. Model-based OPC makes the OPC process more complex, and the demand for computing resources increases exponentially.

[0006] With the development of the semiconductor manufacturing process and the continuous reduction of graphic sizes, the number of graphics per unit area has doubled accordingly, and the mask graphics have become more and more complex. The accuracy requirements for the OPC model have also been continuously improved. The high-precision OPC model and more complex and larger number of mask graphics have led to an increase in the OPC operation time, posing higher challenges to the development and operation of OPC.

[0007] The existing method for inspecting hot spot patterns of OPC correction is as follows:

[0008] The corrected Mask is used for simulation operations with the OPC model to obtain a simulated contour line (Contour). The obtained simulated contour line is compared with the correction target to find the positions where the Edge Placement Error (EPE) deviation exceeds the specification (Spec), that is, the OPC correction hot spot patterns. Since this method requires simulation operations using the OPC model and needs to compare the deviation values of all simulated contour lines with the correction target, it consumes a large amount of computing resources and thus takes a long time.

[0009] Usually, when developing a brand-new OPC program, or during OPC reconstruction and optimization after a major adjustment in the correction method, the number of error reports is usually in the tens of thousands. The traditional method for checking OPC correction hot spots is not only slow in operation, but also has a huge number of error reports in the files after operation, occupying a large amount of disk space. Moreover, the critical patterns are easily submerged in the massive error reports, which is not conducive to the development and optimization of the OPC program, and has a very adverse impact on the timeliness and speed of OPC program development and optimization.

[0010] Example: Taking 28nm as an example, for a single graphic data stream (GDS) file of a single layer, using 500 CPUs, the operation time for only checking the hot spot patterns is > 10 hours; for more advanced technology nodes, if it is for multi project wafer (MPW) publication, there are usually dozens of GDS data, and the consumption of computing resources is extremely huge.

[0011] When developing a new OPC program or an OPC program with a major adjustment in OPC, since continuous debugging is required and the OPC correction hot spot check needs to be continuously run to confirm whether the OPC results meet the publication requirements.

[0012] Therefore, during OPC program development, the traditional method for checking OPC correction hot spots consumes a large amount of computing resources, and the number of error reports after operation is usually in the tens of thousands, and the data files are huge, which is very adverse to the timeliness of OPC program development and optimization. Summary of the Invention

[0013] The technical problem to be solved by the present invention is to provide an OPC correction hot spot pattern checking method that does not require simulation operations using the OPC model, can save the retrieval time of OPC hot spot patterns, facilitate quick positioning of problems and optimization solutions, so as to significantly improve the efficiency of OPC development and optimization during OPC development and optimization.

[0014] To solve the above technical problem, the OPC correction hot spot pattern checking method provided by the present invention includes the following steps:

[0015] Step 1: Perform N+M times of OPC correction on the original layout to obtain the first corrected layout; N is the expected number of convergence times, and M is the additional loop times. The first corrected layout is used as the convergence target layout.

[0016] Step 2: Perform N times of OPC correction on the original layout to obtain the second corrected layout.

[0017] Step 3: Perform a difference check on the first corrected layout and the second corrected layout to obtain the layout pattern difference.

[0018] Step 4: Classify the size of the layout pattern difference and obtain the OPC correction hot spot patterns of the corresponding types according to the classification.

[0019] A further improvement is that it also includes:

[0020] Step 5: If the OPC correction hot spot patterns in Step 4 completely disappear or are reduced to meet the mass production requirements, use the parameters of the OPC correction as the final parameters of the OPC correction;

[0021] If the OPC correction hot spot patterns in Step 4 do not meet the mass production requirements, optimize the parameters of the OPC correction according to the OPC correction hot spot patterns, with the reduction of the layout pattern difference as the optimization direction;

[0022] Step 6: Repeat Steps 2 to 5 with the optimized parameters of the OPC correction.

[0023] A further improvement is that it also includes:

[0024] Step 7: Perform OPC verification (Verify) detection to confirm whether the final parameters of the OPC correction meet the correction requirements.

[0025] A further improvement is that Step 7 includes the following sub-steps:

[0026] Step 71: Simulate the second corrected layout obtained with the final parameters of the OPC correction to obtain the simulation contour pattern.

[0027] Step 72: Compare the simulation contour pattern with the pattern of the target layout to confirm whether the final parameters of the OPC correction meet the correction requirements.

[0028] A further improvement is that the target layout uses the original layout.

[0029] A further improvement is that N is set according to the actual layers and OPC correction difficulty during mass production. Under the premise of meeting the correction accuracy, the smaller the value of N, the better.

[0030] A further improvement is that the value range of N is 4 <= N <= 30.

[0031] A further improvement is that the larger the value of M, the better the correction result, and the value range of M is 1 <= M <= 50.

[0032] A further improvement is that the difference check in step three is implemented by performing an exclusive OR logic (XOR) operation on the first corrected layout and the second corrected layout.

[0033] A further improvement is that the classification in step four includes:

[0034] Using the one-dimensional pattern EPE deviation error reporting value divided by the one-dimensional pattern mask error enhancement factor (Mask Error Enhancement Factor, MEEF) as the first-level boundary value; EPE represents edge placement error, and MEEF represents the mask error enhancement factor.

[0035] Using the two-dimensional pattern EPE deviation error reporting value divided by the two-dimensional pattern MEEF as the second-level boundary value.

[0036] Comparing the size of the layout pattern difference with the first-level boundary value and the second-level boundary value to classify the OPC correction hot spot patterns.

[0037] A further improvement is that the range of the one-dimensional pattern EPE deviation error reporting value is greater than or equal to 0.1 nm and less than or equal to 8 nm.

[0038] A further improvement is that the range of the two-dimensional pattern EPE deviation error reporting value is greater than or equal to 0.5 nm and less than or equal to 15 nm.

[0039] A further improvement is that when the layout pattern difference is greater than the first-level boundary value and less than the second-level boundary value, the OPC correction hot spot pattern corresponding to the layout pattern difference is a one-dimensional hot spot pattern.

[0040] A further improvement is that when the layout pattern difference is greater than or equal to the second-level boundary value, the OPC correction hot spot pattern corresponding to the layout pattern difference is a two-dimensional hot spot pattern.

[0041] A further improvement is that each OPC correction in step one and step two is a model-based OPC correction.

[0042] Compared with the existing method of using OPC verify to find hotspots, when the present invention checks the OPC results, it does not need to use the OPC model for simulation operations. Instead, it only checks the results by comparing the Mask, that is, the first corrected layout and the second corrected layout, which can save OPC operation resources, thus saving the OPC hotspot pattern inspection time, facilitating quick problem positioning and optimization. It can significantly improve the efficiency of OPC development and optimization during OPC development and optimization. BRIEF DESCRIPTION OF THE DRAWINGS

[0043] The present invention will be further described in detail below in conjunction with the drawings and specific embodiments:

[0044] Figure 1 is a schematic diagram of the layout patterns in each step of the existing OPC correction hotspot pattern inspection method;

[0045] Figure 2 is a flowchart of the OPC correction hotspot pattern inspection method according to an embodiment of the present invention;

[0046] Figure 3 is a schematic diagram of the layout patterns in each step of the OPC correction hotspot pattern inspection method according to an embodiment of the present invention;

[0047] Figure 4 is a comparison chart of the running time of the OPC correction hotspot pattern inspection method according to an embodiment of the present invention and the running time of the existing OPC correction hotspot pattern inspection method;

[0048] Figure 5A is a layout pattern difference diagram before parameter optimization of OPC correction in the OPC correction hotspot pattern inspection method according to an embodiment of the present invention;

[0049] Figure 5B is a layout pattern difference diagram after parameter optimization of OPC correction in the OPC correction hotspot pattern inspection method according to an embodiment of the present invention. DETAILED DESCRIPTION OF THE EMBODIMENTS

[0050] As Figure 2 shown, it is a flowchart of the OPC correction hotspot pattern inspection method according to an embodiment of the present invention; as Figure 3 shown, it is a schematic diagram of the layout patterns in each step of the OPC correction hotspot pattern inspection method according to an embodiment of the present invention; the OPC correction hotspot pattern inspection method according to an embodiment of the present invention includes the following steps:

[0051] Step 1: Perform N + M times of OPC corrections on the original layout 201 to obtain the first corrected layout 202; N is the expected number of convergence times, and M is the additional loop times. Figure 3 In, the layout is represented by a single graphic for illustration.

[0052] The first corrected layout 202 is used as the convergence target layout. Figure 2 In Figure 2 , the first corrected layout 202 is also represented by the convergence target Mask_F.

[0053] In the embodiments of the present invention, the original layout 201 is the target layout, so Figure 2 in Figure 2 , the original layout 201 is also represented by target.

[0054] Each OPC correction is a model-based OPC correction. Figure 2 In Figure 2 , the N+M times of OPC correction are also represented by Model correction N+M times.

[0055] Step 2: Perform N times of OPC correction on the original layout 201 to obtain the second corrected layout 203.

[0056] In the embodiments of the present invention, N is set according to the actual layers and the OPC correction difficulty during mass production. Under the premise of meeting the correction accuracy, the smaller the value of N, the better. Figure 3 In Figure 3 , the second corrected layout 203 is also represented by the mass production correction times Mask_N.

[0057] In some preferred embodiments, the value range of N is 4 <= N <= 30.

[0058] The larger the value of M, the better the correction result. The value range of M is 1 <= M <= 50.

[0059] Step 3: Perform a difference check on the first corrected layout 202 and the second corrected layout 203 to obtain the layout pattern difference.

[0060] Figure 3 In Figure 3 , the superimposed layout of the difference check between the first corrected layout 202 and the second corrected layout 203 corresponding to the marker 204, where the layout pattern difference is shown at the square 205. The enlarged views of the layout pattern difference 205 are shown in Figures 205a and 205b respectively.

[0061] In the embodiments of the present invention, the difference check is implemented by performing an exclusive OR logic operation on the first corrected layout 202 and the second corrected layout 203. Figure 3 In Figure 3 , the difference check is also represented by XOR check.

[0062] Step 4: Classify the size of the layout pattern difference and obtain the OPC correction hot spot patterns of the corresponding types according to the classification.

[0063] In the embodiments of the present invention, the classification in Step 4 includes:

[0064] Divide the one-dimensional pattern EPE deviation error value by the one-dimensional pattern MEEF as the first threshold value; EPE represents Edge Placement Error, and MEEF represents Mask Error Enhancement Factor.

[0065] Divide the two-dimensional pattern EPE deviation error value by the two-dimensional pattern MEEF as the second threshold value.

[0066] Compare the size of the layout pattern difference with the first threshold value and the second threshold value to classify the OPC correction hot spot patterns.

[0067] In some embodiments, when the layout pattern difference is greater than the first threshold value and less than the second threshold value, the OPC correction hot spot pattern corresponding to the layout pattern difference is a one-dimensional hot spot pattern.

[0068] When the layout pattern difference is greater than or equal to the second threshold value, the OPC correction hot spot pattern corresponding to the layout pattern difference is a two-dimensional hot spot pattern.

[0069] In some embodiments, the range of the one-dimensional pattern EPE deviation error value is greater than or equal to 0.1 nm and less than or equal to 8 nm.

[0070] The range of the two-dimensional pattern EPE deviation error value is greater than or equal to 0.5 nm and less than or equal to 15 nm.

[0071] In some embodiments, it further includes:

[0072] Step Five: If the OPC correction hot spot pattern in Step Four completely disappears or reduces to meet the mass production requirements, use the parameters of the OPC correction as the final parameters of the OPC correction. Figure 3 The layout pattern difference 205a also shows no difference or small difference, that is, the OPC correction hot spot pattern in the layout pattern difference 205a completely disappears or reduces to meet the mass production requirements, that is Figure 3 shown in the standard, that is, the parameters of the OPC correction meet the standard and do not require further optimization, and can be directly used as the final parameters of the OPC correction.

[0073] If the OPC correction hot spot pattern in Step Four does not meet the mass production requirements, that is Figure 3 the layout pattern difference 206 in the layout pattern difference 205b in is too large and does not meet the standard. At this time, it is necessary to optimize the parameters of the OPC correction according to the OPC correction hot spot pattern, with the direction of reducing the layout pattern difference. Figure 3 The optimization of the parameters of the OPC correction is represented by using an optimization correction script.

[0074] Step Six: Repeat Steps Two to Five with the optimized OPC-corrected parameters.

[0075] As Figure 3 shown, Step One will not be repeated, that is, the first corrected layout 202 as the convergence target layout will not change anymore, and only the second corrected layout 202 is changed, which is obtained by using the optimized OPC-corrected parameters, and finally makes the second corrected layout 202 and the first corrected layout 201 closer.

[0076] In some embodiments, after the above loop steps are completed, it can further include:

[0077] Step Seven: Perform OPC verification detection to confirm whether the final parameters of the OPC correction meet the correction requirements.

[0078] Step Seven includes the following sub-steps:

[0079] Step 71: Simulate the second corrected layout 203 obtained by using the final parameters of the OPC correction to obtain a simulation profile graph.

[0080] Step 72: Compare the simulation profile graph with the graph of the target layout to confirm whether the final parameters of the OPC correction meet the correction requirements.

[0081] Step Seven is the same as the existing OPC correction hot spot graph inspection method and requires simulation using a model. Step Seven is an optional item or only performed once or several times. In addition, after the loop steps before Step Six, even if Step Seven is selected, since the OPC correction hot spot graph has basically been eliminated, the running time of performing Step Seven once will also be reduced.

[0082] Compared with the existing method of using OPC verify to find hot spots, the embodiment of the present invention can, when checking the OPC result, save the OPC operation resources by only comparing the Mask, that is, the first corrected layout 202 and the second corrected layout 203, without using the OPC model for simulation operations, thus saving the OPC hot spot graph inspection time, facilitating quick positioning of problems and optimization solutions, and significantly improving the efficiency of OPC development and optimization in OPC development and optimization.

[0083] As Figure 4 shown, it is a comparison graph of the running time of the OPC correction hot spot graph inspection method in the embodiment of the present invention and the running time of the existing OPC correction hot spot graph inspection method, that is, the existing OPC Verify inspection. Figure 4The running time of the OPC correction hot spot pattern inspection method is abbreviated as the OPC inspection running time. Since the OPC verify inspection uses multiple CPUs for operation, Figure 4 in this case, the OPC inspection running time is represented by the OPC operation resources. The OPC operation resources are the number of CPUs multiplied by the operation time, as shown by the column marked 301. Figure 4 In this case, the OPC operation resources of the existing OPC Verify inspection are taken as the base number 1; while as shown by the column marked 302, the OPC operation resources of the method of the embodiment of the present invention are 2.07% of the traditional method, which can significantly save the OPC result inspection operation time in the OPC development and optimization process and improve the efficiency.

[0084] The following further illustrates the embodiment of the present invention in combination with the OPC correction of an actual layout:

[0085] As Figure 5A shown, it is the layout pattern difference diagram before the parameter optimization of the OPC correction in the OPC correction hot spot pattern inspection method of the embodiment of the present invention; Figure 5A It is Figure 3 an actual layout 204a corresponding to the layout 204 in this case. The layout 204a includes multiple layout pattern differences of different sizes, which are marked with 206a, 206b, and 206c respectively. As Figure 5B shown, it is the layout pattern difference diagram after the parameter optimization of the OPC correction in the OPC correction hot spot pattern inspection method of the embodiment of the present invention.

[0086] Considering the rationality of the resources and time costs of the OPC correction operation, the reasonable number range of OPC operations that usually meets the mass production requirements is generally 4 <= N <= 30;

[0087] Example: Perform an XOR comparison on the Mask results of the OPC operation N = 8 times and the operation N + M = 8 + 8 = 16 times.

[0088] Perform OPC hot spot pattern search and classification according to the following steps:

[0089] Step 1: The operation N + M = 8 + 8 = 16 times is used as the expected Mask correction result, and it is only operated once and saved;

[0090] Step 2: Perform the OPC operation N = 8 times.

[0091] Step 3: Perform an exclusive OR (XOR) logical operation on the Mask result of the OPC operation N = 8 times and the expected correction result.

[0092] Step 4: As Figure 5AAs shown, the sizes of Mask differences are classified. Those with Mask differences of 3nm < XOR <= 4nm are classified as one-dimensional hot spot patterns, i.e., WP1, where XOR directly represents the size of the Mask difference; those with Mask differences of 4nm < XOR <= 5nm are classified as secondary hot spot patterns, i.e., WPc; and those with Mask differences of XOR > 5nm are classified as two-dimensional hot spot patterns, i.e., WP2. Figure 5A Among them, one-dimensional hot spot patterns are represented by the label 206a, two-dimensional hot spot patterns are represented by the label 206b, and three-dimensional hot spot patterns are represented by the label 206c.

[0093] Step Five: Keep the number of OPC operations at N = 8 unchanged, and optimize the operating parameters of OPC correction, with the direction of continuously reducing the difference in the expected Mask correction result.

[0094] Step Six: As Figure 5B shown, after continuously optimizing the correction configuration and details of OPC, the XOR difference between the Mask result of N = 8 OPC operations and the expected Mask correction result can be reduced to a lower level. As Figure 5B shown, after optimizing the parameters of OPC, the hot spot patterns are reduced to only one category, and the number of the remaining three-dimensional hot spot patterns 206c is also greatly reduced, only a few.

[0095] Step Seven: Then use the traditional OPC Verify to check and confirm whether it meets the correction requirements.

[0096] As can be seen from the above, the method of the embodiment of the present invention can quickly locate the position of the hot spot pattern by performing difference checks on the Mask, and classify the hot spot patterns according to the size of the XOR difference to obtain hot spot patterns classified by severity. Since it does not require using the OPC model for Contour simulation and comparison checks, this method can save the operation time for checking OPC hot spot patterns compared with the traditional method.

[0097] The present invention has been described in detail through specific embodiments above, but these do not constitute limitations to the present invention. Without departing from the principle of the present invention, those skilled in the art can also make many deformations and improvements, which should also be regarded as the protection scope of the present invention.

Claims

1. A method for checking OPC corrected hot spot patterns, characterized in that, It includes the following steps: Step 1: Perform N+M times of OPC correction on the original layout to obtain the first corrected layout; N is the expected convergence times, M is the additional loop times, and the first corrected layout is used as the convergence target layout; The value range of N is 4 <= N <= 30; The larger the value of M, the better the correction result. The value range of M is 1 <= M <= 50; Step 2: Perform N times of the OPC correction on the original layout to obtain the second corrected layout; Step 3: Perform a difference check on the first corrected layout and the second corrected layout and obtain the layout pattern difference; Step 4: Classify the magnitude of the layout pattern difference and obtain the OPC correction hot spot patterns of the corresponding types according to the classification; Step 5: If the OPC correction hot spot patterns in Step 4 completely disappear or are reduced to meet the mass production requirements, use the parameters of the OPC correction as the final parameters of the OPC correction; If the OPC correction hot spot patterns in Step 4 do not meet the mass production requirements, optimize the parameters of the OPC correction according to the OPC correction hot spot patterns, with the reduction of the layout pattern difference as the optimization direction; Step 6: Repeat Step 2 to Step 5 with the optimized parameters of the OPC correction; Step 7: Perform OPC verification and detection to confirm whether the final parameters of the OPC correction meet the correction requirements.

2. The OPC correction hot spot pattern inspection method according to claim 1, wherein Step 7 includes the following sub-steps: Step 71: Simulate the second corrected layout obtained by using the final parameters of the OPC correction to obtain a simulation contour pattern; Step 72: Compare the simulation contour pattern with the pattern of the target layout to confirm whether the final parameters of the OPC correction meet the correction requirements.

3. The OPC correction hot spot pattern inspection method according to claim 2, characterized in that: The target layout uses the original layout.

4. The OPC correction hot spot pattern inspection method according to claim 1, characterized in that: N is set according to the actual layers and the OPC correction difficulty during mass production.

5. The OPC correction hot spot pattern inspection method according to claim 1, characterized in that: The difference check in Step 3 is realized by performing an exclusive OR logical operation on the first corrected layout and the second corrected layout.

6. The OPC correction hot spot pattern inspection method according to claim 1, wherein: The classification in Step 4 includes: Dividing the one-dimensional graphic EPE deviation error reporting value by the one-dimensional graphic MEEF as the first-level boundary value; EPE represents edge placement error, and MEEF represents mask error enhancement factor; Dividing the two-dimensional graphic EPE deviation error reporting value by the two-dimensional graphic MEEF as the second-level boundary value; Compare the magnitude of the layout pattern difference with the first-level boundary value and the second-level boundary value to classify the OPC correction hot spot patterns.

7. The OPC correction hot spot pattern inspection method according to claim 6, characterized in that: The range of the one-dimensional graphic EPE deviation error reporting value is greater than or equal to 0.1 nm and less than or equal to 8 nm.

8. The OPC correction hot spot pattern inspection method according to claim 6, characterized in that: The range of the two-dimensional graphic EPE deviation error reporting value is greater than or equal to 0.5 nm and less than or equal to 15 nm.

9. The OPC correction hot spot pattern inspection method according to claim 6, characterized in that: When the layout pattern difference is greater than the first-level boundary value and less than the second-level boundary value, the OPC correction hot spot pattern corresponding to the layout pattern difference is a one-dimensional hot spot pattern.

10. The OPC correction hot spot pattern inspection method according to claim 9, characterized in that: When the layout pattern difference is greater than or equal to the second-level boundary value, the OPC correction hot spot pattern corresponding to the layout pattern difference is a two-dimensional hot spot pattern.

11. The OPC correction hot spot pattern inspection method according to claim 1, wherein: Each OPC correction in Step 1 and Step 2 is a model-based OPC correction.

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