A low level control system

Abstract

The application discloses a low-level control system, comprising a low-level control board, a radio frequency front-end board and a timing board; wherein the low-level control board comprises a low-level control motherboard, a first AD sampling-DA output board and a first AD sampling board; the low-level control motherboard is connected with the radio frequency front-end board through the first AD sampling-DA output board, and the radio frequency front-end board is used for being connected with a controlled load; the low-level control motherboard is connected with the first AD sampling board, and the first AD sampling board is used for signal sampling of the controlled load; the low-level control motherboard is configured to control the first AD sampling-DA output board to output I / Q signals to the radio frequency front-end board according to the sampling signals of the first AD sampling board; the timing board is used for providing clock signals to the first AD sampling-DA output board and the first AD sampling board; the radio frequency front-end board at least comprises an I / Q modulator, a filter and a controllable switch; further comprising a filtering module, and the controlled load is connected with the first AD sampling board through the filtering module.

Description

TECHNICAL FIELD

[0001] The embodiment of the present application relates to control technology, in particular to a low-level control system. BACKGROUND

[0002] Boron Neutron Capture Therapy (BNCT) is an advanced technology for treating cancer, when treating cancer by using the technology, a patient is injected with a boron-containing drug, the drug is combined with cancer cells, and then the patient is irradiated with neutrons, the neutrons are combined with boron in the drug to produce particles that kill cancer cells, thereby achieving the purpose of treatment.

[0003] At present, the medical equipment based on the boron neutron capture therapy technology mainly generates the neutron beam irradiating the patient through an accelerator, in the prior art, the control of the accelerator is realized through a low-level control system, so as to realize the control of the amplitude, phase and resonance frequency of the cavity of the accelerator.

[0004] In the prior art, the design and structure of the low-level control system are very complex, the use cost is very high, and the low-level control system lacks an emergency control function. SUMMARY

[0005] The present application provides a low-level control system to achieve the purpose of simplifying the design of the low-level control system, reducing the cost and improving the safety of the low-level control system.

[0006] The embodiment of the present application provides a low-level control system, which comprises a low-level control board, a radio frequency front-end board and a timing board.

[0007] The low-level control board comprises a low-level control motherboard, a first AD sampling-DA output board and a first AD sampling board.

[0008] The low-level control motherboard is connected with the radio frequency front-end board through the first AD sampling-DA output board, and the radio frequency front-end board is used to be connected with a controlled load.

[0009] The low-level control motherboard is connected with the first AD sampling board, and the first AD sampling board is used for signal sampling of the controlled load.

[0010] The low-level control motherboard is configured to control the first AD sampling-DA output board to output I / Q signals to the radio frequency front-end board according to the sampling signals of the first AD sampling board.

[0011] The timing board is used to provide clock signals to the first AD sampling-DA output board and the first AD sampling board.

[0012] The radio frequency front end board at least comprises an I / Q modulator, a filter and a controllable switch;

[0013] The I / Q modulator is configured to modulate the I / Q signal into a radio frequency control signal, which is used as an excitation signal of the controlled load;

[0014] The filter is configured to filter the radio frequency control signal, and the controllable switch is configured to disconnect or connect the radio frequency front end board and the controlled load;

[0015] Further comprising a filter module, and the controlled load is connected to the first AD sampling board through the filter module.

[0016] Optionally, further comprising a power monitoring board, and the power monitoring board comprises a power monitoring motherboard, a second AD sampling-DA output board and a second AD sampling board;

[0017] The power monitoring motherboard has the same structure as the low-level control motherboard, the first AD sampling-DA output board has the same structure as the second AD sampling-DA output board, and the first AD sampling board has the same structure as the second AD sampling board;

[0018] The second AD sampling-DA output board and the second AD sampling board are configured to sample a power signal of the controlled load;

[0019] The power monitoring motherboard is configured to determine the power of the controlled load according to the power sampling signals of the second AD sampling-DA output board and the second AD sampling board.

[0020] Optionally, the timing board comprises a first control board and a first signal board;

[0021] The first control board is configured to generate and output the clock signal, and the first signal board is configured to input or output a first signal.

[0022] Optionally, further comprising a high-frequency fast protection board;

[0023] The high-frequency fast protection board is configured to output a radio frequency signal shutdown instruction when receiving an interlock protection signal, and the radio frequency signal shutdown instruction is configured to control the controllable switch to disconnect.

[0024] Optionally, the high-frequency fast protection board comprises a second control board and a second signal board;

[0025] The second control board is configured to generate and output the radio frequency signal shutdown instruction when receiving the interlock protection signal, and the second signal board is configured to input or output a second signal;

[0026] The first control board is identical in structure to the second control board, and the first signal board is identical in structure to the second signal board.

[0027] Optionally, the low-level control system further comprises an accelerator protection board.

[0028] The accelerator protection board is configured to output a load protection instruction when receiving the interlocking protection signal, and the load protection instruction is used to control the controlled load to stop outputting a preset signal.

[0029] Optionally, the accelerator protection board comprises a third control board and a third signal board.

[0030] The third control board is configured to generate and output the load protection instruction when receiving the interlocking protection signal, and the third signal board is used to input or output a third signal.

[0031] The first control board is identical in structure to the third control board, and the first signal board is identical in structure to the third signal board.

[0032] Optionally, the filter module comprises a first SMA socket, an LC filter module, a balun module, a first Q value filter module, a second Q value filter module and a second SMA socket.

[0033] The first SMA socket, the LC filter module, the balun module, the first Q value filter module and the second SMA socket are connected in series.

[0034] The second Q value filter module is connected to the balun module and a ground terminal at two ends thereof.

[0035] Optionally, the radio frequency front-end board is configured to output at least two paths of the radio frequency control signal.

[0036] Optionally, the low-level control board, the radio frequency front-end board and the timing board realize information interaction through a CPCI bus.

[0037] Compared with the prior art, the low-level control system comprises a low-level control board, a radio frequency front-end board and a timing board, wherein the low-level control board comprises a low-level control mother board, an AD sampling-DA output board and an AD sampling board, the low-level control mother board is configured to modulate a baseband signal used to control a controlled load through a closed-loop control mode according to a sampling signal of the AD sampling board and a set reference signal, wherein full-digital technology is adopted for feedback control adjustment of amplitude and phase, and the performance requirement of a device is not harsh in traditional analog radio frequency control technology, and the influence of factors such as temperature and individual differences of components on the precision and stability of the system is small, so that the stability, flexibility and consistency of the system are greatly improved.

[0038] In addition, the RF front-end board comprises a controllable switch, when an abnormality occurs, the controllable switch can be controlled to be disconnected, so as to disconnect the RF signal transmission path between the low-level control system and the controlled load, and further ensure the safety of the controlled load. BRIEF DESCRIPTION OF DRAWINGS

[0039] Figure 1 is a structure block diagram of a low-level control system in the embodiment;

[0040] Figure 2 is another structure diagram of a low-level control system in the embodiment;

[0041] Figure 3 is another structure diagram of a low-level control system in the embodiment;

[0042] Figure 4 is a structure diagram of a power monitoring board in the embodiment;

[0043] Figure 5 is an interface diagram of a timing board in the embodiment;

[0044] Figure 6 is another structure diagram of a low-level control system in the embodiment;

[0045] Figure 7 is a structure diagram of a filter module in the embodiment;

[0046] Figure 8 is a structure diagram of an RF front-end board in the embodiment. DETAILED DESCRIPTION

[0047] The application will be further described below in conjunction with the drawings and embodiments. It can be understood that the specific embodiments described herein are only used to explain the application, but not to limit the application. In addition, it should be noted that, for the convenience of description, only the parts related to the application are shown in the drawings, but not all the structures.

[0048] Figure 1 is a structure block diagram of a low-level control system in the embodiment, referring to Figure 1 , the low-level control system comprises a low-level control board 100, an RF front-end board 200 and a timing board 300.

[0049] For example, in the embodiment, the low-level control board 100 is mainly used to complete the ADC acquisition of the feedback RF signal, the digital operation processing, and the output of the adjusted IQ baseband signal. The purpose of adjusting the IQ baseband signal is to make the amplitude, phase or frequency of the IQ baseband signal the same as the amplitude, phase or frequency required when controlling the controlled load.

[0050] The radio frequency front-end board 200 is mainly used for modulating the adjusted IQ baseband signal, so that the baseband signal forms a radio frequency signal that can be transmitted.

[0051] The timing board 300 is mainly used for providing the low-level control board 100 with a clock signal required for working.

[0052] For example, in the embodiment, the feedback radio frequency signal is output by the controlled load, and the feedback radio frequency signal is used as a comparison signal for adjusting the IQ baseband signal, so as to realize closed-loop control of the IQ baseband signal, so that the amplitude, phase and the like of the IQ baseband signal are stabilized in a specified value range.

[0053] For example, in the embodiment, the radio frequency signal is used as a controlled load excitation signal, and when the controlled load receives the radio frequency signal transmitted by the low-level system, the specified physical field (such as a magnetic field, an electric field, etc.) is generated under the action of the excitation signal.

[0054] For example, when the controlled load is a particle accelerator in a medical device based on boron neutron capture therapy technology, the radio frequency signal is used as an excitation signal of the particle accelerator, and based on the amplitude, phase, frequency and the like information contained in the excitation signal, under the action of the excitation component (such as an excitation coil) in the particle accelerator, the particle accelerator can generate the required magnetic field, so as to realize acceleration of the particles, so as to finally form a particle beam for treatment.

[0055] Figure 2 FIG. 2 is another low-level control system structure schematic diagram in the embodiment, referring to FIG. 1, Figure 2 Specifically, in the embodiment, the low-level control board includes a low-level control mother board 101, a first AD sampling-DA output board 102, and a first AD sampling board 103.

[0056] The low-level control mother board 101 is connected with the radio frequency front-end board through the first AD sampling-DA output board 102, and the radio frequency front-end board is used for being connected with the controlled load 1000;

[0057] The low-level control mother board 101 is connected with the first AD sampling board 103, and the first AD sampling board 103 is used for signal sampling of the controlled load 1000.

[0058] For example, in the embodiment, the low-level control mother board 101 is configured to control the first AD sampling-DA output board 102 to output the I / Q signal (adjusted IQ baseband signal) to the radio frequency front-end board according to the sampling signal of the first AD sampling board 103.

[0059] For example, in the embodiment, the low-level control mother board 101 determines the real-time amplitude, real-time phase or real-time frequency of the controlled load according to the sampling signal of the first AD sampling board 103;

[0060] Based on the real-time amplitude, real-time phase, real-time frequency, and the amplitude, phase, and frequency of the baseband signal modulated (or set) in the last cycle, the low-level control motherboard 101 can generate the amplitude, phase, or frequency required for adjusting the baseband signal in the current cycle.

[0061] For example, based on the real-time amplitude, real-time phase, real-time frequency, and the amplitude, phase, and frequency of the baseband signal modulated (or set) in the last cycle, the low-level control motherboard 101 can generate the amplitude, phase, or frequency required for adjusting the baseband signal in the current cycle.

[0062] For example, based on the real-time amplitude, real-time phase, real-time frequency, and the amplitude, phase, and frequency of the baseband signal modulated (or set) in the last cycle, the low-level control motherboard 101 can generate the amplitude, phase, or frequency required for adjusting the baseband signal in the current cycle.

[0063] For example, based on the real-time amplitude, real-time phase, real-time frequency, and the amplitude, phase, and frequency of the baseband signal modulated (or set) in the last cycle, the low-level control motherboard 101 can generate the amplitude, phase, or frequency required for adjusting the baseband signal in the current cycle.

[0064] The low-level control motherboard 101 obtains the sampling signal of the first AD sampling board 103 and processes the sampling signal into an intermediate frequency signal convenient for signal processing.

[0065] The intermediate frequency signal is decomposed into I / Q signals (i.e., I and Q two-way orthogonal signals), and the DC offset in the I / Q signal is eliminated in the following manner:

[0066]

[0067]

[0068] In the above formula, I d is the I-channel intermediate frequency signal, and Q d is the Q-channel intermediate frequency signal.

[0069] The amplitude A d and phase θ d of the I-channel intermediate frequency signal and the Q-channel intermediate frequency signal are determined in the following manner:

[0070]

[0071]

[0072] The above amplitude A d and phase θ d are compared with the amplitude and phase of the reference signal, respectively, to obtain the amplitude difference and the phase difference.

[0073] The phase is adjusted by using the CORDIC method to compensate for the phase difference, and the amplitude is adjusted by using the closed-loop control algorithm to compensate for the amplitude difference, so as to realize the adjustment of the phase and amplitude of the baseband signal.

[0074] The frequency difference Δω between the I-channel intermediate frequency signal and the Q-channel intermediate frequency signal and the reference signal is determined by the following formula:

[0075]

[0076]

[0077] In the above formula, K is a coefficient, and τ is a time constant. Given the initial phase, Δω can be solved using the least squares method based on the above equation.

[0078] A closed-loop control algorithm is used to adjust the frequency to compensate for the frequency difference, thereby adjusting the frequency of the baseband signal.

[0079] refer to Figure 2 In this embodiment, the radio frequency front-end board includes at least an I / Q modulator 201, a filter 202, and a controllable switch 203.

[0080] I / Q modulator 201 is used to receive the I / Q signal output from the first AD sampling-DA output board 102, and modulate the I / Q signal into an RF control signal, which is used to control the controlled load 1000; filter 202 is used to filter the RF control signal.

[0081] In this embodiment, the controllable switch 203 is used to disconnect or connect the RF front-end board and the controlled load 1000. The control signal of the controllable switch can be the interlocking protection signal generated by the controlled load. When the controllable switch 203 is disconnected, the RF control signal transmission path between the low-level control system and the controlled load is disconnected, and the low-level control system cannot output RF control signals to the controlled load.

[0082] For example, in this embodiment, the interlocking protection signal can be generated by the controlled load or manually input.

[0083] For example, in this embodiment, the low-level control system also includes a chassis with external dimensions of 482.38mm wide × 400mm high × 290mm deep. The chassis body is made of aluminum alloy profile, and the surface of the chassis is treated with aluminum natural color anodizing.

[0084] For example, the chassis adopts a rack structure with a height of 9U and a width of 19”, supports rear I / O, and sets up a fan area at the bottom 2U of the chassis, which is equipped with three 120x120x25mm NMB high-power DC fans;

[0085] The central 6U section of the chassis is designated as a board area for installing boards such as low-level control boards, RF front-end boards, and timing boards.

[0086] The right side of the board card area is a power supply area, and a 6U 16HP standard CPCI power supply backboard is installed, which supports two standard 6U CPCI power supplies and adopts a vertical card insertion mode.

[0087] The cabinet is installed with a 17-slot standard CPCI backboard and a secondary backboard, which are used for the CPCI interface connection between the low-level control board, the radio frequency front-end board, the timing board, the power monitoring board, the high-frequency fast protection board, and the accelerator fast protection board. The cabinet is designed with a front opening door, and a high-performance electromagnetic shield and a limiting door are designed on the front panel of the cabinet to facilitate installation, debugging, and maintenance.

[0088] The cabinet is also equipped with a ventilation cutoff waveguide plate, which ensures good heat dissipation and electromagnetic compatibility.

[0089] One flange is installed on each side of the front face of the cabinet, and fixing holes are opened on the flanges to facilitate the fixation of the low-level control system on the cabinet. One handle is installed on each side of the flange to facilitate the handling of the cabinet.

[0090] For example, in this embodiment, the interfaces configured on the front panel are not specifically limited (for example, they can include a plurality of aviation plugs, optical ports, SMA sockets, and network ports, etc.), and they can be freely set according to actual use requirements and design requirements.

[0091] For example, in this embodiment, a digital processing chip is configured in the low-level control motherboard. Based on the digital processing chip, when the low-level control motherboard processes the baseband signal, the feedback control and adjustment of the amplitude and phase of the baseband signal can adopt full-digital technology, which overcomes the shortcomings of traditional analog radio frequency control technology, such as the harsh requirements for device performance, the influence of temperature and individual differences of components on system precision and stability, etc., and greatly improves the stability, flexibility, and consistency of the system.

[0092] Reference Figure 2 The low-level control system further includes a filter module 2000, and the controlled load 1000 is connected to the first AD sampling board 103 through the filter module 2000.

[0093] For example, in this embodiment, the filter module 2000 is an external independent filter device, which is connected in series on the radio frequency signal line between the controlled load 1000 and the first AD sampling board 103, and is used to filter the feedback radio frequency signal input to the first AD sampling board 103.

[0094] For example, by configuring an independent filter module, the interference signal between the controlled load and the first AD sampling board can be effectively solved. At the same time, through the filter module, the feedback radio frequency signal can be isolated from the ground to ensure the filtering effect.

[0095] The embodiment of the present application provides a low-level control system, which comprises a low-level control board, a radio frequency front-end board and a timing board, wherein the low-level control board comprises a low-level control motherboard, an AD sampling-DA output board and an AD sampling board; the low-level control motherboard is configured to adjust a baseband signal used for exciting a controlled load in a closed-loop control mode according to a sampling signal of the AD sampling board and a set reference signal, so that the working stability of the controlled load can be effectively ensured.

[0096] In addition, the radio frequency front-end board comprises a controllable switch; when an abnormality occurs, the controllable switch can be controlled to be disconnected, so that the radio frequency signal transmission path between the low-level control system and the controlled load is disconnected, and the use safety of the controlled load is ensured.

[0097] Figure 3 Figure 2 is another low-level control system structure schematic diagram in the embodiment, referring to Figure 1, Figure 3 As an implementable scheme, the low-level control system further comprises a power monitoring board 400, wherein the power monitoring board 400 is mainly used for power monitoring of the controlled load.

[0098] For example, when the power monitoring board is configured, the low-level control system has the function of monitoring the power of the controlled load, and the function of the low-level control system is enriched.

[0099] Figure 4 Figure 3 is a power monitoring board structure schematic diagram in the embodiment, referring to Figure 1, Figure 4 The power monitoring board comprises a power monitoring motherboard 401, a second AD sampling-DA output board 402 and a second AD sampling board 403.

[0100] For example, in the present scheme, the second AD sampling-DA output board 402 and the second AD sampling board 403 are connected with the controlled load 1000 through the filter module 2000.

[0101] The second AD sampling-DA output board 402 and the second AD sampling board 403 are used for power signal sampling of the controlled load 1000.

[0102] The power monitoring motherboard 401 is configured to determine the power of the controlled load 1000 according to the power sampling signals of the second AD sampling-DA output board 402 and the second AD sampling board 403.

[0103] For example, referring to Figures 1 and 3, Figure 2 and Figure 4 In the present scheme, the power monitoring motherboard 401 has the same structure as the low-level control motherboard 101, the first AD sampling-DA output board 102 has the same structure as the second AD sampling-DA output board 402, and the first AD sampling board 103 has the same structure as the second AD sampling board 403.

[0104] Exemplary, taking the low-level control motherboard as an example, the structure of the low-level control motherboard and the power monitoring motherboard is illustrated.

[0105] Exemplary, as an implementable solution, the low-level control motherboard is configured with at least one ARM chip and one FPGA chip, wherein the FPGA chip is mainly configured to implement control algorithm logic, and the ARM chip is mainly configured to implement interface algorithm logic.

[0106] The ARM chip and the FPGA chip are configured to realize data interaction through an AXI4 interface, and the ARM chip and the FPGA chip support a CPCI bus protocol, so that the low-level control board supports CPCI bus communication.

[0107] Exemplary, taking the first AD sampling-DA output board as an example, the structure of the first AD sampling-DA output board and the second AD sampling-DA output board is illustrated.

[0108] Exemplary, the first AD sampling-DA output board is configured with at least two ADC chips, at least two DAC chips, and one clock distribution chip, wherein the ADC chip is used to receive a sampling signal, and the DAC chip is used to output an I / Q signal.

[0109] Exemplary, taking the first AD sampling board as an example, the structure of the first AD sampling board and the second AD sampling board is illustrated.

[0110] Exemplary, the first AD sampling board is configured with at least four ADC chips and one clock distribution chip, wherein the ADC chip is used to receive a sampling signal.

[0111] Exemplary, based on the first AD sampling-DA output board and the first AD sampling board, the low-level control board supports at least four AD signal acquisitions and two DA signal outputs.

[0112] Based on the second AD sampling-DA output board and the second AD sampling board, the power monitoring board supports at least six AD signal acquisitions.

[0113] Exemplary, in the present solution, the low-level control board and the power monitoring board are designed in a unified manner, and the low-level control board and the power monitoring board each include a motherboard, an AD sampling-DA output board, and an AD sampling board. The unified design in hardware facilitates design and production and manufacturing of the equipment, and different software configurations of the motherboard can facilitate the low-level control board and the power monitoring board to realize corresponding functions.

[0114] Figure 5 is a timing board interface schematic diagram in the embodiment, for reference Figure 5 In an implementable solution, the timing board includes a first control board 301 and a first signal board 302.

[0115] The first control board 301 is configured to generate and output clock signals, and the first signal board 302 is used to input or output first signals.

[0116] For example, in this solution, the first control board 301 is configured with at least one FPGA chip, and the clock signal output by the first control board 301 is used as the input clock signal of the clock distribution chip.

[0117] The first control board 301 is configured with an interface including a CPCI interface, and the first signal board 302 is configured with an interface including a CPCI interface and an optical fiber interface. The first signal board 302 is also configured with a CPCI-optical fiber interface conversion circuit.

[0118] The first control board 301 and the first signal board 302 are connected via a CPCI interface. The first signal board 302 is mainly used for the conversion between optical signals and CPCI signals to realize the input or output of optical signals (first signals).

[0119] For example, the first signal can be a clock signal, and the first signal board can be connected to a device specified on the controlled load (such as a particle source, particle detector, etc. in a medical device based on boron neutron capture therapy technology) to provide a clock signal to the device.

[0120] Figure 6 This is a schematic diagram of another low-level control system structure in the embodiment, for reference. Figure 6 As one possible implementation, the low-level control system may also include a high-frequency fast protection board 500.

[0121] The high-frequency fast protection board is configured to output an RF signal shutdown command when it receives an interlock protection signal. The RF signal shutdown command is used to control the controllable switch 203 to disconnect.

[0122] For example, in this solution, configuring a high-frequency fast protection board can enable the low-level control system to automatically control the controllable switch to disconnect when it receives an interlocking protection signal, thus avoiding the need for manual control of the controllable switch.

[0123] For example, in this solution, the interlocking protection signal can be generated by the controlled load and received by the high-frequency fast protection board.

[0124] For example, in one possible implementation, the high-frequency fast protection board includes a second control board and a second signal board.

[0125] The second control board is configured to generate and output an RF signal shutdown command when it receives an interlock protection signal. The second signal board is used to input or output the second signal.

[0126] Exemplarily, in the scheme, the first control board and the second control board have the same structure, and the first signal board and the second signal board have the same structure.

[0127] Exemplarily, in the scheme, the second signal board is configured to convert the radio frequency signal shutdown instruction into an optical control instruction (second signal), and the optical control instruction is configured to directly control the controllable switch to be turned off. Correspondingly, the controllable switch can be a gallium arsenide switch.

[0128] Reference Figure 6 As an implementable scheme, the low-level control system can further include an accelerator fast protection board 600.

[0129] The accelerator fast protection board is configured to output a load protection instruction when the interlock protection signal is received, and the load protection instruction is configured to control the controlled load to stop outputting a preset signal.

[0130] Exemplarily, in the scheme, the accelerator fast protection board is configured to automatically control the controlled load to stop working when the low-level control system can receive the interlock protection signal, thereby further improving the use safety of the controlled load.

[0131] Exemplarily, in an implementable scheme, the accelerator fast protection board includes a third control board and a third signal board.

[0132] The third control board is configured to generate a load protection instruction and output the load protection instruction when the interlock protection signal is received, and the third signal board is configured to input or output a third signal.

[0133] Exemplarily, in the scheme, the first control board and the third control board have the same structure, and the first signal board and the third signal board have the same structure.

[0134] Exemplarily, in the scheme, the third signal board is connected to a designated device (for example, a particle source) on the controlled load through an optical fiber interface, and the third signal board is configured to convert the load protection instruction into an optical control signal (third signal), and the optical control signal is configured to directly control the device to stop working (for example, control the particle source to stop outputting particles).

[0135] In combination Figure 5 to Figure 6 With reference to the scheme shown in the drawings, the timing board, the high-frequency fast protection board and the accelerator fast protection board are designed in a unified type, and each of the timing board, the high-frequency fast protection board and the accelerator fast protection board includes a control board and a signal board, which are designed in a unified type in hardware, thereby facilitating the design and production and manufacturing of the equipment, and through different software configurations of the control boards, the timing board, the high-frequency fast protection board and the accelerator fast protection board can realize corresponding functions.

[0136] Figure 7 is a schematic diagram of a filter module structure in the embodiment, with reference to Figure 7 ,Figure 1 The filter module 2000 comprises a first SMA socket 2001, an LC filter module 2002, a balun module 2003, a first Q-value filter module 2004, a second Q-value filter module 2005, and a second SMA socket 2006.

[0137] The first SMA socket 2001, the LC filter module 2002, the balun module 2003, the first Q-value filter module 2004, and the second SMA socket 2006 are connected in series, and the two ends of the second Q-value filter module 2005 are connected with the balun module 2003 and the ground, respectively.

[0138] In the example, the filter module is integrated on a small circuit board, and a structure with a cover is simultaneously processed. The filter module can be conveniently connected in series on the coaxial transmission line of the radio frequency signal as an independent device.

[0139] In the example, except for an insulating wall, the other surfaces of the structure are made of metal. On the side of the metal wall, the flange plate of the first SMA socket for receiving the input radio frequency signal is directly installed on the structure by screws, so that the shielding ground of the input radio frequency signal is connected with the structure.

[0140] On the side of the insulating wall, the flange plate of the second SMA socket for outputting the radio frequency signal is installed on the small circuit board by welding. The center of the insulating (nylon) wall is drilled to make the second SMA socket welded on the circuit board directly pass through the hole, so that the shielding ground of the output radio frequency signal is isolated from the structure.

[0141] In actual use, the filter module is connected in series on the radio frequency signal line, so that the shielding ground of the radio frequency signal is isolated from the ground.

[0142] In the example, the radio frequency front-end board is configured to output at least two radio frequency control signals. Figure 8 is a structural schematic diagram of the radio frequency front-end board in the example, referring to Figure 8 The radio frequency front-end board comprises a first I / Q modulator 211, a first filter 221, a first controllable switch 231, a second I / Q modulator 212, a second filter 222, and a second controllable switch 232.

[0143] The first I / Q modulator 211, the first filter 221, and the first controllable switch 231 constitute a first radio frequency signal transmission path, and the second I / Q modulator 212, the second filter 222, and the second controllable switch 232 constitute a second radio frequency signal transmission path.

[0144] Exemplarily, in the scheme, the input signal of the radio frequency front-end board can be an I / Q signal or an RF signal, wherein if the input signal is an RF signal, the RF signal does not need to be modulated by the I / Q modulator, but is directly input to the filter and is directly output to the controlled load after filtering.

[0145] When the input signal of the radio frequency front-end board is an RF signal, correspondingly, the low-level control board can output the RF signal to the radio frequency front-end board.

[0146] In the scheme, the radio frequency front-end board is configured to output at least two RF control signals, so that the low-level control system can control at least two controlled loads at the same time, and the application range of the low-level control system is improved.

[0147] It should be noted that the above are only preferred embodiments of the present application and the technical principles applied. Those skilled in the art will understand that the present application is not limited to the specific embodiments described herein, and those skilled in the art can make various obvious changes, readjustments and substitutions without departing from the scope of the present application. Therefore, although the present application has been described in more detail through the above embodiments, the present application is not limited to the above embodiments, and can include more other equivalent embodiments without departing from the concept of the present application, and the scope of the present application is determined by the scope of the appended claims.

Claims

1. A low-level control system, characterized in that, include: Low-level control board, RF front-end board, and timing board; The low-level control board includes a low-level control motherboard, a first AD sampling-DA output board, and a first AD sampling board; The low-level control motherboard is connected to the RF front-end board through the first AD sampling-DA output board, and the RF front-end board is used to connect to the controlled load; The low-level control motherboard is connected to the first AD sampling board, which is used for signal sampling of the controlled load. The low-level control motherboard is configured to control the first AD sampling-DA output board to output I / Q signals to the RF front-end board based on the sampling signal of the first AD sampling board; The timing board is used to provide clock signals to the first AD sampling-DA output board and the first AD sampling board; The radio frequency front-end board includes at least an I / Q modulator, a filter, and a controllable switch; The I / Q modulator is used to modulate the I / Q signal into a radio frequency control signal, which is used as the excitation signal for the controlled load. The filter is used to filter the radio frequency control signal, and the controllable switch is used to disconnect or connect the radio frequency front-end board and the controlled load. It also includes a filter module, through which the controlled load is connected to the first AD sampling board; The filter module is integrated on a small circuit board and has a covered structure. The filter module is an independent device. The filtering module is an external, independent filtering device connected in series on the radio frequency signal line between the controlled load and the first AD sampling board, used to filter the feedback radio frequency signal input to the first AD sampling board; The filtering module includes a first SMA socket, an LC filtering module, a balun module, a first Q-value filtering module, a second Q-value filtering module, and a second SMA socket; The first SMA socket, the LC filter module, the balun module, the first Q-value filter module, and the second SMA socket are connected in series. The two ends of the second Q-value filtering module are connected to the balun module and the ground terminal, respectively.

2. The low-level control system as described in claim 1, characterized in that, It also includes a power monitoring board, which comprises a power monitoring motherboard, a second AD sampling-DA output board, and a second AD sampling board; The power monitoring motherboard and the low-level control motherboard have the same structure; the first AD sampling-DA output board and the second AD sampling-DA output board have the same structure; the first AD sampling board and the second AD sampling board have the same structure. The second AD sampling-DA output board and the second AD sampling board are used for sampling the power signal of the controlled load; The power monitoring motherboard is configured to determine the power of the controlled load based on the power sampling signals from the second AD sampling-DA output board and the second AD sampling board.

3. The low-level control system as described in claim 1, characterized in that, The timing board includes a first control board and a first signal board; The first control board is configured to generate the clock signal and output the clock signal, and the first signal board is used to input or output the first signal.

4. The low-level control system as described in claim 3, characterized in that, It also includes a high-frequency fast protection board; The high-frequency fast protection board is configured to output a radio frequency signal shutdown command when it receives an interlock protection signal. The radio frequency signal shutdown command is used to control the controllable switch to open.

5. The low-level control system as described in claim 4, characterized in that, The high-frequency fast protection board includes a second control board and a second signal board; The second control board is configured to generate and output the radio frequency signal shutdown command when it receives the interlock protection signal, and the second signal board is used to input or output the second signal; The first control board and the second control board have the same structure, and the first signal board and the second signal board have the same structure.

6. The low-level control system as described in claim 3, characterized in that, It also includes the accelerator fast protection board; The accelerator fast protection board is configured to output a load protection command when it receives an interlock protection signal. The load protection command is used to control the controlled load to stop outputting a preset signal.

7. The low-level control system as described in claim 6, characterized in that, The accelerator fast protection board includes a third control board and a third signal board; The third control board is configured to generate the load protection command and output the load protection command when it receives the interlock protection signal; the third signal board is used to input or output the third signal. The first control board and the third control board have the same structure, and the first signal board and the third signal board have the same structure.

8. The low-level control system as described in claim 1, characterized in that, The radio frequency front-end board is configured to output at least two radio frequency control signals.

9. The low-level control system as described in claim 1, characterized in that, The low-level control board, RF front-end board, and timing board communicate with each other via the CPCI bus.

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