Sampling processing circuit, chip, touch screen and electronic device

Abstract

An embodiment of the present application provides a sampling processing circuit, a chip, a touch screen, and an electronic device, which are used to perform a short-circuit test on touch electrodes in a touch panel to improve the product yield of the touch panel. The sampling processing circuit is applied to the touch panel. The touch panel includes a first touch electrode and a second touch electrode. The sampling processing circuit includes a first sampling processing circuit and a second sampling processing circuit. The first sampling processing circuit is used to couple the output end of the first touch electrode. The first sampling processing circuit is used to input a first level signal to the output end of the first touch electrode and sample the signal at the output end to generate a first sampling signal. The second sampling processing circuit is used to couple the output end of the second touch electrode. The second sampling processing circuit is used to input a second level signal to the output end of the second touch electrode. When the first touch electrode is short-circuited with the second touch electrode, the first sampling signal is determined by the first level signal and the second level signal.

Description

Technical Field

[0001] This application relates to the field of touch technology, and in particular, to a sampling processing circuit, a chip, a touch screen, and an electronic device. Background Art

[0002] With the development of touch technology, many electronic devices use a touch panel as the display panel or the operation panel of the electronic device. To implement the touch function of the electronic device, the touch panel includes a plurality of touch electrodes arranged in an array. Generally, each touch electrode in the touch panel is connected to a corresponding sampling processing circuit through signal lines such as touch leads, so as to sample the output signal of each touch electrode through the sampling processing circuit and compare the sampled signals to determine whether a touch occurs on each touch electrode.

[0003] However, during the wiring process of signal lines such as touch leads, two touch electrodes may be short-circuited. In order to be able to detect the short circuit of the touch electrodes in time to improve the product yield of the touch panel, usually before the touch panel leaves the factory, a short circuit test is performed on the touch electrodes in the touch panel. Summary of the Invention

[0004] Embodiments of this application provide a sampling processing circuit, a chip, a touch screen, and an electronic device, which are used to perform a short circuit test on touch electrodes in a touch panel to improve the product yield of the touch panel.

[0005] To achieve the above object, the embodiments of this application adopt the following technical solutions:

[0006] In a first aspect, a sampling processing circuit is provided. The sampling processing circuit is applied to a touch panel. The touch panel includes a first touch electrode and a second touch electrode. The first touch electrode and the second touch electrode are in the same column. The sampling processing circuit includes a first sampling processing circuit and a second sampling processing circuit. The first sampling processing circuit is used to couple the output end of the first touch electrode. The first sampling processing circuit is used to input a first level signal to the output end of the first touch electrode and sample the signal at the output end of the first touch electrode to generate a first sampling signal. The second sampling processing circuit is used to couple the output end of the second touch electrode. The second sampling processing circuit is used to input a second level signal to the output end of the second touch electrode. Wherein, when the first touch electrode is short-circuited with the second touch electrode, the first sampling signal is determined by the first level signal and the second level signal. When the first touch electrode is not short-circuited with the second touch electrode, the first sampling signal is determined by the first level signal.

[0007] In this sampling and processing circuit, when the sampling and processing circuit is coupled to the touch electrodes in the touch panel and a short-circuit test is performed on the touch electrodes, the first sampling and processing circuit inputs a first-level signal to the output terminal of the first touch electrode, and the second sampling and processing circuit inputs a second-level signal to the output terminal of the second touch electrode. At this time, when the first touch electrode and the second touch electrode are not short-circuited, the voltage signal at the output terminal of the first touch electrode (ignoring the influence of parasitic capacitance) is the first-level signal, that is, the first sampling signal is determined by the first-level signal. When the first touch electrode and the second touch electrode are short-circuited, the voltage signal at the output terminal of the first touch electrode is equal to the voltage signal at the output terminal of the second touch electrode. For example, it can be an intermediate-level signal between the first-level signal and the second-level signal. That is to say, the first sampling signal is determined by the first-level signal and the second-level signal. Since the first sampling and processing circuit can sample the signal at the output terminal of the first touch electrode and generate the first sampling signal, by judging the first sampling signal, it can be determined whether the first touch electrode and the second touch electrode are short-circuited, so as to timely detect the short-circuit situation of the touch electrodes in the touch panel and improve the product yield of the touch panel.

[0008] In a possible implementation manner, the second sampling and processing circuit is further configured to sample the signal at the output terminal of the second touch electrode to generate a second sampling signal. Among them, when the first touch electrode and the second touch electrode are short-circuited, the second sampling signal is determined by the second-level signal and the first-level signal. When the first touch electrode and the second touch electrode are not short-circuited, the second sampling signal is determined by the second-level signal. At this time, when the first touch electrode and the second touch electrode are not short-circuited, the voltage signal at the output terminal of the second touch electrode (ignoring the influence of parasitic capacitance) is the second-level signal, that is, the second sampling signal is determined by the second-level signal; when the first touch electrode and the second touch electrode are short-circuited, the voltage signal at the output terminal of the first touch electrode is equal to the voltage signal at the output terminal of the second touch electrode. For example, it can be an intermediate-level signal between the first-level signal and the second-level signal. That is to say, the second sampling signal is determined by the first-level signal and the second-level signal. In this way, it can also be determined whether the second touch electrode is short-circuited with the first touch electrode by judging the second sampling signal generated by sampling the signal at the output terminal of the second touch electrode by the second sampling and processing circuit. When performing a short-circuit test on multiple touch electrodes simultaneously, the first touch electrode coupled to the first sampling and processing circuit and the second touch electrode coupled to the second sampling and processing circuit during the short circuit can be found according to the first sampling signal and the second sampling signal, so as to check the short-circuit situation of the touch electrodes in the touch panel, determine which touch electrodes are short-circuited, and thus improve the product yield of the touch panel.

[0009] In a possible implementation, the first sampling processing circuit includes a first signal input circuit. The first signal input circuit is coupled to the first signal input terminal and the output terminal of the first touch electrode. The first signal input circuit is configured to input a first level signal to the output terminal of the first touch electrode under the control of the signal at the first signal input terminal. In this way, during the short-circuit test of the touch electrode, the signal at the first signal input terminal can be used to control the first signal input circuit to input a first level signal to the output terminal of the first touch electrode. Moreover, during the touch sampling of the touch electrode, the signal at the first signal input terminal can be used to control the first signal input circuit to stop inputting the first level signal to the output terminal of the first touch electrode. In this way, the sampling processing circuit can not only implement the short-circuit test function of the touch electrode, but also implement the touch sampling function of the touch electrode. That is to say, the sampling processing circuit can have both the touch sampling function and the short-circuit test function for the touch electrode, so as to further reduce the test cost.

[0010] In a possible implementation, the first sampling processing circuit includes a first charge amplifier and a first capacitor. The inverting input terminal of the first charge amplifier is electrically connected to the output terminal of the first touch electrode and the first end of the first capacitor. The non-inverting input terminal of the first charge amplifier is configured to input a first excitation voltage signal, and the output terminal of the first charge amplifier is electrically connected to the second end of the first capacitor and is configured to output a first sampling signal. Through the first charge amplifier and the first capacitor, sampling of the signal at the output terminal of the first touch electrode can be achieved.

[0011] In a possible implementation, the second sampling processing circuit includes a second signal input circuit. The second signal input circuit is coupled to the second signal input terminal and the output terminal of the second touch electrode. The second signal input circuit is configured to input a second level signal to the output terminal of the second touch electrode under the control of the signal at the second signal input terminal. In this way, during the short-circuit test of the touch electrode, the signal at the second signal input terminal can be used to control the second signal input circuit to input a second level signal to the output terminal of the second touch electrode. Moreover, during the touch sampling of the touch electrode, the signal at the second signal input terminal can be used to control the second signal input circuit to stop inputting the second level signal to the output terminal of the second touch electrode. In this way, the sampling processing circuit can not only implement the short-circuit test function of the touch electrode, but also implement the touch sampling function of the touch electrode. That is to say, the sampling processing circuit can have both the touch sampling function and the short-circuit test function for the touch electrode, so as to further reduce the test cost.

[0012] In a possible implementation, the second sampling processing circuit includes a second charge amplifier and a second capacitor. The inverting input terminal of the second charge amplifier is electrically connected to the output terminal of the second touch electrode and the first terminal of the second capacitor. The non-inverting input terminal of the second charge amplifier is used to input a second excitation voltage signal, and the output terminal of the second charge amplifier is electrically connected to the second terminal of the second capacitor and is used to output a second sampling signal. Through the first charge amplifier and the first capacitor, sampling of the signal at the output terminal of the first touch electrode can be achieved.

[0013] In a possible implementation, the first sampling processing circuit further includes a third signal input circuit. The third signal input circuit couples the second signal input terminal and the output terminal of the first touch electrode. The third signal input circuit is used to input a second level signal to the output terminal of the first touch electrode under the control of the signal at the second signal input terminal. The second sampling processing circuit further includes a fourth signal input circuit. The fourth signal input circuit couples the first signal input terminal and the output terminal of the second touch electrode. The fourth signal input circuit is used to input a first level signal to the output terminal of the second touch electrode under the control of the signal at the first signal input terminal. Wherein, when the first touch electrode is short-circuited with the second touch electrode, both the first sampling signal and the second sampling signal are determined by the first level signal and the second level signal; when the first touch electrode is not short-circuited with the second touch electrode, the first sampling signal is determined by the second level signal; the second sampling signal is determined by the first level signal. It should be understood that the structure of the third signal input circuit may be the same as the structure of the second signal input circuit in the second sampling processing circuit. The structure of the fourth signal input circuit may be the same as the structure of the first signal input circuit in the first sampling processing circuit. In this way, the first sampling processing circuit and the second sampling processing circuit can adopt the same circuit structure, which is more convenient for circuit fabrication and can improve the fabrication efficiency of the sampling processing circuit. In addition, the signal input by the first sampling processing circuit to the output terminal of the first touch electrode can be interchanged with the signal input by the second sampling processing circuit to the output terminal of the second touch electrode. For example, the first sampling processing circuit can input a second level signal to the output terminal of the first touch electrode, and the second sampling processing circuit can input a first level signal to the output terminal of the second touch electrode.

[0014] In a possible implementation, the sampling processing circuit further includes a first selection switch. The first selection switch couples the first group of touch electrodes in the touch panel and the first sampling processing circuit. The first group of touch electrodes includes the first touch electrode. The first selection switch is used to select to couple the first touch electrode to the first sampling processing circuit among the first group of touch electrodes. After adding the first selection switch, the number of first sampling processing circuits can be reduced, thereby reducing the occupied area of the sampling processing circuit. When the sampling processing circuit is fabricated into a chip, the area of the chip can be reduced, thereby improving the space utilization rate.

[0015] In a possible implementation, the sampling processing circuit further includes a second selection switch. The second selection switch is coupled to a second set of touch electrodes in the touch panel and the second sampling processing circuit. The second set of touch electrodes includes second touch electrodes. The second selection switch is configured to select and couple the second touch electrodes to the second sampling processing circuit among the second set of touch electrodes. After adding the second selection switch, the number of second sampling processing circuits can be reduced, thereby reducing the occupied area of the sampling processing circuit. When the sampling processing circuit is fabricated as a chip, the area of the chip can be reduced, and thus the space utilization rate can be improved.

[0016] In a possible implementation, the first signal input circuit includes a first voltage adjustment circuit and a first switch. The first voltage adjustment circuit is electrically connected to the first level terminal and is configured to adjust the voltage of the signal at the first level terminal and provide a first level signal. The control terminal of the first switch is electrically connected to the first signal input terminal, the first terminal of the first switch is electrically connected to the first voltage adjustment circuit, and the second terminal of the first switch is electrically connected to the output terminal of the first touch electrode. The first switch is controlled by the signal at the first signal input terminal to turn on the first switch and input the first level signal to the output terminal of the first touch electrode.

[0017] In a possible implementation, the second signal input circuit includes a second voltage adjustment circuit and a second switch. The second voltage adjustment circuit is electrically connected to the second level terminal and is configured to adjust the voltage of the signal at the second level terminal to provide a second level signal. The control terminal of the second switch is electrically connected to the second signal input terminal, the first terminal of the second switch is electrically connected to the second voltage adjustment circuit, and the second terminal of the second switch is electrically connected to the output terminal of the second touch electrode. The second switch is controlled by the signal at the second signal input terminal to turn on the second switch and input the second level signal to the output terminal of the second touch electrode.

[0018] In a possible implementation, the first voltage adjustment circuit includes a first transistor or a first resistor. The first terminal of the first transistor is electrically connected to the first level terminal, and the control terminal and the second terminal of the first transistor are electrically connected to the first terminal of the first switch.

[0019] In a possible implementation, the second voltage adjustment circuit includes a second transistor or a second resistor. The first terminal of the second transistor is electrically connected to the second level terminal, and the control terminal and the second terminal of the second transistor are electrically connected to the first terminal of the second switch.

[0020] In a possible implementation, the touch panel includes a plurality of touch electrodes arranged in an array. The plurality of touch electrodes include a plurality of first touch electrodes located in the Nth row and a plurality of second touch electrodes located in the (N + 1)th row. N is a positive integer. The sampling processing circuit includes a plurality of first sampling processing circuits and a plurality of second sampling processing circuits. The plurality of first sampling processing circuits are respectively coupled to the output ends of the plurality of first touch electrodes. The plurality of second sampling processing circuits are respectively coupled to the output ends of the plurality of second touch electrodes. In this way, a first level signal can be input to the plurality of first touch electrodes through the plurality of first sampling processing circuits, and a second level signal can be input to the plurality of second touch electrodes through the plurality of second sampling processing circuits, so as to realize testing the short-circuit condition of the touch electrodes in the entire touch panel through one test process, thereby greatly improving the efficiency of the short-circuit test of the touch electrodes and reducing the test cost. In addition, the plurality of first sampling processing circuits are respectively coupled to the output ends of the plurality of first touch electrodes, and the plurality of second sampling processing circuits are respectively coupled to the output ends of the plurality of second touch electrodes, which may mean that the first touch electrodes can be connected to the first sampling processing circuits in a one-to-one correspondence, and the second touch electrodes can be connected to the second sampling processing circuits in a one-to-one correspondence; or, the plurality of first touch electrodes are connected to the same first sampling processing circuit through one or more multiplexers, and the plurality of second touch electrodes are connected to the same first sampling processing circuit through one or more multiplexers, so that within a period of time, a first sampling processing circuit is coupled to a first touch electrode, and a second sampling processing circuit is coupled to a second touch electrode.

[0021] In a second aspect, a method for testing the short circuit of touch electrodes is provided. The method is applied to a touch panel. The touch panel includes a first touch electrode and a second touch electrode. The first touch electrode and the second touch electrode are located in the same column. The sampling processing circuit includes a first sampling processing circuit and a second sampling processing circuit. The first sampling processing circuit is used to couple the output end of the first touch electrode. The second sampling processing circuit is used to couple the output end of the second touch electrode. The method includes: the first sampling processing circuit inputs a first level signal to the output end of the first touch electrode and samples the signal at the output end of the first touch electrode to generate a first sampling signal. The second sampling processing circuit inputs a second level signal to the output end of the second touch electrode. If the first sampling signal is determined by the first level signal and the second level signal, it is determined that the first touch electrode is short-circuited with the second touch electrode. If the first sampling signal is determined by the first level signal, it is determined that the first touch electrode is not short-circuited with the second touch electrode.

[0022] In a possible implementation, the above method may further include: the second sampling processing circuit samples the signal at the output end of the second touch electrode to generate a second sampling signal. If the second sampling signal is determined by a first level signal and a second level signal, it is determined that the second touch electrode is short-circuited with the first touch electrode. If the second sampling signal is determined by the second level signal, it is determined that the second touch electrode is not short-circuited with the first touch electrode.

[0023] In a third aspect, a chip is provided. The chip includes a packaging structure and the sampling processing circuit as described in any possible implementation of the first aspect encapsulated in the packaging structure.

[0024] In a fourth aspect, a touch screen is provided. The touch screen includes a touch panel and the sampling processing circuit as described in any possible implementation of the first aspect, or includes a touch panel and the chip as described in the third aspect.

[0025] In a fifth aspect, an electronic device is provided. The electronic device includes a processor and the touch screen as described in the fourth aspect. Wherein, the processor is coupled to the touch screen.

[0026] Wherein, for the technical effects brought by any possible implementation of the second aspect to the fifth aspect, reference may be made to the technical effects brought by different implementations of the first aspect, which will not be elaborated here. BRIEF DESCRIPTION OF THE DRAWINGS

[0027] Figure 1 FIG. is a schematic structural diagram of an electronic device provided by an embodiment of the present application;

[0028] Figure 2 FIG. is a schematic diagram of an arrangement manner of a touch electrode in the electronic device provided by an embodiment of the present application;

[0029] Figure 3 FIG. is a schematic structural diagram of a touch panel provided by an embodiment of the present application;

[0030] Figure 4 is the Figure 3 equivalent circuit diagram of the touch electrode shown in the non-touch state;

[0031] Figure 5 is the Figure 3 equivalent circuit diagram of the touch electrode shown in the touch state;

[0032] Figure 6 FIG. is a schematic structural diagram of a sampling processing circuit coupled to the Figure 3 touch electrode shown;

[0033] Figure 7An equivalent circuit diagram when two touch electrodes are short - circuited provided by an embodiment of the present application;

[0034] Figure 8 A scenario schematic diagram for short - circuit testing of the touch electrodes shown by using a sampling processing circuit provided by an embodiment of the present application; Figure 3 ;

[0035] Figure 9 A flowchart of a short - circuit testing method for touch electrodes provided by an embodiment of the present application;

[0036] Figure 10A For Figure 8 a structural schematic diagram of the touch electrodes in area A in

[0037] Figure 10B For Figure 10A an equivalent circuit diagram when two touch electrodes are short - circuited in

[0038] Figure 11A A flowchart of another short - circuit testing method for touch electrodes provided by an embodiment of the present application;

[0039] Figure 11B For Figure 10A another equivalent circuit diagram when two touch electrodes are short - circuited in

[0040] Figure 12A A structural schematic diagram of a first sampling processing circuit provided by an embodiment of the present application Figure One ;

[0041] Figure 12B A structural schematic diagram of a first sampling processing circuit provided by an embodiment of the present application Figure Two ;

[0042] Figure 13A A structural schematic diagram of a second sampling processing circuit provided by an embodiment of the present application Figure One ;

[0043] Figure 13B A structural schematic diagram of a second sampling processing circuit provided by an embodiment of the present application Figure Two ;

[0044] Figure 14A A test scenario schematic diagram when the first touch electrode and the second touch electrode are short - circuited;

[0045] Figure 14B A working waveform schematic diagram of a sampling processing circuit provided by an embodiment of the present application;

[0046] Figure 15 A structural schematic diagram of a second sampling processing circuit provided by an embodiment of the present application Figure Three;

[0047] Figure 16 Another schematic diagram of a test scenario when the first touch electrode is short-circuited with the second touch electrode;

[0048] Figure 17 Structural schematic of a first sampling processing circuit provided by an embodiment of the present application Figure Three ;

[0049] Figure 18 Another schematic diagram of a test scenario when the first touch electrode is short-circuited with the second touch electrode;

[0050] Figure 19 Another structural schematic diagram of a first sampling processing circuit and a second sampling processing circuit provided by an embodiment of the present application;

[0051] Figure 20 Another structural schematic diagram of a first sampling processing circuit and a second sampling processing circuit provided by an embodiment of the present application;

[0052] Figure 21 Another sampling processing circuit provided by an embodiment of the present application and Figure 3 Structural schematic of the coupling with the touch electrode shown;

[0053] Figure 22 Structural schematic of a first sampling processing circuit provided by an embodiment of the present application Figure Four . Detailed implementation manners

[0054] Next, the technical solutions in the embodiments of the present application will be described in conjunction with the accompanying drawings in the embodiments of the present application. Obviously, the described embodiments are only a part of the embodiments of the present application, rather than all the embodiments.

[0055] Hereinafter, terms such as "first" and "second" are only used for descriptive purposes, and cannot be understood as indicating or implying relative importance or implicitly specifying the quantity of the indicated technical features. Thus, features defined with "first", "second", etc. may explicitly or implicitly include one or more of such features.

[0056] In addition, in the present application, orientation terms such as "left", "right", "up", and "down" are defined with respect to the orientation of the components shown in the accompanying drawings. It should be understood that these directional terms are relative concepts, and they are used for relative description and clarification, and they may change accordingly with the change of the orientation of the components placed in the accompanying drawings.

[0057] In this application, unless otherwise clearly specified or limited, the term "coupled" should be understood in a broad sense. For example, "coupled" can be a direct electrical connection (i.e., electrical connection) between devices, or an indirect electrical connection through an intermediate medium.

[0058] An embodiment of this application provides an electronic device. The electronic device may include a touchpad, a mobile phone, a tablet computer (pad), a television, a smart wearable product (such as a smart watch, a smart bracelet), etc., which are electronic products with touch functions. The specific form of the above-mentioned electronic device is not particularly limited in the embodiments of this application.

[0059] Figure 1 It is a schematic structural diagram of an electronic device provided by an embodiment of this application. As Figure 1 shown, when the electronic device 01 has a touch function, the electronic device 01 may include a touch panel 10, a cover plate 100 covering the touch panel 10, and a sampling and processing circuit 20. The touch panel 10 may include touch electrodes. The sampling and processing circuit 20 is coupled to the touch electrodes through signal lines such as touch leads, and is used to sample the signals at the output end of the touch electrodes to generate sampling signals. Furthermore, the sampling and processing circuit 20 compares the sampling signals to determine whether the touch electrodes have been touched, thereby realizing touch detection. It should be understood that the output end of the touch electrode refers to the part where the touch electrode is coupled to the touch lead.

[0060] It should be noted that the above-mentioned cover plate 100 may be a substrate made of glass, polyethylene terephthalate (PET), or polycarbonate (PC). The cover plate 100 may be transparent (for example, the light transmittance can reach more than 85%), or it may also be completely opaque.

[0061] In the embodiments of this application, the above-mentioned electronic device 01 may be a touchpad without a display function, or an electronic product with a display function, such as a mobile phone. Taking an electronic product with a display function as an example, as Figure 2As shown, the touch panel 10 may include a display panel 02 and touch electrodes 11 located on one side of the light-emitting surface (the surface for displaying images) of the display panel 02. The cover plate 100 may cover the side of the display panel 02 where the touch electrodes 11 are provided. Among them, the display panel 02 has a plurality of gate lines and data lines that cross horizontally and vertically, and the intersection of the gate lines and data lines defines a plurality of sub-pixels. In the embodiments of the present application, a plurality of sub-pixels controlled by the same gate line may be referred to as the same row of sub-pixels, and a plurality of sub-pixels controlled by the same data line may be referred to as the same column of sub-pixels. The display panel 02 may be a liquid crystal display (LCD) panel or an organic light-emitting diode (OLED) display panel capable of self-emission. In addition, the material constituting the touch electrodes 11 in the touch panel 10 may include a transparent conductive material, for example, indium tin oxide (ITO) or indium zinc oxide (IZO).

[0062] The touch panel 10 generally includes a plurality of the above-mentioned touch electrodes 11. For example, in some embodiments of the present application, the touch panel 10 may adopt self-capacitive touch technology. Hereinafter, the structure of the touch panel 10 will be described by taking the touch panel 10 adopting self-capacitive touch technology as an example.

[0063] As Figure 3 shown, the touch panel 10 adopting self-capacitive touch technology may include a plurality of block-shaped self-capacitive touch electrodes 11. The plurality of touch electrodes 11 are arranged in an array, that is, the plurality of touch electrodes 11 are arranged in multiple rows and multiple columns. For example, the plurality of touch electrodes 11 in each column may be spaced apart at a certain preset interval distance h1 along the first direction Y. The plurality of touch electrodes 11 in each row may be spaced apart at a certain preset interval distance h2 along the second direction X. In some embodiments of the present application, the touch electrodes 11 in the same column arranged along the first direction Y may cover the same multiple columns of sub-pixels (or, multiple rows of sub-pixels) in the display panel 02, and the touch electrodes 11 in the same row arranged along the second direction X may cover the same multiple rows of sub-pixels (or, multiple columns of sub-pixels) in the display panel 02.

[0064] In this way, the plurality of touch electrodes 11 may be formed of the same layer of conductive layer, and the plurality of touch electrodes 11 are not connected to each other, so that the plurality of touch electrodes 11 formed of the same layer of conductive layer can be insulated from each other. Among them, the first direction Y and the second direction X may be cross-set. Based on this, as Figure 3As shown, each touch electrode 11 can be coupled to the above-mentioned sampling and processing circuit 20 through a touch lead 12.

[0065] Under normal circumstances, as Figure 4 shown, in some embodiments, there is a parasitic capacitance Cp between the touch electrode 11 and signal lines (such as gate lines, data lines, and touch leads in the touch panel), and other touch electrodes. Or in other embodiments, there may be a parasitic capacitance Cp between the touch electrode 11 and a reference ground (such as 0V). The capacitance value of the parasitic capacitance Cp is a constant, as Figure 4 shown, the first plate M of the parasitic capacitance Cp can be a signal line and other touch electrodes, or can be a reference ground, and the second plate of the parasitic capacitance Cp is the touch electrode 11.

[0066] As Figure 5 shown, when a finger touches the touch electrode 11, the finger can be equivalent to a reference ground (such as 0V). In addition to the parasitic capacitance Cp, a touch capacitance Cf will also be formed between the touch electrode 11 and the finger. At this time, the touch electrode 11 has both the parasitic capacitance Cp and the touch capacitance Cf. Therefore, the sampling signal obtained by the sampling and processing circuit 20 sampling the signal at the output end of the touch electrode 11 during touch is different from the sampling signal obtained by the sampling and processing circuit 20 sampling the signal at the output end of the touch electrode 11 when there is no touch. Thus, by sampling the signal at the output end of the touch electrode 11 through the sampling and processing circuit 20 and comparing the sampled sampling signal, it can be determined whether the touch electrode 11 generates a touch, so as to achieve the purpose of touch detection.

[0067] However, in Figure 3 the shown touch panel 10, the touch electrodes 11 in the same column are all coupled to the above-mentioned sampling and processing circuit 20 through touch leads 12 extending along the first direction Y. During the routing process of the above-mentioned touch leads 12 extending along the first direction Y, a short circuit may occur between two touch electrodes 11 in the same column, thus affecting touch detection. Similarly, if the touch electrodes 11 in the same row are all coupled to the above-mentioned sampling and processing circuit 20 through touch leads extending along the second direction X, then during the routing process of the above-mentioned touch leads extending along the second direction X, a short circuit may also occur between two touch electrodes 11 in the same row, thus affecting touch detection sampling.

[0068] To detect whether a short circuit occurs between two touch electrodes and improve the product yield of the touch panel, a short circuit test on the touch electrodes is usually performed before the above-mentioned electronic product leaves the factory. To implement a short circuit test on the touch electrodes in the touch panel, an embodiment of the present application provides a sampling and processing circuit 20. The sampling and processing circuit 20 can be applied to as Figure 3The touch panel shown. The sampling processing circuit 20 not only has a touch sampling function but also has a short - circuit test function for the touch electrodes.

[0069] In some embodiments of the present application, to implement the short - circuit test of the touch electrodes, as Figure 6 shown, the sampling processing circuit 20 may include a first sampling processing circuit 201 and a second sampling processing circuit 202. Among them, the first sampling processing circuit 201 is used to couple the output terminal of the first touch electrode 111. The second sampling processing circuit 202 is used to couple the output terminal of the second touch electrode 112. Among them, the first touch electrode 111 and the second touch electrode 112 may be, for example, Figure 3 the touch electrodes 11 in the same column as shown. It should be noted that if the touch electrodes 11 in the same row are all coupled to the above - mentioned sampling processing circuit 20 through touch leads extending along the second direction X, the above - mentioned first touch electrode 111 and second touch electrode 112 may also be the touch electrodes 11 in the same row.

[0070] In addition, the first sampling processing circuit 201 is used to input a first level signal S1 to the output terminal of the first touch electrode 111 and sample the signal at the output terminal of the first touch electrode 111 to generate a first sampling signal. The second sampling processing circuit 202 is used to input a second level signal S2 to the output terminal of the second touch electrode 112, and the second level signal S2 is different from the first level signal S1.

[0071] In one embodiment, as Figure 7 shown, when the first touch electrode 111 is short - circuited with the second touch electrode 112, the output terminal of the first touch electrode 111 and the output terminal of the second touch electrode 112 are short - circuited, and the signal at the output terminal of the first touch electrode 111 is equal to the signal at the output terminal of the second touch electrode 112. For the convenience of description, in the drawings of this embodiment (for example, Figure 7 shown), by taking the example of adding a wire electrically connected to the above - mentioned two touch leads 12 between the touch lead 12 coupled to the first touch electrode 111 and the touch lead 12 coupled to the second touch electrode 111, it represents that the first touch electrode 111 is short - circuited with the second touch electrode 112.

[0072] Since the first touch electrode 111 is short - circuited with the second touch electrode 112, the second level signal S2 output by the second sampling processing circuit 202 to the output terminal of the second touch electrode 112 will also be output to the output terminal of the first touch electrode 111. At this time, the signal at the output terminal of the first touch electrode 111 includes the first level signal S1 and the second level signal S2. In this case, the first sampling signal generated by the first sampling processing circuit 201 sampling the output terminal of the first touch electrode 111 is determined by the first level signal S1 and the second level signal S2.

[0073] Alternatively, in another embodiment, as Figure 6 shown, when the first touch electrode 111 and the second touch electrode 112 are not short-circuited, the output signal of the first touch electrode 111 only includes the first level signal S1. At this time, the first sampling signal generated by the first sampling processing circuit 201 sampling the output end of the first touch electrode 111 is determined by the first level signal S1.

[0074] It should be noted that since no touch operation is required during the short-circuit detection, the capacitance value of the first touch electrode 111 is the capacitance value of the above-mentioned parasitic capacitance Cp. Since the capacitance value of the parasitic capacitance Cp is a constant, for the convenience of description, in the short-circuit test process of the touch electrode in the embodiments of the present application, the influence of the parasitic capacitance Cp on the first sampling signal can be ignored.

[0075] In addition, since the above-mentioned sampling processing circuit 20 can also have a touch sampling function, at this time, the sampling processing circuit 20 can include a plurality of first sampling processing circuits 201 and a plurality of second sampling processing circuits 202. When the above-mentioned sampling processing circuit 20 samples the touch electrodes 11 in the touch panel, the plurality of touch electrodes 11 (i.e., the first touch electrodes 111) in the nth row (for example, an odd row) can be respectively coupled to the plurality of first sampling processing circuits 201, and the plurality of touch electrodes 11 (i.e., the second touch electrodes 112) in the n+1th row (for example, an even row) can be respectively coupled to the plurality of second sampling processing circuits 202, so as to realize the sampling of the plurality of first touch electrodes 111 in the nth row through the plurality of first sampling processing circuits 201, and realize the sampling of the plurality of second touch electrodes 112 in the n+1th row through the plurality of second sampling processing circuits 202. Wherein, n is a positive integer, n≥1.

[0076] For example, each first touch electrode 111 in the n-th row can be respectively coupled to a first sampling and processing circuit 201, and each second touch electrode 112 in the (n + 1)-th row can be respectively coupled to a second sampling and processing circuit 202. Of course, some or all of the first touch electrodes 111 in the n-th row can also be coupled to the same first sampling and processing circuit 201 through one or more multiplexers (MUX), so that these first touch electrodes 111 share the same first sampling and processing circuit 201 in a time-division multiplexing manner, so that within a period of time, a first sampling and processing circuit is coupled to a first touch electrode 111; or, some or all of the second touch electrodes 112 in the (n + 1)-th row can be coupled to the same second sampling and processing circuit 202 through one or more multiplexers, so that these second touch electrodes 112 share the same second sampling and processing circuit 202 in a time-division multiplexing manner, so that within a period of time, a second sampling and processing circuit is coupled to a second touch electrode 112.

[0077] In the embodiments of the present application, since the above-mentioned sampling and processing circuit 20 also has a short-circuit test function for touch electrodes, that is, the first sampling and processing circuit 201 and the second sampling and processing circuit 202 also have a short-circuit test function for touch electrodes, so the connection method between the sampling and processing circuit 20 and the touch electrode 11 when realizing the touch sampling function is reused, and the touch electrodes 11 in the touch panel 10 as Figure 3 shown can be batch short-circuit tested instead of single-point tested, thereby improving the short-circuit test efficiency and reducing the test cost.

[0078] For example, as Figure 8 shown, when performing a short-circuit test on the touch electrode 11 as Figure 3 shown, the touch electrodes 11 in the odd rows are coupled to the first sampling and processing circuit 201 to input a first level signal S1 to the output ends of the touch electrodes 11 in the odd rows through the first sampling and processing circuit 201; the touch electrodes 11 in the even rows are coupled to the second sampling and processing circuit 202 to input a second level signal S2 to the output ends of the touch electrodes 12 in the even rows through the second sampling and processing circuit 202. At this time, the above-mentioned first touch electrode 111 can be any touch electrode 11 in the odd rows, and the above-mentioned second touch electrode 112 can be any touch electrode 11 in the even rows that is in the same column as the first touch electrode 111.

[0079] Taking the first touch electrode 111 in area A of the touch panel as shown in Figure 8 being coupled to the first sampling and processing circuit 201, and the second touch electrode 112a and the second touch electrode 112b in area A being respectively coupled to the second sampling and processing circuit 202A and the second sampling and processing circuit 202B as an example, the short-circuit test of the touch electrode will be described.

[0080] In some embodiments of the present application, the first sampling signal output by the first sampling processing circuit 201 can be used to detect whether the first touch electrode 111 is short-circuited with the second touch electrode 112 (such as the second touch electrode 112a or the second touch electrode 112b). As Figure 9 shown, a short-circuit test method for a touch electrode provided by an embodiment of the present application may include S901 to S904.

[0081] S901, the first sampling processing circuit 201 inputs a first level signal S1 to the output end of the first touch electrode 111, and samples the signal at the output end of the first touch electrode 111 to generate a first sampling signal.

[0082] For example, the first level signal S1 can be a high-level signal.

[0083] S902, the second sampling processing circuit 202 inputs a second level signal S2 to the output end of the second touch electrode 112, and the second level signal S2 is different from the first level signal S1.

[0084] For example, as Figure 10A shown, the second sampling processing circuit 202A inputs a second level signal S1 to the output end of the second touch electrode 112a, and the second sampling processing circuit 202B inputs a second level signal S2 to the output end of the second touch electrode 112b. The second level signal S2 can be a low-level signal.

[0085] S903, if the first sampling signal is determined by the first level signal S1 and the second level signal S2, it is determined that the first touch electrode 111 is short-circuited with the second touch electrode 112.

[0086] For example, as described above, as Figure 10B shown, when the first touch electrode 111 is short-circuited with the second touch electrode 112a or the second touch electrode 112b, the first level signal S1 and the second level signal S2 will be output to the output end of the first touch electrode 111 at the same time. When the first level signal S1 is a high-level signal and the second level signal S2 is a low-level signal, the high-level signal and the low-level signal output to the output end of the first touch electrode 111 cancel each other out. Finally, the first sampling signal output by the first sampling processing circuit 201 is determined by the first level signal S1 and the second level signal S2. For example, in the case where the first level signal S1 is a high-level signal and the second level signal S2 is a low-level signal, the first sampling signal output by the first sampling processing circuit 201 may be an intermediate level signal between the first level signal S1 and the second level signal S2.

[0087] That is, if the first sampling signal is determined by the first level signal S1 and the second level signal S2, it can be determined that the first touch electrode 111 is short-circuited with the second touch electrode 112a or the second touch electrode 112b.

[0088] S904, if the first sampling signal is determined by the first level signal S1, it is determined that the first touch electrode 111 is not short-circuited with the second touch electrode 112.

[0089] For example, as described above, as Figure 10A shown, when the first touch electrode 111 is not short-circuited with both the second touch electrode 112a and the second touch electrode 112b, the first touch electrode 111 is independent of the second touch electrode 112a and the second touch electrode 112b. At this time, only the first level signal S1 can be output to the output end of the first touch electrode 111. Therefore, the first sampling signal output by the first sampling processing circuit 201 is determined by the first level signal S1. That is, if the first sampling signal is determined by the first level signal S1, it can be determined that the first touch electrode 111 is not short-circuited with both the second touch electrode 112a and the second touch electrode 112b, that is, the first touch electrode 111 is not short-circuited with the second touch electrode 112.

[0090] It should be noted that during the short-circuit test of the touch electrode, there may be multiple second touch electrodes 112 (such as the second touch electrode 112a and the second touch electrode 112b) in the same column of the first touch electrode 111. In the case where it is determined that the first touch electrode 111 is short-circuited with the second touch electrode 112 through the first sampling signal, it is not possible to determine which second touch electrode 112 the first touch electrode 111 is short-circuited with. For example, as Figure 10B shown, it is not possible to determine whether the first touch electrode 111 is short-circuited with the second touch electrode 112a or the second touch electrode 112b.

[0091] Therefore, in some embodiments, the second sampling processing circuit 202 can also be used to sample the signal at the output end of the second touch electrode 112 to generate a second sampling signal.

[0092] As Figure 7As shown, when the first touch electrode 111 is shorted to the second touch electrode 112, the first level signal S1 output by the first sampling and processing circuit 201 to the output end of the first touch electrode 111 will also be output to the output end of the second touch electrode 112. At this time, the signal at the output end of the second touch electrode 112 includes the first level signal S1 and the second level signal S2. Similar to the first sampling and processing circuit 201 sampling the signal at the output end of the first touch electrode 111, the second sampling signal generated by the second sampling and processing circuit 202 sampling the output end of the second touch electrode 112 is determined by the first level signal S1 and the second level signal S2.

[0093] Or, as Figure 6 shown, when the first touch electrode 111 is not shorted to the second touch electrode 112, the signal at the output end of the second touch electrode 112 only includes the second level signal S2. At this time, the second sampling signal generated by the second sampling and processing circuit 202 sampling the output end of the second touch electrode 112 is determined by the second level signal S2.

[0094] Still taking the first touch electrode 111 in area A of the touch panel shown in Figure 8 coupled to the first sampling and processing circuit 201, and the second touch electrodes 112a and 112b in area A respectively coupled to the second sampling and processing circuit 202A and the second sampling and processing circuit 202B as an example, the short - circuit test of the touch electrode is described.

[0095] As Figure 11A shown, the above - mentioned Figure 9 short - circuit test method of the touch electrode may further include S905 to S907.

[0096] S905, the second sampling and processing circuit 202 samples the signal at the output end of the second touch electrode 112 to generate a second sampling signal.

[0097] It should be understood that this S905 can be executed simultaneously with the above - mentioned S902.

[0098] S906, if the second sampling signal is determined by the first level signal S1 and the second level signal S2, it is determined that the second touch electrode 112 is shorted to the first touch electrode 111.

[0099] For example, as described above, as Figure 11BAs shown, when the first touch electrode 111 is short-circuited with the second touch electrode 112a, the first touch electrode 111 and the second touch electrode 112a are shorted, and the first level signal S1 and the second level signal S2 are simultaneously output to the output end of the second touch electrode 112a. When the first level signal S1 is a high-level signal and the second level signal S2 is a low-level signal, the high-level signal and the low-level signal output to the output end of the second touch electrode 112a cancel each other out, and finally the second sampling signal output by the second sampling processing circuit 202A coupled to the second touch electrode 112a is determined by the first level signal S1 and the second level signal S2. For example, when the first level signal S1 is a high-level signal and the second level signal S2 is a low-level signal, the second sampling signal output by the second sampling processing circuit 202 coupled to the second touch electrode 112a may be an intermediate level signal between the first level signal S1 and the second level signal S2.

[0100] That is to say, if the second sampling signal output by the second sampling processing circuit 202A coupled to the second touch electrode 112a is determined by the first level signal S1 and the second level signal S2, it can be determined that the second touch electrode 112a is short-circuited with the first touch electrode 111.

[0101] Similarly, if the second sampling signal output by the second sampling processing circuit 202B coupled to the second touch electrode 112b is determined by the first level signal S1 and the second level signal S2, it can be determined that the second touch electrode 112b is short-circuited with the first touch electrode 111.

[0102] S907, if the second sampling signal is determined by the second level signal S2, it is determined that the second touch electrode 112 is not short-circuited with the first touch electrode 111.

[0103] For example, as described above, as Figure 10A shown, when the first touch electrode 111 is not short-circuited with the second touch electrode 112a, the first touch electrode 111 and the second touch electrode 112a are independent of each other, and only the second level signal S2 can be output to the output end of the second touch electrode 112a. Therefore, the second sampling signal output by the second sampling processing circuit 202A coupled to the second touch electrode 112a is determined by the second level signal S2.

[0104] That is to say, if the second sampling signal output by the second sampling processing circuit 202A coupled to the second touch electrode 112a is determined by the second level signal S2, it can be determined that the second touch electrode 112a is not short-circuited with the first touch electrode 111.

[0105] Similarly, if the second sampling signal output by the second sampling and processing circuit 202B coupled to the second touch electrode 112b is determined by the second level signal S2, it can be determined that the second touch electrode 112b is not short-circuited with the first touch electrode 111.

[0106] In this way, through Figure 11A the method described above, during the process of determining that the first touch electrode 111 is short-circuited with one of the second touch electrodes 112, by executing the above S905 and S906, for the second touch electrode 112 with which the first touch electrode 111 is short-circuited, the second sampling signal output by the second sampling and processing circuit 202 coupled to the second touch electrode 112 is determined by the first level signal S1 and the second level signal S2. In this way, the touch electrodes that may be short-circuited can be found, so as to check the short-circuit situation of the touch electrodes in the touch panel, thereby improving the product yield of the touch panel.

[0107] Next, an explanation will be given on how the first sampling and processing circuit 201 inputs the first level signal S1 to the output end of the first touch electrode 111, samples the signal at the output end of the first touch electrode 111 to generate the first sampling signal, and how the second sampling and processing circuit 202 inputs the second level signal S2 to the output end of the second touch electrode 112, and samples the signal at the output end of the second touch electrode 112 to generate the second sampling signal.

[0108] In some embodiments of the present application, the first level signal S1 output by the first sampling and processing circuit 201 to the output end of the first touch electrode 111 is a high level signal, and the second level signal S2 output by the first sampling and processing circuit 201 to the output end of the second touch electrode 112 is a low level signal. In other embodiments of the present application, the first level signal S1 output by the first sampling and processing circuit 201 to the output end of the first touch electrode 111 is a low level signal, and the second level signal S2 output by the first sampling and processing circuit 201 to the output end of the second touch electrode 112 is a high level signal. Therefore, in the embodiments of the present application, the magnitudes of the first level signal S1 and the second level signal S2 are not specially limited.

[0109] Taking the first level signal S1 as a high level signal and the second level signal S2 as a low level signal as an example, the structures and principles of the first sampling and processing circuit 201 and the second sampling and processing circuit 202 will be described below.

[0110] In some embodiments of the present application, such as Figure 12AAs shown, the first sampling and processing circuit 201 may include a first signal input circuit 2011. The first signal input circuit 2011 is coupled to the first signal input terminal, the output terminal of the first touch electrode 111, and the first level terminal (such as the power supply terminal VDD). The first signal input circuit 2011 is configured to input a first level signal S1 (such as a high level signal) to the output terminal of the first touch electrode 111 under the control of the signal at the first signal input terminal.

[0111] As Figure 12A shown, the first sampling and processing circuit 201 may further include a first charge amplifier CA1 and a first capacitor Cfb1. The inverting input terminal of the first charge amplifier CA1 is electrically connected to the output terminal of the first touch electrode 111 and the first end of the first capacitor Cfb1. The non-inverting input terminal Vex1 of the first charge amplifier CA1 is used to input a first excitation voltage signal VEX1, and the output terminal V CA1 of the first charge amplifier CA1 is electrically connected to the second end of the first capacitor Cfb1 and is used to output a first sampling signal VCA1.

[0112] In the case where the first signal input circuit 2011 inputs a first level signal (such as a high level signal) to the output terminal of the first touch electrode 111, the output terminal of the first touch electrode 111 outputs a high level signal. The excess current generated by the high level signal output from the output terminal of the first touch electrode 111 will charge the plate at the first end of the first capacitor Cfb1, and the positive charges on the plate at the first end of the first capacitor Cfb1 will continuously accumulate. Since the voltage across the capacitor cannot change suddenly, when the positive charges on the plate at the first end of the first capacitor Cfb1 continuously increase, the negative charges on the plate at the second end of the first capacitor Cfb1 will also increase accordingly, so that the positive and negative charges at both sides of the plates of the first capacitor Cfb1 are balanced. Thus, the voltage of the output terminal V CA1 of the first charge amplifier CA1 will gradually decrease and gradually become a low level signal, so that the first sampling and processing circuit 201 outputs a low level first sampling signal VCA1.

[0113] In some embodiments of the present application, such as Figure 12BAs shown, the first signal input circuit 2011 may include a first switch SW1 and a first voltage adjustment circuit (such as a first transistor MP1). Among them, the first voltage adjustment circuit is electrically connected to a first level terminal (such as a power supply terminal VDD), and is used to adjust the voltage of the signal at the first level terminal to provide a first level signal S1 (for example, a high-level signal S1). The control terminal of the first switch SW1 is electrically connected to a first signal input terminal (such as an EVENB signal input terminal), the first terminal of the first switch SW1 is electrically connected to the first voltage adjustment circuit, and the second terminal of the first switch SW1 is electrically connected to the output terminal of the first touch electrode 111. The first switch SW1 is controlled by the signal at the first signal input terminal to turn on the first switch SW1, and input the first level signal S1 to the output terminal of the first touch electrode 111.

[0114] As Figure 12B shown, taking the first voltage adjustment circuit as the first transistor MP1 as an example, the first terminal (such as the source electrode) of the first transistor MP1 is electrically connected to the first level terminal (such as the power supply terminal VDD), and the control terminal and the second terminal of the first transistor MP1 are electrically connected to the first terminal (such as the source electrode) of the first switch SW1.

[0115] The first switch SW1 and the first transistor MP1 may be metal oxide semiconductor (MOS) field effect transistors. Here, the first switch SW1 and the first transistor MP1 are taken as PMOS transistors as an example for description.

[0116] For the above first signal input circuit 2011, when the EVENB signal is a low-level signal, the first switch SW1 is turned on. After the first switch SW1 is turned on, since the control terminal of the first transistor MP1 is short-circuited with the second terminal of the first transistor MP1, the turned-on first switch SW1 pulls the voltage of the control terminal of the first transistor MP1 down to the initial voltage V I of the output terminal of the first touch electrode 111, so that the first transistor MP1 is turned on. Since the first terminal of the first transistor MP1 is electrically connected to the power supply terminal VDD, the first transistor MP1 forms a diode connection with the power supply terminal VDD and a current is generated on the first transistor MP1. The current generated by the first transistor MP1 provides a pull-up current to the output terminal of the first touch electrode 111. At this time, the output terminal of the first touch electrode 111 outputs a high-level first level signal S1 under the action of the pull-up current.

[0117] Correspondingly, when the EVENB signal is a high-level signal, the first switch SW1 is in an off state, so that the first transistor MP1 is also in an off state, and the first signal input circuit 2011 does not output a high-level signal (i.e., the first level signal) to the output terminal of the first touch electrode 111.

[0118] It should be understood that by using the above-mentioned first transistor MP1, after the first switch SW1 is turned on, the voltage of the first level terminal (such as the power supply terminal VDD) can be adjusted after the first transistor MP1 is turned on, so that the voltage of the first level signal S1 meets the requirements of the sampling voltage range. For example, at this time, the voltage of the first level signal S1 is the voltage of the power supply terminal VDD minus the voltage drops generated by the first transistor MP1 and the first switch SW1.

[0119] In some other embodiments, the above-mentioned first voltage adjustment circuit may also be a first resistor, which is used to adjust the voltage of the first level terminal (such as the power supply terminal VDD). The embodiments of the present application do not make special limitations on the implementation manner of the first voltage adjustment circuit.

[0120] In some embodiments of the present application, as Figure 13A shown, the second sampling processing circuit 202 may include a second signal input circuit 2021. The second signal input circuit 2021 is coupled to the second signal input terminal, the output terminal of the second touch electrode 112, and the second level terminal (for example, the ground terminal GND). The second signal input circuit 2021 is used to input a second level signal S2 (that is, a low-level signal S2) to the output terminal of the second touch electrode 112 under the control of the signal at the second signal input terminal.

[0121] As Figure 13A shown, the second sampling processing circuit 202 may further include a second charge amplifier CA2 and a second capacitor Cfb2. The inverting input terminal of the second charge amplifier CA2 is electrically connected to the output terminal of the second touch electrode 112 and the first end of the second capacitor Cfb2. The non-inverting input terminal Vex2 of the second charge amplifier CA2 is used to input a second excitation voltage signal VEX2, and the output terminal V CA2 of the second charge amplifier CA2 is electrically connected to the second end of the second capacitor Cfb2 and is used to output a second sampling signal VCA2.

[0122] When the second signal input circuit 2021 inputs a second level signal S2 (such as a low level signal) to the output terminal of the second touch electrode 112, the output terminal of the second touch electrode 112 outputs a low level signal. The low level signal output from the output terminal of the second touch electrode 112 generates an excessive discharge current. The excessive discharge current will discharge from the plate at the first end of the second capacitor Cfb2 through the second signal input circuit 2021 to the second level terminal (such as the ground terminal GND). The positive charges on the plate at the first end of the second capacitor Cfb2 are continuously drawn away by the second level terminal, causing the positive charges on the plate at the first end of the second capacitor Cfb2 to continuously decrease. Since the voltage across a capacitor cannot change abruptly, when the positive charges on the plate at the first end of the second capacitor Cfb2 continuously decrease, the negative charges on the plate at the second end of the second capacitor Cfb2 will also decrease accordingly, so as to balance the positive and negative charges at both plates of the second capacitor Cfb2. Thus, the voltage at the output terminal V CA2 of the second charge amplifier CA2 will gradually increase and gradually become a high level signal, so that the second sampling processing circuit 202 outputs a high level second sampling signal VCA2.

[0123] In some embodiments of the present application, as Figure 13B shown, the second signal input circuit 2021 may include a second switch SW2 and a second voltage adjustment circuit (such as a second transistor MP2). Among them, the second voltage adjustment circuit is electrically connected to the second level terminal (such as the ground terminal GND) and is used to adjust the voltage of the signal at the second level terminal to provide the second level signal S2 (such as a low level signal S2). The control terminal of the second switch SW2 is electrically connected to the second signal input terminal (such as the ODD signal input terminal). The first end of the second switch SW2 is electrically connected to the second voltage adjustment circuit, and the second end of the second switch SW2 is electrically connected to the output terminal of the second touch electrode 112. The second switch SW2 is controlled by the signal at the second signal input terminal to turn on the second switch SW1 and input the second level signal S2 to the output terminal of the second touch electrode 112.

[0124] As Figure 13B shown, taking the second voltage adjustment circuit as the second transistor MP2 as an example, the first end (such as the source electrode) of the second transistor MP2 is electrically connected to the second level terminal (such as the ground terminal GND), and the control terminal and the second end of the second transistor MP2 are electrically connected to the first end (such as the source electrode) of the second switch SW2.

[0125] The second switch SW2 and the second transistor MP2 may be MOS field effect transistors. Here, taking the second switch SW2 and the second transistor MP2 as NMOS transistors as an example for illustration.

[0126] For the above-mentioned second signal input circuit 2021, when the ODD signal is a high-level signal, the second switch SW2 is turned on. After the second switch SW2 is turned on, since the control terminal of the second transistor MP2 is short-circuited to the second terminal of the second transistor MP2, the turned-on second switch SW2 pulls up the voltage of the control terminal of the second transistor MP2 to the initial voltage V of the output terminal of the second touch electrode 112 I , causing the second transistor MP2 to turn on. Since the first terminal of the second transistor MP2 is electrically connected to the ground terminal GND, the second transistor MP2 forms a diode connection with the ground terminal GND and a current is generated in the second transistor MP2. The current generated by the second transistor MP2 provides a pull-down current to the output terminal of the second touch electrode 112. At this time, the output terminal of the second touch electrode 112 outputs a low-level signal (i.e., the second-level signal S2) under the action of the pull-down current.

[0127] Correspondingly, when the ODD signal is a low-level signal, the second switch SW2 is in the cut-off state, so that the second transistor MP2 is also in the cut-off state, and the second signal input circuit 2021 does not output a low-level signal (i.e., the second-level signal S2) to the output terminal of the second touch electrode 112.

[0128] It should be understood that by using the above-mentioned second transistor MP2, after the second switch SW2 is turned on and the second transistor MP2 is turned on, the voltage of the second-level terminal (such as the ground terminal GND) can be adjusted to make the voltage of the second-level signal S2 meet the voltage range requirements for sampling. For example, at this time, the voltage of the second-level signal S2 is the voltage of the ground terminal GND plus the boost generated by the second transistor MP2 and the second switch SW2.

[0129] In some other embodiments, the above-mentioned second voltage adjustment circuit may also include a second resistor to adjust the voltage of the second-level terminal (such as the ground terminal GND). Therefore, the embodiments of the present application do not make special limitations on the implementation manner of the second voltage adjustment circuit.

[0130] In the embodiments of the present application, taking a MOS transistor as an example, the conduction of a MOS transistor means that under the control of its gate, current flows in from the drain and out from the source (such as an NMOS), or flows in from the source and out from the drain (such as a PMOS); the cut-off of a MOS transistor means that the source and drain of the MOS transistor are open-circuited.

[0131] When performing a short - circuit test on the touch electrodes, for the first sampling and processing circuit 201 coupled to the first touch electrode 111, when the first touch electrode 111 and the second touch electrode 112 are not short - circuited, if the first signal input circuit 2011 inputs a first - level signal S1 (such as a high - level signal) to the output end of the first touch electrode 111, then the first sampling and processing circuit 201 outputs a low - level first sampling signal VCA1.

[0132] However, when the first touch electrode 111 and the second touch electrode 112 are short - circuited, as Figure 14A shown, the output end of the first touch electrode 111 is short - circuited to the output end of the second touch electrode 112. At this time, it is equivalent that there is both a pull - up current provided by the power supply terminal VDD and a pull - down current provided by the ground terminal GND at the output end of the first touch electrode 111. Since there is a first transistor MP1 as a first voltage - adjusting circuit between the power supply terminal VDD and the output end of the first touch electrode 111, and there is a second transistor MP2 as a second voltage - adjusting circuit between the ground terminal GND and the output end of the first touch electrode 111, the signal V I at the output end of the first touch electrode 111 is an intermediate - level signal between the high - level signal and the low - level signal. At this time, the first - level signal S1 and the second - level signal S2 cancel each other out, and the first sampling and processing circuit 201 is in the process of normal sampling of the first touch electrode 111. The first sampling signal VCA1 output by the output end V CA1 of the first charge amplifier CA1 is an intermediate - level signal between the high - level signal and the low - level signal.

[0133] That is to say, when the first sampling signal VCA1 output by the first sampling and processing circuit 201 coupled to the first touch electrode 111 is a low - level signal, it can be determined that the first touch electrode 111 and the second touch electrode 112 are not short - circuited. Correspondingly, when the first sampling signal VCA1 output by the first sampling and processing circuit 201 coupled to the first touch electrode 111 is an intermediate - level signal between the high - level signal and the low - level signal, it can be determined that the first touch electrode 111 and the second touch electrode 112 are short - circuited.

[0134] For the second sampling and processing circuit 202 coupled to the second touch electrode 112, when the first touch electrode 111 and the second touch electrode 112 are not short - circuited, according to the above description, if the second signal input circuit 2021 inputs a second - level signal S2 (such as a low - level signal) to the output end of the second touch electrode 112, then the second sampling and processing circuit 202 outputs a high - level second sampling signal VCA2.

[0135] However, when the first touch electrode 111 and the second touch electrode 112 are short - circuited, as Figure 14AAs shown, the output terminal of the first touch electrode 111 is shorted to the output terminal of the second touch electrode 112. At this time, it is equivalent to that the output terminal of the second touch electrode 112 has both the pull-up current provided by the power supply terminal VDD and the pull-down current provided by the ground terminal GND. Since there is a first transistor MP1 as the first voltage adjustment circuit between the power supply terminal VDD and the output terminal of the second touch electrode 112, and there is a second transistor MP2 as the second voltage adjustment circuit between the ground terminal GND and the output terminal of the second touch electrode 112, the signal V at the output terminal of the second touch electrode 112 I is an intermediate level signal between the high-level signal and the low-level signal. At this time, the first level signal S1 and the second level signal S2 cancel each other out, and the second sampling processing circuit 202 is in the process of normal sampling of the second touch electrode 112. The output terminal V of the second charge amplifier CA2 CA2 The second sampling signal VCA2 output is an intermediate level signal between the high-level signal and the low-level signal.

[0136] That is to say, when the second sampling signal VCA2 output by the second sampling processing circuit 202 coupled to the second touch electrode 112 is a high-level signal, it can be determined that the second touch electrode 112 is not shorted to the first touch electrode 111. Correspondingly, when the second sampling signal VCA2 output by the second sampling processing circuit 202 coupled to the second touch electrode 112 is an intermediate level signal between the high-level signal and the low-level signal, it can be determined that the second touch electrode 112 is shorted to the first touch electrode 111.

[0137] Figure 14B shows a schematic diagram of the working waveform of a first sampling processing circuit. The following combines Figure 14B The waveform shown is used to illustrate the principle of the first sampling processing circuit 201 for short-circuit testing of the touch electrode. It should also be noted that in order to perform sampling for multiple cycles, such as Figure 12A or Figure 12B shown, the first sampling processing circuit 201 may further include a reset switch reset1. One end of the reset switch reset1 is coupled to the output terminal of the first touch electrode 111 and the inverting input terminal of the first charge amplifier CA1, and the other end of the reset switch reset1 is coupled to the output terminal V of the first charge amplifier CA1 CA1 coupled.

[0138] such as Figure 14BAs shown, if the first touch electrode 111 and the second touch electrode 112 are not short-circuited, when EVEN is at a high level, that is, the EVENB signal is at a low level (the EVENB signal is the inverted signal of the EVEN signal), and the ODD signal is at a low level, the first signal input circuit 2011 outputs a pull-up current (i.e., the first level signal S1) to the output terminal of the first touch electrode 111. The non-inverting input terminal Vex1 of the first charge amplifier CA1 operates normally, and a first excitation voltage VEX1 signal (for example, high and low levels within the range of 1V to 4V) is input to the non-inverting input terminal Vex1. After the first charge amplifier CA1 is reset by the reset switch reset1 at the end when the VEX1 signal is at a low level (1V), the reset switch reset1 disconnects.

[0139] Due to the virtual short principle, the signal V at the output terminal of the first touch electrode 111 I first follows the change of the VEX1 signal to a high level (4V). As time goes by, the first signal input circuit 2011 composed of the first switch SW1 and the first transistor MP1 charges more positive charges into the plate at the first end of the first capacitor Cfb1. To maintain the charge balance of the two plates of the first capacitor Cfb1, more negative charges are drawn from the output terminal V of the first charge amplifier CA1 CA1 and gathered on the plate at the second end of the first capacitor Cfb1. Therefore, compared with the V at the output terminal of the first touch electrode 111 at this time I signal (4V), the VCA1 signal at the output terminal V of the first charge amplifier CA1 CA1 decreases accordingly (for example, from 4V to 3.2V).

[0140] Then, after the first charge amplifier CA1 is reset by the reset switch reset1 at the end when the VEX1 signal is at a high level (4V), the reset switch reset1 disconnects. Due to the virtual short principle, the V at the output terminal of the first touch electrode 111 I signal first follows the change of the VEX1 signal to a low level (1V). As time goes by, the first signal input circuit 2011 composed of the first switch SW1 and the first transistor MP1 charges more positive charges into the plate at the first end of the first capacitor Cfb1. To maintain the charge balance of the two plates of the first capacitor Cfb1, more negative charges are drawn from the output terminal V of the first charge amplifier CA1 CA1 and gathered on the plate at the second end of the first capacitor Cfb1. Therefore, compared with the V at the output terminal of the first touch electrode 111 at this time I signal (for example, 1V), the VCA signal at the output terminal V of the first charge amplifier CA1 CA1 decreases accordingly (for example, from 1V to 0V) until it decreases to the ground signal (such as the GND signal).

[0141] Similarly, if there is no short circuit, the output terminal of the second touch electrode 112, under the action of the pull-down current provided by the second sampling processing circuit 202, finally the output terminal V CA2 of the VCA2 signal in the second charge amplifier CA2 in the second sampling processing circuit 202 will increase to the power supply signal (such as the VDD signal).

[0142] In some other embodiments of the present application, as Figure 15 shown, the second signal input circuit 2021 may include a second switch SW2 and does not include a second voltage adjustment circuit. Wherein, the control terminal of the second switch SW2 is electrically connected to the second signal input terminal (such as the ODD signal input terminal), the first terminal (such as the source electrode) of the second switch SW2 is electrically connected to the second level terminal (such as the ground terminal GND), and the second terminal (such as the drain electrode) of the second switch SW2 is electrically connected to the output terminal of the second touch electrode 112. The second switch SW2 is controlled by the signal at the second signal input terminal to turn on the second switch SW2 and input a second level signal S2 (such as a low level signal) to the output terminal of the second touch electrode 112.

[0143] When the ODD signal is a high level signal, the second switch SW2 is turned on. Since the first terminal of the second switch SW2 is electrically connected to the ground terminal GND. Therefore, the ground terminal GND provides a pull-down current to the output terminal of the second touch electrode 112, that is, the second signal input circuit 2021 outputs a low level second level signal S2 to the output terminal of the second touch electrode 112.

[0144] Assume that the first touch electrode 111 is coupled to the first sampling processing circuit 201 as Figure 12B shown, and the second touch electrode 112 is coupled to the second sampling processing circuit 202 as Figure 15 shown. For the first sampling processing circuit 201 coupled to the first touch electrode 111, in the case where the first touch electrode 111 and the second touch electrode 112 are not short-circuited, according to Figure 12B the first sampling processing circuit 201 shown, if the first signal input circuit 2011 outputs a high level first level signal S1 to the output terminal of the first touch electrode 111, the first sampling signal VCA1 output by the first sampling processing circuit 201 is a low level signal.

[0145] However, in the case where the first touch electrode 111 and the second touch electrode 112 are short-circuited, as Figure 16As shown, the output end of the first touch electrode 111 is shorted to the output end of the second touch electrode 112. At this time, it is equivalent that there is a pull-up current provided by the power supply terminal VDD and a pull-down current provided by the ground terminal GND at the output end of the first touch electrode 111. At this time, since there is a first transistor MP1 as a first voltage adjustment circuit between the power supply terminal VDD and the output end of the first touch electrode 111, and there is no second voltage adjustment circuit between the ground terminal GND and the output end of the first touch electrode 111, the signal V at the output end of the first touch electrode 111 I is a low-level signal. In this case, the excess discharge current will discharge to the ground terminal GND from the plate at the first end of the first capacitor Cfb1 through the second signal input circuit 2021 in the second sampling processing circuit 202. The positive charges on the plate at the first end of the first capacitor Cfb1 are continuously drawn away by the ground terminal GND, so that the positive charges on the plate at the first end of the first capacitor Cfb1 are continuously reduced. Since the voltage across the capacitor cannot change suddenly, when the positive charges on the plate at the first end of the first capacitor Cfb1 are continuously reduced, the negative charges on the plate at the second end of the first capacitor Cfb1 will also decrease accordingly, so that the positive and negative charges at both sides of the plate of the first capacitor Cfb1 are balanced, and thus the output end of the first charge amplifier CA1 VCA1 The voltage will gradually increase and gradually become a high-level signal. Furthermore, the output end of the first charge amplifier CA1 VCA1 The first sampling signal VCA1 output is a high-level signal.

[0146] That is to say, when the first sampling signal VCA1 output by the first sampling processing circuit 201 coupled to the first touch electrode 111 is a low-level signal, it can be determined that the first touch electrode 111 and the second touch electrode 112 are not short-circuited. Correspondingly, when the first sampling signal VCA1 output by the first sampling processing circuit 201 coupled to the first touch electrode 111 is a high-level signal, it can be determined that the first touch electrode 111 and the second touch electrode 112 are short-circuited.

[0147] In some other embodiments of the present application, as Figure 17 shown, the first signal input circuit may include a first switch SW1 and does not include a first voltage adjustment circuit. Among them, the first end (such as the source) of the first switch SW1 is electrically connected to the first level terminal (such as the power supply terminal VDD), the control end of the first switch SW1 is electrically connected to the first signal input terminal (such as the EVENB signal input terminal), and the second end (such as the drain) of the first switch SW1 is electrically connected to the output end of the first touch electrode 111. The first switch SW1 is controlled by the signal at the first signal input terminal to turn on the first switch SW1 and input a first level signal S1 (such as a high-level signal) to the output end of the first touch electrode 111.

[0148] When the EVENB signal is at a low level, the first switch SW1 conducts. Since the first end of the first switch SW1 is electrically connected to the power supply terminal VDD, the power supply terminal VDD provides a pull-up current to the output terminal of the first touch electrode 111, that is, the first signal input circuit 2011 outputs a high-level signal to the output terminal of the first touch electrode 111.

[0149] Assume that the first touch electrode 111 is coupled to the first sampling and processing circuit 201 as shown in Figure 17 , and the second touch electrode 112 is coupled to the second sampling and processing circuit 202 as shown in Figure 13B . For the second sampling and processing circuit 202 coupled to the second touch electrode 112, when the first touch electrode 111 and the second touch electrode 112 are not short-circuited, according to the second sampling and processing circuit 202 shown in Figure 13B , if the second signal input circuit 2021 outputs a low-level signal to the output terminal of the second touch electrode 112, the second sampling signal VCA2 output by the second sampling and processing circuit 202 is a high-level signal.

[0150] However, when the first touch electrode 111 and the second touch electrode 112 are short-circuited, as shown in Figure 18 , the output terminal of the first touch electrode 111 and the output terminal of the second touch electrode 112 are short-circuited. At this time, it is equivalent that the output terminal of the second touch electrode 112 has both a pull-up current provided by the power supply terminal VDD and a pull-down current provided by the ground terminal GND. Since there is a second transistor MP2 as a second voltage adjustment circuit between the ground terminal GND and the output terminal of the second touch electrode 112, and there is no first voltage adjustment circuit between the power supply terminal VDD and the output terminal of the second touch electrode 112, the signal V at the output terminal of the second touch electrode 112 I is a high-level signal. In this case, the pull-up current provided by the power supply terminal VDD to the output terminal of the second touch electrode 112 will charge the plate at the first end of the second capacitor Cfb2, and the positive charges on the plate at the first end of the second capacitor Cfb2 will continuously accumulate. Since the voltage across the capacitor cannot change suddenly, when the positive charges on the plate at the first end of the second capacitor Cfb2 continuously increase, the negative charges on the plate at the second end of the second capacitor Cfb2 will also increase accordingly, so that the positive and negative charges at both plates of the second capacitor Cfb2 are balanced. As a result, the voltage at the output terminal V of the second charge amplifier CA2 CA2 will gradually decrease and gradually become a low-level signal. Furthermore, the second sampling signal VCA2 output by the output terminal V of the second charge amplifier CA2 CA2 is a low-level signal.

[0151] That is to say, when the second sampling signal VCA2 output by the second sampling processing circuit 202 coupled to the second touch electrode 112 is a high-level signal, it can be determined that the second touch electrode 112 and the first touch electrode 111 are not short-circuited. Correspondingly, when the second sampling signal VCA2 output by the second sampling processing circuit 202 coupled to the second touch electrode 112 is a low-level signal, it can be determined that the second touch electrode 112 and the first touch electrode 111 are short-circuited.

[0152] In the embodiment of the present application, as shown in Figure 8 , Figure 12A , Figure 13A , Figure 15 and Figure 17 , each touch electrode 11 in the touch panel 10 shown in Figure 3 can be coupled to a first sampling processing circuit 201 or a second sampling processing circuit 202. For example, each touch electrode 11 in the nth row (such as an odd row) of the touch panel is respectively coupled to a first sampling processing circuit 201, and each touch electrode 112 in the (n + 1)th row (such as an even row) of the touch panel is respectively coupled to a second sampling processing circuit 202.

[0153] In this way, when performing a short-circuit test on the touch electrodes 11 in the touch panel 10, an EVEN signal (or EVENB signal) can be input to the first signal input end in each first sampling processing circuit 201 coupled to the touch electrodes 11 in the nth row (such as an odd row) of the touch panel 10 at the same time, so as to control all the first sampling processing circuits 201 to respectively input a first level signal S1 (such as a high-level signal) to the output end of the corresponding touch electrode 11. And an ODD signal can be input to the second signal input end in each first sampling processing circuit 201 coupled to the touch electrodes 11 in the (n + 1)th row (such as an even row) of the touch panel 10 at the same time, so as to control all the second sampling processing circuits 202 to respectively input a second level signal S2 (such as a low-level signal) to the output end of the corresponding touch electrode 11. In this way, it is possible to determine which touch electrodes 11 are short-circuited through the first sampling signals generated by the respective first sampling processing circuits 201, the second sampling signals generated by the second sampling processing circuits 202, and the manner described above. In this method, it is possible to determine which touch electrodes 11 are short-circuited only through one test process, thereby greatly improving the efficiency of the touch electrode short-circuit test and reducing the test cost.

[0154] It should be understood that in the above embodiments, when the EVENB signal is at a low level, the first signal input circuit 2011 outputs a high-level signal to the output terminal of the first touch electrode 111. When the ODD signal is at a high level, the second signal input circuit 2021 outputs a low-level signal to the output terminal of the second touch electrode 112. To ensure the unity of the signal input to the first signal input terminal of the first sampling and processing circuit 201 and the signal input to the second signal input terminal of the second sampling and processing circuit 202, it can be configured that the EVEN signal controls the first signal input circuit 2011 to output a high-level signal to the output terminal of the first touch electrode 111, and the EVENB signal is the inverted signal of the EVEN signal. That is to say, when the EVEN signal is at a high level, the first signal input circuit 2011 outputs a high-level signal to the output terminal of the first touch electrode 111. In this case, an inverter can be added to the first signal input terminal, so that when a high-level EVEN signal is input to the first signal input terminal, the high-level EVEN signal can be converted into a low-level EVENB signal through the inverter, so as to control the first signal input circuit 2011 to output a high-level signal to the output terminal of the first touch electrode 111.

[0155] In this way, when both the EVEN signal and the ODD signal are at a high level, it can be controlled that the first signal input circuit 2011 outputs a high-level signal to the output terminal of the first touch electrode 111, and the second signal input circuit 2021 outputs a low-level signal to the output terminal of the second touch electrode 112, so as to perform a short-circuit test on the touch electrodes in the touch panel through the first sampling and processing circuit 201 and the second sampling and processing circuit 202.

[0156] When both the EVEN signal and the ODD signal are at a low level, it can be controlled that the first signal input circuit 2011 stops outputting a high-level signal to the output terminal of the first touch electrode 111, and the second signal input circuit 2021 stops outputting a low-level signal to the output terminal of the second touch electrode 112. Both the first switch SW1 and the second switch SW2 are in the off state. At this time, the touch electrodes in the touch panel can be touched and sampled through the first sampling and processing circuit 201 and the second sampling and processing circuit 202.

[0157] It should be noted that, due to the existence of parasitic capacitance Cp in the touch electrodes 11 (such as the first touch electrode 111 and the second touch electrode 112), when the first sampling and processing circuit 201 samples the signal at the output end of the first touch electrode 111 and the second sampling and processing circuit 202 samples the signal at the output end of the second touch electrode 112, due to the existence of parasitic capacitance Cp in the first touch electrode 111 and the second touch electrode 112, the total charge amount at the output end of the first touch electrode 111 and the output end of the second touch electrode 112 will become larger, which may affect the first sampling signal generated by the first sampling and processing circuit 201 and the second sampling signal generated by the second sampling and processing circuit 202, and affect the accuracy of the sampling result.

[0158] Therefore, as Figure 19 shown, in some embodiments of the present application, the first sampling and processing circuit 201 may further include a capacitor Ccancel1, and the second sampling and processing circuit 202 may further include a capacitor Ccancel2. Wherein, one end of the capacitor Ccancel1 is coupled to the first excitation voltage signal terminal Vex3, and the other end of the capacitor Ccancel1 is coupled to the output end of the first touch electrode 111. One end of the capacitor Ccancel2 is coupled to the second excitation voltage signal terminal Vex4, and the other end of the capacitor Ccancel2 is coupled to the output end of the second touch electrode 112.

[0159] During the process of the first sampling and processing circuit 201 sampling the signal at the output end of the first touch electrode 111, a first excitation voltage signal VEX1 can be simultaneously applied to the signal line of the first touch electrode 111 (such as the gate line, data line) (i.e., the first plate M of the parasitic capacitance Cp) and the first excitation voltage signal terminal Vex3 coupled by the capacitor Ccancel1. In this way, the capacitor Ccancel1 can cancel out the parasitic capacitance Cp on the first touch electrode 111, thereby eliminating the influence of the parasitic capacitance Cp on the first touch electrode 111 on the first sampling signal generated by the first sampling and processing circuit 201, and further improving the accuracy of signal sampling.

[0160] Similarly, during the process of the second sampling and processing circuit 202 sampling the signal at the output end of the second touch electrode 112, a second excitation voltage signal VEX2 can be simultaneously applied to the signal line of the second touch electrode 112 (such as the gate line, data line) (i.e., the first plate M of the parasitic capacitance Cp) and the second excitation voltage signal terminal Vex4 coupled by the capacitor Ccancel2. In this way, the capacitor Ccancel2 can cancel out the parasitic capacitance Cp on the second touch electrode 112, thereby eliminating the influence of the parasitic capacitance Cp on the second touch electrode 112 on the second sampling signal generated by the second sampling and processing circuit 202, and further improving the accuracy of signal sampling.

[0161] It should be understood that when sampling the touch electrode 11 in the same touch panel, the first excitation voltage signal VEX1 and the second excitation voltage signal VEX2 may be the same or different, and the embodiments of the present application do not make special restrictions.

[0162] In some other embodiments of the present application, as Figure 20 shown, the first sampling processing circuit 201 may further include a third signal input circuit 2011'. The third signal input circuit 2011' is coupled to the second signal input terminal (such as the ground terminal GND) and the output terminal of the first touch electrode 111. The third signal input circuit 2011' is configured to input a second level signal S2 to the output terminal of the first touch electrode 111 under the control of the signal of the second signal input terminal (such as the ground terminal GND). For example, the structure of the third signal input circuit 2011' may be the same as that of the second signal input circuit 2021 in the above-mentioned second sampling processing circuit 202, and will not be described in detail here.

[0163] The second sampling processing circuit 202 may further include a fourth signal input circuit 2021'. The fourth signal input circuit 2021' is coupled to the first signal input terminal (such as the power supply terminal VDD) and the output terminal of the second touch electrode 112. The fourth signal input circuit 2021' is configured to input a first level signal S1 to the output terminal of the second touch electrode 112 under the control of the signal of the first signal input terminal (such as the power supply terminal VDD). For example, the structure of the fourth signal input circuit 2021' may be the same as that of the first signal input circuit 2011 in the above-mentioned first sampling processing circuit 201, and will not be described in detail here. In this way, the first sampling processing circuit 201 and the second sampling processing circuit 202 may adopt the same circuit structure, which is more convenient for circuit manufacturing and can improve the manufacturing efficiency of the sampling processing circuit.

[0164] In this case, the signal input by the first sampling processing circuit 201 to the output terminal of the first touch electrode 111 may be interchanged with the signal input by the second sampling processing circuit 202 to the output terminal of the second touch electrode 112. For example, the first sampling processing circuit 201 may input a second level signal S2 to the output terminal of the first touch electrode 111, and the second sampling processing circuit 202 may input a first level signal S1 to the output terminal of the second touch electrode 112. At this time, when the first touch electrode 111 and the second touch electrode 112 are short-circuited, both the first sampling signal VCA1 and the second sampling signal VCA2 are determined by the first level signal S1 and the second level signal S2. When the first touch electrode 111 and the second touch electrode 112 are not short-circuited, the first sampling signal VCA1 is determined by the second level signal S2. The second sampling signal VCA2 is determined by the first level signal S2. For the specific analysis process, reference may be made to the description of the above embodiments, and details will not be described here.

[0165] In some embodiments of the present application, in order to reduce the area of ​​the sampling and processing circuit, a first sampling and processing circuit 201 or a second sampling and processing circuit 202 may be reused for multiple touch electrodes. Figure 21 As shown, the sampling processing circuit 20 may further include a first selection switch 203. The first selection switch 203 is coupled as shown in FIG. Figure 3 The first group of touch electrodes 110 and the first sampling processing circuit 201 in the touch panel 10 are shown. The first group of touch electrodes 110 includes first touch electrodes 111. For example, the first group of touch electrodes 110 may be a part of the touch electrodes 11 in the nth row (i.e., odd rows) in the touch panel 10. The first selection switch 203 is used to select the first touch electrodes 111 in the first group of touch electrodes 110 to be coupled to the first sampling processing circuit 201.

[0166] Accordingly, the sampling and processing circuit 20 may further include a second selection switch 204. The second selection switch 204 is coupled as follows Figure 3 The second group of touch electrodes 120 and the second sampling processing circuit 202 in the touch panel 10 are shown. The second group of touch electrodes includes the second touch electrodes 112. For example, the second group of touch electrodes 120 may be a part of the touch electrodes 11 in the n+1th row (e.g., an even row) in the touch panel 10. The second selection switch 204 is used to select the second touch electrodes 112 in the second group of touch electrodes 120 to be coupled to the second sampling processing circuit 202.

[0167] like Figure 21 As shown, the first selection switch 203 and the second selection switch 204 may be multi-way selection switches.

[0168] In addition, it should be noted that in the embodiment of the present application, since the output terminal V CA1 and the output terminal V of the second charge amplifier CA2 CA2 The output is an analog signal. In order to compare the first sampling signal VCA1 output by the first sampling processing circuit 201 and the second sampling signal VCA2 output by the second sampling processing circuit 202, the output terminal V CA1 The output signal and the output terminal V of the second charge amplifier CA2 CA2 Therefore, the first sampling processing circuit 201 and the second sampling processing circuit 202 both include a sampling and holding circuit and an analog-to-digital converter (ADC).

[0169] The following takes the first sampling processing circuit 201 as an example to illustrate the sample-and-hold circuit and the ADC.

[0170] As Figure 22 shown, the sample and hold circuit 2012 includes a third switch 2012A, a fourth switch 2012B, a fifth switch 2012C, a sixth switch 2012D, a third capacitor Csp, a fourth capacitor Csn, a fifth capacitor Chp, a sixth capacitor Chn, and an amplifier SHA. Among them, the first end of the third switch 2012A is electrically connected to the first reference voltage terminal, the second end of the third switch 2012A is electrically connected to the first end of the third capacitor Csp and the second end of the fourth switch 2012B, and the first ends of the fourth switch 2012B and the fifth switch 2012C are both electrically connected to the output terminal V CA1 of the first charge amplifier CA1. The second end of the fifth switch 2012C is electrically connected to the first end of the fourth capacitor Csn and the second end of the sixth switch 2012D, and the first end of the sixth switch 2012D is electrically connected to the second reference voltage terminal. The second end of the third capacitor Csp is electrically connected to the first end of the fifth capacitor Chp and the inverting input terminal V IN of the amplifier SHA. The second end of the fifth capacitor Chp is electrically connected to the non-inverting output terminal V OP of the amplifier SHA. The second end of the fourth capacitor Csn is electrically connected to the first end of the sixth capacitor Chn and the non-inverting input terminal V IP of the amplifier SHA. The second end of the sixth capacitor Chn is electrically connected to the inverting output terminal V ON of the amplifier SHA.

[0171] The first reference voltage terminal can be used to provide a low-level voltage signal, such as the REFL signal or the GND signal; the second reference voltage terminal can be used to provide a high-level reference voltage signal, such as the REFH signal or the VDD signal. In some embodiments of the present application, the reference voltage signal provided by the first reference voltage terminal may be equal to the voltage when the first excitation voltage signal VEX1 is a low-level signal. The reference voltage signal provided by the second reference voltage terminal may be equal to the voltage when the first excitation voltage signal VEX1 is a high-level signal. Alternatively, in some other embodiments of the present application, the magnitudes of the voltages of the first reference voltage terminal and the second reference voltage terminal can be set independently, and the present application does not limit this.

[0172] The inverting input terminal V INN of the ADC 2013 is electrically connected to the inverting output terminal V OP of the amplifier SHA, and the non-inverting input terminal V INP of the ADC 2013 is electrically connected to the non-inverting output terminal V IP of the amplifier SHA, and is used to convert the received V INN signal and V INP signal into a digital signal.

[0173] When sampling the output terminal of the first touch electrode 111, a first excitation voltage signal VEX1 is input to the non-inverting input terminal Vex1 of the first charge amplifier CA1. When the first excitation voltage signal VEX1 is at a low level, the fourth switch 2012B and the sixth switch 2012D are turned on, the third switch 2012A and the fifth switch 2012C are turned off, and the signal V CA1 CA1 of the output terminal of the first charge amplifier CA1 passes through the fourth switch 2012B and is input to the inverting input terminal V IN of the amplifier SHA through the third capacitor Csp. The second reference voltage signal (such as the REFH signal or the VDD signal) passes through the sixth switch 2012D and is input to the non-inverting input terminal V IP of the amplifier SHA through the fourth capacitor Csn. Thus, the signal V CA1 of the output terminal of the first charge amplifier CA1 and the second reference voltage signal act on the non-inverting input terminal V IP and the inverting input terminal V IN of the amplifier SHA. Through the fifth capacitor Chp and the sixth capacitor Chn, the VOP signal and the VON signal are generated and output, so that the VOP signal and the VON signal are respectively electrically connected to the inverting input terminal V INN and the non-inverting input terminal V INP of the ADC2013, so that the ADC2013 outputs a set of 10-bit digital signals.

[0174] When the first excitation voltage signal VEX1 is at a high level, the third switch 2012A and the fifth switch 2012C are turned on, the fourth switch 2012B and the sixth switch 2012D are turned off, and the signal V CA1 of the output terminal of the first charge amplifier CA1 passes through the fifth switch 2012C and is input to the non-inverting input terminal V IP of the amplifier SHA through the fourth capacitor Csn. The first reference voltage signal (such as the REFL signal or the GND signal) passes through the third switch 2012A and is input to the inverting input terminal V IN of the amplifier SHA through the third capacitor Csp. Thus, the signal V CA1 of the output terminal of the first charge amplifier CA1 and the first reference voltage signal act on the non-inverting input terminal V IP and the inverting input terminal V IN of the amplifier SHA. Through the fifth capacitor Chp and the sixth capacitor Chn, the VOP signal and the VON signal are generated and output, so that the VOP signal and the VON signal are respectively electrically connected to the inverting input terminal V INN and the non-inverting input terminal V INP of the ADC2013, so that the ADC2013 outputs another set of 10-bit digital signals.

[0175] The 10-bit digital signal output by the above ADC2013 can intuitively show the value of the first sampling signal output by the first sampling processing circuit 201. For example, if the output terminal V of the first charge amplifier CA1 CA1 The output VCA1 signal (i.e., the first sampling signal) is a low-level signal (such as a GND signal). After passing through the above sample-and-hold circuit and ADC2013, a minimum 10-bit digital signal can be obtained. If the output terminal V of the first charge amplifier CA1 CA1 The output VCA1 signal (i.e., the first sampling signal) is a normal-level signal (for example, the intermediate level between 1V and 4V). After passing through the above sample-and-hold circuit 2012 and ADC2013, a 10-bit digital signal of medium size can be obtained. In this way, it is possible to determine whether the first touch node and the second touch node are short-circuited by judging the 10-bit digital signal output by the analog-to-digital converter ADC.

[0176] It should be understood that the above ADC will output a set of 10-bit digital signals during the high-level stage of the first excitation voltage signal VEX1 and another set of 10-bit digital signals during the low-level stage of the first excitation voltage signal VEX1. When comparing the digital signals output by the ADC, it is possible to choose to compare the digital signals output during the high-level stage or the digital signals output during the low-level stage. Sampling twice within one cycle of the first excitation voltage signal VEX can improve the sampling efficiency.

[0177] Similarly, for the second sampling processing circuit 202 coupled to the second touch electrode 112, if the output terminal V of the second charge amplifier CA2 CA2 The output VCA2 signal (i.e., the second sampling signal) is a high-level signal (such as a VDD signal). After passing through the above sample-and-hold circuit and the analog-to-digital converter ADC, a maximum 10-bit digital signal can be obtained. If the output terminal V of the second charge amplifier CA2 CA2 The output VCA2 signal (i.e., the second sampling signal) is a normal-level signal (for example, the intermediate level between 1V and 4V). After passing through the above sample-and-hold circuit and ADC, a 10-bit digital signal of medium size can be obtained. In this way, it is possible to determine whether the first touch node and the second touch node are short-circuited by judging the 10-bit digital signal output by the ADC.

[0178] It should be noted that in the above first sampling processing circuit 201 and second sampling processing circuit 202, the output terminals of the first charge amplifier CA1 and the second charge amplifier CA2 may not be directly coupled to the sample and hold circuit, but may be coupled to the sample and hold circuit after passing through an integrator. Therefore, the embodiments of the present application do not make special limitations on how to convert the signals at the output terminals of the first charge amplifier CA1 and the second charge amplifier CA2 into digital signals and by what means.

[0179] Finally, it should also be noted that in the above embodiments of the present application, the first excitation voltage signal VEX1 and the second excitation voltage signal VEX2 are high and low level signals with multiple periods. According to the first excitation voltage signal VEX1 and the second excitation voltage signal VEX2, multiple samplings are performed during the high level stage or multiple samplings are performed during the low level stage. By processing the signals of multiple samplings, such as calculating the average value, etc., the accuracy of the first sampling signal and the second sampling signal can be improved, thereby improving the accuracy of the short circuit test of the touch electrode.

[0180] The embodiments of the present application also provide a chip. The chip includes a packaging structure and the sampling processing circuit described in any one of the above embodiments packaged in the packaging structure. The packaging structure may be a packaging substrate, a silicon-based interposer, etc.

[0181] The embodiments of the present application also provide a touch screen. The touch screen includes a touch panel and the sampling processing circuit described in any one of the above embodiments, or includes a touch panel and the above chip.

[0182] The embodiments of the present application also provide an electronic device. The electronic device includes a processor and the above touch screen. The processor is coupled to the touch screen and is used to realize human-computer interaction through the operation of the user on the touch screen.

[0183] It should be understood that the processor in the electronic device may be a central processing unit (CPU), and the processor may also be other general-purpose processors, digital signal processors (DSPs), application specific integrated circuits (ASICs), field programmable gate arrays (FPGAs) or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components, etc. The general-purpose processor may be a microprocessor or the processor may also be any conventional processor, etc.

[0184] The above is only the specific implementation manner of the present application, but the protection scope of the present application is not limited thereto. Any person skilled in the art within the technical scope disclosed by the present application can easily think of changes or substitutions, which should all be covered within the protection scope of the present application. Therefore, the protection scope of the present application shall be subject to the protection scope of the claims.

Claims

1. A sampling processing circuit is applied to a touch panel, and the touch panel includes: A first touch electrode and a second touch electrode, the first touch electrode and the second touch electrode being in the same column; characterized in that the sampling and processing circuit includes: A first sampling and processing circuit for coupling the output terminal of the first touch electrode; the first sampling and processing circuit is used to input a first level signal to the output terminal of the first touch electrode and sample the signal at the output terminal of the first touch electrode to generate a first sampling signal; A second sampling and processing circuit for coupling the output terminal of the second touch electrode; the second sampling and processing circuit is used to input a second level signal to the output terminal of the second touch electrode; Wherein, when the first touch electrode is short-circuited with the second touch electrode, the first sampling signal is determined by the first level signal and the second level signal; when the first touch electrode is not short-circuited with the second touch electrode, the first sampling signal is determined by the first level signal.

2. The circuit according to claim 1, wherein The second sampling and processing circuit is further used to sample the signal at the output terminal of the second touch electrode to generate a second sampling signal; Wherein, when the first touch electrode is short-circuited with the second touch electrode, the second sampling signal is determined by the second level signal and the first level signal; when the first touch electrode is not short-circuited with the second touch electrode, the second sampling signal is determined by the second level signal.

3. The circuit according to claim 1 or 2, characterized in that The first sampling and processing circuit includes: A first signal input circuit, coupling a first signal input terminal and the output terminal of the first touch electrode; the first signal input circuit is used to input the first level signal to the output terminal of the first touch electrode under the control of the signal at the first signal input terminal.

4. The circuit according to claim 3, characterized in that, The first sampling and processing circuit includes: a first charge amplifier and a first capacitor; The inverting input terminal of the first charge amplifier is electrically connected to the output terminal of the first touch electrode and the first end of the first capacitor; the non-inverting input terminal of the first charge amplifier is used to input a first excitation voltage signal, and the output terminal of the first charge amplifier is electrically connected to the second end of the first capacitor and is used to output the first sampling signal.

5. The circuit according to claim 4, characterized in that The second sampling and processing circuit includes: A second signal input circuit, coupling a second signal input terminal and the output terminal of the second touch electrode; the second signal input circuit is used to input the second level signal to the output terminal of the second touch electrode under the control of the signal at the second signal input terminal.

6. The circuit according to claim 5, characterized in that, The second sampling and processing circuit includes: a second charge amplifier and a second capacitor; The inverting input terminal of the second charge amplifier is electrically connected to the output terminal of the second touch electrode and the first end of the second capacitor; the non-inverting input terminal of the second charge amplifier is used to input a second excitation voltage signal, and the output terminal of the second charge amplifier is electrically connected to the second end of the second capacitor and is used to output the second sampling signal.

7. The circuit according to claim 6, characterized in that The first sampling and processing circuit further includes: a third signal input circuit; the third signal input circuit is coupled to the second signal input terminal and the output terminal of the first touch electrode; the third signal input circuit is configured to input the second level signal to the output terminal of the first touch electrode under the control of the signal of the second signal input terminal; The second sampling and processing circuit further includes: a fourth signal input circuit; the fourth signal input circuit is coupled to the first signal input terminal and the output terminal of the second touch electrode; the fourth signal input circuit is configured to input the first level signal to the output terminal of the second touch electrode under the control of the signal of the first signal input terminal; Wherein, when the first touch electrode is short-circuited with the second touch electrode, both the first sampling signal and the second sampling signal are determined by the first level signal and the second level signal; when the first touch electrode is not short-circuited with the second touch electrode, the first sampling signal is determined by the second level signal; the second sampling signal is determined by the first level signal.

8. The circuit according to claim 1 or 2, characterized in that, The sampling and processing circuit further includes: A first selection switch; the first selection switch is coupled to the first group of touch electrodes in the touch panel and the first sampling and processing circuit; the first group of touch electrodes includes the first touch electrode; the first selection switch is configured to select and couple the first touch electrode to the first sampling and processing circuit among the first group of touch electrodes.

9. The circuit according to claim 1 or 2, characterized in that, The sampling and processing circuit further includes: A second selection switch; the second selection switch is coupled to the second group of touch electrodes in the touch panel and the second sampling and processing circuit; the second group of touch electrodes includes the second touch electrode; the second selection switch is configured to select and couple the second touch electrode to the second sampling and processing circuit among the second group of touch electrodes.

10. The circuit according to claim 3, characterized in that, The first signal input circuit includes: A first voltage adjustment circuit, the first voltage adjustment circuit is electrically connected to the first level terminal, and is configured to adjust the voltage of the signal of the first level terminal and provide the first level signal; A first switch, the control terminal of the first switch is electrically connected to the first signal input terminal, the first end of the first switch is electrically connected to the first voltage adjustment circuit, and the second end of the first switch is electrically connected to the output terminal of the first touch electrode; the first switch is controlled by the signal of the first signal input terminal to turn on the first switch and input the first level signal to the output terminal of the first touch electrode.

11. The circuit according to claim 10, characterized in that, The first voltage adjustment circuit includes a first transistor or a first resistor; the first end of the first transistor is electrically connected to the first level terminal, and the control terminal and the second end of the first transistor are electrically connected to the first end of the first switch.

12. The circuit according to claim 5, characterized in that, The second signal input circuit includes: A second voltage adjustment circuit, the second voltage adjustment circuit is electrically connected to the second level terminal, and is configured to adjust the voltage of the signal of the second level terminal and provide the second level signal; A second switch, a control end of the second switch is electrically connected to the second signal input end, a first end of the second switch is electrically connected to the second voltage adjustment circuit, and a second end of the second switch is electrically connected to an output end of the second touch electrode; the second switch is controlled by a signal of the second signal input end to turn on the second switch, and input the second level signal to the output end of the second touch electrode.

13. The circuit according to claim 12, wherein The second voltage adjustment circuit includes a second transistor or a second resistor; a first end of the second transistor is electrically connected to the second level end, and a control end and a second end of the second transistor are electrically connected to the first end of the second switch.

14. The circuit according to claim 1 or 2, characterized in that, The touch panel includes a plurality of touch electrodes arranged in an array; the plurality of touch electrodes include a plurality of the first touch electrodes located in the Nth row and a plurality of the second touch electrodes located in the (N + 1)th row; N is a positive integer. The sampling and processing circuit includes a plurality of the first sampling and processing circuits and a plurality of the second sampling and processing circuits. The plurality of the first sampling and processing circuits are respectively used for being coupled to output ends of the plurality of the first touch electrodes; the plurality of the second sampling and processing circuits are respectively used for being coupled to output ends of the plurality of the second touch electrodes.

15. A chip, characterized in that, It includes a packaging structure, and the sampling and processing circuit according to any one of claims 1-14 packaged in the packaging structure.

16. A touch screen, characterized in that, It includes a touch panel and the sampling and processing circuit according to any one of claims 1 to 14, or includes a touch panel and the chip according to claim 15.

17. An electronic device, characterized in that, It includes a processor and the touch screen according to claim 16; the processor is coupled to the touch screen.

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