Data testing method and device for eMMC power-off during busy time

Abstract

A data test method and device for eMMC power-off in busy time, characterized in that: the interval time from the start of the test host sending a write command to the eMMC entering busy is obtained; the interval time from the start of the test host sending a power-off instruction to the real disconnection of the switching power supply is obtained; the test host compares and judges to make the eMMC realize power-off in the time period of entering busy. The test host GPIO directly controls the switching power supply, which has the advantages of short control time and fast switching power response; the test host uses an embedded development board with an integrated operating system, which has the advantages of mature software and hardware and easy development; the test device can not only realize the data consistency and stability test after power-off in the eMMC busy state, but also can be extended to power-off test in other conditions, such as power-on condition, read data condition, etc., which has wide application range and is suitable for popularization and application.

Description

Technical Field

[0001] The present invention belongs to the field of storage technology, and in particular relates to a data testing method and device for power failure during eMMC busy time. Background Art

[0002] eMMC (Embedded Multi Media Card) is a standard specification established by the MMC Association for embedded devices in products such as mobile phones and tablets. eMMC consists of an embedded storage solution with an MMC (Multi Media Card) interface, NAND flash memory, and a host controller, all housed in a small BGA package. With an interface speed of up to 400MBytes per second, eMMC offers fast speeds and is highly upgradeable. The interface voltage can operate at either 1.8V or 3.3V.

[0003] According to the eMMC protocol, during each write operation, the DATA0 data bus is pulled low, entering a busy state. During this period, the eMMC controller is programming the FLASH. A sudden power loss during this busy period significantly increases the probability of serious errors such as incorrect data reads, unrecognizable data, or even corruption. Therefore, it is essential to test eMMC data consistency and stability by powering off during the eMMC busy period. Because the eMMC busy period is extremely short, only a few milliseconds at most, there is no reliable method for testing this condition in the industry. Typically, only random power outages are detected, making it difficult to pinpoint a power outage during the eMMC busy period. Summary of the Invention

[0004] The present invention aims to solve the above problems and provides a method and device for testing data during power failure during eMMC busy time.

[0005] In a first aspect, the present invention provides a data testing method for power failure during eMMC busy time, comprising:

[0006] Get the interval time_busy from when the test host issues a write command to when the eMMC enters the busy state;

[0007] Get the interval time_off from when the test host issues the power-off command to when the switch power is actually disconnected;

[0008] The test host compares time_busy with time_off to ensure that the eMMC is powered off during the busy period.

[0009] Specifically, if time_busy is greater than time_off, the test host issues a power-off command after sending a write command to the eMMC; if time_busy is less than time_off, the test host issues a power-off command before sending a write command to the eMMC; if time_busy is equal to time_off, the test host issues a power-off command at the same time as sending a write command to the eMMC.

[0010] Re-power on the eMMC and test whether the host can initialize the eMMC and enter the working mode.

[0011] After the eMMC is initialized successfully, the test host reads and verifies the address where the data was written to the eMMC before power failure to verify whether the data is consistent after power failure within the eMMC busy time.

[0012] Furthermore, in the data testing method for power failure during the eMMC busy time described in the present invention, the absolute value of the difference between the time when the power-off instruction is issued and the time when the write command is sent is less than or equal to 5 milliseconds; by limiting the time when the power-off instruction is issued, it is ensured that the eMMC chip is within the eMMC busy time period when it is powered off, thereby further improving the test accuracy of the testing method described in the present invention.

[0013] In a second aspect, the present invention provides a data testing device that powers off during eMMC busy time, including a test host, a switching power supply and an eMMC test socket; the test host is connected to the eMMC test socket; the switching power supply is provided with two outputs and one input; one of the two outputs is connected to the aforementioned test host, and the other is connected to the aforementioned eMMC test socket; the one input is connected to the aforementioned test host.

[0014] Furthermore, in the data testing device that powers off during the eMMC busy time of the present invention, the test host is an embedded development board that can carry an eMMC chip; the test host is connected to the aforementioned eMMC test socket through an eMMC interface; the test host is connected to one input of the aforementioned switching power supply through one GPIO.

[0015] Furthermore, the data testing device for power failure during eMMC busy time of the present invention is characterized in that the eMMC test socket is provided with an eMMC protocol bus.

[0016] Furthermore, the data testing device for power failure during the eMMC busy time of the present invention is characterized in that: the switching power supply is provided with two outputs and one input; the two outputs include one output of 5V for powering the test host; the other output is 3.3 / 1.8v for powering the eMMC test socket; the one input is used to detect the level signal sent by the test host through the GPIO, and control the switching power supply to supply / cut off power to the eMMC test socket.

[0017] Furthermore, in the data testing device for power failure during eMMC busy time of the present invention, a computer program is stored in the testing host; when the computer program is running, the testing host can execute the testing method described in the first aspect.

[0018] The data testing method and device for power failure during the eMMC busy time of the present invention have the following technical effects: 1. Directly controlling the switch power supply by testing the host GPIO has the advantages of short control time and fast switch power response;

[0019] 2. The test host uses an embedded development board with an integrated operating system, which has the advantages of mature software and hardware and easy development;

[0020] 3. The test device of the present invention can not only test the data consistency and stability after power failure in the case of eMMC busy, but also can be expanded to test other power-off conditions, such as power-on conditions and data reading conditions. It has a wide range of applications and is suitable for popularization and application. BRIEF DESCRIPTION OF THE DRAWINGS

[0021] Figure 1 Schematic diagram of a data testing device for power failure during eMMC busy time according to an embodiment of the present invention;

[0022] Figure 2 This is a schematic diagram of the connection structure between the test host, the switching power supply, and the eMMC test socket according to an embodiment of the present invention;

[0023] Figure 3 This is a schematic diagram of the circuit structure of the eMMC test socket according to an embodiment of the present invention;

[0024] Figure 4 This is a schematic diagram of the switching power supply structure according to an embodiment of the present invention. DETAILED DESCRIPTION

[0025] The data testing method and device for power failure during eMMC busy time of the present invention are described in detail below with reference to the accompanying drawings and embodiments.

[0026] Example 1

[0027] The present disclosure discloses a data testing device for power failure during eMMC busy time, such as Figure 1 As shown, the test device includes a test host (eMMC host), an eMMC test socket and a switching power supply.

[0028] In the embodiment of the present disclosure, an embedded development board that can carry an eMMC chip is used as a test host (eMMC host) for testing the eMMC. The development board is integrated with a Linux system and is connected to the eMMC through an eMMC interface. Figure 2 As shown in the figure, the test host reserves a GPIO (p_EN) connected to the switching power supply, which controls the switching power supply to power off and on the eMMC by outputting high and low levels.

[0029] The eMMC test socket described in the embodiment of the present disclosure is as follows Figure 3 As shown in the figure, the test card holder with eMMC protocol bus, the data and command buses are connected to the development board, and is powered by a 3.3 / 1.8V output from a regulated voltage source. The BGA-packaged eMMC to be tested can be installed in it, facilitating flexible removal of the eMMC.

[0030] The switching power supply of the embodiment of the present disclosure is as follows Figure 4 As shown in the figure, there are two outputs, one of which is 5V for powering the development board, and the other is 3.3 / 1.8V for powering the eMMC test socket. There is also an input to detect the high and low level signals sent by the eMMChost GPIO. If a high level is detected, the 3.3 / 1.8V line is disconnected and stops powering the eMMC. If a low level is detected, the 3.3 / 1.8V line is connected and starts powering the eMMC.

[0031] Example 2

[0032] The present embodiment discloses a method for testing data during power failure during eMMC busy time. The testing method in the present embodiment is implemented based on the testing device described in the first embodiment.

[0033] The data testing method for power failure during eMMC busy time disclosed in the embodiment of the present disclosure includes the following specific steps:

[0034] Step S201, start the device, test the host (eMMC host) development board running the Linux system, the GPIO connected to the switching power supply is powered on at the default low level, the switching power supply 3.3 / 1.8V is in the on state, the development board recognizes the eMMC and initializes the eMMC.

[0035] Step S202: During the operation of the Linux eMMC driver on the development board, measure the interval time_busy from the start of sending the write command to the time when the eMMC enters the busy state.

[0036] Step S203: When the Linux GPIO driver of the development board is running, the GPIO is controlled to output a high level to control the switch power supply to be disconnected, and the interval time time_off from when the Linux driver sends the GPIO pull-up instruction to when the switch power supply 3.3 / 1.8V is actually disconnected is measured.

[0037] Step S204: Calculate the time difference based on the measured time_busy and time_off, set a program in the Linux driver, and at any random moment during the write test, if time_busy is greater than time_off, pull the GPIO high within 5 milliseconds of (time_busy-time_off) after the development board sends the write command to the eMMC; if time_busy is less than time_off, pull the GPIO high within 5 milliseconds of (time_off-time_busy) before the development board sends the write command to the eMMC; if time_busy is equal to time_off, pull the GPIO high at the same time as the development board sends the write command to the eMMC.

[0038] Step S205 : After the GPIO is pulled high, the switching power supply 3.3V / 1.8V is disconnected just when the eMMC enters the busy state, so that the eMMC is powered off during the busy period.

[0039] Step S206: The development board sets the GPIO to be pulled low again, the switching power supply 3.3 / 1.8V is reconnected, the eMMC is powered on again, and the development board re-identifies and initializes the eMMC to verify whether the eMMC can always be normally identified and initialized to enter the working mode.

[0040] Step S207: If the initialization is successful, the development board reads and verifies the address where the data was written to the eMMC before power failure, and verifies whether the data is consistent after power failure during the eMMC busy time.

[0041] The data testing method and device for power failure during the eMMC busy time described in this embodiment can not only conveniently test the data consistency and stability when the eMMC bus enters the busy state and suddenly loses power during data writing, solving the problem that industry testing methods are difficult to cover this situation; it can also be used for power failure testing in other situations such as power-on and data reading.

Claims

1. A data testing method for power failure during eMMC busy time, characterized in that include: Get the interval time_busy from when the test host issues a write command to when the eMMC enters the busy state; Get the interval time_off from when the test host issues the power-off command to when the switch power is actually disconnected; The test host compares time_busy with time_off to ensure that the eMMC is powered off during the busy period. Specifically, if time_busy is greater than time_off, the test host issues a power-down command after sending a write command to the eMMC; if time_busy is less than time_off, the test host issues a power-down command before sending a write command to the eMMC; if time_busy is equal to time_off, the test host issues a power-down command while sending a write command to the eMMC; Re-power on the eMMC and test whether the host can initialize the eMMC and enter the working mode. After the eMMC is initialized successfully, the test host reads and verifies the address where the data was written to the eMMC before power failure to verify whether the data is consistent after power failure within the eMMC busy time.

2. The data testing method for power failure during eMMC busy time according to claim 1, characterized in that: The absolute value of the difference between the time when the power-off instruction is issued and the time when the write command is sent is less than or equal to 5 milliseconds.

3. A data testing device for power failure during eMMC busy time, comprising a test host, a switching power supply, and an eMMC test socket; the test host is connected to the eMMC test socket; and characterized in that: The switching power supply is provided with two outputs and one input; one of the two outputs is connected to the aforementioned test host, and the other is connected to the aforementioned eMMC test socket; the one input is connected to the aforementioned test host; a computer program is stored in the test host; when the computer program is running, the test host can execute the data testing method for power failure during eMMC busy time described in claim 1 or 2.

4. The data testing device according to claim 3, wherein: The test host is an embedded development board that can carry an eMMC chip; the test host is connected to the aforementioned eMMC test socket through an eMMC interface; the test host is connected to one input of the aforementioned switching power supply through one GPIO.

5. The data testing device according to claim 4, wherein: The eMMC test socket is provided with an eMMC protocol bus.

6. The data testing device according to claim 5, wherein: The switching power supply is provided with two outputs and one input; the two outputs include one output of 5V for powering the test host; the other output is 3.3 / 1.8v for powering the eMMC test socket; the one input is used to detect the level signal sent by the test host through GPIO, and control the switching power supply to supply / cut off power to the eMMC test socket.

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