Process path-based transmission time control method and semiconductor process equipment

Abstract

The application discloses a process path-based transmission time control method and a semiconductor process equipment. When a wafer is transmitted according to a process path, total time of the wafer at all front-end stations is determined, and residual process time of a terminal station is determined. According to a time difference value between the residual process time and the total time, a starting transmission time of a next wafer is determined. The next wafer is transmitted according to the starting transmission time, so as to reduce idle time of the terminal station. It can be seen that the application considers actual process time of the wafer when the wafer is transmitted according to the process path, and the purpose is to reduce the idle time of the terminal station, so that the equipment efficiency can be effectively improved, and thus better equipment capacity is achieved.

Description

Technical Field

[0001] This application relates to the field of semiconductor processes, and more particularly to a process path-based transmission time control method and semiconductor process equipment. Background Technology

[0002] Semiconductor process equipment comprises multiple modules. Before the semiconductor process equipment performs process processing on the wafer, a process path needs to be configured according to the process requirements. The process path is used to plan the multiple modules of the equipment that the wafer must pass through in sequence throughout the entire process. These modules can be referred to as the stations planned by the process path for the wafer.

[0003] In existing solutions, when processing wafers in the same batch, the common wafer transport method is to periodically transport wafers according to a planned process path. However, this method makes it difficult to precisely set the wafer transport cycle, and the following situation may occur: after the previous wafer is processed in the last chamber, the next wafer has not yet been transported to the last chamber for processing, leaving the last chamber idle, thereby reducing equipment efficiency and reducing equipment capacity. Summary of the Invention

[0004] The purpose of this application is to provide a process path-based transfer time control method and semiconductor process equipment. When transferring wafers according to the process path, the actual process time of the wafers is also considered. The aim is to reduce the idle time of the terminal station, which can effectively improve equipment efficiency and achieve better equipment capacity.

[0005] To address the aforementioned technical problems, this application provides a transmission time control method based on a process path, wherein the stations planned in the process path include: a destination station and a front-end station located before the destination station; the transmission time control method based on the process path includes:

[0006] When transferring the wafer according to the process path, determine the total time taken for the wafer at all the front-end sites, and determine the remaining process time at the destination site;

[0007] The start time for transferring the next wafer is determined based on the time difference between the remaining process time and the total time.

[0008] The next wafer is transmitted according to the stated start transmission time to reduce the idle time of the destination site.

[0009] Optionally, determining the remaining process time at the endpoint includes:

[0010] Determine the remaining processing time and the remaining cycle time at the current endpoint.

[0011] The remaining time of the current processing technology and the remaining time of the cycle technology are added together to obtain the current remaining process time of the terminal station.

[0012] Optionally, determining the total time taken for the wafer across all the front-end sites includes:

[0013] Determine the total transmission time and total processing time of the wafer across all the front-end sites;

[0014] The total transmission time and the total processing time are added together to obtain the total time taken for the wafer at all the front-end sites.

[0015] Optionally, determining the start time for transferring the next wafer based on the time difference between the remaining process time and the total time, and transferring the next wafer according to the start time to reduce the idle time at the destination site, includes:

[0016] Subtract the total time from the remaining process time to obtain the time difference;

[0017] If the time difference is less than zero, the next wafer is transmitted immediately;

[0018] If the time difference is not less than zero, and the time difference is less than the sum of the remaining process times of all process stations in the front-end station, then the next wafer is transmitted when the remaining process time is equal to the total time.

[0019] If the time difference is not less than the sum of the remaining process times of all process stations in the front-end station, then the next wafer is transferred when the remaining process time is equal to the total time.

[0020] In this context, none of the process stations perform cyclic processes when wafer transfer is involved.

[0021] Optionally, the process path-based transport time control method further includes:

[0022] After the first batch of wafers is transmitted, if the transmission time of the first batch of wafers does not meet the preset time interval requirement between the stations, the calculated time difference is corrected when transmitting the second batch of wafers, and the start transmission time of the next wafer is determined based on the corrected time difference, until the transmission time of the same batch of wafers meets the preset time interval requirement.

[0023] The second batch is the next batch after the first batch.

[0024] Optionally, the determination process for whether the transmission time of the first batch of wafers does not meet the preset time interval requirement between the stations includes:

[0025] The sum of the transmission times of all wafers in the first batch from the first site to the second site is calculated to obtain the transmission time to be evaluated; wherein the first site and the second site are either of the aforementioned sites;

[0026] Multiply the total number of wafers in the first batch by the maximum allowable time threshold for transmission from the first site to the second site to obtain the time evaluation threshold;

[0027] If the transmission time to be evaluated is greater than the time evaluation threshold, then it is determined that the transmission time of the first batch of wafers does not meet the preset time interval requirement between the stations.

[0028] Optionally, when transferring the second batch of wafers, the calculated time difference value is corrected, and the start time for transferring the next wafer is determined based on the corrected time difference value, until the transfer time of the same batch of wafers meets the preset time interval requirement, including:

[0029] When transferring the second batch of wafers, the calculated time difference value is added to the given correction parameter to obtain the corrected time difference value, and the start time of the next wafer transfer is determined based on the corrected time difference value.

[0030] If the transmission time of the second batch of wafers meets the preset time interval requirement, then when transmitting the third batch of wafers, the calculated time difference value is corrected using the correction parameters used in the second batch; wherein, the third batch is the next batch after the second batch;

[0031] If the transmission time of the second batch of wafers still does not meet the preset time interval requirement, the correction parameter used in the second batch is adjusted, and when transmitting the third batch of wafers, the calculated time difference is corrected based on the adjusted correction parameter until the transmission time of the same batch of wafers meets the preset time interval requirement.

[0032] Optionally, adjusting the correction parameters used in the second batch includes:

[0033] The adjustment target is to reduce the difference between the transmission time to be evaluated and the time evaluation threshold in the third batch, and the correction parameters used in the second batch are adjusted accordingly.

[0034] Optionally, adjusting the correction parameters used in the second batch with the goal of reducing the difference between the transmission time to be evaluated and the time evaluation threshold in the third batch includes:

[0035] Subtract the time evaluation threshold of the first batch from the transmission time to be evaluated of the first batch to obtain the first difference;

[0036] The second difference is obtained by subtracting the time evaluation threshold of the second batch from the transmission time to be evaluated of the second batch.

[0037] If the first difference is greater than the second difference, then the parameter value of the correction parameter used in the second batch is increased; otherwise, the parameter value of the correction parameter used in the second batch is decreased.

[0038] To address the aforementioned technical problems, this application also provides a semiconductor process apparatus, comprising:

[0039] The system includes a loading / unloading chamber module, a front-end module, a vacuum transition chamber module, a buffer chamber module, a process chamber module, and multiple transfer chamber modules. The loading / unloading chamber module is connected to the front-end module; the loading / unloading chamber module is connected to the transfer chamber module via the vacuum transition chamber module; the process chamber module is connected to the transfer chamber module; and the multiple transfer chamber modules are connected via the buffer chamber module. A robotic arm is installed in both the front-end module and the transfer chamber modules.

[0040] A processor, used to implement the steps of any of the above-described process path-based transport time control methods when executing a computer program stored in itself.

[0041] This application provides a process path-based transfer time control method. When transferring wafers according to the process path, the total time taken for the wafer at all front-end stations is determined, and the remaining process time at the destination station is also determined. Based on the time difference between the remaining process time and the total time taken, the start transfer time for the next wafer is determined. The next wafer is transferred according to the start transfer time to reduce the idle time at the destination station. Therefore, this application considers the actual process time of the wafer when transferring wafers according to the process path, aiming to reduce the idle time at the destination station. This effectively improves equipment efficiency and achieves optimal equipment throughput.

[0042] This application also provides a semiconductor process apparatus that has the same beneficial effects as the above-described transmission time control method. Attached Figure Description

[0043] To more clearly illustrate the technical solutions in this application or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments recorded in this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0044] Figure 1 A topology diagram of a semiconductor process apparatus provided in an embodiment of this application;

[0045] Figure 2 A schematic diagram of a process path provided for an embodiment of this application;

[0046] Figure 3 A flowchart illustrating a process path-based transmission time control method provided in this application embodiment;

[0047] Figure 4 This application provides a schematic diagram illustrating the definition of QTime between sites in an embodiment.

[0048] Figure 5 A detailed flowchart of a process path-based transmission time control method provided in this application embodiment. Detailed Implementation

[0049] The core of this application is to provide a process path-based transmission time control method and semiconductor process equipment. When transmitting wafers according to the process path, the actual process time of the wafers is also considered. The purpose is to reduce the idle time of the terminal station, which can effectively improve equipment efficiency and achieve better equipment capacity.

[0050] To make the objectives, technical solutions, and advantages of the embodiments of this application clearer, the technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, not all embodiments. Based on the embodiments of this application, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this application.

[0051] Please refer to Figure 1 , Figure 1 This is a topology diagram of a semiconductor process apparatus provided in an embodiment of this application. Figure 1 As shown, the semiconductor process equipment is a CVD (Chemical Vapor Deposition) system, and its equipment configuration includes:

[0052] 1) Configure 1 to 3 LPs (Loadports): LP1 / LP2 / LP3. Each LP can store 1 Cassette. Each Cassette contains multiple Slots. Each Slot can hold one wafer (e.g., a silicon wafer). The 3 LPs / LP2 / LP3 can start the process simultaneously or not, depending on the process requirements.

[0053] 2) Configure one EFEM (front-end module of semiconductor process equipment, mainly used for automatic wafer loading and unloading);

[0054] 3) Configure two LL (Loadlock, vacuum transition chamber, which is a transition chamber for the wafer before it goes from a non-vacuum state to a high vacuum state, and it can achieve a certain degree of vacuum): LL1 / LL2;

[0055] 4) Configure 1 to 6 process chambers: A, B, C, D, E, F. The process chambers include serial chambers and parallel chambers, which can be configured according to process requirements. All 6 process chambers have a cycle process (if the process chamber is idle for too long, the chamber environment may not be suitable for the next wafer processing process, so a cycle process is required. The cycle process means that the process chamber will automatically perform a process without wafers after a period of idle time). The cycle time is configurable.

[0056] 5) Configure two transfer cavities: Transfer1 and Transfer2, for connecting the Loadlock and the process chamber;

[0057] 6) Configure 3 robots: ATR, VTR1, and VTR2, which are set in EFEM, Transfer1, and Transfer2 respectively to realize the transfer of wafers between all sites. ATR can be an atmospheric robot, and VTR1 and VTR2 can be vacuum robots.

[0058] 7) Configure two buffers to connect Transfer1 and Transfer2.

[0059] For any given wafer, the entire process involves retrieving the wafer from the target slot of the target process node (LP) and returning it to the target slot of the target LP. The wafer's process path, i.e., the stations it passes through, can be planned according to process requirements, such as... Figure 2 The diagram shows a complete process path for a wafer, where cavity A has parallel cavities B, and cavity C has parallel cavities D / E / F. The process flow under this path is as follows: The wafer is taken out from LP (the initial station of the process path), enters LL through the ATR inside EFEM, VTR1 takes the wafer out of LL and enters cavity A or B. After the process in cavity A or B is completed, VTR1 takes the wafer out and enters Transfer1, then enters Transfer2 through the buffer. ATR2 puts the wafer into cavity C, cavity D, cavity E, or cavity F (the final station of the process path). After the process is completed, the wafer returns to LL and finally returns to LP, completing all the processes for the wafer.

[0060] Currently, when transferring wafers according to the planned process path, the idle time of the last chamber is not taken into account. If the last chamber is idle, it will reduce equipment efficiency and reduce equipment throughput. To address this technical problem, this application provides a transfer time control method based on the process path. Please refer to... Figure 3 , Figure 3 A flowchart illustrating a process path-based transmission time control method provided in this application embodiment, the process path-based transmission time control method comprising:

[0061] Step S101: When transferring the wafer according to the process path, determine the total time taken for the wafer at all front-end sites and determine the remaining process time at the destination site.

[0062] In this embodiment of the application, the stations for process path planning include: the endpoint station (i.e., the last process chamber) and the front-end station located before the endpoint station. That is, the wafer passes through each front-end station in sequence to reach the endpoint station, so as to complete the final process step at the endpoint station and return to the initial station (i.e., the first front-end station).

[0063] In practical applications, when transferring wafers according to the process path, this application calculates the total time taken for the wafer at all front-end sites (from the first front-end site to the last front-end site); on the other hand, it estimates the remaining process time at the destination site (i.e., how much time the destination site has left to complete the current process) to provide a basis for determining the start time of the next wafer transfer.

[0064] Step S102: Determine the start time of the next wafer transfer based on the time difference between the remaining process time and the total time.

[0065] In practical applications, it can be understood that if the remaining process time at the destination station is equal to the total time taken by the wafer at all the front-end stations, it means that if a wafer is being transferred from the initial station, ideally, when this wafer arrives at the destination station, the destination station will be idle and ready to begin processing. This can minimize the idle time at the destination station, thereby effectively improving equipment efficiency and achieving better equipment capacity.

[0066] Based on this, this application calculates the time difference between the remaining process time at the endpoint and the total time taken for the wafer at all front-end sites to obtain a time difference value, and determines the start time of the next wafer transfer based on the time difference between the two.

[0067] Step S103: Transmit the next wafer according to the start transmission time to reduce the idle time of the destination site.

[0068] In practical applications, after determining the start time of the next wafer transfer, this application can start transferring the next wafer from the initial site according to the determined start time of the next wafer transfer. Similarly, when transferring the next wafer according to the process path, this application will continue to determine the start time of the next wafer transfer according to the above steps S101 and S102, and so on, until all wafers in the current batch have been transferred, thereby reducing the overall idle time of the destination site.

[0069] The process path-based transfer time control method provided in this application determines the total time taken for the wafer at all front-end stations and the remaining process time at the destination station when transferring wafers according to the process path. Based on the time difference between the remaining process time and the total time taken, the start transfer time for the next wafer is determined. The next wafer is then transferred according to the start transfer time to reduce the idle time at the destination station. Therefore, this application considers the actual process time of the wafer when transferring wafers according to the process path, aiming to reduce the idle time at the destination station. This effectively improves equipment efficiency and achieves optimal equipment throughput.

[0070] Based on the above embodiments:

[0071] As an optional embodiment, step S101 above, "determining the remaining process time at the endpoint," may include the following steps:

[0072] Determine the remaining processing time and cycle time at the current destination station;

[0073] Add the remaining time of the current processing time and the remaining time of the cycle process to obtain the current remaining processing time at the destination station.

[0074] In this embodiment, the endpoint corresponds to two processes: a wafer-based processing process and a wafer-less recycling process. The two processes cannot be performed simultaneously.

[0075] In practical applications, let the total number of stations in the process path, including all front-end and terminal stations, be k. Then, the terminal station is the kth station, and the remaining process time at the terminal station can be expressed as:

[0076] T left (k,t)=Pocess(k,t)+Cycle(k,t);

[0077] Among them, T left (k,t) represents the remaining process time at the endpoint; Pocess(k,t) represents the remaining processing time at the endpoint; Cycle(k,t) represents the remaining cycle time at the endpoint.

[0078] It is understood that this application requires adding the remaining processing time Pocess(k,t) and the remaining cycle time Cycle(k,t) of the endpoint at the same moment to obtain the remaining processing time T of the endpoint at that moment. left (k,t). The remaining process time T at the terminal site when the wafer has not reached the terminal site for further processing and the terminal site has not yet completed a cycle of processing. left (k,t) is 0; when the wafer reaches the terminal station for processing, the remaining process time Cycle(k,t) at the terminal station is 0, and the remaining process time T at the terminal station is 0. left (k,t) equals the remaining processing time Pocess(k,t) at the endpoint; when performing a cyclic process at the endpoint, the remaining processing time Pocess(k,t) at the endpoint is 0, and the remaining processing time T at the endpoint is... left (k,t) equals the remaining cycle time of the process at the terminal station, Cycle(k,t).

[0079] More specifically, the step of "determining the remaining processing time at the destination site" can include the following steps: estimating the total processing time of the wafer at the destination site, and subtracting the processing time already processed at the destination site from the total processing time to obtain the remaining processing time at the destination site.

[0080] Similarly, the step of "determining the remaining time of the current cycle process at the endpoint" can include the following steps: estimating the total cycle process time at the endpoint, and subtracting the current cycle process time already performed at the endpoint from the total cycle process time at the endpoint to obtain the remaining time of the current cycle process at the endpoint.

[0081] As an optional embodiment, step S101 above, "determining the total time taken for the wafer at all front-end sites," may include the following steps:

[0082] Determine the total transfer time and total processing time of the wafer across all front-end sites;

[0083] Adding the total transmission time and total processing time together gives the total time taken for the wafer across all front-end sites.

[0084] In practical applications, let the total number of stations in the process path, including all front-end and end-end stations, be k. Then, there are k-1 front-end stations in total. The total time taken for the wafer at all front-end stations can be expressed as:

[0085]

[0086] Among them, T 1,k-1(k-1,t) represents the total time taken for the wafer at the k-1 front-end stations; This represents the total transmission time of the wafer across k-1 front-end stations; This represents the total processing time of the wafer across k-1 front-end stations (also known as the total serial processing time).

[0087] It should be noted that the total time taken for the wafer across all front-end sites is the actual time taken for the wafer during transmission.

[0088] As an optional embodiment, steps S102 and S103 above, "determining the start transfer time of the next wafer based on the time difference between the remaining process time and the total time used; transferring the next wafer according to the start transfer time to reduce the idle time at the destination site," may include the following steps:

[0089] Subtract the total time from the remaining process time to obtain the time difference;

[0090] If the time difference is less than zero, the next wafer is transmitted immediately;

[0091] If the time difference is not less than zero and the time difference is less than the sum of the remaining process times of all process stations in the front-end station, then the next wafer will be transferred when the remaining process time equals the total time.

[0092] If the time difference is not less than the sum of the remaining process times of all process stations in the front-end station, then the next wafer will be transferred when the remaining process time equals the total time.

[0093] In particular, no cyclic processes are performed at any process station when there is wafer transfer.

[0094] In this embodiment, the front-end stations include process stations that have both process functions (wafer fabrication processes) and transmission functions, and transmission stations that only have transmission functions. Each process station corresponds to two processes: one is a wafer fabrication process, and the other is a cyclic process without wafers; these two processes cannot be performed simultaneously.

[0095] In practical applications, this application will specify the remaining process time T at the endpoint. left (k,t) minus the total time T taken for the wafer at all front-end sites. 1,k-1 (k-1,t) yields the time difference T. 1,k,left (k,t), i.e., T 1,k,left (k,t)=T left (k,t)-T 1,k-1 (k-1,t). Time difference T 1,k,left There are three cases for (k,t):

[0096] 1)T1,k,left If (k,t)<0, it means that when the wafer is transferred from the starting station to the ending station, the ending station is already idle. In this case, the next wafer needs to be transferred immediately, and no process loop is performed at any of the front-end stations. For example, if the remaining process time at the ending station is 300s, and the total transfer time of the wafer at all front-end stations is 120s and the total process time is 200s, then the total time for the wafer to be transferred at all front-end stations is 320s. 320s is greater than 300s, which means that when the wafer is transferred from the starting station to the ending station, the ending station has been idle for 20s, and the next wafer needs to be transferred immediately from the starting station.

[0097] 2) 0 ≤ T 1,k,left (k,t)<∑Cycle(i,t), where ∑Cycle(i,t) is the sum of the remaining cycle time for all process stations in the front-end station. When no process station is performing a cycle, the remaining cycle time Cycle(i,t) for that process station is 0; when a process station is performing a cycle, the total cycle time for that process station is estimated, and the total cycle time for that process station is subtracted from the cycle time already performed by that process station to obtain the current remaining cycle time for that process station. Since T 1,k,left (k,t)<∑Cycle(i,t) indicates that the idle time allocated to the process stations is insufficient for the process stations to perform cyclic processes, so all process stations in the front-end stations do not perform cyclic processes.

[0098] 0≤T 1,k,left (k,t)<∑Cycle(i,t) indicates that when the processed body is transferred from the starting station to the ending station, the ending station still needs to pass through T. 1,k,left The wafer can only be idle after a time interval of (k,t), so the next wafer can wait for T. 1,k,left The transfer begins again after a time interval of (k,t), ensuring that the next wafer arrives at the destination station just as the destination station becomes available for processing. In other words, the transfer of the next wafer only begins from the initial station when the remaining process time at the destination station equals the total time taken by the wafer at all the front-end stations. For example, if the destination station has 320 seconds of remaining process time, and the total transfer time and total process time at all front-end stations are 100 seconds and 200 seconds respectively, then the total time taken by the wafer at all front-end stations is 300 seconds. The time difference of 20 seconds between the remaining process time at the destination station and the total time taken by the wafer at all front-end stations satisfies 0 ≤ T. 1,k,left(k,t)<∑Cycle(i,t) indicates that when the processing body is transferred from the starting station to the ending station, the ending station still needs 20s to become idle. Therefore, when the remaining process time at the ending station is equal to the total time of the wafer at all the front-end stations, which is 300s, the next wafer will be transferred from the starting station. This ensures that when the next wafer is transferred to the ending station, the ending station is just idle and can begin processing.

[0099] 3)T 1,k,left (k,t)≥∑Cycle(i,t), since T 1,k,left (k,t)≥∑Cycle(i,t) indicates that the idle time allocated to the process stations is sufficient for some process stations to perform cyclic processes. Therefore, the process stations in the front-end stations may perform one or more cyclic processes, the specific number of which depends on T. 1,k,left The size of (k,t) depends on the cycle time of the process station.

[0100] T 1,k,left (k,t)≥∑Cycle(i,t) indicates that when the processed body is transferred from the starting station to the ending station, the ending station still needs to pass through T. 1,k,left The wafer can only be idle after a time interval of (k,t), so the next wafer can wait for T. 1,k,left If the transfer begins after a time interval (k,t), the next wafer will arrive at the destination station just as the destination station becomes idle and ready for processing. In other words, the transfer of the next wafer only begins from the initial station when the remaining process time at the destination station equals the total time taken by the wafer at all the front-end stations. For example, if the destination station has 1500 seconds of remaining process time, and the total transfer time and total process time at all front-end stations are 100 seconds and 200 seconds respectively, then the total time taken by the wafer at all the front-end stations is 300 seconds. The time difference of 1200 seconds between the remaining process time at the destination station and the total time taken by the wafer at all the front-end stations satisfies T... 1,k,left (k,t)≥∑Cycle(i,t) indicates that when the processing body is transferred from the starting station to the ending station, the ending station still needs 1200s to become idle. Therefore, when the remaining process time at the ending station is equal to the total time of the wafer at all the front-end stations, which is 300s, the next wafer will be transferred from the starting station. This ensures that when the next wafer is transferred to the ending station, the ending station is just idle and can begin processing.

[0101] As an optional embodiment, the process path-based transport time control method further includes:

[0102] After the first batch of wafers is transmitted, if the transmission time of the first batch of wafers does not meet the preset time interval requirement between stations, the calculated time difference is corrected when transmitting the second batch of wafers, and the start transmission time of the next wafer is determined based on the corrected time difference, until the transmission time of the same batch of wafers meets the preset time interval requirement.

[0103] The second batch is the next batch after the first batch.

[0104] In practical applications, after the first batch of wafers is transferred, this application further determines whether the transfer time of the first batch of wafers meets the preset time interval requirement between stations. If it does, the second batch of wafers will continue to be transferred using the same transfer principle as the first batch. If it does not meet the requirement, the second batch of wafers will be transferred using the following transfer principle:

[0105] When transferring wafers according to the process path, determine the total time taken for the wafer at all front-end sites and the remaining process time at the destination site; calculate the time difference between the remaining process time and the total time taken, and correct the calculated time difference to determine the start time for transferring the next wafer based on the corrected time difference; transfer the next wafer according to the start time.

[0106] It is evident that the transmission principle of the second batch of wafers differs from that of the first batch in that the calculated time difference is corrected to determine the start transmission time of the next wafer. The purpose of this is to ensure that the transmission time of the second batch and subsequent batches of wafers meets the preset time interval requirements between sites, thereby improving process performance.

[0107] As an optional embodiment, the determination process for "the transmission time of the first batch of wafers does not meet the preset time interval requirement between stations" in the above steps may include the following steps:

[0108] The sum of the transmission times of all wafers in the first batch from the first site to the second site is calculated to obtain the transmission time to be evaluated; where the first site and the second site are arbitrary sites.

[0109] Multiply the number of all wafers in the first batch by the maximum allowable time threshold for transmission from the first site to the second site to obtain the time evaluation threshold;

[0110] If the transmission time to be evaluated exceeds the time evaluation threshold, it is determined that the transmission time of the first batch of wafers does not meet the preset time interval requirement between sites.

[0111] In specific applications, such as Figure 4 As shown, any s pSites and any s q The time interval between stations is defined as QTime(QueueTime). The time QTime required for the j-th wafer to be transmitted from the p-th station to the q-th station can be expressed as:

[0112] Q wj (p,q,t)=f(w j ,s p ,s q ,t)≤λ pq ;

[0113] Where, λ pq is a constant representing the maximum allowed time threshold for transmission from station p to station q, which is configured by the user; Q is a mapping of f.

[0114] For the j-th wafer, the QTime between the adjacent q-th and q-1-th sites can be expressed as:

[0115] Q wj (q, q-1, t) = f(w) j ,s q ,s q-1 ,t);

[0116] It can be simplified to:

[0117]

[0118] If the total number of wafers in the current batch is n, then the transfer time of the wafers in the current batch must satisfy the following:

[0119]

[0120] in, nλ represents the transmission time to be evaluated for the current batch. pq This is the time evaluation threshold for the current batch.

[0121] If the current batch's estimated transmission time Less than or equal to the time evaluation threshold nλ pq The current batch of wafers is considered to have a transmission time that meets the preset time interval requirement between sites; if the current batch's transmission time to be evaluated... Greater than the time evaluation threshold nλ pq It was determined that the transmission time of the current batch of wafers did not meet the preset time interval requirements between sites.

[0122] As an optional embodiment, when transferring the second batch of wafers, the calculated time difference is corrected, and the start time for transferring the next wafer is determined based on the corrected time difference, until the transfer time of the same batch of wafers meets the preset time interval requirement, including:

[0123] When transferring the second batch of wafers, the calculated time difference is added to the given correction parameter to obtain the corrected time difference, and the start time of the next wafer transfer is determined based on the corrected time difference.

[0124] If the transmission time of the second batch of wafers meets the preset time interval requirement, then when transmitting the third batch of wafers, the time difference calculated using the correction parameters used in the second batch will continue to be corrected; where the third batch is the next batch after the second batch.

[0125] If the transmission time of the second batch of wafers still does not meet the preset time interval requirement, the correction parameters used for the second batch will be adjusted, and when transmitting the third batch of wafers, the calculated time difference will be corrected based on the adjusted correction parameters until the transmission time of the same batch of wafers meets the preset time interval requirement.

[0126] In practical applications, if the transmission time of the first batch of wafers does not meet the preset time interval requirement between stations, this application will calculate the time difference T when transmitting the second batch of wafers. 1,k,left Adding (k,t) to the given correction parameter σ yields the corrected time difference T. 1,k,left (k,t)+σ, based on the corrected time difference T 1,k,left (k,t)+σ determines the start time of the next wafer transfer.

[0127] After the second batch of wafers is transferred, this application determines whether the transfer time of the second batch of wafers meets the preset time interval requirement between stations. If it does, the third batch of wafers is transferred using the same transfer principle as the second batch (i.e., the time difference calculated using the correction parameter σ used in the second batch is corrected). If it does not meet the requirement, the correction parameter σ used in the second batch is adjusted to obtain the adjusted correction parameter σ', and the third batch of wafers is transferred using the following transfer principle:

[0128] When transferring wafers according to the process path, determine the total time taken for the wafer at all front-end sites and the remaining process time at the destination site; calculate the time difference T between the remaining process time and the total time taken. 1,k,left (k,t), and calculate the time difference T. 1,k,left Adding (k,t) to the adjusted correction parameter σ' yields the corrected time difference T. 1,k,left (k,t)+σ', based on the corrected time difference T 1,k,left (k,t)+σ' determines the start time of the next wafer transfer; the next wafer is transferred according to the start time.

[0129] It is evident that the transmission principle of the third batch of wafers differs from that of the second batch in that the calculated time difference T... 1,k,left Adding (k,t) to the adjusted correction parameter σ' yields the corrected time difference T. 1,k,left (k,t)+σ'.

[0130] Similarly, if the transmission time of the third batch of wafers meets the preset time interval requirement between stations, then when transmitting the fourth batch (the next batch after the third batch) of wafers, the time difference calculated using the correction parameter σ' used in the third batch will continue to be corrected; if the transmission time of the third batch of wafers still does not meet the preset time interval requirement, then the correction parameter σ' used in the third batch will be adjusted to obtain the adjusted correction parameter σ”, and when transmitting the fourth batch of wafers, the time difference calculated based on the adjusted correction parameter σ” will be corrected, and so on, until the transmission time of the same batch of wafers meets the preset time interval requirement between stations.

[0131] As an optional embodiment, the step of "adjusting the correction parameters used in the second batch" mentioned above may include the following steps:

[0132] The adjustment target is to reduce the difference between the transmission time to be evaluated and the time evaluation threshold in the third batch, and the correction parameters used in the second batch are adjusted accordingly.

[0133] In practical applications, if the second batch of transmission time to be evaluated... Greater than the time evaluation threshold nλ pq Then, the correction parameter σ used in the second batch is adjusted for use in the third batch to correct the time difference. The specific adjustment principle is as follows:

[0134] If the correction parameter σ is increased to make the transmission time to be evaluated... With time evaluation threshold nλ pq If the difference between them is smaller, then the correction parameter σ is increased; if the correction parameter σ is increased to make the transmission time to be evaluated... With time evaluation threshold nλ pq If the difference between them is larger, the correction parameter σ is adjusted to be reduced.

[0135] More specifically, the correction parameter σ used in the second batch is adjusted as follows: the first batch's transmission time to be evaluated is subtracted from the first batch's time evaluation threshold to obtain the first difference, and the second batch's transmission time to be evaluated is subtracted from the second batch's time evaluation threshold to obtain the second difference. Then, it is determined whether the first difference is greater than the second difference. If so, the parameter value of the correction parameter σ used in the second batch is increased; if not, the parameter value of the correction parameter σ used in the second batch is decreased.

[0136] In summary, we can obtain the following: Figure 5 The process path-based transfer time control flow shown is as follows: 1) Determine the remaining process time at the destination site; 2) Determine the total time taken for the wafer at all front-end sites; 3) Subtract the total time taken from the remaining process time to obtain the time difference; or, subtract the total time taken from the remaining process time to obtain the time difference, and correct the time difference based on a given correction parameter; or, subtract the total time taken from the remaining process time to obtain the time difference, and correct the time difference based on an adjusted correction parameter (the specific step chosen depends on actual needs, as described in detail in the above embodiments, and will not be repeated here); 4) Determine the next wafer's transfer time based on the time difference. 5) Start transmission time; 6) Transmit the next wafer according to the start transmission time; 7) Check if the QTime of the current batch of wafers is completed; if not, return to the initial step; if yes, sum and evaluate the QTime of all wafers in the current batch; 8) Check if the sum of the QTime of all wafers in the current batch is less than or equal to the corresponding time evaluation threshold; if yes, determine that the transmission time of the current batch of wafers meets the preset time interval requirement between stations; if not, give correction parameters; or, adjust the correction parameters (the specific step selected depends on the actual needs, which has been described in detail in the above embodiments and will not be repeated here), and return to the initial step.

[0137] This application also provides a semiconductor process apparatus, including:

[0138] The system includes a loading / unloading chamber module, a front-end module, a vacuum transition chamber module, a buffer chamber module, a process chamber module, and multiple transfer chamber modules. The loading / unloading chamber module is connected to the front-end module, the loading / unloading chamber module is connected to the transfer chamber module through the vacuum transition chamber module, the process chamber module is connected to the transfer chamber module, and the multiple transfer chamber modules are connected through the buffer chamber module. Both the front-end module and the transfer chamber module are equipped with robotic arms.

[0139] A processor, used to implement the steps of any of the above-described process path-based transport time control methods when executing a computer program stored in itself.

[0140] For a structural description of the semiconductor process equipment provided in this application, please refer to the above-mentioned appendix. Figure 1 For a description of the structure and the processor control principle of the semiconductor process equipment, please refer to the embodiments of the control method described above; these will not be repeated here.

[0141] As will be known to those skilled in the art, with the development of technology and the emergence of new scenarios, the technical solutions provided in the embodiments of this application are also applicable to similar technical problems.

[0142] The terms "first," "second," etc., used in the specification and claims of this application are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence. It should be understood that such terms are interchangeable where appropriate; this is merely a way of distinguishing objects with the same attributes in the embodiments of this application. Furthermore, the terms "comprising" and "having," and any variations thereof, are intended to cover non-exclusive inclusion, so that a process, method, system, product, or apparatus that comprises a series of elements is not necessarily limited to those elements, but may include other elements not explicitly listed or inherent to those processes, methods, products, or apparatuses.

[0143] The device embodiments described above are merely illustrative. The units described as separate components may or may not be physically separate, and the components shown as units may or may not be physical units; that is, they may be located in one place or distributed across multiple network units. Some or all of the modules can be selected to achieve the purpose of this embodiment according to actual needs. Those skilled in the art can understand and implement this without any creative effort.

[0144] Through the above description of the embodiments, those skilled in the art can clearly understand that each embodiment can be implemented by means of software plus necessary general-purpose hardware platforms, and of course, it can also be implemented by hardware. Based on this understanding, the above technical solutions, in essence or the part that contributes to the prior art, can be embodied in the form of a software product. This computer software product can be stored in a computer-readable storage medium, such as ROM / RAM, magnetic disk, optical disk, etc., including several instructions to cause a computer device (which may be a personal computer, server, or network device, etc.) to execute the methods of various embodiments or some parts of embodiments.

[0145] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of this application, and are not intended to limit them. Although this application has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some of the technical features. Such modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of this application.

Claims

1. A method for controlling the transmission time based on a process path, characterized in that, The process path planning includes: a destination station and a front-end station located before the destination station; the process path-based transmission time control method includes: When transporting the wafer according to the process path, the total time taken for the wafer at all the front-end sites is determined, and the remaining process time at the destination site is determined; determining the total time taken for the wafer at all the front-end sites includes: determining the total transport time and the total processing time of the wafer at all the front-end sites. The start time for transferring the next wafer is determined based on the time difference between the remaining process time and the total time. The next wafer is transmitted according to the start transmission time to reduce the idle time of the destination site; The process path-based transmission time control method further includes: After the first batch of wafers is transmitted, if the transmission time of the first batch of wafers does not meet the preset time interval requirement between the stations, the calculated time difference is corrected when transmitting the second batch of wafers, and the start transmission time of the next wafer is determined based on the corrected time difference, until the transmission time of the same batch of wafers meets the preset time interval requirement. The second batch is the next batch after the first batch.

2. The transmission time control method based on process path as described in claim 1, characterized in that, Determining the remaining process time at the endpoint includes: Determine the remaining processing time and the remaining cycle time at the current endpoint. The remaining time of the current processing technology and the remaining time of the cycle technology are added together to obtain the current remaining process time of the terminal station.

3. The transmission time control method based on process path as described in claim 1, characterized in that, Determining the total time taken for the wafer across all the front-end sites further includes: The total transmission time and the total processing time are added together to obtain the total time taken for the wafer at all the front-end sites.

4. The transmission time control method based on process path as described in claim 1, characterized in that, The start time for transferring the next wafer is determined based on the time difference between the remaining process time and the total time. Transmit the next wafer according to the stated start transmission time to reduce the idle time at the destination site, including: Subtract the total time from the remaining process time to obtain the time difference; If the time difference is less than zero, the next wafer is transmitted immediately; If the time difference is not less than zero, and the time difference is less than the sum of the remaining process times of all process stations in the front-end station, then the next wafer is transmitted when the remaining process time is equal to the total time. If the time difference is not less than the sum of the remaining process times of all process stations in the front-end station, then the next wafer is transferred when the remaining process time is equal to the total time. In this context, none of the process stations perform cyclic processes when wafer transfer is involved.

5. The transmission time control method based on process path as described in claim 1, characterized in that, The process for determining whether the transmission time of the first batch of wafers does not meet the preset time interval requirement between the stations includes: The sum of the transmission times of all wafers in the first batch from the first site to the second site is calculated to obtain the transmission time to be evaluated; wherein the first site and the second site are either of the aforementioned sites; Multiply the total number of wafers in the first batch by the maximum allowable time threshold for transmission from the first site to the second site to obtain the time evaluation threshold; If the transmission time to be evaluated is greater than the time evaluation threshold, then it is determined that the transmission time of the first batch of wafers does not meet the preset time interval requirement between the stations.

6. The transmission time control method based on process path as described in claim 5, characterized in that, When transmitting the second batch of wafers, the calculated time difference is corrected, and the start time for transmitting the next wafer is determined based on the corrected time difference, until the transmission time of the same batch of wafers meets the preset time interval requirement, including: When transferring the second batch of wafers, the calculated time difference value is added to the given correction parameter to obtain the corrected time difference value, and the start time of the next wafer transfer is determined based on the corrected time difference value. If the transmission time of the second batch of wafers meets the preset time interval requirement, then when transmitting the third batch of wafers, the calculated time difference value is corrected using the correction parameters used in the second batch; wherein, the third batch is the next batch after the second batch; If the transmission time of the second batch of wafers still does not meet the preset time interval requirement, the correction parameter used in the second batch is adjusted, and when transmitting the third batch of wafers, the calculated time difference is corrected based on the adjusted correction parameter until the transmission time of the same batch of wafers meets the preset time interval requirement.

7. The transmission time control method based on process path as described in claim 6, characterized in that, The adjustment of the correction parameters used in the second batch includes: The adjustment target is to reduce the difference between the transmission time to be evaluated and the time evaluation threshold in the third batch, and the correction parameters used in the second batch are adjusted accordingly.

8. The transmission time control method based on process path as described in claim 7, characterized in that, The adjustment of the correction parameters used in the second batch, with the goal of reducing the difference between the transmission time to be evaluated and the time evaluation threshold in the third batch, includes: Subtract the time evaluation threshold of the first batch from the transmission time to be evaluated of the first batch to obtain the first difference; The second difference is obtained by subtracting the time evaluation threshold of the second batch from the transmission time to be evaluated of the second batch. If the first difference is greater than the second difference, then the parameter value of the correction parameter used in the second batch is increased; otherwise, the parameter value of the correction parameter used in the second batch is decreased.

9. A semiconductor process apparatus, characterized in that, include: The system includes a loading / unloading chamber module, a front-end module, a vacuum transition chamber module, a buffer chamber module, a process chamber module, and multiple transfer chamber modules. The loading / unloading chamber module is connected to the front-end module; the loading / unloading chamber module is connected to the transfer chamber module via the vacuum transition chamber module; the process chamber module is connected to the transfer chamber module; and the multiple transfer chamber modules are connected via the buffer chamber module. A robotic arm is installed in both the front-end module and the transfer chamber modules. A processor configured to implement the steps of the process path-based transport time control method as described in any one of claims 1-8 when executing a computer program stored in itself.

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