Fast reset high voltage input power surge protection circuit
Through the combination of the main power circuit, sampling and judgment circuit and isolation circuit, the voltage reference source and optocoupling isolation device are used to control the conduction and shutdown of the field effect tube, which solves the problem of preventing surge current in the power supply characteristic test of traditional circuits in the onboard platform, and achieves the effect of rapid reset and protection of components.
Patent Information
- Application Number
- CN202210766438.5
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2022-06-30
- Publication Date
- 2025-08-29
- Estimated Expiration
- 2042-06-30
AI Technical Summary
During the test or use of the power supply characteristics of the on-board platform, traditional anti-surge circuits cannot effectively prevent surge current during the moment of power supply undervoltage surge or 50ms power supply interruption, resulting in damage to components.
The combination of main power circuit, sampling and judgment circuit and isolation circuit is adopted to sample and judge the input voltage status through the voltage reference source and the optocouple isolation device, and the conduction and shutdown of the field effect tube are controlled to achieve rapid reset.
After the power supply undervoltage surge or interruption, the surge current is effectively curbed and the input port components are protected. The circuit is simple, small, light in weight, and economical, and it is suitable for the power supply characteristics of the airborne platform.
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Figure CN115296281B_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to the field of power supplies, and in particular to a fast-reset high-voltage input power supply surge protection circuit. Background Art
[0002] Due to the large capacitance at the input port of a high-voltage power supply, a large inrush current is generated when power is applied. This surge can impact the power grid and generator, potentially causing motor failure, and potentially damaging components at the power input. Therefore, an input surge protection circuit is essential for both the high-voltage input power supply's self-protection and the power supply system's overall protection.
[0003] Inrush current protection is typically achieved by connecting a current-limiting resistor in parallel with a field-effect transistor (FET). Initially, the FET is off, allowing the input capacitor to charge through the current-limiting resistor. When charging is nearly complete, the FET is turned on, short-circuiting the current-limiting resistor to reduce power consumption.
[0004] Airborne platform power supply features unique characteristics, requiring electrical equipment to comply with the special conditions specified in GJB181A regarding power supply undervoltage surges and 50ms power interruptions. During power supply characteristic testing or aircraft operation, the field-effect transistors in traditional surge protection circuits remain on during undervoltage surges or 50ms power interruptions, rendering them ineffective in their surge protection capabilities. Therefore, a new surge protection circuit tailored to the power supply characteristics of airborne platforms is needed to address surge currents and meet the power supply requirements. Summary of the Invention
[0005] In order to solve the existing technical problems, the present invention provides a fast-reset high-voltage input power supply surge protection circuit.
[0006] The specific content of the present invention is as follows: A fast-reset high-voltage input power supply surge protection circuit includes a main power circuit, a sampling and judgment circuit, and an isolation circuit. The main power circuit is connected to the sampling and judgment circuit and the isolation circuit, and the isolation circuit is connected to the sampling and judgment circuit; the sampling and judgment circuit samples the voltage from the main power circuit and determines whether it reaches a voltage reference. If it is lower than the voltage reference, the isolation circuit is turned on, thereby reducing the gate voltage of the field-effect transistor of the main power circuit, turning off the field-effect transistor, and then delaying the opening.
[0007] The main power circuit includes a field-effect transistor V3, power resistors R5-R8, and a turn-on delay circuit. The parallel circuit consisting of resistors R5 and R6 and the parallel circuit consisting of resistors R7 and R8 are connected in series and connected to the drain and source of the field-effect transistor V3. The delay circuit includes a capacitor. The gate of the field-effect transistor V3 is connected to the turn-on delay circuit. The delay time of the delay circuit is the same as the charging time of the input voltage on the input capacitor. The turn-on delay circuit includes charging resistors R1-R3 and a capacitor C3. The capacitor C3 is connected in parallel with the gate and source of the field-effect transistor V3. The resistors R1-R3 are connected in series and connected to the gate of the field-effect transistor V3 and the positive input terminal of the power supply. A resistor R4 is also connected in parallel between the gate and source of the field-effect transistor V3. A voltage regulator diode V2 is also connected in parallel between the gate and source of the field-effect transistor V3. The positive input terminal of the input voltage is connected to two parallel diodes V4.
[0008] Furthermore, the sampling and judging circuit includes a voltage reference source N4 , the main power circuit is connected to the voltage reference source N4 via a voltage divider circuit, and the output of the voltage reference source N4 is connected to the input end of the isolation circuit.
[0009] Furthermore, the isolation circuit includes an optocoupler V13, the primary side of the optocoupler V13 is connected to the output end of the voltage reference source N4, and the secondary side is connected to the gate of the field effect transistor V3. When the voltage reference source N4 is turned off, current flows through the primary side of the optocoupler V13 and the secondary side is turned on.
[0010] Furthermore, the primary side of the optocoupler is connected to the positive output end of the main power circuit through resistors R43~R46, and the output end of the voltage reference source N4 is connected to the primary side of the optocoupler V13 through resistor R46. Resistor R46 is also connected to the Zener diode V14, and the other end of the Zener diode V14 is grounded.
[0011] Through the sampling, logic judgment circuit and optocoupler isolation circuit constructed by the present invention, an input surge protection circuit suitable for airborne power supply characteristics can be realized. After the input undervoltage surge or power supply interruption moment, the surge current can be effectively curbed to protect the components of the input port. Moreover, the circuit is simple, small in size, light in weight, economical in price, and has high practical value. It can also be used after the rectifier circuit in the AC power supply system. BRIEF DESCRIPTION OF THE DRAWINGS
[0012] The specific embodiments of the present invention will be further explained below with reference to the accompanying drawings.
[0013] Figure 1 This is a schematic diagram of a fast-reset high-voltage input power surge protection circuit of the present invention. DETAILED DESCRIPTION
[0014] Combine Figure 1The present application provides an auxiliary circuit that uses conventional devices such as a voltage reference source and optocoupler isolation to sample and judge the input voltage state, thereby improving the traditional input surge protection circuit to adapt to the power supply undervoltage surge or 50ms power supply interruption of the airborne platform, thereby realizing a simple, practical and economical input surge protection circuit.
[0015] The fast-reset high-voltage input power surge protection circuit of the present application includes a main power circuit 1, a sampling and judgment circuit 2, and an isolation circuit 3. The main power circuit 1 is connected to the sampling and judgment circuit 2 and the isolation circuit 3, and the isolation circuit 3 is connected to the sampling and judgment circuit 2. The main power circuit 1 includes an input capacitor and a field-effect transistor. While the input voltage charges the input capacitor (C4~C7) through a current-limiting resistor, it also charges the capacitor C3 at the gate of the field-effect transistor V3 through another branch, and the charging time of the two is matched. The sampling and judgment circuit 2 samples the voltage from the main power circuit 1 and determines whether it reaches the voltage reference. If it is lower than the voltage reference, the isolation circuit 3 is turned on, thereby reducing the gate voltage of the field-effect transistor V3 of the main power circuit 1, turning off the field-effect transistor V3, and then delaying the opening.
[0016] Specifically, the main power circuit includes a field-effect transistor V3, power resistors R5 to R8, and a turn-on delay circuit. The parallel circuit consisting of resistors R5 and R6 and the parallel circuit consisting of resistors R7 and R8 are connected in series and connected to the drain and source of the field-effect transistor V3. The turn-on delay circuit includes charging resistors R1 to R3 and a capacitor C3. The capacitor C3 is connected in parallel with the gate and source of the field-effect transistor V3. The resistors R1 to R3 are connected in series and connected to the gate of the field-effect transistor V3 and the positive input terminal of the power supply.
[0017] In this embodiment, a resistor R4 is preferably connected in parallel between the gate and source of FET V3. Resistor R4 divides the voltage with resistors R1-R3 to set the steady-state drive voltage of FET V3. A voltage regulator diode V2 is also connected in parallel between the gate and source of FET V3 to prevent overvoltage at the gate of FET V3. Two parallel diodes V4 are connected to the positive input terminal of the input voltage to prevent reverse polarity.
[0018] In the main power circuit, FET V3 and power resistors R5-R8 are the core components of the surge protection circuit. Resistors R1-R3 serve as current-limiting resistors for charging the gate capacitor C3 of FET V3. Together with resistor R4, they form a voltage divider circuit that determines the steady-state gate voltage. The values of R1-R3 and C3 set the turn-on time of FET V3, which is equal to the time it takes for the input capacitors C4-C7 to complete charging.
[0019] The sampling and judging circuit 2 includes a voltage reference source N4 . The main power circuit is connected to the voltage reference source N4 via a voltage divider circuit. The output of the voltage reference source N4 is connected to the input end of the isolation circuit 3 .
[0020] Isolation circuit 3 includes an optocoupler V13. The primary side of the optocoupler V13 is connected to the output end of the voltage reference source N4, and the secondary side is connected to the gate of the field-effect transistor V3. When the voltage reference source N4 is turned off, current flows through the primary side of the optocoupler V13, and the secondary side is turned on. The primary side of the optocoupler is connected to the positive output end of the main power circuit through resistors R43 to R46. The output end of the voltage reference source N4 is connected to the primary side of the optocoupler V13 through resistor R46. Resistor R46 is also connected to the Zener diode V14, and the other end of the Zener diode V14 is grounded.
[0021] Resistors R43~R45 limit the current on the primary side of the optocoupler, and resistors R39~R42 set the voltage value on the input capacitor. When current flows through the primary side of the optocoupler, the secondary side is turned on, the field effect tube drive voltage is lowered, and the field effect tube is turned off.
[0022] Taking the 270V DC input system of the airborne power supply system as an example, the input end of the electronic power supply equipment is combined with Figure 1 The application of the input surge protection circuit designed according to the present invention in the power supply system is described in detail.
[0023] Taking into account AC power grid fluctuations, according to GJB181A, the minimum input voltage of 270V DC, or the low-voltage surge AC phase voltage, is 180V RMS. The input capacitors are four 100μF / 400V capacitors, and the FET's gate turn-on voltage is 4V. The current-limiting resistors (R5-R8) are 50Ω, and it takes 66ms for the input capacitors C4-C7 to charge to approximately 260V. The FET's turn-on delay circuit also has a 66ms delay. The series resistance of the charging resistors R1-R3 is 200kΩ, and the capacitance of C3 is 2.2μF. The steady-state FET gate voltage is set at approximately 12V, with R4 at 9.1kΩ, the voltage regulator V2 at 13V, and the withstand voltage of V3 at 600V, with an on-resistance of 38mΩ.
[0024] The reference of voltage reference source N4 is 2.5V. The values of resistors R39~R41 are set to 200kΩ, and resistor R42 is set to 10kΩ. When the voltage on the input capacitor is lower than 180V, N4 is turned off, and current flows through the primary side of the optocoupler. The current is limited to about 1mA by R43~R45. The value of resistors R43~R45 is 51kΩ. The secondary side of the optocoupler is turned on, which pulls down the gate voltage of the field-effect transistor and resets the surge protection circuit to ensure that the surge protection function is played again after an undervoltage surge or power interruption.
[0025] The main power circuit is centered around a field-effect transistor (FET) and a current-limiting resistor. The input voltage simultaneously charges the input capacitor through the current-limiting resistor and, through another branch, the FET's gate capacitor. The two charging times are matched so that when the input capacitor is nearly fully charged, the FET's gate voltage reaches the turn-on threshold. The sampling and detection circuit, comprised of four resistors, forms a voltage divider. When the capacitor voltage drops below a set value, the voltage reference shuts off, current flows through the primary side of the optocoupler, and the secondary side conducts, immediately lowering the FET's gate voltage and shutting down the FET. After a power undervoltage surge or a 50ms power interruption, the FET in the input surge protection circuit begins turning on again with a delayed turn-on, restarting the input soft-start cycle. Compared to existing circuits, this design allows for rapid reset after a power failure in the main power circuit, making it suitable for airborne platform power supply environments. It also features a compact, lightweight design and practicality.
[0026] In the above description, many specific details are set forth in order to fully understand the present invention. However, the above description is only a preferred embodiment of the present invention. The present invention can be implemented in many other ways different from those described herein, so the present invention is not limited to the specific implementation disclosed above. At the same time, any person skilled in the art can make many possible changes and modifications to the technical solution of the present invention using the methods and technical contents disclosed above without departing from the scope of the technical solution of the present invention, or modify it into an equivalent embodiment of equivalent changes. Any simple modification, equivalent change and modification made to the above embodiment based on the technical essence of the present invention without departing from the content of the technical solution of the present invention still falls within the scope of protection of the technical solution of the present invention.
Claims
1. A fast-reset high-voltage input power surge protection circuit, characterized by: It includes a main power circuit, a sampling and judgment circuit and an isolation circuit. The main power circuit is connected to the sampling and judgment circuit and the isolation circuit, and the isolation circuit is connected to the sampling and judgment circuit. The sampling and judgment circuit samples the voltage from the main power circuit and judges whether it reaches the voltage reference. If it is lower than the voltage reference, the isolation circuit is turned on, thereby reducing the gate voltage of the field effect tube of the main power circuit, turning off the field effect tube, and then delaying the opening. The main power circuit includes a field effect tube V3, power resistors R5~R8, a turn-on delay circuit and an input capacitor. The parallel circuit composed of resistors R5 and R6 and the parallel circuit composed of resistors R7 and R8 are connected in series and connected to the drain and source of the field effect tube V3. The gate of field effect transistor V3 is connected to a turn-on delay circuit, the delay time of which is the same as the charging time of the input voltage on the input capacitor. The turn-on delay circuit includes charging resistors R1-R3 and capacitor C3. Capacitor C3 is connected in parallel with the gate and source of field effect transistor V3. Resistors R1-R3 are connected in series and connected to the gate of field effect transistor V3 and the positive input terminal of the input voltage. Resistor R4 is also connected in parallel between the gate and source of field effect transistor V3. Zener diode V2 is also connected in parallel between the gate and source of field effect transistor V3. The positive input terminal of the input voltage is connected to the anodes of two parallel diodes V4, the cathode of diode V4 is connected to one end of the input capacitor, and the other end of the input capacitor is grounded.
2. The fast-reset high-voltage input power surge protection circuit according to claim 1, characterized in that: The sampling and judging circuit includes a voltage reference source N4. The main power circuit is connected to the voltage reference source N4 through a voltage divider circuit. The output of the voltage reference source N4 is connected to the input end of the isolation circuit.
3. The fast-reset high-voltage input power surge protection circuit according to claim 2, characterized in that: The isolation circuit includes an optocoupler V13, the primary side of the optocoupler V13 is connected to the output end of the voltage reference source N4, and the secondary side is connected to the gate of the field effect transistor V3. When the voltage reference source N4 is turned off, current flows through the primary side of the optocoupler V13 and the secondary side is turned on.
4. The fast-reset high-voltage input power surge protection circuit according to claim 3, characterized in that: The primary side of the optocoupler is connected to the positive output terminal of the main power circuit through resistors R43~R46. The output terminal of the voltage reference source N4 is connected to the primary side of the optocoupler V13 through resistor R46. Resistor R46 is also connected to the Zener diode V14, and the other end of the Zener diode V14 is grounded.
Citation Information
Patent Citations
Remote control instruction and bus under-voltage protection circuit with strong anti-interference capability
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