Method of forming an optical aperture of a vertical cavity surface emitting laser and vertical cavity surface emitting laser

Abstract

The invention relates to a method of forming an optical aperture (24) of a vertical cavity surface emitting laser (120), comprising: providing a layer stack of semiconductor layers, the semiconductor layers comprising an intermediate layer, wherein the intermediate layer comprises a semiconductor material suitable for being oxidized; oxidizing the intermediate layer to an oxidation width so as to form an oxidized outer region and an unoxidized central region in the intermediate layer; removing at least a portion of the oxidized outer region so that a void is formed at the location where the oxidized outer region or the portion of the oxidized outer region has been removed; and depositing a non-conductive material in the void. The non-conductive material is deposited using atomic layer deposition (ALD), wherein the non-conductive material (90) is deposited on the walls of the void with a thickness that is smaller than the thickness of the void. After depositing the non-conductive material, the remaining space of the void is filled with a further material. A vertical cavity surface emitting laser (120) having an optical aperture (24) is also described.

Description

TECHNICAL FIELD

[0001] The present invention relates to a method of forming an optical aperture of a vertical cavity surface emitting laser. The present invention further relates to a vertical cavity surface emitting laser having an optical aperture. BACKGROUND

[0002] A vertical cavity surface emitting laser (VCSEL) is a semiconductor laser diode that emits a laser beam perpendicular to the top or bottom surface of the device. Typically, a VCSEL comprises two DBRs (DBR = Distributed Bragg Reflector) parallel to the wafer surface, and an active region arranged between the two DBRs, the active region comprising one or more quantum wells for laser generation. The DBRs comprise layers with alternating high and low refractive index. In a common VCSEL, the DBRs are doped as p-type and n-type material, forming a diode junction. To achieve a low threshold current, the VCSEL usually has one or more optical apertures configured to confine the current in the VCSEL to a confined area. One technique to form the optical aperture uses oxidation of the semiconductor material in one or more layers of the VCSEL layer stack to a desired oxidation depth. The layer(s) to be oxidized are usually the high aluminum content layer(s) of the layer stack. The current path between the DBRs is confined to the unoxidized central region of the oxidized layer(s), as the oxidized outer region is non-conductive. Laser formation is substantially confined to the central region of the oxidized layer(s). The central region thus forms the optical aperture.

[0003] During the VCSEL manufacturing process, mechanical stress related damage of the VCSEL is a serious problem, as this reduces the operational reliability and lifetime of the VCSEL. The highest amount of mechanical stress (up to 100 MPa) occurs close to the most sensitive region of the device, i.e. the optical active quantum well region. If the optical aperture is formed by oxidation of e.g. a specific AlGaAs layer, the transformation of the crystal structure to AI2O3 creates a strong lattice mismatch and thus mechanical stress between the AI2O3 and the surrounding AlGaAs layers.

[0004] WO 2010 / 058805 A1 discloses a method for manufacturing a surface emitting laser device. The method comprises forming a laminate in which a lower reflector, a resonator structure comprising an active layer and an upper reflective layer with a selectively oxidizable layer are laminated on a substrate. The laminate is etched to form a mesa structure having the selectively oxidizable layer exposed at a side surface thereof. The selectively oxidizable layer is selectively oxidized from the side surface of the mesa structure to form a pinched structure in which an oxide surrounds a current passing region. A separation groove is formed at a location facing away from the mesa structure. An outermost front surface of at least a portion of the laminate exposed is passivated when the separation groove is formed. The passivated portion is coated with a dielectric body.

[0005] JP 2004 158664 A discloses a semiconductor laser device provided with a current confinement structure. Another surface emitting laser comprising an oxidized layer for current confinement is known from JP 2009 238832 A.

[0006] US 5 359 618 A discloses a vertical cavity surface emitting laser having a first mirror stack and a second mirror stack and an active region sandwiched between the first and second mirror stacks. The second mirror stack is formed as a mesa having an exposed end surface and outer sidewalls and a centrally located light emission region. The portion of the mesa adjacent to the exposed outer sidewalls has a reduced electrical conductivity in order to diffuse an operating current from the outer sidewalls to the centrally located light emission region. The electrical conductivity of this portion is reduced by oxidizing or etching the outer sidewalls.

[0007] US 2006 / 013276 A1 discloses a vertical cavity surface emitting laser comprising a void in the mirror stack and a protective layer sealing one end of the void. The void defines the boundary of the aperture of the VCSEL without introducing oxide regions and stresses that oxide VCSEL can cause, and the protective layer, which can be a thin dielectric layer, protects the mirror stack from environmental damage. The VCSEL can thus achieve high reliability. The manufacturing process of the VCSEL forms an oxidation aperture, oxidizes a portion of an exposed portion of an aluminum-rich layer in the mirror stack of the VCSEL in the aperture, and then removes all or some of the resulting oxide to form the desired void. The protective layer can then be deposited to seal one end of the void.

[0008] Therefore, there is a need for an improved method of forming an optical aperture of a VCSEL. SUMMARY

[0009] It is an object of the present invention to provide a method of forming an optical aperture in a vertical cavity surface emitting laser that reduces mechanical stresses in the final VCSEL layer stack.

[0010] It is another object of the present application to provide an improved VCSEL with increased service life and / or operational reliability.

[0011] According to one aspect, a method of forming an optical aperture of a vertical cavity surface emitting laser (VCSEL) is provided, the method comprising:

[0012] providing a layer stack of semiconductor layers, the semiconductor layers comprising an intermediate layer, wherein the intermediate layer comprises a semiconductor material suitable to be oxidized,

[0013] oxidizing the intermediate layer to an oxidation width so as to form an oxidized outer region and an unoxidized central region in the intermediate layer,

[0014] removing at least a portion of the oxidized outer region so that a gap is formed at the location where the oxidized outer region or the portion of the oxidized outer region has been removed, and

[0015] depositing a non-conductive material in the gap.

[0016] As in conventional processes, the method according to the present application uses an oxidation process to define the size of the optical aperture in the intermediate layer. The size of the optical aperture can be controlled by the oxidation width, which in turn can be controlled by the duration of the oxidation process and / or parameters of the oxidation atmosphere, such as pressure and temperature and the composition of the oxidation atmosphere. The oxidation rate further depends on the semiconductor material to be oxidized. Unlike conventional methods of forming an optical aperture, the oxidized material is removed from at least a portion of the oxidized outer region of the intermediate layer. It is also possible that the oxidized material is completely removed from the oxidized outer region. By removing the oxidized material from at least a portion of the oxidized outer region, a gap is formed in the intermediate layer between layers of the layer stack adjacent to the intermediate layer. Thus, mechanical stress, which is caused by the strong lattice mismatch between the oxidized semiconductor material and the surrounding unoxidized semiconductor material due to the oxidation process, is relaxed. If the oxidized material is completely removed from the oxidized outer region of the intermediate layer, the mechanical stress relaxation is achieved up to the tip of the transition of the oxidized outer region to the unoxidized central region.

[0017] filling the voids formed after removal of the oxidized material at least partially with a non-conductive material of much higher quality than the oxidized semiconductor material removed and which does not cause mechanical stress in the layer stack. The non-conductive material is deposited in the voids, on the void walls. The oxidation product obtained by oxidizing the semiconductor material of the intermediate layer, e.g. AI2O3 obtained from oxidation of AIAs or AlGaAs, has a poor mechanical and electrical quality, but the non-conductive material deposited in the voids after removal of the oxidized semiconductor material can have a very good mechanical and electrical quality. In particular, the deposited non-conductive material can passivate open or dangling bonds possibly created in the oxidation process at the interface between the voids and the surrounding semiconductor layers (void walls) without exerting stress. Furthermore, the electrical insulating behavior of the deposited material enables current limitation.

[0018] Improvements of the method according to the application will be described in the following.

[0019] In an embodiment, providing the layer stack can comprise:

[0020] growing the layer stack epitaxially,

[0021] etching the layer stack to form a pre-form of a mesa of the VCSEL and a support structure at least partially surrounding the pre-form of the mesa, the support structure comprising an outer support region and at least one supporting web connecting the outer support region with the pre-form of the mesa, wherein the pre-form of the mesa comprises the intermediate layer.

[0022] In one aspect, the process serves to form an oxidation region for carrying out a subsequent oxidation process. The oxidation region is formed by the outer walls of the pre-form of the mesa.

[0023] In another aspect, the mechanical support structure advantageously enables mechanical stability during and after removal of the oxidized material from the intermediate layer, before refilling the voids. The size and thus the strength of the mechanical support structure will depend on the desired final VCSEL mesa size and oxidation width. For larger oxidation widths, a stronger support structure with multiple connected supporting webs is advantageous.

[0024] In this embodiment, it can be advantageous that the deposition of the non-conductive material also covers the sidewalls of the pre-form of the mesa, as this further stabilizes the pre-form of the mesa and can fill further voids possibly present after removal of the oxidized material from further layers of the layer stack. In other words, the deposited non-conductive material is to some extent “anchored” into these layers.

[0025] In an embodiment, the etching of the layer stack is performed such that the pre-form of the mesa has tapered outer walls. The outer walls can taper from the bottom to the top of the pre-form of the mesa, i.e. in the direction of the epitaxial growth of the layer stack. The tapered shape of the pre-form of the mesa has the advantage of further increasing the mechanical stability of the pre-form of the mesa. The sidewall angle of the oxidized region (the outer walls of the pre-form of the mesa) relative to the planar orientation of the layers of the layer stack can be chosen between 65° and 70°. Within this angle range, a good mechanical stability is achieved when removing the oxidized material from the layers is achieved.

[0026] In an embodiment, the method can further comprise, after depositing the non-conductive material in the voids, trimming etching the pre-form of the mesa to obtain a final mesa having straight (non-tapered) outer walls.

[0027] In connection with the foregoing embodiments, the mesa defining process can be split into two separate process steps, i.e. a first step of forming an oxidized region by etching the layer stack to provide a pre-form of the mesa, and, after oxidation, removing the oxidized material and filling the voids with non-conductive material, further processing the pre-form of the mesa to obtain a final mesa which can then have outer walls perpendicular to the planar orientation of the layers of the stack. The trimming etching can also remove residual material which can have been deposited on the sidewalls of the pre-form of the mesa when filling the voids again after removing the oxidized material.

[0028] In another embodiment, the intermediate layer can have a thickness which is significantly larger than the thickness of the semiconductor layers adjacent to or in the vicinity of the intermediate layer.

[0029] The advantage here is that the thicker intermediate layer oxidizes faster than the thinner surrounding semiconductor layers. Another advantage is that the oxidized material produced when oxidizing the intermediate layer has a higher porosity and is thus easier to remove. In a conventional VCSEL, a thicker oxidized layer would lead to an optical aperture with a smaller current confinement capability due to the lower electrical breakdown field and the reduced refractive index in the oxidized region of the layer. Since the oxidized material is removed in the method according to the present application, such a drawback does not occur in the method according to the present application, since the oxidized material is replaced by high-quality non-conductive material after removing the oxidized material.

[0030] The thickness of the intermediate layer which can be defined in the epitaxial process can be in the range from about 80 nm to about 100 nm, while the surrounding semiconductor layers can have a thickness in the range from about 20 nm to about 30 nm.

[0031] In an embodiment, the semiconductor material of the intermediate layer can be an Al-based semiconductor material, in particular AlAs or AlGaAs.

[0032] In another embodiment, removing the oxidized intermediate layer can be performed by using a hydrofluoric acid dip for etching or a fluorine gas phase based etching process.

[0033] A fluorine gas phase based etching process, which is also called atomic layer etching, is preferred for the precise control of the pressure. In this way a high etching rate can be achieved. Plasma and the like are less preferred because the plasma can damage the susceptible layers. Another advantage of the fluorine gas phase etching process is the high selectivity of the oxidized material with respect to the semiconductor material.

[0034] In another embodiment, depositing the non-conductive material comprises using atomic layer deposition to deposit the non-conductive material.

[0035] Atomic layer deposition (ALD) is a deposition technique that is suitable to fill thin voids with aspect ratios up to 1000: 1 in a reliable way.

[0036] The non-conductive material is deposited on the void wall with a thickness that is smaller than the thickness of the void, wherein the non-conductive material can be deposited on the void wall with a thickness in the range from about 2 nm to about 5 nm. If the void has a thickness that is more than twice the thickness of the deposited film, the non-conductive material will not completely fill the void in the intermediate layer. As provided, after depositing the non-conductive material, then additional material, in particular a high refractive index material, is filled in the remaining space of the void.

[0037] Filling the remaining space of the void with a high refractive index material can be performed using fluid chemical wafer deposition. Suitable materials as high refractive index material are AIN, SiN and the like.

[0038] The non-conductive material can be AI2O3 or oxidized TiN or TiO2. Although AI2O3 can be the product in the intermediate layer after an oxidation process if the intermediate layer comprises e.g. AIAs, the AI2O3 layer that is deposited in the void after removing the oxidized material from the intermediate layer can have a much higher mechanical and electrical quality due to the deposition process. In particular, the deposited AI2O3 can be less porous than AI2O3 that results from oxidation of the semiconductor material and can have a passivation effect at the interface to the surrounding layers.

[0039] In another embodiment, oxidizing the intermediate layer can comprise wet oxidation at a temperature in the range from about 320 °C to 350 °C and at a pressure higher than 500 mbar. This measure can achieve a more diffusion limited oxidation process.

[0040] The method of manufacturing a VCSEL can comprise the method of forming an optical aperture according to the present application.

[0041] According to another aspect, there is provided a vertical cavity surface emitting laser, the vertical cavity surface emitting laser comprising:

[0042] a layer stack of semiconductor layers, the semiconductor layers comprising at least one intermediate layer, the intermediate layer comprising a semiconductor material and forming an optical aperture of the vertical cavity surface emitting laser,

[0043] wherein the at least one intermediate layer has a central region comprising a semiconductor material and an outer region comprising a layer of deposited non-conductive material deposited on a wall of a void formed by removing oxidized material from at least a portion of the outer region, wherein the deposited layer has a thickness smaller than a thickness of the intermediate layer, and the outer region additionally comprises a further material filling a remaining space of the void not filled by the layer of non-conductive material.

[0044] Thus, the layer of deposited non-conductive material is a layer comprising a material different from the material obtained by oxidizing the semiconductor material, and thus different from the oxidized layer obtained by oxidizing the semiconductor material of the intermediate layer. In particular, the deposited layer has a higher mechanical and electrical quality than the oxidized layer.

[0045] The vertical cavity surface emitting laser has the same or similar advantages as described above with respect to the method according to the invention.

[0046] The intermediate layer forming the optical aperture can be a layer in a DBR of the VCSEL or a layer between an active region and the DBR. The VCSEL can have more than one optical aperture in the layer stack, which can be formed by the method according to the invention.

[0047] Further features and advantages will become apparent from the following description of example embodiments with reference to the drawings. BRIEF DESCRIPTION OF DRAWINGS

[0048] In the drawings:

[0049] Figure 1 A sketch of a VCSEL comprising an optical aperture is shown;

[0050] Figure 2 A layer stack of semiconductor layers in a phase of a method of forming an optical aperture of a VCSEL is shown;

[0051] Figure 3 A top view of the layer stack in Figure 2 in a further phase of the method of forming an optical aperture is shown;

[0052] Figure 4 A side view of a portion of the structure in Figure 3 is shown;

[0053] Figure 5 shows a structure in Figure 3 in a further stage of the method of forming an optical aperture;

[0054] Figure 6 shows a structure in Figure 5 in a further stage of the method of forming an optical aperture;

[0055] Figure 7 shows a structure in Figure 6 in a further stage of the method of forming an optical aperture;

[0056] Figure 8 shows a structure in Figure 7 in a further stage of the method of forming an optical aperture;

[0057] Figure 9 shows a cross-sectional side view of a portion of a structure in a stage of the method according to Figure 8 ;

[0058] Figure 10 shows a perspective side view of a portion of a structure in a stage of the method of forming an optical aperture according to Figure 8 ;

[0059] Figure 11 shows a structure in Figure 8 in a further stage of the method of forming an optical aperture;

[0060] Figure 12 shows a perspective side view of a portion of a structure in Figure 11 ;

[0061] Figure 13 shows a cross-sectional side view of a portion of a structure in Figure 11 ;

[0062] Figure 14 shows a structure in Figure 11 in a further stage of the method of forming an optical aperture;

[0063] Figure 15 shows a structure in Figure 14 in a further stage of the method of forming an optical aperture;

[0064] Figure 16 shows a cross-sectional side view of a structure in Figure 14 ;

[0065] Figure 17 shows a cross-sectional side view of a structure in Figure 15 ;

[0066] Figure 18 a sketch of a VCSEL with an optical aperture is shown; and

[0067] Figure 19 a sketch of a counter example of a VCSEL with an optical aperture is shown. DETAILED DESCRIPTION

[0068] Before describing a method of forming an optical aperture in a vertical cavity surface emitting laser (VCSEL), reference will be made to Figure 1 A VCSEL with an optical aperture is described. The VCSEL 10 comprises a layer stack of a plurality of semiconductor layers. The layer stack can comprise a first distributed Bragg reflector (DBR) 14, an active region 16 for laser emission, and a second DBR 18 on a substrate 12. The active region 16 is arranged between the first DBR 14 and the second DBR 18. The first DBR 14, the active region 16, and the second DBR 16 form an optical resonator. For example, the first DBR 14 can comprise n-doped AlGaAs / GaAs layer pairs. The active region 16 can comprise one or more quantum wells for laser emission. The second DBR 18 can comprise p-doped AlGaAs / GaAs layer pairs. The VCSEL 10 can further comprise an n-contact 20 and a ring-shaped p-contact 22. The region M of the VCSEL 10 is referred to as a mesa.

[0069] The VCSEL 10 further comprises an optical aperture 24. In this example, the optical aperture 24 is integrated in the second DBR 18. The optical aperture 24 is formed in an intermediate layer 26 of the layer stack of the VCSEL 10. In a conventional VCSEL, the optical aperture 24 is formed by oxidizing the intermediate layer 26, which can comprise an Al-based semiconductor material with a high Al content. For example, the intermediate layer 26 can comprise AlAs, which is oxidized such that the outer region 28 of the intermediate layer 26 comprises AI2O3 as an oxidation product of the AlAs intermediate layer 26.

[0070] The central region 28 of the intermediate layer 26 forms the optical aperture. The oxidized outer region 29 of the intermediate layer 26 serves to confine the current through the active region 16, i.e. the current is confined to the central region 28 of the intermediate layer 26. The optical aperture 24 further confines the optical emission of the active region 16 to the central region 28 of the intermediate layer 26. It is to be understood that in other embodiments, the VCSEL can comprise more than one intermediate layer, each of which forms an optical aperture.

[0071] A disadvantage of the oxidized outer region 28 of the intermediate layer 26 is that the oxidation product of the semiconductor material of the intermediate layer 26, e.g. AI2O3, exhibits a strong lattice mismatch with the surrounding semiconductor layer, in this example an AlGaAs layer. The lattice mismatch creates mechanical stress in the surrounding semiconductor layer, resulting in a reduced service life and reduced operational reliability of the VCSEL. In the following, a method of forming an optical aperture in a VCSEL that mitigates these disadvantages and such a VCSEL will be described with reference to further drawings.

[0072] According to Figure 2 , a layer stack 40 of semiconductor layers is provided. The layer stack 40 can include a substrate 42 and a plurality of semiconductor layers epitaxially grown on the substrate forming a first DBR 44, one or more semiconductor layers forming an active region 46, and a plurality of further semiconductor layers forming a second DBR 48. The DBRs 44 and 48 and the active region 46 can be arranged as described above. The semiconductor layers of the layer stack 40 can include AlGaAs and GaAs layers.

[0073] The layer stack 40 further includes an intermediate layer 50 in which the optical aperture is to be formed. The intermediate layer 50 can be arranged in the second DBR 48 as shown. In other embodiments, the intermediate layer 50 can be arranged in the first DBR 44 or between the active region 46 and one of the DBRs 44, 48.

[0074] As Figure 2 shown in the middle, the intermediate layer 50 has a thickness that is significantly larger than the thickness of the semiconductor layers, e.g. layers 52 and 54 adjacent to the intermediate layer 50. The larger thickness of the intermediate layer 50 is advantageous in the method of forming the optical aperture as will be described below. For example, the intermediate layer 50 can have a thickness in the range from about 80 nm to about 100 nm. The layers 52 and 54 and the remaining layers of the second DBR 48 can have a thickness in the range from about 10 nm to about 15 nm.

[0075] The intermediate layer 50 includes a semiconductor material that is suitable for being oxidized. In embodiments, the semiconductor material of the intermediate layer 50 can be an Al-based semiconductor material, in particular AlAs or AlGaAs.

[0076] Next, reference is made to Figure 3 and Figure 4The method continues with the formation of the oxidation region. This is performed by trimming the layer stack 40 to form a pre-form 54 of the mesa 56 of the VCSEL. When the layer stack 40 is etched, not only the pre-form 54 of the mesa 56 is created, but also a support structure 58 at least partially, here completely, surrounding the mesa 56. The support structure 58 comprises an outer support region 60 and at least one support or connecting web 62, in the example four webs 62 are shown. The webs 62 connect the outer region 60 with the mesa 56. The support structure 58 provides sufficient support to the layer stack 40 in the region of the pre-form 54 of the mesa 56 in the subsequent processing steps of the method of forming the optical aperture.

[0077] The pre-form 54 of the mesa 56 forms the oxidation region for performing the subsequent oxidation process and comprises the intermediate layer 50 as Figure 4 shown in the middle. Figure 4 Only the layer stack 40 in the region of the upper layers of the layer stack, here in the region of the second DBR 48, is shown. The first DBR 44 and the substrate 42 are not shown. The mesa 56 can also comprise the active region 46.

[0078] The etching of the layer stack 40 is performed such that the pre-form 54 of the mesa 56 has an outer wall 55 tapering towards an end 64 of the mesa 56, which is the end facing away from the substrate 42. The angle a of the outer wall 55 of the pre-form 54 of the mesa 56 with the plane orientation of the layers of the stack 40 can be in the range from about 65° to about 75° to provide good mechanical stability.

[0079] After the formation of the oxidation region as described above, the method of forming the optical aperture continues with oxidizing the intermediate layer 50 as Figure 5 and Figure 6 shown in the middle and the right. Figure 5 The oxidation process is shown at the beginning, Figure 6 the oxidation process is shown at the end. Figure 5 and Figure 6 The hatched region in the middle and the right indicates the oxidized material of the intermediate layer 50. The oxidation of the intermediate layer 50 is performed to an oxidation width which is less than half of the total width of the pre-form 54 of the mesa 56 in the region of the intermediate layer 50. The oxidation can be performed using wet oxidation at a temperature in the range from about 320°C to 350°C and at a pressure higher than 500 mbar.

[0080] If the intermediate layer 50 comprises AlAs or AlGaAs, the oxidized material comprises AI2O3. When the oxidation process is completed, the intermediate layer 50 has an outer region 70 which is oxidized and a central region 68 which is not oxidized as Figure 6 shown in the middle. Figure 6The central region 68 of the intermediate layer 50 shown in the middle would be the optical aperture in the final VCSEL.

[0081] As indicated, the oxidation process can also oxidize the material in the support structure 58, including the web 62 and the outer region 60 of the support structure 58.

[0082] The oxidation of other layers of the layer stack 40 in the oxidized region formed by the preform 54 of the mesa 56 can also occur, particularly if these layers include Al in the semiconductor material. As mentioned above, the thickness of the intermediate layer 50 is greater than the thickness of the layers adjacent to the intermediate layer 50. Thicker layers, such as thicker AlAs layers, oxidize faster than thinner layers, such as thinner AlAs layers. This means that the oxidized width or depth of the intermediate layer 50 is greater than the surrounding thinner layers. Another advantage of the higher thickness of the intermediate layer 50 is that the oxidized material, such as AI2O3, has a higher porosity and is therefore more easily removed. In a conventional VCSEL manufacturing process, a thick, porous AI2O3 layer would result in less current confinement and optical mode confinement capability due to a lower electrical breakdown field and a reduced reflectivity. In the method of forming an optical aperture according to the present disclosure, this would not be a problem, as the oxidized material is at least partially removed from the oxidized outer region 70, as will be described below.

[0083] The method continues with the removal of the oxidized material from the oxidized outer region 70 of the intermediate layer 50. The removal of the oxidized intermediate layer 50 can include the removal of all of the oxidized material or only a portion thereof from the outer region 70 of the intermediate layer 50. In other words, the oxidized material can be removed over the entire width of the oxidized outer region 70 or only over a portion of the width of the oxidized outer region 70.

[0084] Figure 7 A processing step of the method prior to the removal of the oxidized material is shown. In this processing step, the layer stack 40 is covered with a photoresist protective film 72. Figure 7 The photoresist protective film 72 is shown in grey in the middle. The protective film 72 covers the support structure 58. As indicated by the dashed line, the protective film 72 does not cover the outer wall of the preform 54 of the mesa 56. Figure 10 As shown in the middle, the protective structure does not cover the outer wall of the preform 54 of the mesa 56. Figure 10 It is shown in more detail that the protective film 72 does not cover the connecting web 62 adjacent to the preform 54 of the mesa 56. The tapered shape of the preform 54 of the mesa 56 is not shown in the middle. Figure 10

[0085] Next, the oxidized material is removed from the total oxidized region 70 of the intermediate layer 50 or a portion of the oxidized outer region 70. This is indicated in the middle with hatching that is different from the hatching of the outer region 70 in the middle. Figure 8 Figure 7 The photoresist protective film 72 is shown in grey in the middle. The protective film 72 covers the support structure 58. As indicated by the dashed line, the protective film 72 does not cover the outer wall of the preform 54 of the mesa 56.​​

[0086] The removal of oxidized material from at least a portion of the width of the oxidized outer region 70 of the intermediate layer 50 can be performed by etching using hydrofluoric acid immersion or a fluorine gas phase based etching process. The etching process should have a high selectivity such that only the oxidized material is removed without removing semiconductor material from the surrounding layers and the central region 68 of the intermediate layer 50. The etching process is preferably atomic layer etching in a closed system under specific pressure control.

[0087] The removal of oxidized material from the oxidized outer region 70 of the intermediate layer 50 and from other regions of the preform 54 of the mesa 56 in which oxide has already been formed due to the oxidation process results in the formation of voids 78 and 80 as shown in Figure 9 The void 78 is formed after the removal of oxidized material from the oxidized outer region 70 of the intermediate layer 50. The void 80 is formed in other layers in which oxidized material has already been formed during the oxidation process and which is also removed by atomic layer etching. Figure 9 It is further shown that the oxidation process results in a higher oxidation width in the thicker intermediate layer 50 than in the thinner surrounding Al-containing layers of the layer stack 40.

[0088] The support structure 58 advantageously mechanically stabilizes the preform 54 of the mesa 56 when the oxidized material is removed in the etching process.

[0089] The method continues with filling the voids 78, 80 formed by the removal of oxidized material with high quality material as will be described with reference to Figures 11 to 13 .

[0090] The refilling of the voids 78, 80 with high quality material is performed by depositing a layer of non-conductive material 90 in the voids 78, 80, preferably by atomic layer deposition. The non-conductive material can be AI2O3, oxidized TiN or TiO2. AI2O3 deposited by atomic layer deposition has a much higher quality in terms of crystal structure, e.g. is less porous and less brittle than AI2O3 as oxidation product of e.g. AIAs. The layer of non-conductive material 90 also passivates open bonds at the released interfaces (void walls) without imposing stress. The electrically insulating behavior of the non-conductive material further enables a current confinement to the central region 68 in the intermediate layer 50.

[0091] The non-conductive material 90 is preferably deposited on the void walls of the voids 78 in the intermediate layer 50 with a thickness that is smaller than the thickness of the voids 78. For example, the non-conductive material 90 can be deposited on the void walls of the voids 78 with a thickness in the range from about 2 nm to about 5 nm.

[0092] In case the intermediate layer 50 has a relatively large thickness, the layer of non-conductive material 90 will not completely fill the voids 78 over the entire thickness of the voids. Therefore, any remaining space in the voids 78 can be additionally filled with a high refractive index material. This can be performed by fluid chemical vapor deposition. The high refractive index material can be amorphous silicon (a-Si) which is filled at a temperature of about 150 °C. The high refractive index material improves the optical mode confinement to the central region 68 of the intermediate layer 50 and in addition provides further mechanical stability of the mesa 56.

[0093] Figure 13 The voids 78 are shown now filled with the non-conductive material 90 or preferably filled with a combination of the non-conductive material 90 and the high refractive index material. The voids 80 can also be filled with these materials.

[0094] Figure 12 It is shown that in the connecting web 62, there is still oxidized material 70 present, as these regions are covered by the protective film 72. Figure 10 ).

[0095] After the re-filling of the voids 78, 80 as described before, the preform 54 is stable enough that the process can continue with trimming the edges of the preform 54 which is used to remove any remaining material of the re-filling process sequence to at least partially remove the web 62 and the outer region 60 of the support structure (e.g. in regions where oxidized material from the oxidation process is still present or in regions where this structure is not needed in the final VCSEL) and to create straight outer walls (a = 90°) of the mesa 56.

[0096] Figure 14 The processing steps of the method are shown when the layer stack 40 is prepared for trimming the edges. The regions of the layer stack 40 which are not etched by the trimming are protected by a photoresist protective layer 94. As shown in Figure 14 there are regions of remaining material of the non-conductive material 90 and / or of the partial high refractive index material which are not covered by the protective film 94.

[0097] Next, as shown in Figure 15 the trimming etch is performed to obtain the final mesa 56 with straight outer walls 98 as shown in Figure 18 The trimming etch process also removes the support structure 58. Figure 15 The region 100 in Figure 15 is part of the lower region of the layer stack 40.

[0098] Figure 16A trim etch process removes a portion of the outer region of mesa 56, as indicated by line 102, to achieve a small mesa structure, as shown in Figure 17 As shown in Figure 17 The trim edge process can also remove filled voids 80, as shown in

[0099] Figure 18 A VCSEL 120 fabricated according to the method of the present disclosure to form optical aperture 24 in intermediate layer 50 is shown. The outer region of intermediate layer 50 includes a combination of a layer of deposited non-conductive material 90 and high index material 106. In contrast to an optical aperture conventionally formed by oxidizing the intermediate layer and then not at least partially replacing the oxidized layer with a high quality non-conductive layer, the transition in crystal structure from the high quality layer forming the optical aperture to the adjacent layers above and below the high quality layer will be sharp rather than blurred, whereas in the case of the conventional method the transition in crystal structure from the oxide layer to the adjacent layers is blurred rather than sharp.

[0100] Figure 19 A comparative example of a conventional VCSEL 150 with optical aperture 24 is shown. In contrast to VCSEL 120 in Figure 18 VCSEL 150 fabricated according to conventional techniques has a mesa 152 that is wider than mesa 56 of VCSEL 120. In addition, mesa 152 of VCSEL 150 includes low quality oxidized material 154 in the layer that includes optical aperture 24 (obtained by oxidizing the semiconductor material of the layer) and in additional layers surrounding optical aperture 24.

[0101] Figure 18 and Figure 19 Electrical contacts 124 and electrical contacts 156 are also shown, respectively, on the top of mesas 56 and 152, respectively.

[0102] It will be appreciated that more than one optical aperture can be formed in a single mesa using the method according to the present disclosure.

Claims

1. A method for forming an optical aperture (24) of a vertical cavity surface-emitting laser (120), comprising: A stacked body (40) of semiconductor layers is provided, the semiconductor layers including an intermediate layer (50), wherein the intermediate layer (50) includes a semiconductor material suitable for oxidation. The intermediate layer (50) is oxidized to the oxidized width so that an oxidized outer region (70) and an unoxidized central region (68) are formed in the intermediate layer (50). At least a portion of the oxidized outer region (70) is removed, such that a void (78) is formed at the location where either the oxidized outer region (70) or a portion of the oxidized outer region (70) has been removed. A non-conductive material (90) is deposited in the voids (78), wherein the non-conductive material (90) is deposited on the walls of the voids (78) with a thickness smaller than the thickness of the voids (78), and After the non-conductive material (90) is deposited, the remaining space of the void is filled with another material.

2. The method according to claim 1, wherein, Providing the layer stack (40) includes: The stacked layers (40) are epitaxially grown. The stacked body (40) is etched to form a preform (54) of a mesa (56) and a support structure (58) that at least partially surrounds the preform (54) of the mesa (56). The support structure (58) includes an outer support region (60) and at least one support web (62) connecting the outer support region (60) to the preform (54) of the mesa (56). The preform (54) of the mesa (56) includes the intermediate layer (50).

3. The method according to claim 2, wherein, Etching is performed on the stacked body (40) such that the preform (54) of the mesa (56) has a tapered outer wall (55).

4. The method according to claim 3, further comprising, after depositing the non-conductive material (90) in the void (78), trimming and etching the preform (54) of the mesa (56) to obtain a final mesa (56') having a straight outer wall (98).

5. The method according to any one of claims 1 to 4, wherein, The intermediate layer (50) has a thickness that is significantly greater than the thickness of the semiconductor layer adjacent to or near the intermediate layer (50).

6. The method according to claim 5, wherein, The intermediate layer (50) has a thickness in the range of 80 nm to 100 nm.

7. The method according to any one of claims 1 to 4, wherein, The semiconductor material of the intermediate layer (50) is an Al-based semiconductor material.

8. The method according to claim 7, wherein, The Al-based semiconductor material is AlAs or AlGaAs.

9. The method according to any one of claims 1 to 4, wherein, At least a portion of the oxidized outer region (70) of the intermediate layer (50) is removed by etching using hydrofluoric acid impregnation or by a fluorine vapor phase-based etching process.

10. The method according to any one of claims 1 to 4, wherein, Depositing the non-conductive material (90) includes using atomic layer deposition to deposit the non-conductive material (90).

11. The method according to any one of claims 1 to 4, wherein, The non-conductive material (90) is deposited on the walls of the void (78) with a thickness ranging from 2 nm to 5 nm.

12. The method according to any one of claims 1 to 4, wherein, The non-conductive material (90) is Al2O3 or oxidized TiN or TiO2.

13. The method according to any one of claims 1 to 4, wherein, The other material is AlN or SiN.

14. The method according to any one of claims 1 to 4, wherein, The remaining space is filled with the additional material by performing fluid chemical vapor deposition on the additional material (106).

15. The method according to any one of claims 1 to 4, wherein, The oxidation of the intermediate layer (50) includes wet oxidation at temperatures ranging from 320°C to 350°C and at pressures above 500 mbar.

16. A vertical-cavity surface-emitting laser, comprising: A stack of semiconductor layers, the semiconductor layers including at least one intermediate layer (50), the intermediate layer (50) comprising a semiconductor material and forming the optical aperture (24) of the vertical cavity surface-emitting laser (120), The at least one intermediate layer (50) has a central region (68) comprising the semiconductor material and an outer region (70) comprising a layer of deposited non-conductive material (90) deposited on the walls of a void (78) formed by removing oxidized material from at least a portion of the outer region (70), wherein the deposited layer has a thickness less than that of the intermediate layer, and the outer region (70) further comprises additional material that fills the remaining space of the void (78) not filled by the layer of non-conductive material.

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