Multi-platform adaptive hybrid hard disk backboard design method, system, device and medium

Abstract

The application provides a mixed hard disk backboard design method, system, equipment and medium suitable for multiple platforms, and the method comprises the following steps: delivering platform type information and configuration information to the CPLD of the backboard based on the mainboard; the CPLD of the backboard encodes the platform information and the configuration information; a signal representing that a solid state hard disk is in place on the hard disk slot is connected to the CPLD device, which is used for distinguishing the hard disk type, judging whether the hard disk is in place or not, and delivering corresponding hard disk type and in-place condition information to the BMC and the BIOS to assist in judging the hard disk related information; a logic circuit is built in the CPLD, which is used for distinguishing different platforms and different configurations and controlling the hard disk. The application designs a hard disk backboard which is compatible with multiple platforms, multiple configurations and supports multiple hard disk types. Through the use of the rich logic resources and IO resources of the CPLD device, the problems such as cross-platform and cross-configuration compatibility and hard disk type identification are solved, and the research and development cost and the production cost can be greatly reduced.

Description

Technical Field

[0001] This invention relates to the field of computer technology, and more specifically to a hybrid hard disk backplane design method, system, device, and medium adapted to multiple platforms. Background Technology

[0002] Currently, there are three main platforms in existing server systems: Intel, AMD, and ARM. For each platform, the supported hard drive types typically include SATA SSDs, SAS SSDs, and NVMe SSDs. These are: SSD (Solid State Disk), NVMe (Non-Volatile Memory Express), SATA (Serial ATA), and SAS (Serial Attached SCSI). Based on current common designs, each hard drive backplane can only support one model from one platform. In such server systems, cross-platform, cross-configuration support for multiple hard drive types is often impossible. This means that different hard drive backplanes need to be designed for different platforms and their varying configuration requirements.

[0003] This means that during the R&D phase, a large number of design and verification personnel are needed to make different designs for different situations and ensure quality. Similarly, during the production phase, a large number of personnel are needed to prepare materials. After shipment, a large number of technical personnel are needed for maintenance. In today's booming server market, such a design undoubtedly increases the cost of design and production, increases the investment of personnel, and also causes a certain waste of resources. Summary of the Invention

[0004] In view of this, the purpose of this invention is to propose an improved hybrid hard drive backplane design method, system, device, and medium that is compatible with multiple platforms. It utilizes the internal logic circuitry of a CPLD (Complex Programmable Logic Device) to distinguish hard drive types and record these types before transmitting them via bus to the BMC (Baseboard Management Controller) and BIOS. This assists the BMC and BIOS in determining the hard drive type. Simultaneously, the MB (motherboard) needs to receive ID signals representing the platform type and configuration type, which are transmitted to the CPLD of the hard drive backplane through the sideband interface between the MB and BP (backplane). This ensures compatibility with hard drive control under different platforms and configurations. Furthermore, the BP CPLD also needs to transmit platform type and configuration information to the MB's BMC via the bus. This saves BMC I / O and helps the BMC identify different configurations.

[0005] To achieve the above objectives, in one respect, the present invention provides a hybrid hard drive backplane design method adapted to multiple platforms, wherein the method includes the following steps:

[0006] The motherboard transmits platform type information and configuration information to the CPLD on the backplane.

[0007] The CPLD on the backplane encodes platform information and configuration information;

[0008] The signal on the hard drive slot that indicates the presence of the solid-state drive is connected to the CPLD device to distinguish the hard drive type and determine whether the hard drive is present. It also transmits the corresponding hard drive type and presence information to the BMC and BIOS to assist in determining hard drive-related information.

[0009] Logic circuits are built inside the CPLD to differentiate between different platforms and configurations, and to control the hard drive.

[0010] As a further aspect of the present invention, after building a logic circuit inside the CPLD to distinguish the hard disk type, it also includes recording the hard disk type.

[0011] As a further aspect of the present invention, the hybrid hard drive backplane design method for adapting to multiple platforms, after recording the hard drive type, further includes:

[0012] The information is transmitted via the bus to the BMC and BIOS to assist them in determining the type of hard drive.

[0013] As a further aspect of the present invention, the hybrid hard drive backplane design method adapted to multiple platforms further includes:

[0014] The MB receives the ID signal representing the platform type and the ID signal representing the configuration type, which are transmitted to the CPLD on the hard disk backplane through the sideband interface between the MB and BP.

[0015] As a further aspect of the present invention, the hybrid hard drive backplane design method adapted to multiple platforms further includes:

[0016] The BP CPLD transmits platform type information and configuration information to the MB's BMC via the bus, saving BMC I / O and helping the BMC identify different configurations.

[0017] Another aspect of the present invention provides a hybrid hard drive backplane design system adaptable to multiple platforms, comprising:

[0018] The information transmission module is used to transmit platform type information and configuration information to the CPLD on the backplane based on the motherboard;

[0019] The information encoding module is used by the CPLD on the backplane to encode platform information and configuration information;

[0020] The type determination module is used to connect the signal indicating the presence of the solid-state drive on the hard drive slot to the CPLD device, which is used to distinguish the hard drive type and determine whether the hard drive is present, and to transmit the corresponding hard drive type and presence information to the BMC and BIOS to assist in determining hard drive-related information.

[0021] The hard disk control module is used to build logic circuits inside the CPLD to control the hard disk, distinguishing between different platforms and configurations.

[0022] As a further aspect of the present invention, the multi-platform compatible hybrid hard drive backplane design system further includes:

[0023] The hard disk type recording module is used to build logic circuits inside the CPLD to distinguish and record the hard disk type.

[0024] As a further aspect of the present invention, the multi-platform compatible hybrid hard drive backplane design system further includes:

[0025] The type transfer module is used to pass information to the BMC and BIOS via the bus to assist the BMC and BIOS in determining the type of hard drive.

[0026] As a further aspect of the present invention, the multi-platform compatible hybrid hard drive backplane design system further includes:

[0027] The ID signal transmission module is used to transmit ID signals representing platform type and configuration type to the CPLD on the hard disk backplane via the sideband interface between the MB and BP.

[0028] In another aspect, the present invention provides a computer device including a memory and a processor, the memory storing a computer program which, when executed by the processor, performs any of the above-described hybrid hard disk backplane design methods adapted to multiple platforms according to the present invention.

[0029] In another aspect, the present invention provides a computer-readable storage medium storing computer program instructions that, when executed, implement any of the above-described hybrid hard disk backplane design methods adapted to multiple platforms according to the present invention.

[0030] The present invention has at least the following beneficial technical effects:

[0031] This invention proposes a hybrid hard drive backplane design method, system, device, and medium adapted to multiple platforms. By designing a single hard drive backplane compatible with multiple platforms, configurations, and hard drive types, it achieves cross-platform and cross-configuration compatibility and hard drive type identification through the use of the abundant logic and I / O resources of CPLD devices, significantly reducing R&D and production costs.

[0032] In addition, this invention utilizes the internal logic circuitry of the CPLD device to distinguish hard disk types and record them before transmitting them to the BMC and BIOS via a bus. This assists the BMC and BIOS in determining the hard disk type. Simultaneously, the MB needs to receive ID signals representing the platform type and configuration type through the sideband interface between the MB and BP, which are transmitted to the CPLD on the hard disk backplane to ensure compatibility with hard disk control under different platforms and configurations. At the same time, the BP CPLD also needs to transmit platform type information and configuration information to the MB's BMC via the bus. This saves BMC I / O and helps the BMC identify different configurations.

[0033] This invention makes full use of the rich IO resources of CPLD and achieves support for cross-platform multi-configuration server systems by designing a hard disk backplane. In the R&D stage, designers and verification personnel only need to design and debug the function of a hard disk backplane to adapt to multiple platforms and multiple configurations, which greatly saves labor costs. In the production stage, it can save on the types of materials and production personnel, thereby greatly saving economic costs.

[0034] These or other aspects of this application will become more apparent from the following description of embodiments. It should be understood that the foregoing general description and the following detailed description are exemplary and explanatory only, and are not intended to limit the application. Attached Figure Description

[0035] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other embodiments can be obtained based on these drawings without creative effort.

[0036] In the diagram:

[0037] Figure 1 A structural block diagram of a hybrid hard disk backplane design system adapted to multiple platforms according to the present invention is shown;

[0038] Figure 2 A flowchart illustrating an embodiment of the hybrid hard disk backplane design method adapted to multiple platforms according to the present invention is shown.

[0039] Figure 3 A schematic block diagram of an embodiment of a hybrid hard disk backplane design system adapted to multiple platforms according to the present invention is shown;

[0040] Figure 4 A schematic diagram of the hardware structure of an embodiment of a computer device for implementing a hybrid hard disk backplane design method adapted to multiple platforms according to the present invention is shown.

[0041] Figure 5 A schematic diagram of an embodiment of a computer-readable storage medium for implementing a hybrid hard disk backplane design method adapted to multiple platforms according to the present invention is shown. Detailed Implementation

[0042] The present application will now be further described in conjunction with the accompanying drawings and specific embodiments. It should be noted that, without conflict, the various embodiments or technical features described below can be arbitrarily combined to form new embodiments.

[0043] To make the objectives, technical solutions, and advantages of the present invention clearer, the embodiments of the present invention will be further described in detail below with reference to specific examples and the accompanying drawings. It should be understood that the specific embodiments described herein are merely illustrative and are not intended to limit the scope of this application.

[0044] It should be noted that all uses of "first" and "second" in the embodiments of the present invention are for the purpose of distinguishing two different entities or different parameters with the same name. Therefore, "first" and "second" are merely for convenience of expression and should not be construed as limiting the embodiments of the present invention. Furthermore, the terms "comprising" and "having," and any variations thereof, are intended to cover non-exclusive inclusion, such as other steps or units inherent in a process, method, system, product, or device that includes a series of steps or units.

[0045] The technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, not all embodiments. Based on the embodiments of this application, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this application.

[0046] The flowchart shown in the attached diagram is for illustrative purposes only and does not necessarily include all content and operations / steps, nor does it necessarily have to be performed in the order described. For example, some operations / steps can be broken down, combined, or partially merged, so the actual execution order may change depending on the actual situation.

[0047] The following detailed description of some embodiments of this application is provided in conjunction with the accompanying drawings. Unless otherwise specified, the following embodiments and features can be combined with each other.

[0048] Currently, there are three main platforms in existing server systems: Intel, AMD, and ARM. For each platform, the supported hard drive types typically include SATA SSDs, SAS SSDs, and NVMe SSDs. These are: SSD (Solid State Disk), NVMe (Non-Volatile Memory Express), SATA (Serial ATA), and SAS (Serial Attached SCSI). Based on current common designs, each hard drive backplane can only support one model from one platform. In such server systems, cross-platform, cross-configuration support for multiple hard drive types is often impossible. This means that different hard drive backplanes need to be designed for different platforms and their varying configuration requirements.

[0049] A large number of design and verification personnel are needed to make different designs for different situations and ensure quality. During the production stage, a large number of personnel are also needed to prepare materials. After shipment, a large number of technical personnel are needed for maintenance. In today's booming server market, such a design undoubtedly increases the cost of design and production, increases the investment of personnel, and also causes a certain waste of resources.

[0050] Therefore, this invention proposes an improved hybrid hard drive backplane design method, system, device, and medium adapted to multiple platforms. It utilizes the internal logic circuitry of a CPLD (Complex Programmable Logic Device) to distinguish hard drive types. After recording the hard drive type, this information is transmitted via bus to the BMC (Baseboard Management Controller) and BIOS to assist the BMC and BIOS in determining the hard drive type. Simultaneously, the MB (motherboard) needs to receive ID signals representing the platform type and configuration type, which are transmitted to the CPLD of the hard drive backplane through the sideband interface between the MB and BP (backplane). This ensures compatibility with hard drive control under different platforms and configurations. Furthermore, the BP CPLD also needs to transmit platform type and configuration information to the MB's BMC via the bus. This saves BMC I / O and helps the BMC identify different configurations.

[0051] See Figure 1 and Figure 2 As shown, an embodiment of the present invention provides a hybrid hard disk backplane design method adapted to multiple platforms, wherein the method includes the following steps S10-S40;

[0052] Step S10: Based on the motherboard, transmit the platform type information and configuration information to the CPLD on the backplane;

[0053] Step S20: The CPLD on the backplane encodes the platform information and configuration information;

[0054] Step S30: Connect the signal on the hard drive slot that indicates the solid-state drive is in place to the CPLD device to distinguish the hard drive type and determine whether the hard drive is in place, and transmit the corresponding hard drive type and in-place information to the BMC and BIOS to assist in determining the relevant hard drive information.

[0055] Step S40: Build logic circuits inside the CPLD to differentiate between different platforms and configurations, and control the hard drive.

[0056] In some embodiments, after building logic circuits inside the CPLD to distinguish hard disk types, the method also includes recording the hard disk types.

[0057] In this embodiment of the invention, the hybrid hard drive backplane design method for adapting to multiple platforms, after recording the hard drive type, also includes transmitting the data to the BMC and BIOS via a bus to assist the BMC and BIOS in determining the hard drive type.

[0058] In some embodiments of the present invention, the hybrid hard disk backplane design method adapted to multiple platforms further includes: the MB receives an ID signal representing the platform type and an ID signal representing the configuration type, which are then transmitted to the CPLD of the hard disk backplane through the sideband interface between the MB and BP.

[0059] In this embodiment of the invention, the hybrid hard disk backplane design method adapted to multiple platforms further includes: the BPCPLD transmits platform type information and configuration information to the BMC of the MB through the bus, saving the BMC's IO and helping the BMC to identify different configurations.

[0060] The multi-platform hybrid hard drive backplane design method of the present invention can utilize the internal logic circuit of the CPLD device to distinguish hard drive types, record the hard drive types, and then transmit them to the BMC and BIOS via the bus to assist the BMC and BIOS in determining the hard drive type. At the same time, the MB needs to receive the ID signal representing the platform type and the ID signal representing the configuration type through the sideband interface between the MB and BP to transmit them to the CPLD of the hard drive backplane to ensure compatibility with hard drive control under different platforms and configurations. Meanwhile, the BP CPLD also needs to transmit the platform type information and configuration information to the BMC of the MB via the bus. This can save the BMC's I / O and help the BMC identify different configurations.

[0061] The rules for hard drive type identification are as follows: Table 1:

[0062] Table 1. Hard Disk Type Identification Rules

[0063]

[0064] The Platform ID definition rules are shown in Table 2 below (the ID bit width can be adjusted according to specific circumstances):

[0065] Table 2 Example Table of Platform ID Definition Rules

[0066]

[0067]

[0068] Taking a two-digit Config ID as an example, the configtype is defined as follows, as shown in Table 3:

[0069] Table 3

[0070]

[0071] This patent proposes a novel hard drive backplane design method that fully utilizes the abundant IO resources of CPLDs. By designing a single hard drive backplane, it enables support for cross-platform, multi-configuration server systems. During the R&D phase, designers and verification personnel only need to design and debug the functions of a single hard drive backplane to adapt to multiple platforms and configurations. This greatly saves labor costs. During the production phase, it can reduce the types of materials needed and save production personnel, thereby resulting in significant economic cost savings.

[0072] It should be noted that the above figures are merely illustrative of the processes included in the method according to exemplary embodiments of the present invention, and are not intended to be limiting. It is readily understood that the processes shown in the above figures do not indicate or limit the temporal order of these processes. Furthermore, it is readily understood that these processes may, for example, be executed synchronously or asynchronously in multiple modules.

[0073] It should be understood that although the above description follows a certain order, these steps are not necessarily executed in that order. Unless otherwise expressly stated herein, there is no strict order restriction on the execution of these steps, and they can be executed in other orders. Moreover, some steps in this embodiment may include multiple steps or multiple stages, which are not necessarily completed at the same time, but may be executed at different times. The execution order of these steps or stages is not necessarily sequential, but may be performed alternately or in turn with other steps or at least a portion of the steps or stages in other steps.

[0074] In a second aspect, the present invention also provides a hybrid hard drive backplane design system that is compatible with multiple platforms. Figure 3 A schematic block diagram of an embodiment of a hybrid hard disk backplane design system adapted to multiple platforms according to the present invention is shown. Figure 3 As shown, the system includes:

[0075] Information transmission module 100 is used to transmit platform type information and configuration information to the CPLD on the backplane based on the motherboard;

[0076] The information encoding module 200 is used by the CPLD on the backplane to encode platform information and configuration information;

[0077] The type determination module 300 is used to connect the signal on the hard drive slot that indicates the presence of the solid-state drive to the CPLD device, to distinguish the hard drive type and determine whether the hard drive is present, and to transmit the corresponding hard drive type and presence information to the BMC and BIOS to assist in determining hard drive-related information.

[0078] The hard disk control module 400 is used to build logic circuits inside the CPLD to control the hard disk, distinguishing between different platforms and configurations.

[0079] In this embodiment of the invention, the hybrid hard disk backplane design system adapted to multiple platforms further includes: a hard disk type recording module, which is used to build logic circuits inside the CPLD, distinguish the hard disk types, and record the hard disk types.

[0080] In this embodiment of the invention, the hybrid hard drive backplane design system adapted to multiple platforms further includes: a type transmission module, used to transmit data to the BMC and BIOS via a bus to assist the BMC and BIOS in determining the type of hard drive.

[0081] In this embodiment of the invention, the multi-platform hybrid hard disk backplane design system further includes: an ID signal transmission module, used for the MB to receive ID signals representing platform type and configuration type ID signals, and transmit them to the CPLD of the hard disk backplane through the sideband interface between the MB and BP.

[0082] In the multi-platform hybrid hard drive backplane design system of this invention, the abundant IO resources of the hard drive backplane CPLD are utilized. By using the motherboard to transmit platform type and configuration information, cross-platform and cross-configuration support of a single hard drive backplane can be achieved. By connecting the presence signal on the hard drive slot to the CPLD, the hard drive type can be distinguished. Under the same platform, logic circuits are built inside the CPLD to distinguish different configuration information, hard drive types and presence status, and transmit them to the BMC and BIOS devices through the bus. This saves the scarce IO resources of the BMC and BIOS. A single hard drive backplane can achieve cross-platform and multi-configuration support, which can greatly save economic and personnel costs.

[0083] The hybrid hard disk backplane design system adapted to multiple platforms in this invention utilizes the rich logic resources of the CPLD device on the hard disk backplane to distinguish between different platforms and configurations, as well as different hard disk types. This enables the system to achieve compatibility with multiple server system configurations using a single hard disk backplane, saving costs and improving personnel efficiency.

[0084] It should be noted that although several modules or units of the device for performing actions have been mentioned in the detailed description above, this division is not mandatory. In fact, according to embodiments of the present invention, the features and functions of two or more modules or units described above can be embodied in one module or unit. Conversely, the features and functions of one module or unit described above can be further divided and embodied by multiple modules or units.

[0085] A third aspect of the present invention also provides a computer device 1000, including a memory 1001 and a processor 1002, wherein the memory stores a computer program, which, when executed by the processor, implements the method of any of the above embodiments.

[0086] like Figure 4 The diagram shown is a hardware structure schematic of an embodiment of a computer device implementing a hybrid hard disk backplane design method adapted to multiple platforms, as provided by the present invention. Figure 4 Taking the computer device 1000 shown as an example, this computer device includes a processor 1002 and a memory 1001, and may also include an input device 430 and an output device 440. The processor 1002, memory 1001, input device 430, and output device 440 can be connected via a bus or other means. Figure 4 Taking a bus connection as an example, input device 430 can receive input digital or character information, and generate signal inputs related to hybrid hard drive backplane designs adapted to multiple platforms. Output device 440 may include display devices such as a display screen.

[0087] Memory 1001, as a non-volatile computer-readable storage medium, can be used to store non-volatile software programs, non-volatile computer-executable programs, and modules, such as the program instructions / modules corresponding to the multi-platform hybrid hard disk backplane design method in this embodiment. Memory 1001 may include a program storage area and a data storage area, wherein the program storage area may store the operating system and application programs required for at least one function; the data storage area may store data created by using the multi-platform hybrid hard disk backplane design method, etc. In addition, memory 1001 may include high-speed random access memory and may also include non-volatile memory, such as at least one disk storage device, flash memory device, or other non-volatile solid-state storage device. In some embodiments, memory 1001 may optionally include memory remotely located relative to processor 1002, and these remote memories can be connected to the local module via a network. Examples of such networks include, but are not limited to, the Internet, corporate intranets, local area networks, mobile communication networks, and combinations thereof.

[0088] In some embodiments, processor 1002 may be a central processing unit (CPU), controller, microcontroller, microprocessor, or other data processing chip. Processor 1002 is typically used to control the overall operation of computer device 1000. In this embodiment, processor 1002 is used to run program code stored in memory 1001 or process data. In this embodiment, the processors 1002 of multiple computer devices 1000 execute various server functions and data processing by running non-volatile software programs, instructions, and modules stored in memory 1001, thus implementing the multi-platform hybrid hard disk backplane design method of the above-described method embodiment, including the following steps:

[0089] The motherboard transmits platform type information and configuration information to the CPLD on the backplane.

[0090] The CPLD on the backplane encodes platform information and configuration information;

[0091] The signal on the hard drive slot that indicates the presence of the solid-state drive is connected to the CPLD device to distinguish the hard drive type and determine whether the hard drive is present. It also transmits the corresponding hard drive type and presence information to the BMC and BIOS to assist in determining hard drive-related information.

[0092] Logic circuits are built inside the CPLD to differentiate between different platforms and configurations, and to control the hard drive.

[0093] Through the above description of the embodiments, those skilled in the art can clearly understand that each embodiment can be implemented by means of software plus a general-purpose hardware platform, and of course, it can also be implemented by hardware. Those skilled in the art will understand that all or part of the processes in the methods of the above embodiments can be implemented by a computer program instructing related hardware. The program can be stored in a computer-compatible storage medium. When the program is executed, it can include the processes of the embodiments of the above methods, that is, the method for implementing the hybrid hard disk backplane design method adapted to multiple platforms according to the above method embodiments, including the following steps:

[0094] The motherboard transmits platform type information and configuration information to the CPLD on the backplane.

[0095] The CPLD on the backplane encodes platform information and configuration information;

[0096] The signal on the hard drive slot that indicates the presence of the solid-state drive is connected to the CPLD device to distinguish the hard drive type and determine whether the hard drive is present. It also transmits the corresponding hard drive type and presence information to the BMC and BIOS to assist in determining hard drive-related information.

[0097] Logic circuits are built inside the CPLD to differentiate between different platforms and configurations, and to control the hard drive.

[0098] A fourth aspect of the present invention also provides a computer-readable storage medium. Figure 5 A schematic diagram of a computer-readable storage medium illustrating a hybrid hard disk backplane design method adapted to multiple platforms according to an embodiment of the present invention is shown. Figure 5 As shown, the computer-readable storage medium 2000 stores computer program instructions 2001, which can be executed by a processor. When the computer program instructions 2001 are executed, they implement the method of any of the above embodiments, that is, implement the hybrid hard disk backplane design method adapted to multiple platforms of the above method embodiments, including the following steps:

[0099] The motherboard transmits platform type information and configuration information to the CPLD on the backplane.

[0100] The CPLD on the backplane encodes platform information and configuration information;

[0101] The signal on the hard drive slot that indicates the presence of the solid-state drive is connected to the CPLD device to distinguish the hard drive type and determine whether the hard drive is present. It also transmits the corresponding hard drive type and presence information to the BMC and BIOS to assist in determining hard drive-related information.

[0102] Logic circuits are built inside the CPLD to differentiate between different platforms and configurations, and to control the hard drive.

[0103] It should be understood that, without conflict, all the embodiments, features and advantages described above for the hybrid hard disk backplane design method adapted to multiple platforms according to the present invention are equally applicable to the hybrid hard disk backplane design system and storage medium adapted to multiple platforms according to the present invention.

[0104] Those skilled in the art will also understand that the various exemplary logic blocks, modules, circuits, and algorithm steps described in conjunction with the disclosure herein can be implemented as electronic hardware, computer software, or a combination of both. To clearly illustrate this interchangeability between hardware and software, the functionality of various illustrative components, blocks, modules, circuits, and steps has been generally described. Whether this functionality is implemented as software or as hardware depends on the specific application and the design constraints imposed on the system as a whole. Those skilled in the art can implement the functionality in various ways for each specific application, but such implementation decisions should not be construed as departing from the scope of the embodiments disclosed herein.

[0105] Finally, it should be noted that the computer-readable storage medium (e.g., memory) described herein can be volatile memory or non-volatile memory, or may include both volatile and non-volatile memory. By way of example, and not limitation, non-volatile memory may include read-only memory (ROM), programmable ROM (PROM), electrically programmable ROM (EPROM), electrically erasable programmable ROM (EEPROM), or flash memory. Volatile memory may include random access memory (RAM), which can act as external cache memory. By way of example, and not limitation, RAM can be obtained in various forms, such as synchronous RAM (DRAM), dynamic RAM (DRAM), synchronous DRAM (SDRAM), dual data rate SDRAM (DDRSDRAM), enhanced SDRAM (ESDRAM), synchronous link DRAM (SLDRAM), and direct Rambus RAM (DRRAM). The storage devices disclosed herein are intended to include, but are not limited to, these and other suitable types of memory.

[0106] The various exemplary logic blocks, modules, and circuits described herein can be implemented or performed using the following components designed to perform the functions herein: general-purpose processors, digital signal processors (DSPs), application-specific integrated circuits (ASICs), field-programmable gate arrays (FPGAs) or other programmable logic devices, discrete gate or transistor logic, discrete hardware components, or any combination of these components. A general-purpose processor may be a microprocessor, but alternatively, the processor may be any conventional processor, controller, microcontroller, or state machine. The processor may also be implemented as a combination of computing devices, such as a combination of a DSP and a microprocessor, multiple microprocessors, one or more microprocessors combined with a DSP, and / or any other such configuration.

[0107] In summary, this invention proposes a hybrid hard drive backplane design method, system, device, and medium adapted to multiple platforms. By designing a single hard drive backplane compatible with multiple platforms, configurations, and hard drive types, and utilizing the abundant logic and I / O resources of CPLD devices, cross-platform and cross-configuration compatibility and hard drive type identification are achieved, significantly reducing R&D and production costs.

[0108] In addition, this invention utilizes the internal logic circuitry of the CPLD device to distinguish hard disk types and record them before transmitting them to the BMC and BIOS via a bus. This assists the BMC and BIOS in determining the hard disk type. Simultaneously, the MB needs to receive ID signals representing the platform type and configuration type through the sideband interface between the MB and BP, which are transmitted to the CPLD on the hard disk backplane to ensure compatibility with hard disk control under different platforms and configurations. At the same time, the BP CPLD also needs to transmit platform type information and configuration information to the MB's BMC via the bus. This saves BMC I / O and helps the BMC identify different configurations.

[0109] This invention makes full use of the rich IO resources of CPLD and achieves support for cross-platform multi-configuration server systems by designing a hard disk backplane. In the R&D stage, designers and verification personnel only need to design and debug the function of a hard disk backplane to adapt to multiple platforms and multiple configurations, which greatly saves labor costs. In the production stage, it can save on the types of materials and production personnel, thereby greatly saving economic costs.

[0110] The above are exemplary embodiments disclosed in this invention. However, it should be noted that various changes and modifications can be made without departing from the scope of the embodiments of this invention as defined by the claims. The functions, steps, and / or actions of the methods according to the disclosed embodiments described herein do not need to be performed in any particular order. Furthermore, although the elements disclosed in the embodiments of this invention may be described or claimed individually, they may be understood as multiple unless explicitly limited to a singular number.

[0111] It should be understood that, as used herein, the singular form "a" is intended to include the plural form as well, unless the context clearly supports an exception. It should also be understood that, as used herein, "and / or" refers to any and all possible combinations of one or more of the associatedly listed items. The embodiment numbers disclosed above are for descriptive purposes only and do not represent the superiority or inferiority of the embodiments.

[0112] Those skilled in the art should understand that the discussion of any of the above embodiments is merely exemplary and is not intended to imply that the scope of the invention (including the claims) is limited to these examples. Within the framework of the invention, technical features of the above embodiments or different embodiments can be combined, and many other variations of different aspects of the invention exist, which are not provided in the details for the sake of brevity. Therefore, any omissions, modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of the invention should be included within the protection scope of the invention.

Claims

1. A hybrid hard drive backplane design method adaptable to multiple platforms, characterized in that, Includes the following steps: Based on the motherboard, platform type information and configuration information are transmitted to the CPLD on the backplane through the sideband interface between the motherboard and the backplane. The CPLD on the backplane encodes platform information and configuration information; The signal on the hard drive slot that indicates the presence of the solid-state drive is connected to the CPLD device to distinguish the hard drive type and determine whether the hard drive is present. It also transmits the corresponding hard drive type and presence information to the BMC and BIOS to assist in determining hard drive-related information. Logic circuits are built inside the CPLD to differentiate between different platforms and configurations, and to control the hard drive.

2. The hybrid hard drive backplane design method for adapting to multiple platforms according to claim 1, characterized in that, The CPLD incorporates logic circuitry to distinguish between different types of hard drives and records these types.

3. The hybrid hard drive backplane design method for adapting to multiple platforms according to claim 2, characterized in that, In the hybrid hard drive backplane design method adapted to multiple platforms, after recording the hard drive type, it also includes: transmitting the data to the BMC and BIOS via a bus to assist the BMC and BIOS in determining the hard drive type.

4. The hybrid hard drive backplane design method for adapting to multiple platforms according to any one of claims 1 to 3, characterized in that, In the aforementioned hybrid hard drive backplane design method adapted to multiple platforms, based on the motherboard, the platform type information and configuration information are transmitted to the CPLD of the backplane through the sideband interface between the motherboard and the backplane, including: The MB receives the ID signal representing the platform type and the ID signal representing the configuration type, which are transmitted to the CPLD on the hard drive backplane through the sideband interface between the MB and BP.

5. The hybrid hard drive backplane design method for adapting to multiple platforms according to claim 4, characterized in that, The hybrid hard drive backplane design method adapted to multiple platforms also includes: The BP CPLD transmits platform type information and configuration information to the MB's BMC via the bus, saving BMC I / O and helping the BMC identify different configurations.

6. A hybrid hard drive backplane design system adaptable to multiple platforms, characterized in that, include: The information transmission module is used to transmit platform type information and configuration information to the CPLD on the backplane via the sideband interface between the motherboard and the backplane. The information encoding module is used by the CPLD on the backplane to encode platform information and configuration information; The type determination module is used to connect the signal indicating the presence of the solid-state drive on the hard drive slot to the CPLD device, which is used to distinguish the hard drive type and determine whether the hard drive is present, and to transmit the corresponding hard drive type and presence information to the BMC and BIOS to assist in determining hard drive-related information. The hard disk control module is used to build logic circuits inside the CPLD to control the hard disk, distinguishing between different platforms and configurations.

7. The hybrid hard drive backplane design system adaptable to multiple platforms according to claim 6, characterized in that, The system also includes a hard disk type recording module, which is used to build logic circuits inside the CPLD to distinguish hard disk types and record them.

8. The hybrid hard drive backplane design system adaptable to multiple platforms according to claim 7, characterized in that, The system also includes a type transfer module, which is used to pass information via the bus to the BMC and BIOS to assist the BMC and BIOS in determining the type of hard drive.

9. A computer device, comprising a memory and a processor, characterized in that, The memory stores a computer program, which, when executed by the processor, performs the hybrid hard disk backplane design method adapted to multiple platforms as described in any one of claims 1-5.

10. A computer-readable storage medium, characterized in that, The device stores computer program instructions, which, when executed, implement the hybrid hard disk backplane design method for adapting to multiple platforms as described in any one of claims 1-5.

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