Method for forming a semiconductor structure

Abstract

A method for forming a semiconductor structure includes: providing a substrate including a substrate and a first fin material layer on the substrate, including a first device region and a second device region; forming a core layer on the first fin material layer in the first device region; forming a first mask sidewall on the sidewall of the core layer; etching the first fin material layer using the first mask sidewall and the core layer as masks to form an initial fin; forming a second fin material layer on the substrate exposed by the initial fin, the second fin material layer having a different material from the first fin material layer; removing the core layer after forming the second fin material layer; after removing the core layer, forming a second mask sidewall on the sidewall of the first mask sidewall; removing the first mask sidewall; after removing the first mask sidewall, etching the initial fin and the second fin material layer using the second mask sidewall as a mask, the initial fin being patterned into a first fin, and the second fin material layer being patterned into a second fin. The present invention selects different fin materials to meet the performance requirements of different devices.

Description

Technical Field

[0001] Embodiments of the present invention relate to the field of semiconductor manufacturing, and in particular, to a method for forming a semiconductor structure. Background Art

[0002] With the rapid development of semiconductor manufacturing technology, semiconductor devices are evolving towards higher component density and higher integration. Transistors, as one of the basic semiconductor devices, are currently widely used. Therefore, as the density and integration of semiconductor devices increase, the gate size of planar transistors becomes shorter and shorter. The traditional planar transistors have a weakened ability to control the channel current, resulting in the short-channel effect, an increase in leakage current, and ultimately affecting the electrical performance of semiconductor devices.

[0003] To better adapt to the reduction of feature size, semiconductor processes have gradually started to transition from planar MOSFETs to three-dimensional transistors with higher efficiency, such as fin field-effect transistors (FinFETs). However, in the situation of further reducing feature size, it is difficult to further improve the performance of fin field-effect transistors. Summary of the Invention

[0004] The problem solved by the embodiments of the present invention is to provide a method for forming a semiconductor structure to improve the performance of the semiconductor structure.

[0005] To solve the above problems, embodiments of the present invention provide a method for forming a semiconductor structure, including: providing a substrate including a substrate and a first fin material layer on the substrate, the substrate including a first device region for forming a first transistor and a second device region for forming a second transistor; forming a core layer on the first fin material layer in the first device region; forming a first mask sidewall on the sidewall of the core layer; using the first mask sidewall and the core layer as masks to etch the first fin material layer, and forming a raised initial fin on the remaining substrate in the first device region; forming a second fin material layer on the remaining substrate exposed by the initial fin, the second fin material layer covering the sidewall of the initial fin, and the materials of the second fin material layer and the first fin material layer being different; after forming the second fin material layer, removing the core layer; after removing the core layer, forming a second mask sidewall on the sidewall of the first mask sidewall; removing the first mask sidewall; after removing the first mask sidewall, using the second mask sidewall as a mask to etch the initial fin and the second fin material layer, patterning the initial fin into a first fin protruding from the substrate in the first device region, and patterning the second fin material layer into a second fin protruding from the substrate in the second device region.

[0006] Compared with the prior art, the technical solutions of the embodiments of the present invention have the following advantages:

[0007] In the formation method provided by the embodiment of the present invention, the materials of the second fin material layer and the first fin material layer are different. Using the second mask sidewall as a mask, the initial fin and the second fin material layer are etched, the initial fin is patterned into a first fin protruding from the substrate in the first device region, and the second fin material layer is patterned into a second fin protruding from the substrate in the second device region. In this embodiment, the materials of the first fin and the second fin are different, so that different fin materials can be selectively used to meet the performance requirements of the first transistor and the second transistor respectively, improve the performance of different transistors, and further improve the working performance of the semiconductor structure. Description of the Drawings

[0008] Figures 1 to 14 It is a schematic structural diagram corresponding to each step in an embodiment of the formation method of the semiconductor structure of the present invention. Detailed Embodiments

[0009] According to the background art, with the rapid development of semiconductor manufacturing technology, semiconductor devices are developing towards higher element density and higher integration. At present, it is difficult for the current semiconductor structure to further improve the working performance in the situation of further reducing the feature size, and it is difficult to meet different requirements for different transistors.

[0010] To solve the above technical problems, an embodiment of the present invention provides a method for forming a semiconductor structure, including: providing a substrate including a substrate and a first fin material layer on the substrate, the substrate including a first device region for forming a first transistor and a second device region for forming a second transistor; forming a core layer on the first fin material layer in the first device region; forming a first mask sidewall on the sidewall of the core layer; using the first mask sidewall and the core layer as masks to etch the first fin material layer, and forming a protruding initial fin on the remaining substrate in the first device region; forming a second fin material layer on the remaining substrate exposed by the initial fin, the second fin material layer covering the sidewall of the initial fin, and the materials of the second fin material layer and the first fin material layer being different; after forming the second fin material layer, removing the core layer; after removing the core layer, forming a second mask sidewall on the sidewall of the first mask sidewall; removing the first mask sidewall; after removing the first mask sidewall, using the second mask sidewall as a mask to etch the initial fin and the second fin material layer, patterning the initial fin into a first fin protruding from the substrate in the first device region, and patterning the second fin material layer into a second fin protruding from the substrate in the second device region.

[0011] In the forming method provided by the embodiment of the present invention, the materials of the second fin material layer and the first fin material layer are different. Using the second mask sidewall as a mask, the initial fin and the second fin material layer are etched, the initial fin is patterned into a first fin protruding from the substrate in the first device region, and the second fin material layer is patterned into a second fin protruding from the substrate in the second device region. In this embodiment, the materials of the first fin and the second fin are different, so that different fin materials can be selectively used, enabling the first fin and the second fin to respectively meet the performance requirements of the first transistor and the second transistor, thereby improving the performance of different transistors and further enhancing the working performance of the semiconductor structure.

[0012] To make the above objects, features, and advantages of the present invention more apparent and understandable, the following detailed description of the specific embodiments of the present invention is provided with reference to the accompanying drawings.

[0013] Figures 1 to 14 It is a schematic structural diagram corresponding to each step in an embodiment of the forming method of the semiconductor structure of the present invention.

[0014] Reference Figure 1 , a substrate (not labeled) is provided, including a substrate 100 and a first fin material layer 110 located on the substrate 100. The substrate includes a first device region 100A for forming a first transistor and a second device region 100B for forming a second transistor.

[0015] The substrate provides a process operation basis for the forming process of the semiconductor structure. Among them, the semiconductor structure includes fin field effect transistors.

[0016] In this embodiment, the substrate includes a substrate 100 and a first fin material layer 110 located on the substrate 100. The first fin material layer 110 is used to form the first fin and the second fin subsequently.

[0017] In this embodiment, the material of the substrate 100 is silicon. In other embodiments, the material of the substrate can also be one or more of germanium, silicon germanide, silicon carbide, gallium arsenide, and indium gallium. The substrate can also be other types of substrates such as a silicon-on-insulator substrate or a germanium-on-insulator substrate. The material of the substrate can be a material suitable for process requirements or easy to integrate.

[0018] In this embodiment, the material of the first fin material layer 110 includes silicon, germanium, silicon germanide, or a III-V group semiconductor material.

[0019] In this embodiment, the first fin material layer 110 and the substrate 100 are of an integral structure. In other embodiments, the first fin material layer may also be a semiconductor layer epitaxially grown on the substrate, so as to achieve the purpose of precisely controlling the height of the first fin material layer.

[0020] In this embodiment, the material of the first fin material layer 110 is the same as that of the substrate 100, and the material of the first fin material layer 110 is silicon. In other embodiments, the material of the first fin material layer may also be different from that of the substrate to meet the material requirements of the first fin material layer.

[0021] In this embodiment, the substrate includes a first device region 100A for forming a first transistor and a second device region 100B for forming a second transistor, and the channel conduction types of the first transistor and the second transistor are different.

[0022] As an example, the first transistor is an NMOS transistor and the second transistor is a PMOS transistor.

[0023] In this embodiment, a first mask material layer 200 is further formed on the top of the first fin material layer 110.

[0024] The first mask material layer 200 is used to form a first mask layer subsequently.

[0025] In this embodiment, the material of the first mask material layer 200 includes one or more of silicon oxide and silicon nitride, that is, the first mask material layer 200 may be a single-layer structure or a stacked-layer structure. As an example, the material of the first mask material layer 200 is silicon oxide and silicon nitride, that is, the first mask material layer 200 is a stacked-layer structure, including a silicon nitride material layer 210 and a silicon oxide material layer 220 covering the silicon nitride material layer 210.

[0026] Continue to refer to Figure 1 , a core layer 300 is formed on the first fin material layer 110 in the first device region 100A.

[0027] Specifically, the core layer 300 is formed on the first mask material layer 200 in the first device region 100A.

[0028] The core layer 300 provides support for forming a first mask sidewall on the sidewall of the core layer 300 subsequently.

[0029] Subsequently, the core layer 300 will also be removed. Therefore, the material of the core layer 300 is a material that is easy to be removed, thereby reducing the difficulty of removing the core layer 300 and reducing the damage to other film layers located below the core layer 300. Therefore, the material of the core layer 300 includes one or more of amorphous silicon, polysilicon, single crystal silicon, advanced patterning film (APF) material, spin on carbon (SOC), and silicon carbide. In this embodiment, the core layer 300 is an advanced patterning film material.

[0030] With reference to Figure 2 and Figure 3 , a first mask sidewall 410 is formed on the sidewall of the core layer 300.

[0031] The first mask sidewall 410 is used as an etching mask for etching the first fin material layer 110 together with the core layer 300 subsequently, and the first mask sidewall 410 is also used to provide support for forming a second mask sidewall on the sidewall of the first mask sidewall 410 subsequently.

[0032] The first mask sidewall 410 is made of a material having etching selectivity with respect to the core layer 300. In this embodiment, the material of the first mask sidewall 410 includes silicon nitride.

[0033] Specifically, with reference to Figure 2 , the step of forming the first mask sidewall 410 includes: forming a first mask sidewall material layer 400 that conformally covers the top and sidewalls of the core layer 300 and the top of the first fin material layer 410.

[0034] The first mask sidewall material layer 400 is used to form the first mask sidewall 410.

[0035] In this embodiment, the first mask sidewall material layer 400 is formed by atomic layer deposition process.

[0036] The first mask sidewall material layer 400 formed by atomic layer deposition process has good thickness uniformity and good step coverage ability, so that the first mask sidewall material layer 400 can conformally cover the top and sidewalls of the core layer 300 and the top of the first fin material layer 410 well.

[0037] In this embodiment, the material of the first mask sidewall material layer 400 includes silicon nitride and is used to directly form the first mask sidewall 410.

[0038] With reference to Figure 3, remove the first mask sidewall material layer 400 on top of the core layer 300 and on top of the first fin material layer 110, and retain the first mask sidewall material layer 400 on the sidewall of the core layer 300 as the first mask sidewall 410.

[0039] Remove the first mask sidewall material layer 400 on top of the core layer 300 and on top of the first fin material layer 110 to prepare for subsequent pattern transfer with the sidewall 350 and the core layer 300 as etching masks, and can better expose the top surface of the core layer 300, thereby reducing the process difficulty of subsequent removal of the core layer 300.

[0040] In this embodiment, a dry etching process is used to remove the first mask sidewall material layer 400 on top of the core layer 300 and on top of the first fin material layer 110.

[0041] The dry etching process has the characteristics of anisotropic etching. Therefore, by selecting the dry etching process, it is beneficial to reduce the damage to the first fin material layer 110. At the same time, the dry etching has more etching directionality, which is beneficial to improving the sidewall morphology quality and dimensional accuracy of the first mask sidewall 410.

[0042] Reference Figure 4 , using the first mask sidewall 410 and the core layer 300 as masks, etch the first fin material layer 110 to form a raised initial fin 130 on the remaining substrate in the first device region 100A.

[0043] The raised initial fin 130 is used to form the first fin subsequently, and the remaining substrate exposed by the raised initial fin 130 is used to form the second fin material layer subsequently.

[0044] In this embodiment, before the step of etching the first fin material layer 110, it further includes: using the first mask sidewall 410 and the core layer 300 as masks, etching the first mask material layer 200 to form a first mask layer 250.

[0045] Correspondingly, using the first mask layer 250 as a mask, etch the first fin material layer 110 to form an initial fin 130.

[0046] In this embodiment, the first mask layer 250 includes a silicon nitride layer 230 and a silicon oxide layer 240 covering the silicon nitride layer 230.

[0047] In this embodiment, in the step of etching the first fin material layer 110, a part of the thickness of the first fin material layer 110 is removed.

[0048] After forming a second fin material layer on the remaining substrate where the initial fin portion 130 is exposed subsequently, the second fin material layer will also be etched. The patterned second fin material layer is used to form a second fin. Generally, only a part of the height of the fin serves as an effective fin. That is to say, a part of the height of the second fin does not function as an effective fin. Therefore, in the second fin, it is only necessary to ensure that the part of the height of the second fin used as an effective fin is formed by the second fin material layer. In this embodiment, a part of the thickness of the first fin material layer 110 is removed. While providing a part of the height of the second fin used as an effective fin, the remaining part of the thickness of the first fin material layer 110 is retained for subsequent formation of the part that does not need to be an effective fin, reducing the etching amount of the first fin material layer 110 and saving the material of the second fin material layer, thereby saving the process cost and improving the process efficiency.

[0049] It should be noted that in the step of removing a part of the thickness of the first fin material layer, the thickness d of the part of the thickness of the first fin material layer removed cannot be too large or too small. If the thickness d of the part of the thickness of the first fin material layer removed is too large, the thickness of the subsequently formed second fin material layer will be too large, which is likely to cause unnecessary process waste; if the thickness d of the part of the thickness of the first fin material layer removed is too small, the thickness of the subsequently formed second fin material layer will be too small, and it is easy to cause the part of the second fin formed subsequently that is used as an effective fin to contain the material of the first fin material layer 110, making it difficult to meet the working performance of the second device region 100B. Therefore, in this embodiment, in the step of removing a part of the thickness of the first fin material layer 110, the thickness d of the part of the thickness of the first fin material layer 110 removed is to

[0050] In this embodiment, in the step of etching the first fin material layer 110, the first fin material layer 110 is etched using a dry etching process.

[0051] The dry etching process has the characteristic of anisotropic etching. Therefore, by selecting the dry etching process, it is beneficial to control the etching amount and reduce the damage to the remaining substrate. At the same time, the dry etching has more etching directionality, which is beneficial to improving the sidewall morphology quality and dimensional accuracy of the formed protruding initial fin portion 130.

[0052] Refer to Figure 5 , a second fin material layer 120 is formed on the remaining substrate where the initial fin portion 130 is exposed. The second fin material layer 120 covers the sidewalls of the initial fin portion 130, and the materials of the second fin material layer 120 and the first fin material layer 110 are different.

[0053] Subsequently, the first fin material layer 110 is used to form the first fin, and the second fin material layer 120 is used to form the second fin and provide the part in the second fin that is used as the effective fin. In this embodiment, the materials of the second fin material layer 120 and the first fin material layer 110 are different, so that different fin materials can be selected specifically, enabling the first fin and the second fin to be used to meet the performance requirements of the first transistor and the second transistor respectively, thereby improving the performance of different transistors, and further facilitating the improvement of the working performance of the semiconductor structure.

[0054] In this embodiment, in the step of forming the second fin material layer 120 on the remaining substrate exposed by the initial fin 130, the second fin material layer 120 covers the first fin material layer 110 with the remaining part of the thickness.

[0055] In this embodiment, in the step of forming the second fin material layer 120, the second fin material layer 120 is formed by an epitaxial growth process.

[0056] The epitaxial growth process can better control the process parameters, has a high process controllability, is easy to obtain a more accurate film thickness dimension, and the epitaxial growth process is easy to form a film layer with fewer impurities, making the quality of the second fin material layer 120 higher.

[0057] In this embodiment, in the step of forming the second fin material layer 120, the material of the second fin material layer 120 includes silicon, germanium, silicon germanide or group III-V semiconductor materials. As an example, in this embodiment, the material of the second fin material layer 120 is silicon germanide.

[0058] Specifically, in this embodiment, the first transistor is an NMOS transistor, the second transistor is a PMOS transistor, the first fin material layer 110 is used to form the effective fin of the NMOS transistor, the second fin material layer 120 is used to form the effective fin of the PMOS transistor, the material of the first fin material layer 110 is silicon, and the material of the second fin material layer 120 is silicon germanide. Since the lattice constant of germanium element is relatively large, the formed silicon germanide is prone to generate a relatively large compressive stress. Therefore, using silicon germanide as the material of the second fin material layer 120 can provide a relatively large compressive stress. Also, the second fin material layer 120 is used to form the effective fin of the PMOS transistor, and a relatively large compressive stress is beneficial to improving the hole mobility in the PMOS region, and further beneficial to improving the working performance of the semiconductor structure.

[0059] With reference to Figure 6 and Figure 7, after forming the second fin material layer 120 on the remaining substrate where the initial fin portion 130 is exposed, it further includes: forming a second mask layer 270 on top of the second fin material layer 120, the second mask layer 270 covering the sidewalls of the first mask layer 250, and the top of the second mask layer 270 being flush with the top of the first mask layer 250.

[0060] The second mask layer 270 is used to serve as an etching mask for forming the first fin and the second fin together with the first mask layer 250 in the subsequent process, and the top of the second mask layer 270 is flush with the top of the first mask layer 250, providing a relatively flat process platform for the subsequent forming process.

[0061] In this embodiment, the material of the second mask layer 270 includes silicon oxide.

[0062] Specifically, referring to Figure 6 , the step of forming the second mask layer 270 on top of the second fin material layer 120 includes: forming a second mask material layer 260 on the second fin material layer 120, covering the sidewalls of the first mask layer 250, the sidewalls of the first mask sidewall 410, and the top of the core layer 300.

[0063] The second mask material layer 260 is used to form the second mask layer 270.

[0064] In this embodiment, the second mask material layer 260 is formed by a chemical vapor deposition process.

[0065] The chemical vapor deposition process has good filling and covering properties, can better fill and cover the first mask sidewall 410 and the core layer 300, and the second mask material layer 260 formed by the chemical vapor deposition process has good uniformity, providing a good basis for forming the second mask layer 270 in the subsequent process.

[0066] In this embodiment, the material of the second mask material layer 260 includes silicon oxide and is used to directly form the second mask layer 270.

[0067] Referring to Figure 7 , etch back a part of the thickness of the second mask material layer 260, and retain the second mask material layer 260 covering the sidewalls of the first mask layer 250 as the second mask layer 270.

[0068] Adopting the method of first forming the second mask material layer 260 and then etch back a part of the thickness of the second mask material layer 260 to form the second mask layer 270, compared with the scheme of directly forming the second mask layer 270, this scheme can better control the process parameters, has a higher process controllability, and is easy to obtain a more accurate thickness dimension of the second mask layer 270.

[0069] In this embodiment, a dry etching process is used to etch back a part of the thickness of the second mask material layer 260.

[0070] The dry etching process has the characteristic of anisotropic etching. Therefore, by selecting the dry etching process, it is beneficial to reduce the damage to the first mask sidewall 410. At the same time, the dry etching has more etching directionality, which is beneficial to improving the morphology quality and dimensional accuracy of the formed second mask layer 270.

[0071] Subsequently, it is also necessary to remove the core layer 300.

[0072] With reference to Figure 8 and Figure 9 , after forming the second fin material layer 120 and before removing the core layer 300, it further includes: forming a third mask sidewall 510 on the sidewall of the first mask sidewall 410 facing away from the core layer 300.

[0073] The third mask sidewall 510 is used to support the formation of the second mask sidewall together with the first mask sidewall 410 in the subsequent process. And, previously, the first fin material layer 110 is etched using the first mask sidewall 410 and the core layer 300 as a mask together. Then, the sidewall of the first mask sidewall 410 facing away from the core layer 300 is flush with the sidewall of the initial fin 130. That is to say, the sidewall of the first mask sidewall 410 facing away from the core layer 300 is flush with the interface between the first fin material layer 110 and the second fin material layer 120. In this embodiment, by forming the third mask sidewall 510 on the sidewall of the first mask sidewall 410 facing away from the core layer 300 and then using the first mask sidewall 410 and the third mask sidewall 510 together as the support for forming the second mask sidewall, the situation where the second mask sidewall is formed at the interface between the first fin material layer 110 and the second fin material layer 120 is largely avoided. Thus, when forming the first fin and the second fin using the second mask sidewall as a mask subsequently, it is beneficial to avoid forming the second fin at the position of the interface between the first fin material layer 110 and the second fin material layer 120, and improve the formation quality of the second fin.

[0074] In addition, through the third mask sidewall 510, the interval between adjacent first fins and second fins in the subsequent process can meet the process requirements.

[0075] In this embodiment, the third mask sidewall 510 is made of a material that has an etching selectivity with respect to the core layer 300, and the material of the third mask sidewall 510 includes silicon oxide.

[0076] Specifically, with reference to Figure 8, the steps of forming the third mask sidewall 510 include: forming a third mask sidewall material layer 500 that conformally covers the sidewall of the first mask sidewall 410 facing away from the core layer 300, the top of the first mask sidewall 410, the top of the core layer 300, and the top of the second fin material layer 120.

[0077] The third mask sidewall material layer 500 is used to form the third mask sidewall layer 510.

[0078] In this embodiment, the third mask sidewall material layer 500 is formed by an atomic layer deposition process.

[0079] The third mask sidewall material layer 500 formed by the atomic layer deposition process has good thickness uniformity and good step coverage ability, so that the third mask sidewall material layer 500 can conformally cover the sidewall of the first mask sidewall 410 facing away from the core layer 300, the top of the first mask sidewall 410, the top of the core layer 300, and the top of the second fin material layer 120 well.

[0080] In this embodiment, the material of the third mask sidewall material layer 500 includes silicon oxide and is used to directly form the third mask sidewall 510.

[0081] Reference Figure 9 , removing the third mask sidewall material layer 500 located on the top of the first mask sidewall 410, the top of the core layer 300, and the top of the second fin material layer 120, and retaining the third mask sidewall material layer 500 located on the sidewall of the first mask sidewall 410 facing away from the core layer 300 as the third mask sidewall 510.

[0082] Removing the third mask sidewall material layer 500 located on the top of the first mask sidewall 410, the top of the core layer 300, and the top of the second fin material layer 120 prepares for forming the second mask layer on the sidewall of the third mask layer 510, and can better expose the top surface of the core layer 300, thereby reducing the process difficulty of removing the core layer 300 subsequently.

[0083] In this embodiment, a dry etching process is used to remove the third mask sidewall material layer 500 located on the top of the first mask sidewall 410, the top of the core layer 300, and the top of the second fin material layer 120.

[0084] The dry etching process has the characteristics of anisotropic etching. Therefore, by selecting the dry etching process, it is beneficial to reduce the damage to the second mask layer 270. At the same time, the dry etching has more etching directionality, which is beneficial to improving the sidewall morphology quality and dimensional accuracy of the third mask sidewall 510.

[0085] Reference Figure 10 After forming the second fin material layer 120, the core layer 300 is removed.

[0086] Removing the core layer 300 exposes the sidewalls of the first mask sidewall 410, preparing for the formation of the second mask sidewall.

[0087] In this embodiment, a wet etching process is used to remove the core layer 300.

[0088] The wet etching process has the characteristic of isotropic etching, which is beneficial to completely removing the core layer 300. At the same time, the wet etching process can provide good etching selectivity, which is beneficial to removing the core layer 300 while reducing damage to the first mask sidewall 410, the third mask sidewall 510, the first mask layer 250, and the second mask layer 270.

[0089] Combined with reference Figure 11 and Figure 12 , after removing the core layer 300, a second mask sidewall 610 is formed on the sidewalls of the first mask sidewall 410.

[0090] The second mask sidewall 610 is used as an etching mask for subsequent formation of the first fin and the second fin.

[0091] In this embodiment, the first mask sidewall 410 and the third mask sidewall 510 will be removed later. Then, the second mask sidewall 610 is selected to be made of a material that has etching selectivity with the first mask sidewall 410 and the third mask sidewall 510. The material of the second mask layer 610 includes amorphous silicon.

[0092] Specifically, referring to Figure 11 , the steps of forming the second mask sidewall 610 include: forming a second mask sidewall material layer 600 that conformally covers the sidewalls of the first mask sidewall 410, the top of the first mask sidewall 410, and the top of the second fin material layer 120.

[0093] The second mask sidewall material layer 600 is used to form the second mask sidewall 610.

[0094] In this embodiment, an atomic layer deposition process is used to form the second mask sidewall material layer 600.

[0095] The second mask sidewall material layer 600 formed by the atomic layer deposition process has good thickness uniformity and good step coverage ability, enabling the second mask sidewall material layer 600 to have a good conformal coverage effect.

[0096] In this embodiment, the material of the second mask sidewall material layer 600 includes amorphous silicon and is used to directly form the second mask sidewall 610.

[0097] In this embodiment, since a third mask sidewall 510 is formed on the sidewall of the first mask sidewall 410 facing away from the core layer 300, in the step of forming the second mask sidewall 610 on the sidewall of the first mask sidewall 410, the second mask sidewall 610 covers the sidewall of the first mask sidewall 410 facing away from the third mask sidewall 510 and the sidewall of the third mask sidewall 510 facing away from the first mask sidewall 410.

[0098] Correspondingly, in the step of forming the second mask sidewall material layer 600, the second mask sidewall material layer 600 conformally covers the sidewall of the first mask sidewall 410 facing away from the third mask sidewall 510, the sidewall of the third mask sidewall 510 facing away from the first mask sidewall 410, the tops of the first mask sidewall 410 and the third mask sidewall 510, and the top of the second fin material layer 120.

[0099] Reference Figure 12 , the second mask sidewall material layer 600 located on the tops of the first mask sidewall 410 and the third mask sidewall 510 and the top of the second fin material layer 120 is removed, and the second mask sidewall material layer 600 located on the sidewall of the first mask sidewall 410 facing away from the third mask sidewall 510 and the sidewall of the third mask sidewall 510 facing away from the first mask sidewall 410 is retained as the second mask sidewall 610.

[0100] In this embodiment, the second mask sidewall material layer 600 located on the tops of the first mask sidewall 410 and the third mask sidewall 510 and the top of the second fin material layer 120 is removed by a dry etching process.

[0101] Since the dry etching process has the characteristics of anisotropic etching, by selecting the dry etching process, it is beneficial to reduce the damage to the second mask layer 270. At the same time, the dry etching has more etching directionality, which is beneficial to improving the sidewall morphology quality and dimensional accuracy of the second mask sidewall 610.

[0102] Reference Figure 13 , the first mask sidewall 410 is removed.

[0103] Removing the first mask sidewall 410 prepares for forming the first fin and the second fin using the second mask sidewall 610 as a mask subsequently.

[0104] In this embodiment, the first mask sidewall 410 is removed by a wet etching process.

[0105] The wet etching process has the characteristic of isotropic etching, which is beneficial to completely removing the first mask sidewall 410. At the same time, the wet etching process can provide good etching selectivity, which is beneficial to removing the first mask sidewall 410 while reducing the damage to the second mask sidewall 610, the first mask layer 250 and the second mask layer 270.

[0106] Continue to refer to Figure 12 , after forming the second mask sidewall 610, before etching the initial fin 130, the second fin material layer 120 and the remaining first fin material layer 110 with the second mask sidewall 610 as a mask, it further includes: removing the third mask sidewall 510.

[0107] Removing the third mask sidewall 510 prepares for subsequent formation of the first fin and the second fin with the second mask sidewall 610 as a mask.

[0108] In this embodiment, a wet etching process is used to remove the third mask sidewall 510.

[0109] The wet etching process has the characteristic of isotropic etching, which is beneficial to completely removing the third mask sidewall 510. At the same time, the wet etching process can provide good etching selectivity, which is beneficial to removing the third mask sidewall 510 while reducing the damage to the second mask sidewall 610, the first mask layer 250 and the second mask layer 270.

[0110] Refer to Figure 14 , after removing the first mask sidewall 410, etching the initial fin 130 and the second fin material layer 120 with the second mask sidewall 610 as a mask, graphically converting the initial fin 130 into the first fin 700 protruding from the substrate 100 in the first device region 100A, and graphically converting the second fin material layer 120 into the second fin 800 protruding from the substrate 100 in the second device region 100B.

[0111] The first fin 700 is used to form the channel of the first transistor, and the second fin 800 is used to form the channel of the second transistor. Using different materials to form the channels of different transistors can respectively meet the performance requirements of the first transistor and the second transistor to improve the performance of different transistors, and thus is beneficial to improving the working performance of the semiconductor structure.

[0112] In this embodiment, the material of the first fin 700 is silicon, which is used to form the channel of the NMOS transistor, and the material of the second fin 800 is silicon germanide, which is used to form the channel of the PMOS transistor.

[0113] In this embodiment, during the process of etching the initial fin portion 130 and the second fin material layer 120 using the second mask sidewall 610 as a mask, the remaining portion of the second fin material layer 120 with a certain thickness is also etched. In the first device region 100A, the initial fin portion 130 and the remaining first fin material layer 110 are patterned into a first fin 700 protruding from the substrate 100. In the second device region 100B, the second fin material layer 120 and the remaining first fin material layer 110 are patterned into a second fin 800 protruding from the substrate 100.

[0114] Generally, only a part of the height of the fin is used as an effective fin. In this embodiment, among the first fins 700, in the first fins 700 formed by patterning the initial fin portion 130, a part of the first fins 700 is used as an effective fin. Among the second fins 800 formed by patterning the second fin material layer 120, the second fins 800 made of the same material as the second fin material layer 120 are used to provide effective fins, saving process costs and improving process efficiency.

[0115] Continue to refer to Figure 14 , before etching the initial fin portion 130 and the second fin material layer 120 using the second mask sidewall 610 as a mask, it further includes: etching the first mask layer 250 and the second mask layer 270 using the second mask sidewall 610 as a mask, and the remaining first mask layer 250 and second mask layer 270 serve as a fin mask layer 280.

[0116] The fin mask layer 280 is used as an etching mask for etching the initial fin portion 130 and the second fin material layer 120.

[0117] Therefore, in this embodiment, during the process of etching the initial fin portion 130 and the second fin material layer 120 using the second mask sidewall 610 as a mask, the fin mask layer 280 is also used as a mask.

[0118] During the process of etching the initial fin portion 130 and the second fin material layer 120 using the second mask sidewall 610 as a mask, using the fin mask layer 280 as a mask is beneficial to improving the accuracy of pattern transfer and forming the first fin 700 and the second fin 800 with higher dimensional accuracy.

[0119] In this embodiment, in the step of etching the initial fin portion 130 and the second fin material layer 120 using the second mask sidewall 610 as a mask, a dry etching process is used to etch the initial fin portion 130 and the second fin material layer 120.

[0120] The dry etching process has the characteristic of anisotropic etching. Therefore, by selecting the dry etching process, it is beneficial to reduce the damage to the substrate 100. At the same time, the dry etching has more etching directionality, which is beneficial to improving the sidewall morphology quality and dimensional accuracy of the first fin portion 700 and the second fin portion 800.

[0121] It should be noted that the fin mask layer 280 will be removed subsequently to form a gate structure spanning the first fin portion 700 and the second fin portion 800. The description of the subsequent steps is not elaborated in this embodiment.

[0122] Although the present invention is disclosed as above, the present invention is not limited thereto. Any person skilled in the art can make various changes and modifications without departing from the spirit and scope of the present invention. Therefore, the protection scope of the present invention should be determined by the scope defined by the claims.

Claims

1. A method for forming a semiconductor structure, characterized in that, Including: Providing a substrate, including a substrate and a first fin material layer located on the substrate, the substrate including a first device region for forming a first transistor and a second device region for forming a second transistor; Forming a core layer on the first fin material layer in the first device region; Forming a first mask sidewall on the sidewall of the core layer; Using the first mask sidewall and the core layer as masks to etch the first fin material layer, and forming a raised initial fin on the remaining substrate in the first device region; Forming a second fin material layer on the remaining substrate exposed in the second device region except for the initial fin, the second fin material layer covering the sidewall of the initial fin, and the material of the second fin material layer being different from that of the first fin material layer; After forming the second fin material layer, removing the core layer; After removing the core layer, forming a second mask sidewall on the sidewall of the first mask sidewall; Removing the first mask sidewall; After removing the first mask sidewall, using the second mask sidewall as a mask to etch the initial fin and the second fin material layer, patterning the initial fin into a first fin protruding from the substrate in the first device region, and patterning the second fin material layer into a second fin protruding from the substrate in the second device region.

2. The method for forming a semiconductor structure according to claim 1, wherein, In the step of providing the substrate, a first mask material layer is further formed on the top of the first fin material layer; Before the step of etching the first fin material layer, it further includes: using the first mask sidewall and the core layer as masks to etch the first mask material layer to form a first mask layer; After forming the second fin material layer on the remaining substrate exposed in the second device region except for the initial fin, it further includes: forming a second mask layer on the top of the second fin material layer, the second mask layer covering the sidewall of the first mask layer and being flush with the top of the first mask layer.

3. The method for forming a semiconductor structure according to claim 2, wherein, Before using the second mask sidewall as a mask to etch the initial fin and the second fin material layer, it further includes: using the second mask sidewall as a mask to etch the first mask layer and the second mask layer, and the remaining first mask layer and second mask layer serve as fin mask layers; During the process of using the second mask sidewall as a mask to etch the initial fin and the second fin material layer, the fin mask layer is also used as a mask.

4. The method for forming a semiconductor structure according to claim 2, wherein, The step of forming the second mask layer on the top of the second fin material layer includes: forming a second mask material layer on the second fin material layer to cover the sidewall of the first mask layer, the sidewall of the first mask sidewall, and the top of the core layer; Etching back a part of the thickness of the second mask material layer, and retaining the second mask material layer covering the sidewall of the first mask layer as the second mask layer.

5. The method for forming a semiconductor structure according to claim 1, wherein, Before removing the core layer after forming the second fin material layer, it further includes: forming a third mask sidewall on the sidewall of the first mask sidewall facing away from the core layer; In the step of forming the second mask sidewall on the sidewall of the first mask sidewall, the second mask sidewall covers the sidewall of the first mask sidewall facing away from the third mask sidewall and the sidewall of the third mask sidewall facing away from the first mask sidewall; After forming the second mask sidewall and before etching the initial fin portion, the second fin portion material layer, and the remaining first fin portion material layer using the second mask sidewall as a mask, it further includes: removing the third mask sidewall.

6. The method for forming a semiconductor structure according to claim 5, wherein, The step of forming the third mask sidewall includes: forming a conformal third mask sidewall material layer covering the sidewall of the first mask sidewall facing away from the core layer, the top of the first mask sidewall, the top of the core layer, and the top of the second fin portion material layer; Removing the third mask sidewall material layer located on the top of the first mask sidewall, the top of the core layer, and the top of the second fin portion material layer, and retaining the third mask sidewall material layer located on the sidewall of the first mask sidewall facing away from the core layer as the third mask sidewall.

7. The method for forming a semiconductor structure according to claim 1, wherein The step of forming the second mask sidewall includes: forming a conformal second mask sidewall material layer covering each sidewall of the first mask sidewall, the top of the first mask sidewall, and the top of the second fin portion material layer; Removing the second mask sidewall material layer located on the top of the first mask sidewall and the top of the second fin portion material layer, and retaining the second mask sidewall material layer located on the sidewall of the first mask sidewall as the second mask sidewall.

8. The method for forming a semiconductor structure according to claim 1, wherein, The step of forming the first mask sidewall includes: forming a conformal first mask sidewall material layer covering the top and sidewalls of the core layer and the top of the first fin portion material layer; Removing the first mask sidewall material layer located on the top of the core layer and the top of the first fin portion material layer, and retaining the first mask sidewall material layer located on the sidewall of the core layer as the first mask sidewall.

9. The method for forming a semiconductor structure according to claim 1, wherein, In the step of etching the first fin portion material layer, a portion of the thickness of the first fin portion material layer is removed. In the step of forming the second fin portion material layer on the remaining substrate exposed in the second device region except for the initial fin portion, the second fin portion material layer covers the remaining portion of the thickness of the first fin portion material layer. During the process of etching the initial fin portion and the second fin portion material layer using the second mask sidewall as a mask, the remaining portion of the thickness of the first fin portion material layer is also etched. In the first device region, the initial fin portion and the remaining first fin portion material layer are patterned into a first fin protruding from the substrate, and in the second device region, the second fin portion material layer and the remaining first fin portion material layer are patterned into a second fin protruding from the substrate.

10. The method for forming a semiconductor structure as described in claim 9, wherein, In the step of removing a partial thickness of the first fin material layer, the thickness of the removed partial thickness of the first fin material layer is 11. The method for forming a semiconductor structure according to claim 1, wherein In the step of etching the first fin portion material layer, the first fin portion material layer is etched using a dry etching process.

12. The method for forming a semiconductor structure according to claim 1, wherein, In the step of forming the second fin portion material layer, the second fin portion material layer is formed using an epitaxial growth process.

13. The method for forming a semiconductor structure as claimed in claim 1, wherein, In the step of etching the initial fin portion and the second fin portion material layer using the second mask sidewall as a mask, the initial fin portion and the second fin portion material layer are etched using a dry etching process.

14. The method for forming a semiconductor structure according to claim 4, wherein The second mask material layer is formed using a chemical vapor deposition process.

15. The method for forming a semiconductor structure according to claim 1, wherein, In the step of forming the first fin material layer, the material of the first fin material layer includes silicon, germanium, silicon germanide, or group III-V semiconductor material; in the step of forming the second fin material layer, the material of the second fin material layer includes silicon, germanium, silicon germanide, or group III-V semiconductor material.

16. The method for forming a semiconductor structure according to claim 1, wherein, In the step of forming the core layer, the material of the core layer includes amorphous silicon, polycrystalline silicon, single-crystalline silicon, advanced film material, spin-on carbon, and silicon carbide.

17. The method for forming a semiconductor structure according to claim 1, wherein In the step of forming the first mask sidewall, the material of the first mask sidewall includes silicon nitride; in the step of forming the second mask sidewall, the material of the second mask sidewall includes amorphous silicon.

18. The method for forming a semiconductor structure according to claim 5, wherein, In the step of forming the third mask sidewall, the material of the third mask sidewall includes silicon oxide.

19. The method for forming a semiconductor structure according to claim 2, wherein, In the step of forming the second mask layer, the material of the second mask layer includes silicon oxide.

20. The method for forming a semiconductor structure according to claim 1, wherein In the step of providing the substrate, the channel conduction types of the first transistor and the second transistor are different.

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