Magnetic tunnel junction (mtj) test structure and method of fabrication

Abstract

The application provides a MTJ test structure, comprising: a MTJ stack layer, having a first surface and a second surface arranged oppositely; a metal layer, electrically connected with the first surface of the MTJ stack layer; a first communication layer, arranged on the second surface of the MTJ stack layer, the first communication layer has a plurality of communication holes, and a first metal plug electrically connected with the second surface is arranged in the communication hole; a plurality of metal wires, arranged on a side surface of the first communication layer away from the MTJ stack layer, and the plurality of metal wires are electrically connected with the first metal plug one by one; and a plurality of test contacts, corresponding to the plurality of metal wires one by one, and the plurality of test contacts are electrically connected with the corresponding metal wires. The technical scheme provided by the application can complete the test of a plurality of parameters on a wafer acceptability test machine.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of memory, in particular to an MTJ test structure and a preparation method. BACKGROUND

[0002] Magnetic random access memory (MRAM) takes magnetic tunnel junction (MTJ) as a basic unit for information storage. The MTJ device is tested by using final wafer acceptance test, so that electrical parameters, magnetic parameters, reliability parameters and the like of the device can be obtained, and the in-plane current tunnel magnetoresistance change rate test system (CIPT) can be used to obtain electrical parameters such as magnetic resistance or resistance area product (RA) at the film layer or device layer. Both have advantages and disadvantages in the aspect of characterization means. The former cannot obtain related parameters such as magnetic resistance or RA at the MTJ film layer, while the latter cannot obtain final electrical parameters at the device layer.

[0003] In the process of implementing the present application, the inventors have found that at least the following technical problems exist in the prior art: In the process of testing the wafer, a single test structure cannot obtain comprehensive wafer parameters. SUMMARY

[0004] The MTJ test structure and the preparation method provided by the present application can obtain comprehensive wafer parameters by using a single test machine.

[0005] In a first aspect, the present application provides an MTJ test structure, comprising:

[0006] An MTJ stack having a first surface and a second surface arranged oppositely;

[0007] A metal layer electrically connected to the first surface of the MTJ stack;

[0008] A first communication layer arranged on the second surface of the MTJ stack, the first communication layer having a plurality of communication holes, and a first metal plug electrically connected to the second surface arranged in the communication holes;

[0009] A plurality of metal lines arranged on a side surface of the first communication layer away from the MTJ stack, the plurality of metal lines being electrically connected to the first metal plug one by one;

[0010] A plurality of test contacts corresponding to the plurality of metal lines one by one, the plurality of test contacts being electrically connected to the corresponding metal lines.

[0011] Optionally, a second communication layer is further arranged between the MTJ stack and the metal layer, the second communication layer having a plurality of communication holes, and a second metal plug for electrically connecting the metal layer and the MTJ stack is arranged in the communication holes.

[0012] Optionally, a buffer layer is further arranged between the first communication layer and the MTJ stack, and the first metal plug is electrically connected with the second surface through the buffer layer; and / or,

[0013] A buffer layer is further arranged between the metal layer and the MTJ stack, and the metal layer is electrically connected with the MTJ stack through a third metal plug penetrating through the buffer layer.

[0014] Optionally, the plurality of communication holes of the first communication layer are arranged in a straight line.

[0015] Optionally, a spacing between adjacent communication holes of the first communication layer is not greater than 1 / 10 of a feature size of the MTJ stack.

[0016] In a second aspect, the present application provides a preparation method of an MTJ test structure, comprising:

[0017] forming a plurality of metal lines on the wafer, the plurality of metal lines being electrically connected with a plurality of test contacts one by one;

[0018] forming a first communication layer on the plurality of metal lines, and forming communication holes in the first communication layer through photolithography and etching;

[0019] depositing a first metal plug in the communication holes;

[0020] forming an MTJ stack on the communication layer, so that the MTJ stack is electrically connected with the metal line through the first metal plug;

[0021] forming a metal layer on the MTJ stack, the metal layer being electrically connected with the MTJ stack;

[0022] performing photolithography and etching on the metal layer and the MTJ stack, so that the MTJ stack forms a quadrilateral pattern.

[0023] Optionally, before forming the metal layer, the method further comprises:

[0024] forming a second communication layer on the MTJ stack, and forming communication holes in the second communication layer through photolithography and etching;

[0025] forming a second metal plug in the communication holes, so that the metal layer is electrically connected with the MTJ stack through the second metal plug.

[0026] Optionally, before forming the MTJ stack, the method further comprises:

[0027] forming a buffer layer on the first communication layer, so that the first metal plug is electrically connected with the MTJ stack through the buffer layer; and / or,

[0028] Before forming the metal layer, further comprising:

[0029] forming a buffer layer on the MTJ stack, the buffer layer having a third metal plug for electrically connecting the metal layer and the MTJ stack.

[0030] In a third aspect, the present application provides a method for preparing an MTJ test structure, comprising:

[0031] forming a metal layer on a wafer;

[0032] forming an MTJ stack on the metal layer;

[0033] performing photolithography and etching on the MTJ stack to form a quadrilateral pattern of the MTJ stack;

[0034] forming a first interconnection layer on the MTJ stack, the first interconnection layer being formed with an interconnection hole through photolithography and etching;

[0035] forming a first metal plug in the interconnection hole and forming a plurality of metal lines on the first interconnection layer; wherein,

[0036] the plurality of metal lines are electrically connected to the first metal plug one by one, and the plurality of metal lines are electrically connected to a plurality of test contacts one by one.

[0037] Optionally, before forming the MTJ stack, further comprising:

[0038] forming a second interconnection layer on the metal layer, the second interconnection layer being formed with an interconnection hole through photolithography and etching;

[0039] forming a second metal plug in the interconnection hole to electrically connect the metal layer and the MTJ stack through the second metal plug.

[0040] Optionally, before forming the first interconnection layer, further comprising:

[0041] forming a buffer layer on the MTJ stack to electrically connect the first metal plug and the MTJ stack through the buffer layer; and / or,

[0042] Before forming the MTJ stack, further comprising:

[0043] forming a buffer layer on the metal layer, the buffer layer having a third metal plug for electrically connecting the metal layer and the MTJ stack.

[0044] In the technical scheme, the metal plug is electrically connected with the test contact through the test metal wire, so that the MTJ is not needed to be tested by using a probe, and the required parameters can be obtained by testing the test contact only, and the parameters of the MTJ can be obtained by function fitting of the parameters. In the technical scheme, the metal plug is used to form contact with the MTJ stack, so that the contact position can be controlled more easily, and the parameters of the MTJ can be calculated more accurately. BRIEF DESCRIPTION OF DRAWINGS

[0045] Figure 1 FIG. 1 is a schematic diagram of an MTJ test structure according to an embodiment of the present application;

[0046] Figure 2 FIG. 2 is a perspective view of an MTJ test structure according to another embodiment of the present application;

[0047] Figure 3 FIG. 3 is a schematic diagram of an MTJ test structure according to an embodiment of the present application;

[0048] Figure 4 FIG. 4 is a specific embodiment of an MTJ test structure according to another embodiment of the present application;

[0049] Figure 5 FIG. 5 is another specific embodiment of an MTJ test structure according to another embodiment of the present application. DETAILED DESCRIPTION

[0050] In order to make the purpose, technical scheme and advantages of the embodiments of the present application clearer, the technical scheme of the embodiments of the present application will be described clearly and completely below in combination with the drawings of the embodiments of the present application. Obviously, the described embodiments are only some of the embodiments of the present application, but not all the embodiments. Based on the embodiments of the present application, all other embodiments obtained by those skilled in the art without creative labor fall within the scope of protection of the present application.

[0051] The embodiments of the present application provide an MTJ test structure, as shown in FIG. 1, which comprises: Figures 1-3

[0052] An MTJ stack 102 has a first surface and a second surface arranged oppositely; in some embodiments, the MTJ stack 102 comprises at least two magnetic layers and a barrier layer arranged between the two magnetic layers, and in some preferred embodiments, the surfaces of the two magnetic layers away from the barrier layer are the first surface and the second surface of the MTJ stack 102 respectively.

[0053] ​The metal layer 101 is electrically connected with the first surface of the MTJ stack 102. In some embodiments, the material of the metal layer 101 includes but is not limited to Cu, AL, W, Co, Ti or TiN, etc. For example, the metal layer 101 can be a 400 nm Cu metal layer 101.

[0054] The first communication layer 103 is arranged on the second surface of the MTJ stack 102. The first communication layer 103 has a plurality of communication holes, and a first metal plug 1031 is arranged in each of the communication holes and is electrically connected with the second surface. In some embodiments, the first communication layer is first formed by an interlayer dielectric material, then the interlayer dielectric material is etched to form a plurality of through holes, and then the first metal plug 1031 is formed by metal deposition in the plurality of through holes. In some preferred embodiments, the material of the first metal plug 1031 includes but is not limited to Cu, AL, W, Co, Ti or TiN, etc.

[0055] The plurality of metal wires 104 are arranged on the side surface of the first communication layer 103 away from the MTJ stack 102. The plurality of metal wires 104 are electrically connected with the first metal plug 1031 one by one. In some embodiments, each metal plug is electrically connected with a metal wire 104. By measuring the test contact on the other end of the metal wire 104, the electrical parameters of the contact position of the metal plug and the MTJ can be obtained.

[0056] The plurality of test contacts are electrically connected with the plurality of metal wires 104 one by one. In some embodiments, the arrangement of the test contacts is the same as the arrangement of the probes of the test machine table for the final wafer acceptability test, so that the test machine table for the final wafer acceptability test can be used to test the magnetoresistance and RA of the wafer.

[0057] In the technical scheme provided in the embodiment, the metal plug is electrically connected with the test contact by the test metal wire 104, so that the MTJ does not need to be tested by the probe, and only the test contact needs to be tested to obtain the required parameters. By function fitting of the parameters, the more comprehensive parameters of the MTJ can be obtained. In the technical scheme of the present application, the metal plug is used to form the contact with the MTJ stack 102, which is more conducive to controlling the contact position and can more accurately calculate the parameters of the MTJ.

[0058] In the embodiment, the arrangement mode of the plurality of first metal plugs 1031 is designed according to the probe arrangement mode of a current in plane tunneling (CIPT) test system, which is equivalent to forming probes fixed to the MTJ stack 102 on the surface of the MTJ stack 102, and then connecting the first metal plugs 1031 to test contacts through metal wires 104. The arrangement of the test contacts is arranged according to the probe arrangement of a wafer acceptance test (WAT) test machine, so that the CIPT test parameters can be obtained on the WAT test machine. Therefore, more comprehensive wafer parameters can be obtained on the WAT test machine, and the test process is simplified.

[0059] According to the CIPT test principle, the longitudinal resistance RA of the MTJ film is measured by using the current in the plane. It is defined that R T is the sheet resistance above the barrier layer, that is, the sheet resistance of the magnetic layer in contact with the first metal plug 1031; R B is the sheet resistance below the barrier layer, that is, the sheet resistance of the magnetic layer away from the first metal plug 1031, and the characteristic length is defined as When the probe spacing is close to λ, generally 1 to 5 λ, the CIPT can better measure the values of R T , R B and RA. When R T / R B is large, that is, the lower layer resistance is relatively small, it is beneficial to the flow of current to the lower layer film, and it has certain benefits for improving the test accuracy. For example, when the first metal plug 1031 has 12 branches, the 12 first metal plugs 1031 can be considered as 12 probes, which can be combined into 8 groups of equally spaced four-probe groups, and the spacing can be changed from 1.5 μm to 18.5 μm. During the test, the 12 probes are in contact with the sample at the same time, the external magnetic field makes the free layer magnetization flip, each four-probe group measures a resistance value, and 8 resistance values under different probe spacings are obtained. After changing the direction of the magnetic field, 8 resistance values under different probe spacings can be measured again. Theoretical calculation shows that the resistance and the probe spacing satisfy a certain relationship, and the CIPT system uses the relationship to fit the measured resistance, so that the values of R T , R B , RA and MR can be obtained.

[0060] In the fitting process, the resistance and the probe spacing satisfy the relationship:

[0061]

[0062] Where a / b / c / d is the spacing of each probe in each four-probe group, λ is the characteristic length, and K0 is the Bessel function. Using the above formula, the resistance values under 8 different probe spacings are fitted, and the values of R T , R B, the value of RA. In addition, since the resistance value changes in the process of the magnetic field changes, the value of MR can be obtained by using R T , R B , the relationship between RA and MR to obtain the value of MR.

[0063] As an optional implementation, a second communication layer is further arranged between the MTJ stack 102 and the metal layer 101, the second communication layer has a plurality of communication holes, and a second metal plug for electrically connecting the metal layer 101 and the MTJ stack 102 is arranged in the communication hole. In some embodiments, the communication layer arranged between the MTJ stack 102 and the metal layer 101 can protect the MTJ stack 102 to a certain extent. At the same time, it can be closer to the real MTJ cell interconnection situation, which is beneficial to test more accurate results.

[0064] As an optional implementation, a buffer layer 105 is further arranged between the first communication layer 103 and the MTJ stack 102, and the first metal plug 1031 is electrically connected with the second surface through the buffer layer 105; and / or,

[0065] A buffer layer 105 is further arranged between the metal layer 101 and the MTJ stack 102, and the metal layer 101 is electrically connected with the MTJ stack 102 through a third metal plug penetrating through the buffer layer 105.

[0066] In some embodiments, the buffer layer 105 material includes but is not limited to Ta, TaN, Ti, TiN, TiW, etc., and the buffer layer 105 material is used to protect the MTJ stack 102 in the etching and other processing procedures, and can also be used as a stopping point in the etching process.

[0067] As an optional implementation, the plurality of communication holes of the first communication layer 103 are arranged in a straight line. In some embodiments, CIPT testing usually adopts a four-point resistance measurement method, and for four-point resistance measurement, the measurement result is most accurate when the plurality of probes are arranged in a straight line. Therefore, the plurality of communication holes are arranged in a straight line in the embodiment.

[0068] As a preferred implementation, the spacing between adjacent communication holes of the first communication layer 103 is not greater than 1 / 10 of the feature size of the MTJ stack 102.

[0069] The embodiment of the application further provides a preparation method of the MTJ test structure as shown in the figure. Figure 4 The preparation method comprises the following steps:

[0070] Forming a plurality of metal lines 104 on the wafer, the plurality of metal lines 104 are electrically connected with a plurality of test contacts one by one; in some embodiments, the metal lines 104 are first electrically connected with the test contacts, and the forming method can be formed in a damascene manner;

[0071] Forming a first communication layer 103 on the plurality of metal lines 104, and forming a communication hole in the first communication layer 103 through photolithography and etching; in some embodiments, the communication hole should correspond to the metal line 104, and is used to electrically connect the metal line 104 with the MTJ stack 102 in a subsequent process.

[0072] Depositing and forming a first metal plug 1031 in the communication hole; in some embodiments, the first metal plug 1031 is an electrical connection channel connecting the metal line 104 and the MTJ stack 102.

[0073] Forming an MTJ stack 102 on the communication layer, so that the MTJ stack 102 is electrically connected with the metal line 104 through the first metal plug 1031; in some embodiments, the material of the first metal plug 1031 includes but is not limited to Cu, AL, W, Co, Ti or TiN, etc.

[0074] Forming a metal layer 101 electrically connected with the MTJ stack 102 on the MTJ stack 102; in some embodiments, the material of the metal layer 101 includes but is not limited to Cu, AL, W, Co, Ti or TiN, etc., for example, the metal layer 101 can be a 400 nm Cu metal layer 101.

[0075] Performing photolithography and etching on the metal layer 101 and the MTJ stack 102, so that the MTJ stack 102 forms a quadrilateral pattern. In some embodiments, the size of the long side direction of the quadrilateral pattern can be 60 μm, and the size of the short side direction can be 2 μm.

[0076] In the technical solution provided by the embodiment, the metal plug is electrically connected with the test contact through the test metal line 104, so that the MTJ does not need to be tested by using a probe, and only the test contact needs to be tested to obtain the required parameters, and through function fitting of the parameters, the parameters of the MTJ can be obtained more comprehensively. In the technical solution of the present application, the metal plug is used to form contact with the MTJ stack 102, which is more conducive to controlling the contact position, and the parameters of the MTJ can be calculated more accurately.

[0077] As an optional implementation, before forming the metal layer 101, the method further includes:

[0078] Forming a second communication layer on the MTJ stack 102, and forming a communication hole in the second communication layer through photolithography and etching;

[0079] A second metal plug is formed in the through hole to electrically connect the metal layer 101 and the MTJ stack 102.

[0080] In some embodiments, the second through layer can provide a certain degree of protection for the MTJ stack 102. At the same time, it can be closer to the actual interconnection of the MTJ unit, and it is beneficial to obtain more accurate test results.

[0081] As an optional implementation, before forming the MTJ stack 102, the method further comprises:

[0082] A buffer layer 105 is formed on the first through layer 103 to electrically connect the first metal plug 1031 and the MTJ stack 102 through the buffer layer 105; and / or,

[0083] Before forming the metal layer 101, the method further comprises:

[0084] A buffer layer 105 is formed on the MTJ stack 102, and the buffer layer 105 has a third metal plug for electrically connecting the metal layer 101 and the MTJ stack 102.

[0085] In some embodiments, the above-mentioned method of forming the buffer layer 105 can protect the MTJ stack 102, and at the same time, it can also serve as a stopping point for the corresponding etching process.

[0086] The following is an exemplary embodiment of a test structure of Figure 4 :

[0087] A metal line 104 is formed on a thermal oxide wafer using a metal deposition device;

[0088] A row of 24 through holes with equal spacing are formed using thin film deposition, photolithography, etching and other processes, with a through hole diameter of 100 nm and a spacing between adjacent through holes of 2 μm;

[0089] An MTJ bottom electrode 106 is formed, and the bottom electrode 106 is TaN with a thickness of 30 nm;

[0090] An MTJ thin film stack is formed;

[0091] An upper buffer layer 105 of the MTJ thin film stack is formed, and the upper buffer layer 105 is Ta with a thickness of 50 nm;

[0092] A top metal layer 101 is formed, and the top metal layer 101 is Cu with a thickness of 400 nm;

[0093] A test structure is formed by using film deposition, photolithography, etching and other processes, the test structure is a quadrilateral, the size of the long side direction is 60 mu m, and the size of the short side direction is 2 mu m; a through hole at the bottom of the test structure is correspondingly interconnected with an external metal pad.

[0094] After the preparation is completed by using the above steps, the external metal pad is tested by using a WAT machine, and parameters such as sheet resistance RA or magnetic resistance MR can be obtained by fitting the test results.

[0095] The embodiment of the application also provides a preparation method of the MTJ test structure as shown in the figure, comprising the following steps. Figure 5 The preparation method comprises the following steps.

[0096] A metal layer 101 is formed on a wafer;

[0097] An MTJ stack 102 is formed on the metal layer 101;

[0098] The MTJ stack 102 is subjected to photolithography and etching, so that the MTJ stack 102 forms a quadrilateral pattern;

[0099] A first communication layer 103 is formed on the MTJ stack 102, and a communication hole is formed in the first communication layer 103 by photolithography and etching;

[0100] A first metal plug 1031 is formed in the communication hole, and a plurality of metal wires 104 are formed on the first communication layer 103; wherein,

[0101] The plurality of metal wires 104 are electrically connected with the first metal plug 1031 one by one, and the plurality of metal wires 104 are electrically connected with a plurality of test contacts one by one.

[0102] Optionally, before the MTJ stack 102 is formed, the method further comprises the following steps.

[0103] A second communication layer 107 is formed on the metal layer 101, and a communication hole is formed in the second communication layer 107 by photolithography and etching;

[0104] A second metal plug is formed in the communication hole, so that the metal layer 101 and the MTJ stack 102 are electrically connected through the second metal plug.

[0105] Optionally, before the first communication layer is formed, the method further comprises the following steps.

[0106] A buffer layer 105 is formed on the MTJ stack 102, so that the first metal plug 1031 is electrically connected with the MTJ stack 102 through the buffer layer 105; and / or,

[0107] Before the MTJ stack 102 is formed, the method further comprises the following steps.

[0108] A buffer layer 105 is formed on the metal layer 101, and the buffer layer 105 has a third metal plug for electrically connecting the metal layer 101 and the MTJ stack 102.

[0109] In this embodiment, the preparation method is opposite to that of the prior art, i.e., the preparation of the MTJ stack 102 is completed first, and then the preparation of the metal line 104 is completed. In this way, the MTJ stack 102 structure needs to be etched to form a quadrilateral pattern first, so as to avoid the influence of the metal line 104 on the etching process. Figure 4 The following is an exemplary embodiment of a test structure of the present application:

[0110] Figure 5 A metal layer 101 is formed on a thermal oxide wafer by using a metal deposition device;

[0111] A large number of through holes are formed by using thin film deposition, photolithography, etching and other processes to form a second communication layer 107;

[0112] An MTJ film stack is formed;

[0113] An upper buffer layer 105 of the MTJ film stack is formed, and the upper buffer layer 105 is TaN 30 nm;

[0114] A test structure is formed by using thin film deposition, photolithography, etching and other processes, and the test structure is a quadrilateral with a long side direction size of 60 μm and a short side direction size of 2 μm; the test structure bottom through hole and the external metal pad are one-to-one corresponding interconnection;

[0115] A first communication layer 103 and 12 through holes with different spacings are formed by using thin film deposition, photolithography, etching and other processes, and the through hole diameter is 100 nm, and the minimum spacing between adjacent through holes is 2 μm;

[0116] An upper metal line 104 is formed by using thin film deposition, photolithography, etching and other processes.

[0117] After the above preparation process is completed, the external metal pad is tested by using a WAT machine, and the test results are fitted to obtain parameters such as sheet resistance RA or magnetic resistance MR.

[0118] Specifically, the test process performed by using the test structure in each of the above embodiments is as follows:

[0119] Four of the plurality of first metal plugs 1031 are selected, and the required position distance between the corresponding through holes is recorded.

[0120] Two of the first metal plugs 1031 are selected and a certain current is applied.

[0121] Two of the first metal plugs 1031 are selected and a certain current is applied. ​

[0122] The voltage between the other two first metal plugs 1031 is measured, and the resistance value is calculated.

[0123] Different first metal plugs 1031 are selected, and the foregoing steps are repeated to record the first relationship curve of the resistance change with the distance at different positions.

[0124] Nonlinear fitting is performed on the first relationship curve, and the fitting result is used to represent the electrical characteristic parameters of the test structure.

[0125] As a preferred embodiment, in the foregoing process of applying the current and measuring the voltage, four first metal plugs 1031 on the same straight line are selected, the current is applied to the two first metal plugs 1031 farthest from each other among the four first metal plugs 1031, and the voltage is measured between the two first metal plugs 1031 between the two farthest first metal plugs 1031.

[0126] As a preferred embodiment, a magnetic field can be applied for initialization before testing.

[0127] The foregoing test process is similar to the test process of the CIPT test, except that in the foregoing test process, the probes of the CIPT test machine do not need to be in contact with the MTJ stack 102, and the test contacts can be directly measured on the WAT test machine, so that the entire test process is simplified.

[0128] Those skilled in the art can understand that all or part of the processes in the foregoing method embodiments can be completed by a computer program instructing related hardware, and the program can be stored in a computer-readable storage medium. When the program is executed, it can include the processes of the foregoing embodiments of the method. The storage medium can be a magnetic disc, an optical disc, a read-only memory (ROM), a random access memory (RAM), or the like.

[0129] The above merely provides a specific implementation of the present application, but the protection scope of the present application is not limited thereto. Any person skilled in the art can easily think of changes or replacements within the technical range disclosed by the present application, which should be covered within the protection scope of the present application. Therefore, the protection scope of the present application should be subject to the protection scope of the claims.

Claims

1. An MTJ test structure, characterized by, include: MTJ stack, having a first surface and a second surface disposed opposite to each other; A metal layer is electrically connected to the first surface of the MTJ stack; A first connecting layer is disposed on the second surface of the MTJ stack. The first connecting layer has a plurality of connecting holes, and a first metal plug electrically connected to the second surface is disposed in the connecting holes. Multiple metal wires are disposed on the surface of the first connecting layer away from the MTJ stack, and the multiple metal wires are electrically connected to the first metal plug in a one-to-one correspondence. Multiple test contacts correspond one-to-one with the multiple metal wires, and the multiple test contacts are electrically connected to the corresponding metal wires; Among them, the multiple connecting holes of the first connecting layer are arranged in a straight line; The spacing between adjacent interconnecting holes in the first interconnecting layer is no greater than 1 / 10 of the feature size of the MTJ stack.

2. The MTJ test structure of claim 1, wherein, A second connecting layer is further provided between the MTJ stack and the metal layer. The second connecting layer has multiple connecting holes, and a second metal plug for electrically connecting the metal layer and the MTJ stack is provided in the connecting holes.

3. The MTJ test structure of claim 2, wherein, A buffer layer is further disposed between the first connecting layer and the MTJ stack, and the first metal plug passes through the buffer layer and is electrically connected to the second surface; and / or, A buffer layer is also provided between the metal layer and the MTJ stack, and the metal layer is electrically connected to the MTJ stack through a third metal plug that penetrates the buffer layer.

4. A method of fabricating an MTJ test structure, the method comprising: include: Multiple metal lines are formed on the wafer, and the multiple metal lines are electrically connected to multiple test contacts one by one; A first interconnecting layer is formed on the multiple metal lines, and the first interconnecting layer is photolithographically and etched to form multiple interconnecting holes; A first metal plug is deposited and formed within the connecting hole; An MTJ stack is formed on the first interconnecting layer, such that the MTJ stack is electrically connected to the metal wire through a first metal plug; A metal layer electrically connected to the MTJ stack is formed on the MTJ stack; The metal layer and the MTJ stack are photolithographically and etched to form a quadrilateral pattern in the MTJ stack. Among them, the multiple connecting holes of the first connecting layer are arranged in a straight line; The spacing between adjacent interconnecting holes in the first interconnecting layer is no greater than 1 / 10 of the feature size of the MTJ stack.

5. The method of claim 4, wherein the MTJ test structure is prepared by: Before forming the metal layer, the method further includes: A second interconnecting layer is formed on the MTJ stack, and interconnecting vias are formed on the second interconnecting layer by photolithography and etching. A second metal plug is formed within the connecting hole so that the metal layer and the MTJ stack are electrically connected through the second metal plug.

6. The method of claim 4, wherein the MTJ test structure is prepared by: Prior to forming the MTJ stack, the method further includes: A buffer layer is formed on the first interconnecting layer to allow the first metal plug to be electrically connected to the MTJ stack through the buffer layer; and / or, Before the metal layer is formed, the process also includes: A buffer layer is formed on the MTJ stack, the buffer layer having a third metal plug for electrically connecting the metal layer to the MTJ stack.

7. A method of fabricating an MTJ test structure, the method comprising: include: A metal layer is formed on the wafer; An MTJ stack is formed on the metal layer; The MTJ stack is subjected to photolithography and etching to form a quadrilateral pattern in the MTJ stack. forming a first communication layer on the MTJ stack, the first communication layer being formed with a plurality of communication holes by photolithography and etching; forming a first metal plug in the communication hole and forming a plurality of metal lines on the first communication layer; wherein, the plurality of metal lines are electrically connected to the first metal plug one by one, and the plurality of metal lines are electrically connected to a plurality of test contacts one by one; wherein the plurality of communication holes of the first communication layer are arranged along a straight line; the interval between adjacent communication holes of the first communication layer is not greater than 1 / 10 of the feature size of the MTJ stack.

8. The method of claim 7, wherein the MTJ test structure is prepared by: Before forming the MTJ stack, further comprising: forming a second communication layer on the metal layer, and forming a communication hole in the second communication layer by photolithography and etching; forming a second metal plug in the communication hole, so that the metal layer and the MTJ stack are electrically connected through the second metal plug.

9. The method of claim 7, wherein the MTJ test structure is prepared by: Before forming the first communication layer, further comprising: forming a buffer layer on the MTJ stack, so that the first metal plug is electrically connected to the MTJ stack through the buffer layer; and / or, Before forming the MTJ stack, further comprising: forming a buffer layer on the metal layer, the buffer layer having a third metal plug for electrically connecting the metal layer and the MTJ stack.

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