Semiconductor device and method of manufacturing the same

Abstract

Provided is a semiconductor device that can reduce the occurrence of voids (missing portions) in a patterned semiconductor layer or electrode layer even when patterning is performed using a mask formed by a screen printing method. The semiconductor device has a patterned semiconductor layer (25) or electrode layer (28) formed on a substrate. The semiconductor layer (25) or electrode layer (28) has an elongated shape and includes a strip-shaped first pattern (25A or 28A) extending in the length direction (Y direction) and a strip-shaped second pattern (25B or 28B) intersecting the length direction. The angle on the acute side of the angle formed by 90% of the second pattern (25B or 28B) with respect to the first pattern (25A or 28A) is less than 90 degrees.

Description

Technical Field

[0001] The present invention relates to a semiconductor element and a method for manufacturing the semiconductor element. Background Art

[0002] There is a semiconductor element in which a patterned semiconductor layer or electrode layer is formed on a substrate. In Patent Document 1, a technique for forming a patterned electrode layer by a screen printing method is described. The screen printing method is a method of transferring a printing material filled in a pattern opening portion of a printing plate to an object to be printed by moving a squeegee. In the pattern opening portion of the printing plate, a mesh (grid) is formed by lattice-shaped wires.

[0003] In addition, as a method for forming a pattern of a semiconductor layer or an electrode layer, there is also a wet etching method using a mask such as a patterned resist. Sometimes a mask such as a patterned resist is also formed by a screen printing method.

[0004] Patent Document 1: Japanese Patent Application Laid-Open No. 2014-57031

[0005] Patent Document 2: International Publication No. 2011 / 149067

[0006] In a mask forming method using the screen printing method, sometimes a gap (missing lines) is formed in a resist pattern extending crosswise to a printing direction (squeegee moving direction). As a result, a gap (missing lines) is formed in the pattern of the semiconductor layer or the electrode layer. Summary of the Invention

[0007] An object of the present invention is to provide a semiconductor element and a method for manufacturing the semiconductor element, which can reduce the formation of gaps (missing lines) in a patterned semiconductor layer or electrode layer even when pattern formation is performed using a mask formed by a screen printing method.

[0008] In the semiconductor element of the present invention, a patterned semiconductor layer or electrode layer is formed on a substrate. Among them, the semiconductor layer or the electrode layer has a long strip shape, has a strip-shaped first pattern extending in a length direction, and a strip-shaped second pattern crossing the length direction. An angle of 90% of a part of the second pattern on an acute angle side with respect to the first pattern is less than 90 degrees.

[0009] A method for manufacturing a semiconductor device according to the present invention is a method for manufacturing a semiconductor device having a patterned semiconductor layer or electrode layer formed on a substrate, and includes: a semiconductor layer material film or electrode layer material film forming step of forming a material film of the semiconductor layer or the material film of the electrode layer on the substrate; a mask forming step of forming a patterned mask on the material film of the semiconductor layer or the material film of the electrode layer by using a screen printing method; and a semiconductor layer or electrode layer forming step of forming the patterned semiconductor layer or the electrode layer by removing a part of the material film of the semiconductor layer or the material film of the electrode layer by using a wet etching method using the mask. In the mask forming step, the printing direction is at an angle of 20 degrees or more and 40 degrees or less with respect to the acute angle side of the angle formed by the mesh, that is, the lattice-like filaments of the grid, in the pattern opening portion of the printing plate.

[0010] According to the present invention, even when pattern formation is performed using a mask formed by a screen printing method, it is possible to reduce the occurrence of voids (blanks) in the patterned semiconductor layer or electrode layer. BRIEF DESCRIPTION OF THE DRAWINGS

[0011] Figure 1 is a view of the solar cell of the present embodiment as viewed from the back side.

[0012] Figure 2 is Figure 1 a cross-sectional view taken along line II-II of the solar cell.

[0013] Figure 3A is a view showing a first semiconductor layer material film forming step in the method for manufacturing a solar cell of the present embodiment.

[0014] Figure 3B is a view showing a mask forming step in the method for manufacturing a solar cell of the present embodiment.

[0015] Figure 3C is a view showing a first semiconductor layer forming step in the method for manufacturing a solar cell of the present embodiment.

[0016] Figure 3D is a view showing a first semiconductor layer forming step in the method for manufacturing a solar cell of the present embodiment.

[0017] Figure 3E is a view showing a second semiconductor layer material film forming step in the method for manufacturing a solar cell of the present embodiment.

[0018] Figure 3F is a view showing a second semiconductor layer forming step (omitting the mask forming step) in the method for manufacturing a solar cell of the present embodiment.

[0019] Figure 3G It is a diagram showing the process of forming the transparent electrode layer material film in the manufacturing method of the solar cell of the present embodiment.

[0020] Figure 3H It is a diagram showing the process of forming the transparent electrode layer (omitting the mask forming process) in the manufacturing method of the solar cell of the present embodiment.

[0021] Figure 3I It is a diagram showing the process of forming the metal electrode layer in the manufacturing method of the solar cell of the present embodiment.

[0022] Figure 4 It is a diagram for explaining the problems in mask formation using the screen printing method.

[0023] Figure 5 It is a diagram for explaining the screen printing method.

[0024] Figure 6A It is a diagram for explaining the problems in mask formation using the screen printing method.

[0025] Figure 6B It is a diagram for explaining the problems in mask formation using the screen printing method.

[0026] Figure 7A It is a diagram for explaining an example of the pattern shape of the semiconductor layer or the electrode layer of the first embodiment.

[0027] Figure 7B It is a diagram for explaining an example of the pattern shape of the semiconductor layer or the electrode layer of the first embodiment.

[0028] Figure 7C It is a diagram for explaining an example of the pattern shape of the semiconductor layer or the electrode layer of the first embodiment.

[0029] Figure 7D It is a diagram for explaining an example of the pattern shape of the semiconductor layer or the electrode layer of the first embodiment.

[0030] Figure 8 It is a diagram for explaining the screen printing method of the second embodiment. Detailed Embodiment

[0031] Hereinafter, an example of an embodiment of the present invention will be described with reference to the accompanying drawings. In addition, the same or corresponding parts are denoted by the same reference numerals in the respective drawings. For convenience, there are cases where shading, component reference numerals, etc. are omitted, but in such cases, refer to other drawings.

[0032] (First Embodiment)

[0033] Figure 1 This is a view of the solar cell of the present embodiment as observed from the back side. Figure 1 The shown solar cell (semiconductor element) 1 is a back electrode type (also referred to as a back contact type, back junction type) solar cell. The solar cell 1 includes a semiconductor substrate 11 having two main surfaces, and a first region 7 and a second region 8 are provided on the main surfaces of the semiconductor substrate 11.

[0034] The first region 7 forms a so-called comb shape, and has a plurality of finger portions 7f equivalent to comb teeth and a bus bar portion 7b equivalent to the support portion of the comb teeth. The bus bar portion 7b extends in a first direction (X direction) along one side portion of the semiconductor substrate 11, and the finger portions 7f extend from the bus bar portion 7b in a second direction (Y direction) intersecting the first direction.

[0035] Similarly, the second region 8 is in a so-called comb shape, and has a plurality of finger portions 8f equivalent to comb teeth and a bus bar portion 8b equivalent to the support portion of the comb teeth. The bus bar portion 8b extends in the first direction (X direction) along the other side portion opposed to one side portion of the semiconductor substrate 11, and the finger portions 8f extend from the bus bar portion 8b in the second direction (Y direction).

[0036] The finger portions 7f and the finger portions 8f are in a strip shape extending in the second direction (Y direction), and are alternately arranged in the first direction (X direction). In addition, the first region 7 and the second region 8 may be formed in a stripe shape.

[0037] Figure 2 is Figure 1 a cross-sectional view taken along line II-II in the solar cell. As Figure 2 shown, the solar cell 1 includes an optical adjustment layer 15, and the optical adjustment layer 15 is laminated on the light-receiving side main surface (one main surface) of the main surfaces of the semiconductor substrate 11, that is, the light-receiving surface side. In addition, the solar cell 1 includes a first conductivity type semiconductor layer 25 and a first electrode layer 27, and the first conductivity type semiconductor layer 25 and the first electrode layer 27 are sequentially laminated on a part of the main surface on the opposite side of the light-receiving surface of the semiconductor substrate 11, that is, the back side (mainly the first region 7). In addition, the solar cell 1 includes a second conductivity type semiconductor layer 35 and a second electrode layer 37, and the second conductivity type semiconductor layer 35 and the second electrode layer 37 are sequentially laminated on another part of the back side of the semiconductor substrate 11 (mainly the second region 8).

[0038] The semiconductor substrate 11 is formed of a crystalline silicon material such as single-crystalline silicon or polycrystalline silicon. The semiconductor substrate 11 is, for example, an n-type semiconductor substrate in which an n-type dopant is doped in the crystalline silicon material. In addition, the semiconductor substrate 11 may, for example, also be a p-type semiconductor substrate in which a p-type dopant is doped in the crystalline silicon material. As the n-type dopant, for example, phosphorus (P) can be cited. As the p-type dopant, for example, boron (B) can be cited. The semiconductor substrate 11 functions as a photoelectric conversion substrate that absorbs incident light from the light-receiving surface side to generate photocarriers (electrons and holes).

[0039] The optical adjustment layer 15 is formed on the light-receiving surface side of the semiconductor substrate 11. The optical adjustment layer 15 functions as an antireflection layer that prevents reflection of incident light and functions as a protective layer that protects the light-receiving surface side of the semiconductor substrate 11. The optical adjustment layer 15 is formed of an insulator material such as silicon oxide (SiO), silicon nitride (SiN), or a composite thereof such as silicon oxynitride (SiON).

[0040] The first conductivity type semiconductor layer 25 is formed in the first region 7 on the back side of the semiconductor substrate 11. The first conductivity type semiconductor layer 25 is formed of, for example, an amorphous silicon material. The first conductivity type semiconductor layer 25 is, for example, a p-type semiconductor layer in which a p-type dopant (such as the above-mentioned boron (B)) is doped in the amorphous silicon material.

[0041] The second conductivity type semiconductor layer 35 is formed in the second region 8 on the back side of the semiconductor substrate 11. The second conductivity type semiconductor layer 35 is formed of, for example, an amorphous silicon material. The second conductivity type semiconductor layer 35 is, for example, an n-type semiconductor layer in which an n-type dopant (such as the above-mentioned phosphorus (P)) is doped in the amorphous silicon material.

[0042] In addition, it may be that the first conductivity type semiconductor layer 25 is an n-type semiconductor layer and the second conductivity type semiconductor layer 35 is a p-type semiconductor layer.

[0043] The first conductivity type semiconductor layer 25 and the second conductivity type semiconductor layer 35 are in a strip shape extending in the second direction (Y direction) and are alternately arranged in the first direction (X direction). A part of the second conductivity type semiconductor layer 35 may overlap a part of the adjacent first conductivity type semiconductor layer 25 (not shown).

[0044] A passivation layer may be formed between the semiconductor substrate 11 and the optical adjustment layer 15. In addition, a passivation layer may be formed between the semiconductor substrate 11 and the first conductivity type semiconductor layer 25 and between the semiconductor substrate 11 and the second conductivity type semiconductor layer 35. The passivation layer is formed of, for example, an intrinsic (i-type) amorphous silicon material. The passivation layer suppresses the recombination of carriers generated in the semiconductor substrate 11 and improves the carrier recovery efficiency.

[0045] The first electrode layer 27 corresponds to the first-conductivity-type semiconductor layer 25, specifically, it is formed on the first-conductivity-type semiconductor layer 25 in the first region 7 on the back side of the semiconductor substrate 11. The second electrode layer 37 corresponds to the second-conductivity-type semiconductor layer 35, specifically, it is formed on the second-conductivity-type semiconductor layer 35 in the second region 8 on the back side of the semiconductor substrate 11. The first electrode layer 27 has a first transparent electrode layer 28 and a first metal electrode layer 29 stacked in sequence on the first-conductivity-type semiconductor layer 25. The second electrode layer 37 has a second transparent electrode layer 38 and a second metal electrode layer 39 stacked in sequence on the second-conductivity-type semiconductor layer 35.

[0046] The first transparent electrode layer 28 and the second transparent electrode layer 38 are formed of a transparent conductive material. Examples of the transparent conductive material include ITO (Indium Tin Oxide: a composite oxide of indium and tin oxide).

[0047] The first metal electrode layer 29 and the second metal electrode layer 39 are formed of a conductive paste material containing metal powder such as silver.

[0048] The first electrode layer 27 and the second electrode layer 37, that is, the first transparent electrode layer 28, the second transparent electrode layer 38, the first metal electrode layer 29 and the second metal electrode layer 39 are in the form of strips extending in the second direction (Y direction) and are alternately arranged in the first direction (X direction). The first transparent electrode layer 28 and the second transparent electrode layer 38 are separated from each other, and the first metal electrode layer 29 and the second metal electrode layer 39 are also separated from each other.

[0049] (Method for manufacturing a solar cell)

[0050] Next, with reference to Figures 3A to 3I , the method for manufacturing the solar cell of the present embodiment will be described. Figure 3A is a diagram showing the first semiconductor layer material film forming step in the method for manufacturing the solar cell of the present embodiment, Figure 3B is a diagram showing the mask forming step in the method for manufacturing the solar cell of the present embodiment, Figure 3C and Figure 3D is a diagram showing the first semiconductor layer forming step in the method for manufacturing the solar cell of the present embodiment. Figure 3E is a diagram showing the second semiconductor layer material film forming step in the method for manufacturing the solar cell of the present embodiment, Figure 3F is a diagram showing the second semiconductor layer forming step (omitting the mask forming step) in the method for manufacturing the solar cell of the present embodiment. Figure 3G is a diagram showing the transparent electrode layer material film forming step in the method for manufacturing the solar cell of the present embodiment, Figure 3HThis is a diagram showing the transparent electrode layer formation process (mask formation process omitted) in the manufacturing method of the solar cell of the present embodiment. Figure 3I This is a diagram showing the metal electrode layer formation process in the manufacturing method of the solar cell of the present embodiment. In Figures 3A to 3I it, the back side of the semiconductor substrate 11 is shown, and the front side of the semiconductor substrate 11 is omitted.

[0051] First, as Figure 3A shown, for example, a first conductive type semiconductor layer material film 25Z (first semiconductor layer material film formation process) is laminated (formed) over the entire surface of the back side of the semiconductor substrate 11 by using a CVD method or a PVD method.

[0052] Next, as Figures 3B to 3D shown, on the back side of the semiconductor substrate 11, the first conductive type semiconductor layer material film 25Z in the second region 8 is removed, whereby a patterned first conductive type semiconductor layer 25 is formed in the first region 7.

[0053] Specifically, as Figure 3B shown, on the back side of the semiconductor substrate 11, a patterned mask 90 (mask formation process) is formed on the first conductive type semiconductor layer material film 25Z in the first region 7 by using a screen printing method. As the material of the mask, for example, a photosensitive or non - photosensitive organic resist material, etc. can be cited.

[0054] Then, as Figure 3C shown, a wet etching method using the mask 90 is used to remove the first conductive type semiconductor layer material film 25Z (that is, a part of the first conductive type semiconductor layer material film 25Z) in the second region 8, whereby a patterned first conductive type semiconductor layer 25 (first semiconductor layer formation process) is formed in the first region 7. As the etching solution for a p - type semiconductor film, for example, a mixed solution obtained by dissolving ozone in hydrofluoric acid, or an acidic solution such as a mixed solution of hydrofluoric acid and nitric acid, etc. can be cited. As the etching solution for an n - type semiconductor film, for example, an aqueous potassium hydroxide solution, etc. can be cited.

[0055] Then, as Figure 3D shown, the mask 90 is peeled off.

[0056] Next, as Figure 3E shown, for example, a second conductive type semiconductor layer material film 35Z (second semiconductor layer material film formation process) is laminated (formed) over the entire surface of the back side of the semiconductor substrate 11 by using a CVD method or a PVD method.

[0057] Next, as Figure 3FAs shown, on the back side of the semiconductor substrate 11, the second conductivity type semiconductor layer material film 35Z in the first region 7 is removed, whereby a patterned second conductivity type semiconductor layer 35 is formed in the second region 8.

[0058] For example, in the same manner as described above, on the back side of the semiconductor substrate 11, a patterned mask 90 is formed on the second conductivity type semiconductor layer material film 35Z in the second region 8 by a screen printing method (mask forming step).

[0059] Then, the second conductivity type semiconductor layer material film 35Z in the first region 7 (i.e., a part of the second conductivity type semiconductor layer material film 35Z) is removed using a wet etching method using the mask 90, whereby a patterned second conductivity type semiconductor layer 35 is formed in the second region 8 (second semiconductor layer forming step).

[0060] Then, the mask 90 is peeled off.

[0061] In addition, in the above first semiconductor layer material film forming step or second semiconductor layer material film forming step, an optical adjustment layer 15 (not shown) may be formed over the entire surface on the light receiving surface side of the semiconductor substrate 11.

[0062] Next, as Figure 3G shown, a transparent electrode layer material film 28Z is formed so as to straddle the first conductivity type semiconductor layer 25 and the second conductivity type semiconductor layer 35 (transparent electrode layer material film forming step). As a method for forming the transparent electrode layer material film 28Z, for example, a CVD method or a PVD method or the like is used.

[0063] Next, as Figure 3H shown, on the back side of the semiconductor substrate 11, the transparent electrode layer material film 28Z at the boundary between the first region 7 and the second region 8 is removed, whereby a patterned first transparent electrode layer 28 is formed in the first region 7 and a patterned second transparent electrode layer 38 is formed in the second region 8.

[0064] For example, in the same manner as described above, on the back side of the semiconductor substrate 11, a patterned mask 90 is formed on the transparent electrode layer material film 28Z in the first region 7 and on the transparent electrode layer material film 28Z in the second region 8 by a screen printing method (mask forming step).

[0065] Then, a wet etching method using a mask 90 is used to remove the transparent electrode layer material film 28Z (i.e., a part of the transparent electrode layer material film 28Z) at the boundary between the first region 7 and the second region 8, thereby forming a patterned first transparent electrode layer 28 in the first region 7 and a patterned second transparent electrode layer 38 in the second region 8 (transparent electrode layer forming step). As the etching solution for the transparent electrode layer material film, an acidic solution such as hydrochloric acid (HCl) can be cited.

[0066] Next, as Figure 3I shown, on the back side of the semiconductor substrate 11, a first metal electrode layer 29 is formed on the first transparent electrode layer 28, and a second metal electrode layer 39 is formed on the second transparent electrode layer 38 (metal electrode layer forming step). As the formation method of the first metal electrode layer 29 and the second metal electrode layer 39, a printing method, a coating method, or the like is used.

[0067] Through the above steps, the back electrode type solar cell 1 of the present embodiment is completed.

[0068] Here, as Figure 4 shown, the first conductive type semiconductor layer 25 and the first transparent electrode layer 28 are long strip-shaped patterns, and sometimes have a strip-shaped first pattern 25A, 28A extending in the length direction (Y direction) and a strip-shaped second pattern 25B, 28B extending in the short side direction (X direction) intersecting the length direction. In this case, in the mask forming step using the screen printing method, a long strip-shaped patterned mask 90 is formed, and the mask 90 has a strip-shaped first pattern 90A extending in the length direction (Y direction) and a strip-shaped second pattern 90B extending in the short side direction (X direction) intersecting the length direction.

[0069] However, as Figure 5 shown, in the screen printing method, the printing material filled in the pattern opening 81 of the printing plate is transferred to the object to be printed by the movement of the squeegee 83. A mesh (grid) is formed in the pattern opening 81 of the printing plate by lattice-shaped wires.

[0070] Generally, in the screen printing method, as Figure 4 shown, the length direction of the long strip-shaped mask 90, that is, the main strip-shaped first pattern 90A, is parallel to the printing direction (the moving direction of the squeegee 83) D1. In addition, as Figure 5 shown, it is preferable that the printing direction (the moving direction of the squeegee 83) is inclined by about 11 degrees with respect to the lattice-shaped wires forming the mesh (grid) in the pattern opening 81 of the printing plate.

[0071] In this case, as Figure 4As shown, sometimes a gap V1 (printing white space) is generated in the second pattern 90B in the strip shape extending in the short side direction (X direction) in the mask 90. In particular, the gap V1 (printing white space) is generated on the starting side of the printing direction of the second pattern 90B. If a gap (printing white space) is generated in the mask 90, a gap is also generated in the first conductive semiconductor layer 25 or the first transparent electrode layer 28 during the pattern formation of the first conductive semiconductor layer 25 or the pattern formation of the first transparent electrode layer 28. The generation of the gap (printing white space) in the mask 90 using the screen printing method was studied as follows.

[0072] like Figure 6A As shown, in the first pattern 90A in the shape of a strip extending in the longitudinal direction (Y direction) of the mask 90, the number of meshes (grids) in the printing direction in the pattern opening 81 of the printing plate is large, and the discharged printed material is sufficiently smoothed. Figure 6B As shown, in the second strip-shaped pattern 90B extending in the short-side direction (X direction) of the mask 90, the number of meshes (grids) in the printing direction in the pattern opening 81 of the printing plate is small, and the discharged printed material is not sufficiently smoothed.

[0073] This phenomenon becomes more pronounced the more times a printed version is used.

[0074] In this regard, the inventors of the present application considered increasing the number of meshes (grids) in the printing direction in the pattern opening 81 of the printing plate in the second strip-shaped pattern 90B extending in the short-side direction (X direction) in the mask 90. Specifically, the second strip-shaped pattern 90B crossing the longitudinal direction (Y direction) in the mask 90 is formed not to be orthogonal to the printing direction (moving direction of the scraper 83) D1.

[0075] Therefore, in this embodiment, for the pattern of the first conductive semiconductor layer 25 and the pattern of the first transparent electrode layer 28,

[0076] A pattern having a long strip shape and having a first strip-shaped pattern 25A, 28A extending in the longitudinal direction (Y direction) and a second strip-shaped pattern 25B, 28B intersecting the longitudinal direction,

[0077] The second patterns 25B and 28B form an angle (acute angle side) smaller than 90 degrees, preferably not less than 20 degrees and not more than 40 degrees, with respect to the first patterns 25A and 28A.

[0078] Accordingly, it is possible to form the strip-shaped second pattern 90B in the mask 90 that intersects the length direction (Y direction) so as not to be orthogonal to the printing direction (the moving direction of the squeegee 83), and it is possible to reduce the generation of voids (printing streaks) in the mask 90. Therefore, even when forming a pattern using the mask 90 formed by the screen printing method, it is possible to reduce the occurrence of voids (streaks) in the patterned first conductive semiconductor layer 25 and the first transparent electrode layer 28.

[0079] For example, as Figure 7A shown, the second patterns 25B and 28B in the patterns of the first conductive semiconductor layer 25 and the first transparent electrode layer 28 are arc shapes that protrude in the length direction (Y direction). In this case, the tangents of the arcs of the second patterns 25B and 28B gradually change within a range greater than 0 degrees and less than 90 degrees with respect to the linear first patterns 25A and 28A. Further, at a point that is the tip where the second patterns 25B and 28B protrude, the second patterns 25B and 28B are 90 degrees with respect to the first patterns 25A and 28A. Regarding this point, as long as 90% of the second patterns 25B and 28B, preferably 95%, and more preferably 98% are at an angle less than 90 degrees (acute angle side) with respect to the first patterns 25A and 28A.

[0080] Or, as Figure 7B shown, the second patterns 25B and 28B in the patterns of the first conductive semiconductor layer 25 and the first transparent electrode layer 28 are pointed shapes that protrude in the length direction (Y direction). In this case, the second patterns 25B and 28B are at an angle less than 90 degrees (acute angle side) with respect to the first patterns 25A and 28A. Further, it is preferable that the second patterns 25B and 28B are at an angle of 20 degrees or more and 40 degrees or less (acute angle side) with respect to the first patterns 25A and 28A.

[0081] Or, as Figure 7C shown, the second patterns 25B and 28B in the patterns of the first conductive semiconductor layer 25 and the first transparent electrode layer 28 are inverted pointed shapes that are recessed in the length direction (Y direction). In this case, the second patterns 25B and 28B are at an angle less than 90 degrees (acute angle side) with respect to the first patterns 25A and 28A. Further, it is preferable that the second patterns 25B and 28B are at an angle of 20 degrees or more and 40 degrees or less (acute angle side) with respect to the first patterns 25A and 28A.

[0082] Or, as Figure 7DAs shown, the second patterns 25B and 28B in the pattern of the first-conductivity-type semiconductor layer 25 and the pattern of the first transparent electrode layer 28 are wave-shaped with concavities and convexities in the length direction (Y direction). For example, in a sine wave, the inclination is the largest at the inflection points between the peaks and valleys. Thus, the inclination of the wave shape of the second patterns 25B and 28B gradually changes within a range greater than 0 degrees and less than 90 degrees with respect to the linear first patterns 25A and 28A. In addition, in Figure 7D at a point that is the tip of the peaks and valleys of the second patterns 25B and 28B, the second patterns 25B and 28B are at 90 degrees with respect to the first patterns 25A and 28A. Regarding this point, as long as 90% of the second patterns 25B and 28B, preferably 95%, and more preferably 98% are at an angle less than 90 degrees (acute angle side) with respect to the first patterns 25A and 28A.

[0083] Similarly, as Figure 4 shown, the second-conductivity-type semiconductor layer 35 and the second transparent electrode layer 38 are long strip-shaped patterns, and sometimes have strip-shaped first patterns 35A and 38A extending in the length direction (Y direction) and strip-shaped second patterns 35B and 38B extending in the short side direction (X direction) intersecting the length direction.

[0084] In this case, sometimes voids V1 (printing skips) are generated in the strip-shaped second pattern 90B extending in the short side direction (X direction) in the mask 90. If voids V1 (printing skips) are generated in the mask 90, voids are also generated in the second-conductivity-type semiconductor layer 35 or the second transparent electrode layer 38 during the pattern formation of the second-conductivity-type semiconductor layer 35 or the pattern formation of the second transparent electrode layer 38.

[0085] Regarding this point, the strip-shaped second pattern 90B in the mask 90 intersecting the length direction (Y direction) is formed so as not to be orthogonal to the printing direction (the moving direction of the squeegee 83).

[0086] Therefore, in the present embodiment, for the pattern of the second-conductivity-type semiconductor layer 35 and the pattern of the second transparent electrode layer 38,

[0087] · are long strip-shaped patterns having strip-shaped first patterns 35A and 38A extending in the length direction (Y direction) and strip-shaped second patterns 35B and 38B intersecting the length direction,

[0088] · the second patterns 35B and 38B are at an angle less than 90 degrees, preferably 20 degrees or more and 40 degrees or less (acute angle side) with respect to the first patterns 35A and 38A.

[0089] Accordingly, the strip-shaped second pattern 90B extending in the length direction (Y direction) in the mask 90 can be formed so as not to be orthogonal to the printing direction (the moving direction of the squeegee 83), and the generation of voids (printing skips) in the mask 90 can be reduced. Therefore, even when forming a pattern using the mask 90 formed by the screen printing method, the generation of voids (skips) in the patterned second conductive type semiconductor layer 35 and the second transparent electrode layer 38 can be reduced.

[0090] For example, as Figure 7A shown, the second patterns 35B and 38B in the patterns of the second conductive type semiconductor layer 35 and the second transparent electrode layer 38 are arc shapes protruding in the length direction (Y direction). In this case, the tangents of the arcs of the second patterns 35B and 38B gradually change within a range greater than 0 degrees and less than 90 degrees with respect to the linear first patterns 35A and 38A. Further, at a point that is the tip where the second patterns 35B and 38B protrude, the second patterns 35B and 38B are 90 degrees with respect to the first patterns 35A and 38A. Regarding this point, as long as 90% of the second patterns 35B and 38B, preferably 95%, and more preferably 98% are at an angle less than 90 degrees (acute angle side) with respect to the first patterns 35A and 38A.

[0091] Alternatively, as Figure 7B shown, the second patterns 35B and 38B in the patterns of the second conductive type semiconductor layer 35 and the second transparent electrode layer 38 are pointed shapes protruding in the length direction (Y direction). In this case, the second patterns 35B and 38B are at an angle less than 90 degrees (acute angle side) with respect to the first patterns 35A and 38A. Further, preferably, the second patterns 35B and 38B are at an angle of 20 degrees or more and 40 degrees or less (acute angle side) with respect to the first patterns 35A and 38A.

[0092] Alternatively, as Figure 7C shown, the second patterns 35B and 38B in the patterns of the second conductive type semiconductor layer 35 and the second transparent electrode layer 38 are inverted pointed shapes recessed in the length direction (Y direction). In this case, the second patterns 35B and 38B are at an angle less than 90 degrees (acute angle side) with respect to the first patterns 35A and 38A. Further, preferably, the second patterns 35B and 38B are at an angle of 20 degrees or more and 40 degrees or less (acute angle side) with respect to the first patterns 35A and 38A.

[0093] Alternatively, as Figure 7DAs shown, the second patterns 35B and 38B in the pattern of the second-conductive-type semiconductor layer 35 and the pattern of the second transparent electrode layer 38 are wave-shaped with concavities and convexities in the length direction (Y direction). For example, in a sine wave, the inclination is the largest at the inflection points between the peaks and valleys. Thus, the inclination of the wave shape of the second patterns 35B and 38B gradually changes within a range greater than 0 degrees and less than 90 degrees with respect to the linear first patterns 35A and 38A. In addition, in Figure 7D at a point that is the tip of the peaks and valleys of the second patterns 35B and 38B, the second patterns 35B and 38B are at 90 degrees with respect to the first patterns 35A and 38A. Regarding this, as long as 90% of the second patterns 35B and 38B, preferably 95%, and more preferably 98% form an angle less than 90 degrees (acute angle side) with respect to the first patterns 35A and 38A.

[0094] (Second Embodiment)

[0095] In the first embodiment, in order to suppress the generation of voids (missing printing) in the mask 90 during screen printing, the pattern shape of the mask 90, that is, the pattern shapes of the semiconductor layer and the electrode layer, were changed. In the second embodiment, instead, the angle of the printing plate is changed.

[0096] The inventors of the present application found that even in a case such as Figure 4 as shown, that is:

[0097] · The semiconductor layers 25 and 35 and the transparent electrode layers 28 and 38 are in a long strip shape, having a first pattern 25A, 35A, 28A, 38A in a strip shape extending in the length direction (Y direction) and a second pattern 25B, 35B, 28B, 38B in a strip shape extending in the short side direction (X direction) intersecting the length direction,

[0098] · A long strip-shaped patterned mask 90 is formed, and the mask 90 has a first pattern 90A in a strip shape extending in the length direction (Y direction) and a second pattern 90B in a strip shape extending in the short side direction (X direction) intersecting the length direction,

[0099] it is also possible to reduce the generation of voids (printing missing) in the mask 90 by changing the printing direction D1 (the moving direction of the squeegee 83) with respect to the lattice-shaped filaments of the mesh (grid) in the pattern opening 81 of the pattern of the printing plate as shown in Figure 8 .

[0100] Therefore, in the present embodiment, in the resist formation process using the screen printing method, as shown in Figure 8As shown, the printing direction D1 (the moving direction of the squeegee 83) is 20 degrees or more and 40 degrees or less, preferably 22 degrees or more and 35 degrees or less, and more preferably 25 degrees (the angle on the acute side of the two angles) with respect to the lattice-like silk threads of the mesh (grid) in the pattern opening portion 81 of the printing plate.

[0101] Thereby, the generation of voids (printing blanks) in the mask 90 can be reduced. Therefore, even when forming a pattern using the mask 90 formed by the screen printing method, the situation of forming voids (blanks) in the patterned semiconductor layers 25, 35 and the transparent electrode layers 28, 38 can be reduced.

[0102] As described above, although the embodiments of the present invention have been described, the present invention is not limited to the above embodiments, and various changes and deformations can be made. For example, in the above embodiments, as Figure 2 illustrated, a heterojunction type solar cell and its manufacturing method are exemplified, but it is not limited to the heterojunction type solar cell, and the features of the present invention can be applied to various solar cells such as a homojunction type solar cell and its manufacturing method.

[0103] In addition, in the above embodiments, a solar cell having a crystalline silicon substrate is exemplified, but it is not limited thereto. For example, the solar cell may also have a gallium arsenide (GaAs) substrate.

[0104] Furthermore, in the above embodiments, a solar cell and its manufacturing method are exemplified. However, it is not limited thereto, and the features of the present invention can be applied to various semiconductor elements having a patterned semiconductor layer or electrode layer and their manufacturing methods.

[0105] Description of Reference Numerals

[0106] 1... Solar cell (semiconductor element); 7... First region; 7b, 8b... Bus bar portion; 7f, 8f... Finger portion; 8... Second region; 11... Semiconductor substrate (substrate); 15... Optical adjustment layer; 25... First conductive type semiconductor layer; 25A, 28A... First pattern; 25B, 28B... Second pattern; 25Z... First conductive type semiconductor layer material film; 27... First electrode layer; 28... First transparent electrode layer (electrode layer); 28Z... Transparent electrode layer material film; 29... First metal electrode layer; 35... Second conductive type semiconductor layer; 35A, 38A... First pattern; 35B, 38B... Second pattern; 35Z... Second conductive type semiconductor layer material film; 37... Second electrode layer; 38... Second transparent electrode layer (electrode layer); 39... Second metal electrode layer; 81... Pattern opening portion of the printing plate; 83... Squeegee; 90... Mask; 90A... First pattern; 90B... Second pattern; D1... Printing direction; V1... Void (printing blank).

Claims

1. A semiconductor element, on which a patterned semiconductor layer or electrode layer is formed, characterized in that, the semiconductor layer or the electrode layer has a bus bar portion and a plurality of finger portions that cross the bus bar portion and extend from the bus bar portion, each of the plurality of finger portions has an elongated shape and has a strip-shaped first pattern extending in the length direction and a strip-shaped second pattern crossing the length direction, 90% of the portion of the second pattern has an acute angle side angle with respect to the first pattern that is less than 90 degrees.

2. The semiconductor element according to claim 1, characterized in that, the second pattern is an arc shape protruding in the length direction, a pointed shape protruding in the length direction, an inverted pointed shape recessed in the length direction, or a wave shape with unevenness in the length direction.

3. The semiconductor element according to claim 1 or 2, characterized in that, the semiconductor element is a back electrode type solar cell.

4. The semiconductor element according to claim 1 or 2, characterized in that, one end of the length direction of the first pattern is connected to the bus bar portion, the second pattern is located at the other end of the length direction of the first pattern.

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