Functional Test Method, Device, Electronic Device and Storage Medium for Fuse Circuit

Abstract

The present application discloses a functional test method, device, electronic device and storage medium for a fuse circuit. The method includes: obtaining an operation instruction for controlling a target fuse circuit, where the operation instruction includes: a target operation mode that the target fuse circuit is to enter; obtaining a target object in the target fuse circuit in the target operation mode; obtaining a target processing operation corresponding to the target object; processing the target object according to the target processing operation to obtain a target processing result of the target object, and storing the target processing result. The present application determines the current target operation mode through the operation instruction, and at the same time, automatically determines the target object in the fuse circuit in the target operation mode. Then, the target object is processed by using the target processing operation corresponding to the target object, thereby realizing parallel testing or parameter calibration of multiple test channels of the fuse circuit. There is no longer a need for manual processing, improving work efficiency.

Description

Technical Field

[0001] This application relates to the field of circuit testing, and particularly to a method, device, electronic device and storage medium for functional testing of a fuse circuit. Background Art

[0002] In the prior art, during the process of testing a fuse circuit, manual control of the testing work is required, and the test parameters used during the testing process are fixed, and only serial testing can be performed. Each test can only test a certain path and cannot flexibly meet various different test requirements. Summary of the Invention

[0003] To solve the above technical problems or at least partially solve the above technical problems, this application provides a method, device, electronic device and storage medium for functional testing of a fuse circuit.

[0004] According to one aspect of the embodiments of this application, a method for functional testing of a fuse circuit is provided, including:

[0005] Obtain a working instruction for controlling a target fuse circuit, where the working instruction includes: a target working mode that the target fuse circuit is to enter;

[0006] Obtain a target object in the target fuse circuit in the target working mode, where the target object includes: at least one test group in the target fuse circuit and a test channel corresponding to the test group, or at least one parameter of the target fuse circuit;

[0007] Obtain a target processing operation corresponding to the target object;

[0008] Process the target object according to the target processing operation to obtain a target processing result of the target object, and store the target processing result.

[0009] Further, the obtaining of the target object in the target fuse circuit in the target working mode includes:

[0010] In the case where the target working mode is a circuit testing mode, detect at least one selection operation acting on a target test interface displayed on a host computer, where the target test interface includes a plurality of different test groups and a test channel corresponding to each test group;

[0011] Based on the selection operation, determine at least one target test group and at least one target test channel included in the target test group;

[0012] Determine the target test group and the target test channel as the target object.

[0013] Further, obtaining the target object in the target fuse circuit in the target working mode includes:

[0014] When the test mode is the parameter calibration mode, obtaining the calibration requirements, and extracting the parameters to be calibrated currently by the fuse circuit tester from the calibration requirements, where the parameters to be calibrated include at least the internal clock and internal voltage of the fuse circuit tester;

[0015] Determining the parameters to be calibrated as the target object.

[0016] Further, processing the target object according to the target processing operation to obtain the target processing result of the target object includes:

[0017] Obtaining the test priority of the target test group;

[0018] Performing a function test on the target test channels in the target test group according to the test priority to obtain the test results corresponding to each target test channel in the target test group;

[0019] Wherein, the function test includes: locking function test, unlocking function test, and self-destruction function test.

[0020] Further, performing a function test on the target test channels in the target test priority according to the test priority to obtain the test results corresponding to each target channel test in the target test group includes:

[0021] Obtaining the configuration request triggered on the target test interface;

[0022] Responding to the configuration request and displaying the test parameter setting interface;

[0023] Detecting the input operation acting on the test parameter setting interface, and determining the parameter values corresponding to the various test parameters displayed on the test parameter setting interface based on the input operation;

[0024] Based on the order of the test priority, performing a function test on the target test channels in each target test group using the parameter values to obtain the test results corresponding to the target test channels.

[0025] Further, processing the target object according to the target processing operation to obtain the target processing result of the target object includes:

[0026] When the target object is the internal clock of the fuse circuit tester, outputting to the target fuse circuit according to the clock pulse width preset by the host computer to obtain the clock test result;

[0027] Use the clock test result to calibrate the internal clock of the fuse circuit tester.

[0028] Further, processing the target object according to the target processing operation to obtain the target processing result of the target object includes:

[0029] When the target object is the internal voltage of the fuse circuit tester, send a control instruction to the power supply device so that the power supply device supplies power to the host computer according to the control instruction;

[0030] Collect the voltage test result of the target fuse circuit, and use the clock test result to calibrate the internal voltage of the fuse circuit tester.

[0031] According to another aspect of the embodiments of the present application, there is also provided a functional test device for a fuse circuit, including:

[0032] A receiving module, configured to obtain a working instruction for controlling a target fuse circuit, where the working instruction includes: a target working mode that the target fuse circuit is to enter;

[0033] A first obtaining module, configured to obtain a target object in the target fuse circuit in the target working mode, where the target object includes: at least one test group in the target fuse circuit and a test channel corresponding to the test group, or at least one parameter of the target fuse circuit;

[0034] A second obtaining module, configured to obtain a target processing operation corresponding to the target object;

[0035] A processing module, configured to process the target object according to the target processing operation to obtain a target processing result of the target object, and store the target processing result.

[0036] According to another aspect of the embodiments of the present application, there is also provided a storage medium, which includes a stored program, and when the program runs, it executes the above steps.

[0037] According to another aspect of the embodiments of the present application, there is also provided an electronic device, including a processor, a communication interface, a memory, and a communication bus. Among them, the processor, the communication interface, and the memory communicate with each other through the communication bus; where: the memory is used to store a computer program; the processor is used to execute the steps in the above method by running the program stored on the memory.

[0038] The embodiments of the present application also provide a computer program product containing instructions, which when running on a computer, causes the computer to execute the steps in the above method.

[0039] The above technical solution provided by the embodiment of the present application has the following advantages compared with the prior art: The method provided by the embodiment of the present application determines the current target working mode through a work instruction. At the same time, it automatically determines the target object in the fuse circuit under the target working mode. Then, the target object is processed by using the target processing operation corresponding to the target object, thereby realizing parallel testing or parameter calibration of multiple test channels of the fuse circuit. It is no longer necessary to manually process, improving work efficiency. Brief Description of the Drawings

[0040] The drawings herein are incorporated into the specification and constitute a part of this specification, showing embodiments consistent with the present application, and are used together with the specification to explain the principles of the present application.

[0041] In order to more clearly illustrate the technical solutions in the embodiments of the present application or the prior art, the following will briefly introduce the drawings required for use in the description of the embodiments or the prior art. Obviously, for those of ordinary skill in the art, without creative efforts, other drawings can also be obtained based on these drawings.

[0042] Figure 1 It is a flowchart of a function test method for a fuse circuit provided by an embodiment of the present application;

[0043] Figure 2 It is a flowchart of a function test method for a fuse circuit provided by another embodiment of the present application;

[0044] Figure 3 It is a schematic diagram of a target test interface provided by an embodiment of the present application;

[0045] Figure 4 It is a flowchart of a function test method for a fuse circuit provided by another embodiment of the present application;

[0046] Figure 5 It is a schematic diagram of a test parameter setting interface provided by an embodiment of the present application;

[0047] Figure 6 It is a schematic diagram of a test fuse circuit provided by an embodiment of the present application;

[0048] Figure 7 It is a block diagram of a function test device for a fuse circuit provided by an embodiment of the present application;

[0049] Figure 8 It is a schematic diagram of a fuse circuit tester provided by an embodiment of the present application. Detailed Embodiments

[0050] To make the objectives, technical solutions, and advantages of the embodiments of this application clearer, the technical solutions in the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings in the embodiments of this application. Obviously, the described embodiments are only a part rather than all of the embodiments of this application. The illustrative embodiments of this application and their descriptions are used to explain this application and do not constitute an improper limitation to this application. All other embodiments obtained by those of ordinary skill in the art based on the embodiments in this application without creative efforts shall fall within the scope of protection of this application.

[0051] It should be noted that, in this text, relational terms such as "first" and "second" are only used to distinguish one entity or operation from another similar entity or operation, and do not necessarily require or imply any actual relationship or sequence between these entities or operations. Moreover, the term "comprising", "including" or any other variant thereof is intended to cover a non-exclusive inclusion, such that a process, method, article or device comprising a series of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such process, method, article or device. Without further limitation, an element defined by the phrase "comprising a..." does not exclude the existence of additional identical elements in the process, method, article or device comprising the element.

[0052] The embodiments of this application provide a method, apparatus, electronic device, and storage medium for functional testing of a fuse circuit. The method provided by the embodiments of the present invention can be applied to any required electronic device. For example, it can be an electronic device such as a server, a terminal, etc., which is not specifically limited herein. For the convenience of description, it will be hereinafter simply referred to as an electronic device.

[0053] According to one aspect of the embodiments of this application, a method embodiment of a method for functional testing of a fuse circuit is provided. Figure 1 It is a flowchart of a method for functional testing of a fuse circuit provided by the embodiments of this application, as Figure 1 shown, the method includes:

[0054] Step S11, obtaining a working instruction for controlling a target fuse circuit, where the working instruction includes: a target working mode that the target fuse circuit is to enter.

[0055] The method provided by the embodiments of this application is applied to a circuit tester, and a program for testing / calibrating a fuse circuit is deployed in the circuit tester. Specifically, the circuit tester includes: a host computer and a test board. The test board is used to execute corresponding test / calibration operations according to the instructions output by the host computer. A data processing core circuit, a test function circuit, etc. are deployed on the test board.

[0056] In the embodiment of the present application, the data processing core circuit integrates power management. The backplane can obtain power from the data processing core circuit, reducing the design cost of the backplane and simplifying the design difficulty. At the same time, the data processing core circuit has two DDR3s, with a total of 1GB, connected to the PS side of the ZYNQ. The data processing core circuit has reasonable wiring and a compact design, 50mm×50mm, which is beneficial to designing a smaller functional backplane. There are rich GPIO / differential pairs, and there are up to 200 IOs (100 pairs of differentials) on the core board.

[0057] In the embodiment of the present application, the test function circuit includes: a timing control circuit, an output signal waveform acquisition circuit, a power supply circuit, and so on. Among them, the output signal waveform acquisition circuit includes 8 ADCs, and each is responsible for time-division acquisition of four signals. At the same time, 8-channel parallel acquisition of signal waveforms can be performed. The ADC chip is selected as ADC-128S102CIMT, which is an 8-channel, 12-bit precision AD conversion chip. The acquisition rate is 500ksps - 1Msps. The signal waveform to be acquired is a pulse of dozens of microseconds. According to the sampling theorem, this output waveform can be captured.

[0058] In the embodiment of the present application, it is detected whether the user triggers a control operation on the upper computer in the circuit tester. When a control operation is detected, the target fuse circuit that needs to be tested / calibrated currently is determined. Then, the selected operation triggered by the user is detected to determine the target working mode selected by the user, and a working instruction is generated based on the target working mode. The target working modes include: a circuit test mode and a parameter calibration mode.

[0059] Step S12, obtain the target object in the target fuse circuit in the target working mode, where the target object includes: at least one test group in the target fuse circuit and the test channels corresponding to the test group, or at least one parameter of the target fuse circuit.

[0060] In the embodiment of the present application, as Figure 2 shown, step S12, obtaining the target object in the target fuse circuit in the target working mode includes the following steps A1 - A3:

[0061] Step A1, when the target working mode is the circuit test mode, detect at least one selection operation acting on the target test interface displayed on the upper computer, where the target test interface includes a plurality of different test groups and the test channels corresponding to each test group.

[0062] Step A2, determine at least one target test group and at least one target test channel included in the target test group based on the selection operation.

[0063] Step A3, determine the target test group and the target test channel as the target object.

[0064] In an embodiment of the present application, when the target working mode is the circuit test mode, at least one selection operation acting on the target test interface displayed on the host computer is detected. It should be noted that the target test interface displayed on the host computer includes: a plurality of different test groups, and the test channels corresponding to each test group. As Figure 3 shown, the target test interface includes: the first test group, the second test group, the third test group, and the fourth test group. Specifically, the selection operation triggered by the user based on the target test interface can be detected to determine the test channels included in each test group.

[0065] In an embodiment of the present application, at least one selection operation acting on the target test interface is detected, the test group selected by the selection operation is determined as the target test group, and at least one target test channel included in the target test group is also determined based on the selection operation. For example: the target test groups include: the first test group, the second test group, and the third test group. Among them, the target test channels included in the first test group are: channel 1, channel 2, and channel 3. The target test channels included in the second test group are: channel 4, channel 5, and channel 6. The target test channels included in the third test group are: channel 1 and channel 8. One or more combinations of lock test, unlock test, and self-destruction test can be set for each channel.

[0066] In an embodiment of the present application, in step S12, the target object in the target fuse circuit in the target working mode is obtained. As Figure 4 shown, it includes the following steps B1 - B2:

[0067] Step B1, when the test mode is the parameter calibration mode, the calibration requirement is obtained, and the parameter to be calibrated is extracted from the calibration requirement. Among them, the parameter to be calibrated includes at least the clock and voltage.

[0068] Step B2, the parameter to be calibrated is determined as the target object.

[0069] In an embodiment of the present application, when the test mode is the parameter calibration mode, the calibration requirement uploaded by the user is obtained. The calibration requirement includes the parameter to be calibrated, and the parameter to be calibrated can be the clock and voltage.

[0070] Step S13, the target processing operation corresponding to the target object is obtained.

[0071] In an embodiment of the present application, since different target objects correspond to different processing operations, the target processing operation corresponding to the target object can be determined based on the pre-set correspondence between the object and the processing operation through this correspondence. For example: when the target object is the clock, calibration is performed using a preset pulse width. When the target object is the voltage, calibration can be performed by external power supply and voltage acquisition.

[0072] Step S14: Process the target object according to the target processing operation, obtain the target processing result of the target object, and store the target processing result.

[0073] In the embodiment of the present application, in step S14, processing the target object according to the target processing operation to obtain the target processing result of the target object includes the following steps C1 - C2:

[0074] Step C1: Obtain the test priority of the target test group.

[0075] In the embodiment of the present application, obtaining the test priority of the target test group may be to determine the test priority of the target test group according to the display order of the target test group on the target test interface.

[0076] Step C2: Perform a function test on the target test channels in the target test group according to the test priority to obtain the test results corresponding to each target test channel in the target test group.

[0077] In the embodiment of the present application, the function test includes: a latching function test, an unlocking function test, and a self - destruction function test.

[0078] In the embodiment of the present application, performing a function test on the target test channels in the target test priority according to the test priority to obtain the test results corresponding to each target channel test in the target test group includes the following steps:

[0079] Step C201: Obtain the configuration request triggered on the target test interface.

[0080] Step C202: In response to the configuration request, display the test parameter setting interface.

[0081] Step C203: Detect the input operation on the test parameter setting interface, and determine the parameter values corresponding to the respective test parameters displayed on the test parameter setting interface based on the input operation.

[0082] Step C204: Based on the order of the test priority, use the parameter values to perform a function test on the target test channels in each target test group to obtain the test results corresponding to the target test channels.

[0083] In the embodiment of the present application, obtain the click operation on the target test interface. If the trigger position of the click operation matches the preset position, it is determined that the configuration request is triggered. At this time, the host computer responds to the configuration request and displays the test parameter setting interface.

[0084] In the embodiment of the present application, multiple test parameters are displayed in the test parameter setting interface, such as Figure 5As shown, the test parameters include: latching voltage, unlocking voltage, self-destruction voltage, and also include the switch action parameters during the test, such as: latching charging time, latching discharging time, latching impact explosion force, unlocking charging time, unlocking discharging time, unlocking impact explosion time, self-destruction charging time, self-destruction discharging time, self-destruction timeout time. Specifically, the user can input the parameter values corresponding to each test parameter in the test parameter setting interface. Therefore, the host computer can detect the input operation in the test parameter setting interface and determine the parameter values corresponding to each test parameter based on the input operation.

[0085] In the embodiment of the present application, based on the order of the test priorities, functional tests are performed on the target test channels in each target test group using the parameter values to obtain the test results corresponding to the target test channels.

[0086] As an example, the host computer can simultaneously perform functional tests on each target test channel in the target test group. Refer to Figure 6 , and the specific functional tests performed on the target fuse circuit in parallel are as follows:

[0087] Latching test: (1) Close switch K2, and after a duration of T2_K2 (2 s), open switch K2. (2) Close switch K1, wait for time T2_K1 (100 ms), then open switch K1, and at the same time close switches K3 and K4. (3) While closing K1, wait for time T1_K3 and then close switch K2, and after a delay time T2_K3, open switch K2.

[0088] Unlocking test: (1) Close switch K2, and after a duration of T2_K2 (2 s), open switch K2. (2) Close switch K1, wait for time T2_K1 (100 ms), then open switch K1, and at the same time close switches K3 and K4. (3) While closing K1, wait for time T1_K3 and then close switch K2, and after a delay time T2_K3, open switch K2. (4) While closing switch K1, start collecting the resistance voltage across R1 to judge the unlocking situation. If the output voltage is greater than the Vth (5 V) pulse, then the unlocking is normal.

[0089] Self-destruction test: (1) Close switch K2, and after a duration of T2_K2 (2 s), open switch K2. (2) Close switch K1, wait for time T2_K1 (100 ms), then open switch K1, and at the same time close switches K3 and K4. (3) While closing switch K1, start collecting the resistance voltage across R1 to judge the self-destruction situation. If within T3 (99 s), the output voltage is greater than the Vth (25 V) pulse, then the self-destruction is normal.

[0090] The method provided by the embodiment of the present application can realize the selection of test channels and test types, and the test parameters can be set, which improves the flexibility and adaptability of the test work. At the same time, the test process automatically executes in parallel according to the selected multiple test groups, no longer requires manual testing, and can automatically test three functions of 32 circuits according to the configuration each time, greatly improving the work efficiency.

[0091] In the embodiment of the present application, in step S14, the target object is processed according to the target processing operation to obtain the target processing result of the target object, including the following steps D1 - D2:

[0092] Step D1, when the target object is the internal clock of the fuse circuit tester, output the clock pulse width preset by the host computer to the target fuse circuit to obtain the clock test result;

[0093] Step D2, use the clock test result to correct the internal clock of the fuse circuit tester.

[0094] In the embodiment of the present application, in step S14, the target object is processed according to the target processing operation to obtain the target processing result of the target object, including the following steps E1 - E2:

[0095] Step E1, when the target object is the internal voltage of the fuse circuit tester, send a control instruction to the power supply device so that the power supply device supplies power to the host computer according to the control instruction;

[0096] Step E2, collect the voltage test result of the target fuse circuit, and use the clock test result to correct the internal voltage of the fuse circuit tester.

[0097] The method provided by the embodiment of the present application makes the voltage value and pulse width time value of the output voltage pulse of the measured circuit more accurate through the above compensation algorithm. Therefore, using the voltage value in the obtained voltage test result to correct the internal voltage of the fuse circuit tester, and using the pulse width time value in the obtained clock test result to correct the internal clock of the fuse circuit tester can

[0098] The method provided by the embodiment of the present application determines the current target working mode through the work instruction, and at the same time automatically determines the target object in the fuse circuit under the target working mode. Then, the target object is processed by using the target processing operation corresponding to the target object, thereby realizing parallel testing or parameter calibration of multiple test channels of the fuse circuit. There is no need for manual processing, which improves the work efficiency.

[0099] Figure 7 It is a block diagram of a test device for a fuse circuit provided by an embodiment of the present application. This device can be implemented as part or all of an electronic device through software, hardware, or a combination of both. AsFigure 7 As shown in the figure, the device includes:

[0100] A receiving module 71, configured to obtain a working instruction for controlling a target fuze circuit, where the working instruction includes: a target working mode that the target fuze circuit is to enter;

[0101] A first obtaining module 72, configured to obtain a target object in the target fuze circuit in the target working mode, where the target object includes: at least one test group in the target fuze circuit and a test channel corresponding to the test group, or at least one parameter of the target fuze circuit;

[0102] A second obtaining module 73, configured to obtain a target processing operation corresponding to the target object;

[0103] A processing module 74, configured to process the target object according to the target processing operation to obtain a target processing result of the target object, and store the target processing result.

[0104] In an embodiment of the present application, the first obtaining module is configured to, when the target working mode is a circuit test mode, detect at least one selection operation acting on a target test interface displayed on a host computer, where the target test interface includes a plurality of different test groups and a test channel corresponding to each test group; determine at least one target test group and at least one target test channel included in the target test group based on the selection operation; and determine the target test group and the target test channel as the target object.

[0105] In an embodiment of the present application, the first obtaining module is configured to, when the test mode is a parameter calibration mode, obtain a calibration requirement and extract a parameter to be calibrated from the calibration requirement, where the parameter to be calibrated includes at least a clock and a voltage; and determine the parameter to be calibrated as the target object.

[0106] In an embodiment of the present application, the processing module is configured to obtain a test priority of the target test group; perform a function test on the target test channels in the target test group according to the test priority to obtain a test result corresponding to each target test channel in the target test group; where the function test includes: a latching function test, an unlocking function test, and a self-destruction function test.

[0107] In an embodiment of the present application, the processing module is configured to obtain a configuration request triggered on the target test interface; in response to the configuration request, display a test parameter setting interface; detect an input operation acting on the test parameter setting interface, and determine a parameter value corresponding to each test parameter displayed on the test parameter setting interface based on the input operation; and perform a function test on the target test channels in each target test group by using the parameter value in the order of the test priority to obtain a test result corresponding to the target test channel.

[0108] In an embodiment of the present application, a processing module is configured to, when the target object is a clock, output to a target fuse circuit according to a clock pulse width preset by a host computer to obtain a clock test result, and correct the clock by using the clock test result.

[0109] In an embodiment of the present application, a processing module is configured to, when the target object is a voltage, send a control instruction to a power supply device so that the power supply device supplies power to the host computer according to the control instruction; collect a voltage test result of the target fuse circuit, and correct the voltage by using the voltage test result.

[0110] Figure 8 The figure is a schematic diagram of a fuse circuit tester provided by an embodiment of the present application. As Figure 8 shown, the fuse circuit tester includes: a touch screen, a control acquisition circuit, a test interface, a device DC power supply, and a programmable power supply; wherein, the touch screen is connected to the control acquisition circuit, the control acquisition circuit is connected to the test interface, the output end of the device DC power supply is respectively connected to the touch screen and the control acquisition circuit, and the output end of the programmable power supply is connected to the control acquisition circuit. The input ends of the device DC power supply and the programmable power supply are both connected to a 220V AC power supply.

[0111] An embodiment of the present application further provides an electronic device, which may include: a processor, a communication interface, a memory, and a communication bus. Among them, the processor, the communication interface, and the memory complete communication with each other through the communication bus.

[0112] The memory is used to store a computer program.

[0113] The processor is configured to implement the steps of the above embodiment when executing the computer program stored on the memory.

[0114] The communication bus mentioned in the above terminal may be a Peripheral Component Interconnect (PCI) bus or an Extended Industry Standard Architecture (EISA) bus, etc. This communication bus can be divided into an address bus, a data bus, a control bus, etc.

[0115] The communication interface is used for communication between the above terminal and other devices.

[0116] The memory may include a Random Access Memory (RAM), and may also include a non-volatile memory, such as at least one disk memory. Optionally, the memory may also be at least one storage device located far from the aforementioned processor.

[0117] The above-mentioned processor may be a general-purpose processor, including a central processing unit (CPU for short), a network processor (NP for short), etc.; it may also be a digital signal processor (DSP for short), an application specific integrated circuit (ASIC for short), a field-programmable gate array (FPGA for short), or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components.

[0118] In another embodiment provided by the present application, a computer-readable storage medium is further provided. Instructions are stored in the computer-readable storage medium. When it runs on a computer, it causes the computer to execute the test method of the fuse circuit described in any one of the above embodiments.

[0119] In another embodiment provided by the present application, a computer program product containing instructions is further provided. When it runs on a computer, it causes the computer to execute the test method of the fuse circuit described in any one of the above embodiments.

[0120] In the above embodiments, it can be implemented in whole or in part by software, hardware, firmware, or any combination thereof. When implemented using software, it can be implemented in whole or in part in the form of a computer program product. The computer program product includes one or more computer instructions. When the computer program instructions are loaded and executed on a computer, the processes or functions described in the embodiments of the present application are generated in whole or in part. The computer may be a general-purpose computer, a special-purpose computer, a computer network, or other programmable devices. The computer instructions may be stored in a computer-readable storage medium, or transmitted from one computer-readable storage medium to another computer-readable storage medium. For example, the computer instructions may be transmitted from a website, computer, server, or data center to another website, computer, server, or data center by wire (such as coaxial cable, optical fiber, digital subscriber line) or wirelessly (such as infrared, wireless, microwave, etc.). The computer-readable storage medium may be any available medium that the computer can access, or a data storage device such as a server or data center that includes one or more integrated available media. The available medium may be a magnetic medium (such as a floppy disk, hard disk, magnetic tape), an optical medium (such as a DVD), or a semiconductor medium (such as a solid state disk).

[0121] The above are only the preferred embodiments of the present application and are not intended to limit the protection scope of the present application. Any modifications, equivalent replacements, improvements, etc. made within the spirit and principle of the present application are included in the protection scope of the present application.

[0122] The above are only the specific implementation manners of the present application, enabling those skilled in the art to understand or implement the present application. Various modifications to these embodiments will be obvious to those skilled in the art, and the general principles defined herein can be implemented in other embodiments without departing from the spirit or scope of the present application. Therefore, the present application will not be limited to these embodiments shown herein, but rather to the broadest scope consistent with the principles and novel features claimed herein.

Claims

1. A functional test method for a fuse circuit, the method being applied to a fuse circuit tester, characterized in that, The method includes: Obtaining a working instruction for controlling a target fuse circuit, where the working instruction includes: a target working mode to which the target fuse circuit is to enter; Obtaining a target object in the target fuse circuit in the target working mode, where the target object includes: at least one test group in the target fuse circuit and a test channel corresponding to the test group, or at least one parameter of the target fuse circuit; Obtaining a target processing operation corresponding to the target object; Processing the target object according to the target processing operation to obtain a target processing result of the target object, and storing the target processing result; The obtaining a target object in the target fuse circuit in the target working mode includes: when the target working mode is a parameter calibration mode, obtaining a calibration requirement, and extracting a parameter to be calibrated currently by the fuse circuit tester from the calibration requirement, where the parameter to be calibrated includes at least the internal clock and internal voltage of the fuse circuit tester; determining the parameter to be calibrated as the target object; The processing the target object according to the target processing operation to obtain a target processing result of the target object includes: when the target object is the internal clock of the fuse circuit tester, outputting a clock pulse width preset by the host computer to the target fuse circuit to obtain a clock test result; correcting the internal clock of the fuse circuit tester by using the clock test result; When the target object is the internal voltage of the fuse circuit tester, sending a control instruction to a power supply device to enable the power supply device to supply power to the host computer according to the control instruction; collecting a voltage test result of the target fuse circuit, and correcting the internal voltage of the fuse circuit tester by using the voltage test result.

2. The method according to claim 1, wherein The obtaining a target object in the target fuse circuit in the target working mode includes: When the target working mode is a circuit test mode, detecting at least one selection operation acting on a target test interface displayed on the host computer, where the target test interface includes a plurality of different test groups and a test channel corresponding to each test group; Determining at least one target test group and at least one target test channel included in the target test group based on the selection operation; Determining the target test group and the target test channel as the target object.

3. The method according to claim 2, wherein The processing the target object according to the target processing operation to obtain a target processing result of the target object includes: Obtaining a test priority of the target test group; Performing a function test on the target test channels in the target test group according to the test priority to obtain a test result corresponding to each target test channel in the target test group; Wherein, the function test includes: a latching function test, an unlocking function test, and a self-destruction function test.

4. The method according to claim 3, characterized in that, The performing a function test on the target test channels in the target test group according to the test priority to obtain a test result corresponding to each target test channel in the target test group includes: Obtain a configuration request triggered on the target test interface; In response to the configuration request, display a test parameter setting interface; Detect an input operation acting on the test parameter setting interface, and determine the parameter values corresponding to each test parameter displayed on the test parameter setting interface based on the input operation; Based on the order of test priorities, perform a function test on the target test channels in each target test group using the parameter values to obtain the test results corresponding to the target test channels.

5. A functional test device for a fuse circuit, characterized in that, Includes: A receiving module for obtaining a working instruction for controlling a target fuse circuit, where the working instruction includes: the target working mode that the target fuse circuit is to enter; A first obtaining module for obtaining a target object in the target fuse circuit in the target working mode, where the target object includes: at least one test group in the target fuse circuit and the test channels corresponding to the test group, or at least one parameter of the target fuse circuit; A second obtaining module for obtaining a target processing operation corresponding to the target object; A processing module for processing the target object according to the target processing operation to obtain a target processing result of the target object and storing the target processing result; Wherein, the first obtaining module includes: an extraction sub-module and a determination sub-module; The extraction sub-module is configured to, when the target working mode is a parameter calibration mode, obtain a calibration requirement and extract the parameters to be calibrated by the fuse circuit tester currently from the calibration requirement, where the parameters to be calibrated include at least the internal clock and internal voltage of the fuse circuit tester; The determination sub-module is configured to determine the parameter to be calibrated as the target object; Wherein, the processing module includes: a first correction sub-module and a second correction sub-module; The first correction sub-module is configured to, when the target object is the internal clock of the fuse circuit tester, output a clock pulse width preset by the host computer to the target fuse circuit to obtain a clock test result; and correct the internal clock of the fuse circuit tester using the clock test result; The second correction sub-module is configured to, when the target object is the internal voltage of the fuse circuit tester, send a control instruction to a power supply device to enable the power supply device to supply power to the host computer according to the control instruction; collect the voltage test result of the target fuse circuit, and correct the internal voltage of the fuse circuit tester using the voltage test result.

6. A storage medium, characterized in that, The storage medium includes a stored program, where the program, when running, executes the method steps described in any one of claims 1 to 4 above.

7. An electronic device, characterized in that, Includes a processor, a communication interface, a memory, and a communication bus, where the processor, the communication interface, and the memory complete communication with each other through the communication bus; wherein: The memory is used for storing a computer program; The processor is configured to execute the method steps described in any one of claims 1 to 4 by running the program stored on the memory.

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