A method for manufacturing a semiconductor structure
By combining trimethylaluminum solution passivation and annealing with oxide layer treatment, the problem of high trap density at the germanium-silicon layer interface was solved, improving the carrier mobility and semiconductor device performance of the germanium-silicon layer, while saving process costs and time.
Patent Information
- Application Number
- CN202211043321.0
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2022-08-29
- Publication Date
- 2026-03-03
- Estimated Expiration
- 2042-08-29
AI Technical Summary
In the prior art, the high interface trap density of germanium-silicon layers affects the hole mobility and subthreshold swing of MOSFET devices, making it difficult to form germanium-silicon layers with low interface trap density without affecting other performance characteristics of semiconductor devices.
The germanium-silicon layer was passivated using a trimethylaluminum solution to form an Al-O bond passivation layer. Then, an annealing process was used to ensure uniform diffusion of germanium ions. Combined with an oxide layer containing group III metal elements, the germanium ion concentration in the germanium-silicon layer was further increased, resulting in a good crystal structure.
This reduces the interface trap density of the germanium-silicon layer, improves carrier mobility, enhances the performance of semiconductor devices, and reduces process costs and time.
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Figure CN115332083B_ABST
Abstract
Description
Technical Field
[0001] This invention relates to the field of semiconductor manufacturing technology, and in particular to a method for preparing a semiconductor structure. Background Technology
[0002] As the size of semiconductor devices continues to shrink, the drawbacks of the short-channel effect in traditional silicon substrate MOSFET devices are becoming increasingly apparent. In order to improve the hole mobility of semiconductor devices and reduce the short-channel effect, germanium (Ge) is usually doped into the silicon substrate to form a channel region composed of a germanium-silicon layer. Germanium-silicon has a higher hole mobility and a larger band gap than single-crystal silicon. The germanium-silicon layer can improve the hole mobility of semiconductor devices and increase the drive current, thereby improving the performance of MOSFET devices.
[0003] In existing germanium-silicon (GSi) layer fabrication processes, the GSi layer is typically grown directly on the surface of a silicon substrate. However, due to defects on the silicon substrate surface, a good single-crystal GSi structure cannot be formed. These surface defects extend to the surface of the GSi layer, resulting in a high interface trap density. This negatively impacts the hole mobility and subthreshold swing of the MOSFET device. Passivating the top surface of the silicon substrate with a nitrogen-containing solution before forming the GSi layer can reduce the trap density and improve the GSi crystal structure within the layer. However, passivating the silicon substrate affects the performance of the gate structure on the GSi layer. Therefore, forming a GSi layer with a low interface trap density without affecting other semiconductor device performance is crucial for achieving high-performance MOSFET devices. Summary of the Invention
[0004] The purpose of this invention is to provide a method for fabricating a semiconductor structure to solve the problem of high interface traps in the germanium-silicon layer of existing MOSFET devices.
[0005] To achieve the above objectives, the present invention provides a method for preparing a semiconductor structure, comprising:
[0006] A substrate is provided on which a germanium-silicon layer is formed;
[0007] The germanium-silicon layer is passivated at least once using a trimethylaluminum solution, thereby forming a passivation layer on the germanium-silicon layer.
[0008] The germanium-silicon layer is subjected to an annealing process.
[0009] Optionally, after each passivation process of the germanium-silicon layer, the passivation layer is cleaned and purged.
[0010] Optionally, while performing the passivation treatment on the germanium-silicon layer, the germanium-silicon layer and the passivation layer are also subjected to electrical pulse treatment.
[0011] Optionally, the passivation process temperature is 250℃~300℃.
[0012] Optionally, after forming the germanium-silicon layer on the substrate and before performing the passivation process, the method further includes:
[0013] The germanium-silicon layer is subjected to wet cleaning.
[0014] Optionally, the cleaning agent for the wet cleaning is a mixed solution of acetone, hydrofluoric acid, and deionized water.
[0015] Optionally, after the passivation process and before the annealing process, the process further includes:
[0016] An oxide layer containing group III metal elements is formed on the passivation layer;
[0017] The passivation layer and the germanium-silicon layer are subjected to an oxidation process.
[0018] Optionally, the oxide layer is made of an oxide containing oxygen free radicals, which are used to catalyze the oxidation process.
[0019] Optionally, after performing an oxidation process on the passivation layer and the germanium-silicon layer, the process further includes:
[0020] A metal gate is formed on the oxide layer.
[0021] Optionally, the annealing process temperature is 450℃~550℃.
[0022] In the semiconductor structure fabrication method provided by this invention, a trimethylaluminum solution is used to passivate the germanium-silicon layer. Since aluminum ions in the trimethylaluminum solution have a strong binding capacity with oxygen, they can bind to the oxygen in the Ge-O bonds of the germanium-silicon layer, forming a passivation layer containing Al-O bonds on the surface of the germanium-silicon layer. The formation of this passivation layer consumes the germanium-silicon layer, reducing its thickness. Germanium ions also accumulate at the interface between the passivation layer and the germanium-silicon layer. Finally, an annealing process is used to uniformly diffuse the accumulated germanium ions into the germanium-silicon layer, increasing the germanium ion concentration. The energy provided by the annealing process forms a well-formed germanium-silicon crystal structure, thereby providing a germanium-silicon layer with low interface trap density and high carrier mobility, thus improving the performance of the semiconductor device.
[0023] Furthermore, an oxide layer containing group III metal elements is formed on the passivation layer, and the passivation layer and the germanium-silicon layer are subjected to an oxidation process. The group III metal ions in the oxide layer further bind to oxygen in the Ge-O bonds of the passivation layer and the germanium-silicon layer, increasing the concentration of germanium ions in the germanium-silicon layer and providing greater carrier mobility. Simultaneously, when the oxide layer material is an oxide containing oxygen free radicals, these oxygen free radicals can catalyze the oxidation process, reducing the time required for the oxidation process and effectively reducing the thermal budget, thus saving process costs.
[0024] Furthermore, before performing the passivation process on the germanium-silicon layer, the germanium-silicon layer is wet-cleaned using a mixed solution of acetone, hydrofluoric acid, and deionized water. This can remove impurity ions from the germanium-silicon layer, and the acetone cleaning of the germanium-silicon layer can increase the number of Ge-O bonds in the germanium-silicon layer, accelerate the reaction rate of the trimethylaluminum passivation process, and save process time. Attached Figure Description
[0025] Figure 1 A flowchart of a method for fabricating a semiconductor structure is provided for embodiments of the present invention;
[0026] Figures 2-5 A schematic diagram of the corresponding steps of the semiconductor structure fabrication method provided in the embodiments of the present invention;
[0027] The attached figures are labeled as follows:
[0028] 100 - Substrate; 101 - Germanium-silicon layer; 102 - Passivation layer; 103 - Oxide layer; 104 - Metal gate. Detailed Implementation
[0029] The specific embodiments of the present invention will now be described in more detail with reference to the accompanying drawings. The advantages and features of the present invention will become clearer from the following description. It should be noted that the drawings are all in a very simplified form and use non-precise proportions, and are only used to facilitate and clarify the illustration of the embodiments of the present invention.
[0030] In the following text, the terms “first,” “second,” etc., are used to distinguish between similar elements and are not necessarily used to describe a specific order or chronological sequence. It should be understood that these terms, as used herein, may be replaced where appropriate. Similarly, if the methods described herein comprise a series of steps, and the steps presented herein are not necessarily the only possible order in which they can be performed, and some described steps may be omitted and / or other steps not described in the text may be added to the method.
[0031] This embodiment provides a method for fabricating a semiconductor structure. Figure 1This is a flowchart of the method for fabricating the semiconductor structure. Figure 1 As shown, the method for fabricating the semiconductor structure includes:
[0032] Step S1: Provide a substrate and form a germanium-silicon layer on the substrate;
[0033] Step S2: Perform at least one passivation process on the germanium-silicon layer using a trimethylaluminum solution to convert the portion of the germanium-silicon layer away from the substrate into a passivation layer;
[0034] Step S3: Perform an annealing process on the germanium-silicon layer.
[0035] Figures 2-5 This is a schematic diagram of the corresponding steps in the method for fabricating the semiconductor structure provided in this embodiment. Next, we will combine... Figures 2-5 The method for preparing the semiconductor structure is described in detail.
[0036] like Figure 2 As shown, a substrate 100 is provided, which may be an SOI substrate; a germanium-silicon layer 101 is formed on the substrate 100, and the concentration of germanium ions in the germanium-silicon layer 101 is distributed in a gradient, and the concentration of germanium ions in the germanium-silicon layer 101 is smaller the closer to the substrate 100.
[0037] Due to defects on the surface of the substrate 100, a good germanium-silicon single crystal structure cannot be formed on the surface of the substrate 100, making it difficult to form the germanium-silicon layer 101 with a high germanium ion concentration. Furthermore, the crystal structure within the germanium-silicon layer 101 is poor, resulting in a high interface trap density and low carrier mobility in the germanium-silicon layer 101, which fails to meet the process requirements.
[0038] like Figure 3 As shown, the germanium-silicon layer 101 is subjected to wet cleaning using a mixed solution of acetone, hydrofluoric acid, and deionized water. During the wet cleaning process, germanium ions in the germanium-silicon layer 101 polymerize with oxygen ions in the acetone to form Ge-O bonds, resulting in a more stable structure for the free germanium ions in the germanium-silicon layer 101. After the wet cleaning, the germanium-silicon layer 101 is further cleaned with deionized water to remove any residual cleaning agent from its surface. Using deionized water helps prevent the introduction of impurity ions.
[0039] Furthermore, the germanium-silicon layer 101 is passivated using a trimethylaluminum solution. The trimethylaluminum solution contains aluminum ions, and the Al-O bond has a stronger affinity for oxygen than the Ge-O bond. During the passivation process, the Ge-O bonds on the surface of the germanium-silicon layer 101 are transformed into Al-O bonds, resulting in the formation of a passivation layer 102 containing Al-O bonds. When the passivation layer 102 is formed, a portion of the surface area of the germanium-silicon layer 101 is consumed, reducing the thickness of the germanium-silicon layer 101. A large number of germanium ions accumulate at the interface between the passivation layer 102 and the germanium-silicon layer 101, increasing the concentration of germanium ions within the remaining germanium-silicon layer 101.
[0040] The passivation layer 102 is a mixed film containing Al-O bonds, Ge-O bonds, germanium-silicon structure and passivation process byproducts.
[0041] It should be noted that in the semiconductor structure fabrication method provided by this invention, the germanium-silicon layer 101 needs to undergo at least one passivation process. The more times the passivation process is performed, the more Al-O bonds are formed, the greater the thickness of the germanium-silicon layer 101 consumed, and the higher the concentration of germanium ions in the remaining germanium-silicon layer 101. The operator can adjust the number of passivation processes according to actual needs. Since trimethylaluminum is chemically very reactive and will spontaneously combust in air, the passivation process needs to be carried out in an inert gas environment.
[0042] In this embodiment, the passivation process is performed at a temperature of 250°C to 300°C. Simultaneously with the passivation process on the germanium-silicon layer 101, electrical pulse treatment is applied to both the germanium-silicon layer 101 and the passivation layer 102. Each electrical pulse treatment lasts for 250ms, which accelerates the formation of the passivation layer 102 and reduces the process time.
[0043] In addition, in this embodiment, after each passivation process of the germanium-silicon layer 101, the passivation layer 102 is cleaned and purged to remove residual trimethylaluminum and some byproducts generated during the passivation process from the surface of the passivation layer 102, which is beneficial for the next passivation process.
[0044] In other alternative embodiments, the germanium-silicon layer 101 may not be wet-cleaned, and the Ge-O bonds formed during the formation of the germanium-silicon layer 101 are used to react with trimethylaluminum.
[0045] like Figure 4As shown, after the thickness and germanium ion concentration of the germanium-silicon layer 101 meet the process requirements, an oxide layer 103 is formed on the passivation layer 102. The thickness of the oxide layer 103 is 7nm to 10nm, and the material of the oxide layer 103 is an oxide containing group III metal elements and oxygen free radicals. In this embodiment, the oxide layer 103 can be a group III metal oxide such as lanthanum oxide.
[0046] After forming the oxide layer 103 on the passivation layer 102 using atomic layer deposition (ALD), an oxidation process is performed on the oxide layer 103, the passivation layer 102, and the germanium-silicon layer 101. The group III metal ions in the oxide layer 103 have a strong binding effect on oxygen, and the binding ability of Si-O bonds to oxygen is also stronger than that of Ge-O bonds. During the oxidation process, the group III metal ions and the silicon ions in the passivation layer 102 further bind to the oxygen in the Ge-O bonds, thereby increasing the concentration of germanium ions condensed in the germanium-silicon layer 101. Furthermore, the oxygen free radicals in the oxide layer 103 can catalyze the oxidation process. Compared to directly performing a thermal oxidation process on the germanium-silicon layer 101 and the passivation layer 102, using the oxide layer 103 with oxygen free radicals can accelerate the oxidation rate, reduce the heat budget during the oxidation process, protect the crystal structure in the germanium-silicon layer 101, and reduce the recombination of the crystal structure in the germanium-silicon layer 101.
[0047] Furthermore, the germanium-silicon layer 101 is subjected to an annealing process, which causes the germanium ions condensed between the passivation layer 102 and the germanium-silicon layer 101 to diffuse throughout the entire germanium-silicon layer 101. During the diffusion of germanium ions, some of the germanium ions diffuse into the substrate 100. Since the substrate 100 is an SOI substrate, the buried oxide layer therein can act as a barrier layer for the diffusion of germanium ions.
[0048] The annealing process is carried out at a temperature of 450℃ to 550℃. Maintaining a relatively low annealing temperature can prevent the chemical bonds in the germanium-silicon layer 101 from breaking and reforming due to high temperatures during annealing, thereby ensuring the good morphology of the crystal lattice structure within the germanium-silicon layer 101. Furthermore, in this embodiment, a protective gas such as nitrogen is continuously introduced during the annealing process to prevent the germanium-silicon layer 101 from reacting with air and introducing impurities.
[0049] After the annealing process, the germanium-silicon layer 101 has a high germanium concentration and forms a good germanium-silicon lattice structure with silicon. It has a low interface trap density and can provide a large carrier mobility for semiconductor devices, thereby providing better semiconductor device performance.
[0050] like Figure 5As shown, a metal material layer is formed on the oxide layer 103, and a portion of the metal material layer is removed to form a metal gate 104, wherein the material of the metal gate 104 is titanium nitride.
[0051] In other alternative embodiments, the oxide layer 103 and the passivation layer 102 may be removed first, and then the tunnel oxide layer and the metal gate 104 may be formed directly on the germanium-silicon layer 102.
[0052] In summary, in the semiconductor structure fabrication method provided in this embodiment of the invention, a trimethylaluminum solution is used to passivate the germanium-silicon layer 101. Since aluminum ions in the trimethylaluminum solution have a strong binding ability with oxygen, they can bind to the oxygen in the Ge-O bonds of the germanium-silicon layer, resulting in the formation of a passivation layer 102 containing Al-O bonds on the surface of the germanium-silicon layer 101. The formation of the passivation layer 102 consumes the germanium-silicon layer 101, reducing its thickness. Germanium ions also condense at the interface between the passivation layer 102 and the germanium-silicon layer 101. Finally, an annealing process is used to uniformly diffuse the condensed germanium ions into the germanium-silicon layer 101, increasing the germanium ion concentration in the germanium-silicon layer 101. The energy provided by the annealing process forms a well-formed germanium-silicon crystal structure, thereby providing a germanium-silicon layer 101 with a low interface trap density and a high carrier mobility, thus improving the performance of the semiconductor device.
[0053] Furthermore, an oxide layer 103 containing a group III metal element is formed on the passivation layer 102, and the passivation layer 102 and the germanium-silicon layer 101 are oxidized. The group III metal ions in the oxide layer 103 further bind oxygen in the Ge-O bonds of the passivation layer 102 and the germanium-silicon layer 101, increasing the concentration of germanium ions in the germanium-silicon layer 101 to provide greater carrier mobility. Simultaneously, when the oxide layer 103 is an oxide containing oxygen free radicals, these oxygen free radicals can catalyze the oxidation process, reducing the time required for the oxidation process and effectively reducing the thermal budget, thus saving process costs.
[0054] Furthermore, before performing the passivation process on the germanium-silicon layer 101, the germanium-silicon layer 101 is wet-cleaned using a mixed solution of acetone, hydrofluoric acid, and deionized water. This can remove impurity ions from the germanium-silicon layer 101, and the acetone cleaning of the germanium-silicon layer can increase the number of Ge-O bonds in the germanium-silicon layer 101, accelerate the reaction rate of the trimethylaluminum passivation process, and save process time.
[0055] The above are merely preferred embodiments of the present invention and do not constitute any limitation on the present invention. Any equivalent substitutions or modifications made by those skilled in the art to the technical solutions and content disclosed in the present invention without departing from the scope of the present invention shall be deemed to have remained within the protection scope of the present invention.
Claims
1. A method of fabricating a semiconductor structure, characterized by, The application relates to a method for forming a metal gate on a substrate, comprising the following steps: providing a substrate, and forming a germanium-silicon layer on the substrate; performing at least one passivation process on the germanium-silicon layer by using a trimethylaluminum solution, a passivation layer is formed on the germanium-silicon layer, and germanium ions are condensed at the joint of the passivation layer and the germanium-silicon layer; after the thickness of the germanium-silicon layer and the concentration of germanium ions reach the process requirements, an atomic layer deposition process is used to form an oxidation layer on the passivation layer, the material of the oxidation layer is an oxide containing a group III metal element and an oxygen radical, the binding ability of group III metal ions in the oxidation layer to oxygen is stronger than that of a Ge-O bond to oxygen, and the binding ability of a Si-O bond to oxygen is also stronger than that of the Ge-O bond to oxygen; performing an annealing process on the germanium-silicon layer, so that the germanium ions condensed between the passivation layer and the germanium-silicon layer diffuse into the whole germanium-silicon layer.
2. The method of producing a semiconductor structure according to claim 1, wherein After each passivation process on the germanium-silicon layer, the passivation layer is cleaned and purged.
3. The method of producing a semiconductor structure according to claim 1, wherein The germanium-silicon layer and the passivation layer are subjected to an electric pulse treatment at the same time when the passivation process is performed on the germanium-silicon layer.
4. The method of producing a semiconductor structure according to claim 1, wherein The temperature of the passivation process is 250 DEG C to 300 DEG C.
5. The method of producing a semiconductor structure according to claim 1, wherein After the germanium-silicon layer is formed on the substrate, before the passivation process is performed, the method further comprises the following steps: performing a wet cleaning process on the germanium-silicon layer.
6. The method of producing a semiconductor structure according to claim 5, wherein The cleaning agent of the wet cleaning process is a mixed solution of acetone, hydrofluoric acid and deionized water.
7. The method of producing a semiconductor structure according to claim 6, wherein After the passivation process is performed, before the annealing process is performed, the method further comprises the following steps: performing an oxidation process on the passivation layer and the germanium-silicon layer.
8. The method of producing a semiconductor structure according to claim 7, wherein The material of the oxidation layer is an oxide containing an oxygen radical, and the oxygen radical is used to catalyze the oxidation process.
9. The method of producing a semiconductor structure according to claim 7, wherein After the oxidation process is performed on the passivation layer and the germanium-silicon layer, the method further comprises the following steps: forming a metal gate on the oxidation layer.
10. The method of producing a semiconductor structure according to claim 1, wherein The temperature of the annealing process is 450 DEG C to 550 DEG C.
Citation Information
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