Wafer arc suppression method and semiconductor device

By using non-process gases and preset strategies to adjust the potential of the lower RF power supply and the lower electrode substrate during the wafer process, the arc discharge problem caused by the potential difference between the wafer and the lower electrode is solved, and the wafer yield is improved.

CN115332124BActive Publication Date: 2025-09-16BEIJING NAURA MICROELECTRONICS EQUIP CO LTD
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Patent Information

Application Number
CN202211031304.5
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2022-08-26
Publication Date
2025-09-16
Estimated Expiration
2042-08-26

AI Technical Summary

Technical Problem

During the wafer processing process, the potential difference between the wafer and the lower electrode is too large due to the change in ESC voltage, causing arc discharge, resulting in wafer damage and reducing the effective wafer yield.

Method used

Before the lower RF power supply is turned on and/or after it is turned off in the main process stage, non-process gas is introduced into the reaction chamber, and through the preset start-up time and grounding time strategy, the lower RF power supply is used to excite the plasma and the lower electrode substrate is grounded, and the potential of the wafer and the lower electrode is adjusted to approach 0, thereby reducing the potential difference.

Benefits of technology

It effectively reduces the damage to the wafer caused by arc discharge and increases the yield of effective wafers.

✦ Generated by Eureka AI based on patent content.

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Abstract

The present application discloses a method for suppressing arcs on a wafer and a semiconductor device. Before the lower RF power supply is turned on in the main process stage and / or after the lower RF power supply is turned off in the main process stage, a non-process gas is introduced into the reaction chamber; according to a preset start-up time setting strategy, the lower RF power supply is turned on so that the lower RF power supply excites the non-process gas in the reaction chamber to form a plasma, so that the potential of the wafer approaches 0; according to a preset grounding time setting strategy, the substrate of the lower electrode is grounded so that the potential of the substrate of the lower electrode approaches 0. It can be seen that the present application can reduce the impact of the change in ESC voltage on the potential of the wafer and the substrate of the lower electrode during the adsorption / desorption process, thereby reducing the potential difference between the wafer and the lower electrode, achieving the effect of minimizing or eliminating arcs on the wafer, thereby effectively reducing the damage to the wafer caused by wafer arc discharge and increasing the yield of effective wafers.
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Description

Technical Field

[0001] The present application relates to the field of semiconductor technology, and in particular to a method for suppressing arc on a wafer and a semiconductor device. Background Art

[0002] Please refer to Figure 1 , Figure 1 The figure is a schematic diagram of different stages in a wafer processing process in the prior art. Figure 1 In the figure, ESC voltage represents the set voltage of the ESC power supply (electrostatic adsorption power supply, i.e., the power supply that applies a DC voltage to the lower electrode), ① represents the adsorption (chuck) start stage, ② represents the main process stage, ③ represents the adsorption end stage, and ④ represents the desorption (de-chuck) stage.

[0003] At different stages, the potential of the wafer and the lower electrode substrate also changes with the change of ESC voltage. The change of the potential of the wafer and the lower electrode substrate is as follows: Figure 2 As shown. Figure 2 It can be seen that in the area where the ESC voltage changes, the potential of the wafer and the lower electrode substrate changes significantly, which will lead to a large potential difference between the wafer and the lower electrode, causing local heating of the wafer and eventually leading to arc discharge on the wafer. Wafer arc discharge may cause partial or complete irreparable damage to the wafer, thereby reducing the yield of effective wafers. Summary of the Invention

[0004] The purpose of this application is to provide a method for suppressing arc on a wafer and a semiconductor device, which can reduce the impact of changes in ESC voltage on the potential of the wafer and the lower electrode substrate during the adsorption / desorption process of the process, thereby reducing the potential difference between the wafer and the lower electrode, achieving the effect of minimizing or eliminating arcs on the wafer, thereby effectively reducing the damage to the wafer caused by wafer arc discharge and increasing the yield of effective wafers.

[0005] To solve the above technical problems, the present application provides a method for suppressing arcs on a wafer, which is applied to a semiconductor device. The semiconductor device includes: a reaction chamber, a lower electrode disposed in the reaction chamber, and a lower RF power supply and an electrostatic adsorption power supply that feed power to the lower electrode. Before the lower RF power supply is turned on in a main process phase and / or after the lower RF power supply is turned off in the main process phase, the arc suppression method includes:

[0006] introducing a non-process gas into the reaction chamber;

[0007] Turning on the lower RF power supply according to a preset turn-on time setting strategy, so that the lower RF power supply excites the non-process gas in the reaction chamber to form plasma, and makes the potential of the wafer in the reaction chamber approach 0;

[0008] According to a preset grounding time setting strategy, the base of the lower electrode is grounded so that the potential of the base of the lower electrode approaches zero.

[0009] Optionally, before the lower RF power supply is turned on in the main process phase, turning on the lower RF power supply according to a preset turn-on time setting strategy includes:

[0010] Before the electrostatic adsorption power supply applies a forward voltage to the lower electrode, turning on the lower radio frequency power supply;

[0011] After the electrostatic adsorption power supply applies the forward voltage to the lower electrode, the lower radio frequency power supply is turned off.

[0012] Optionally, the time interval between the turn-on time of the lower RF power supply and the rising edge time of the forward voltage is 2-3s; the time interval between the turn-off time of the lower RF power supply and the rising edge time of the forward voltage is 2-3s.

[0013] Optionally, before the lower RF power supply is turned on in the main process phase, grounding the substrate of the lower electrode according to a preset grounding time setting strategy includes:

[0014] Before the electrostatic adsorption power supply applies a forward voltage to the lower electrode, grounding the substrate of the lower electrode;

[0015] After the electrostatic adsorption power supply applies the forward voltage to the lower electrode, the base of the lower electrode is grounded and disconnected.

[0016] Optionally, the time interval between the moment when the lower electrode substrate is disconnected from the ground and the moment when the forward voltage rises is 2-3s.

[0017] Optionally, after the lower RF power supply is turned off in the main process phase, turning on the lower RF power supply according to a preset turn-on time setting strategy includes:

[0018] Before the forward voltage applied by the electrostatic adsorption power supply to the lower electrode is removed and returned to zero, the lower radio frequency power supply is turned on;

[0019] After the reverse voltage applied by the electrostatic adsorption power supply to the lower electrode is removed and returned to zero, the lower radio frequency power supply is turned off.

[0020] Optionally, the time interval between the turning on moment of the lower RF power supply and the evacuation and zeroing moment of the forward voltage is 2-3s; the time interval between the turning off moment of the lower RF power supply and the evacuation and zeroing moment of the reverse voltage is 2-3s.

[0021] Optionally, after the lower RF power supply is turned off in the main process stage, grounding the substrate of the lower electrode according to a preset grounding time setting strategy includes:

[0022] Before the forward voltage applied to the lower electrode by the electrostatic adsorption power supply is removed and returned to zero, the base of the lower electrode is grounded.

[0023] Optionally, the time interval between the moment when the lower electrode substrate is grounded and the moment when the forward voltage is withdrawn and returned to zero is 2-3s.

[0024] Optionally, the lower RF power supply includes: an HF lower RF power supply and an LF lower RF power supply;

[0025] Turning on the lower RF power supply according to a preset turn-on time setting strategy includes:

[0026] According to a preset start-up time setting strategy, the HF radio frequency power supply is turned on; wherein the operating frequency of the HF radio frequency power supply is 30-50 MHz.

[0027] Optionally, the flow rate of the non-process gas is 400-600 sccm.

[0028] To solve the above technical problems, the present application further provides a semiconductor device, comprising:

[0029] reaction chamber;

[0030] an upper electrode disposed in the reaction chamber, the upper electrode being connected to an upper radio frequency power supply;

[0031] A lower electrode is provided in the reaction chamber, and the lower electrode is connected to a lower radio frequency power supply and an electrostatic adsorption power supply respectively;

[0032] A controller is provided, wherein the controller adopts any of the above-mentioned arc suppression methods for wafers to suppress the arc on the wafer.

[0033] The present application provides a method for suppressing arcs on a wafer, comprising: introducing a non-process gas into a reaction chamber before a lower RF power supply is turned on and / or after the lower RF power supply is turned off during a main process phase; turning on the lower RF power supply according to a preset on-time setting strategy so that the lower RF power supply excites the non-process gas in the reaction chamber to form a plasma, causing the potential of the wafer to approach 0; and grounding the substrate of the lower electrode according to a preset grounding time setting strategy so that the potential of the substrate of the lower electrode approaches 0. It can be seen that during the adsorption / desorption process of the present application, the purpose of regulating the wafer potential is achieved by regulating the plasma state by the lower RF power supply, and the purpose of regulating the substrate potential of the lower electrode is achieved by grounding the substrate of the lower electrode, thereby reducing the impact of changes in the ESC voltage on the potential of the wafer and the substrate of the lower electrode during the adsorption / desorption process, thereby reducing the potential difference between the wafer and the lower electrode, achieving the effect of minimizing or eliminating arcs on the wafer, thereby effectively reducing damage to the wafer caused by wafer arc discharge, and improving the yield of effective wafers.

[0034] The present application also provides a semiconductor device having the same beneficial effects as the above arc suppression method. BRIEF DESCRIPTION OF THE DRAWINGS

[0035] In order to more clearly illustrate the technical solutions in this application or the prior art, the following briefly introduces the drawings required for use in the embodiments or the description of the prior art. Obviously, the drawings described below are only some embodiments recorded in this application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative labor.

[0036] Figure 1 A schematic diagram of different stages in a wafer process in the prior art;

[0037] Figure 2 A schematic diagram showing the change of the potential of a wafer and a lower electrode substrate with the ESC voltage in the prior art;

[0038] Figure 3 It is a structural schematic diagram of a semiconductor device in the prior art;

[0039] Figure 4 It is an integrated schematic diagram of the change of the potential of a wafer and an electrostatic chuck substrate with the ESC voltage in the prior art;

[0040] Figure 5 A flowchart of a method for arc suppression of a wafer provided in an embodiment of the present invention;

[0041] Figure 6A schematic diagram of the start-up time of the lower RF power supply after the lower RF power supply is turned off in the main process stage provided by an embodiment of the present invention;

[0042] Figure 7 A schematic diagram of the grounding time of an electrostatic chuck substrate provided by an embodiment of the present invention;

[0043] Figure 8 A schematic diagram of the start-up time of the lower RF power supply in different stages provided by an embodiment of the present invention. DETAILED DESCRIPTION

[0044] The core of this application is to provide a wafer arc suppression method and semiconductor equipment, which can reduce the impact of changes in ESC voltage on the potential of the wafer and the lower electrode substrate during the adsorption / desorption process, thereby reducing the potential difference between the wafer and the lower electrode, achieving the effect of minimizing or eliminating the arc on the wafer, thereby effectively reducing the damage to the wafer caused by wafer arc discharge and increasing the yield of effective wafers.

[0045] To make the purpose, technical solutions, and advantages of the embodiments of this application more clear, the technical solutions in the embodiments of this application will be clearly and completely described below in conjunction with the drawings in the embodiments of this application. Obviously, the described embodiments are part of the embodiments of this application, not all of the embodiments. Based on the embodiments in this application, all other embodiments obtained by ordinary technicians in this field without making creative efforts are within the scope of protection of this application.

[0046] Please refer to Figure 3 , Figure 3The diagram below is a schematic diagram of the structure of a semiconductor device in the prior art. This device is a capacitively coupled semiconductor device. The upper electrode in the reaction chamber is connected to an upper RF power supply (which acts as a bias voltage), while the lower electrode is connected to a lower RF power supply and an electrostatic adsorption power supply. Specifically, the lower electrode is connected to two lower RF power supplies, an HF (high frequency) RF power supply and an LF (low frequency) RF power supply, via a matching device. The HF lower RF power supply is used to control plasma density, while the LF lower RF power supply is used to control the downward motion of the plasma. The lower electrode of the semiconductor device is an electrostatic chuck (Electrostatic Chuck), which includes an electrostatic chuck base (insulating layer), an electrostatic electrode built into the electrostatic chuck base, and a metal base. The electrostatic adsorption power supply (ESC power supply) is specifically loaded onto the electrostatic electrode, and the lower RF power supply is specifically fed into the metal base; wherein, the electrostatic chuck is used to carry and adsorb the wafer (the wafer is placed on the upper surface of the electrostatic chuck base); the ESC power supply is used to apply an adsorption voltage (forward voltage) to the electrostatic electrode of the electrostatic chuck so that the electrostatic chuck electrostatically adsorbs and fixes the wafer, and is also used to apply a desorption voltage (reverse voltage) to the electrostatic electrode of the electrostatic chuck to achieve desorption of the electrostatic chuck and the wafer.

[0047] When the above-mentioned semiconductor equipment is used for wafer processing, the process includes the following steps: Figure 1 The four stages shown are: the first three stages are the adsorption process: ① the adsorption start stage (the electrostatic adsorption power supply starts to apply a positive voltage to the lower electrode), ② the main process stage, ③ the adsorption end stage (the forward voltage applied by the electrostatic adsorption power supply to the lower electrode is removed and returned to zero); the last stage is the desorption process: ④ the desorption stage, including the start of desorption (the electrostatic adsorption power supply starts to apply a reverse voltage to the lower electrode) and the end of desorption (the reverse voltage applied by the electrostatic adsorption power supply to the lower electrode is removed and returned to zero). At different stages, the potential of the wafer and the lower electrode substrate (referring to the substrate of the electrostatic chuck) also changes with the change of the ESC voltage (the set voltage of the ESC power supply, and its change trend is fixed). The change of the potential of the wafer and the lower electrode substrate is shown in Figure 4. Figure 2 As shown, the change of the potential of the two is as follows Figure 4 As shown in the figure, in the area where the ESC voltage changes, the potential of the wafer and the lower electrode substrate changes significantly, which will lead to a large potential difference between the wafer and the lower electrode, causing local heating of the wafer and eventually leading to arc discharge on the wafer. Wafer arc discharge may cause partial or complete irreparable damage to the wafer, thereby reducing the yield of effective wafers.

[0048] In order to solve the above technical problems, this application provides a method for arc suppression of wafers. Figure 5 , Figure 5 Flowchart of a method for arc suppression of a wafer provided by an embodiment of the present invention ( Figure 5 In the embodiment, a represents the arc suppression process before the lower RF power supply of the main process stage is turned on; b represents the arc suppression process after the lower RF power supply of the main process stage is turned off). The arc suppression method comprises the following steps before the lower RF power supply of the main process stage is turned on (referring to before any of the HF lower RF power supply and the LF lower RF power supply of the main process stage is turned on), and / or after the lower RF power supply of the main process stage is turned off (referring to after both the HF lower RF power supply and the LF lower RF power supply of the main process stage are turned off):

[0049] Step S101a / S101b: introducing non-process gas into the reaction chamber.

[0050] In this embodiment, the non-process gas is only used to neutralize the potential on the wafer surface and will not perform plasma etching on the wafer surface; the non-process gas is an inert gas, including argon, nitrogen, etc.

[0051] Step S102a / S102b: Turn on the lower RF power supply according to a preset turn-on time setting strategy, so that the lower RF power supply excites the non-process gas in the reaction chamber to form plasma, so that the potential of the wafer in the reaction chamber approaches zero.

[0052] In this embodiment, the preset on-time setting strategy includes setting the on-time of the lower RF power supply and setting the off-time of the lower RF power supply. It is understandable that the on-time and off-time of the lower RF power supply are set based on the change in wafer potential, with the purpose of minimizing or eliminating the change in wafer potential caused by changes in ESC voltage. The lower RF power supply turned on here refers to the HF lower RF power supply, which controls the plasma density by the HF lower RF power supply, thereby changing the wafer potential.

[0053] In specific applications, the HF lower RF power supply is turned on according to the preset start-up time of the lower RF power supply. Under the action of the HF lower RF power supply, the non-process gas in the reaction chamber dissociates to form plasma. The formed plasma can offset the charge on the surface of the wafer, making the wafer electrically neutral on a macroscopic scale, that is, the electric potential on the surface of the wafer approaches 0.

[0054] The HF lower RF power supply is turned off at the preset lower RF power supply shutdown time. It should be noted that the purpose of turning off the HF lower RF power supply before turning on the lower RF power supply in the main process phase is that process gases (process gases used for plasma etching the surface of the wafer, such as fluorine-based gases) are introduced into the reaction chamber in the main process phase. The purpose of turning off the HF lower RF power supply is to reserve time for changing the type and flow rate of the gas introduced into the reaction chamber in preparation for entering the main process phase.

[0055] Similarly, the purpose of shutting down the lower RF power supply in the main process stage is to allow non-process gas to be introduced into the reaction chamber during the wafer arc suppression process after the lower RF power supply in the main process stage is shut down. The purpose of shutting down the lower RF power supply in the main process stage is to reserve time for changing the type and flow rate of the gas introduced into the reaction chamber (from process gas to non-process gas) to prepare for entering the subsequent wafer arc suppression process.

[0056] Step S103a / S103b: grounding the substrate of the lower electrode according to a preset grounding time setting strategy, so that the potential of the substrate of the lower electrode approaches zero.

[0057] In this embodiment, the grounding time of the lower electrode substrate is set based on the potential change of the lower electrode substrate, with the purpose of minimizing or eliminating the potential change of the lower electrode substrate caused by the change of the ESC voltage. In a preferred embodiment, the grounding of the lower electrode substrate is achieved by grounding the metal base.

[0058] The arc suppression method for wafers provided in the present application adjusts the wafer potential by adjusting the plasma state through the lower RF power supply during the adsorption / desorption process, and adjusts the potential of the lower electrode substrate by grounding the lower electrode substrate, so as to reduce the impact of the change in ESC voltage on the potential of the wafer and the lower electrode substrate during the adsorption / desorption process, thereby reducing the potential difference between the wafer and the lower electrode, achieving the effect of minimizing or eliminating the arc on the wafer, thereby effectively reducing the damage to the wafer caused by wafer arc discharge and improving the yield of effective wafers.

[0059] As an optional embodiment, after the lower RF power supply in the main process phase is turned off, the step S102b of “turning on the lower RF power supply according to a preset turn-on time setting strategy” may include the following steps:

[0060] Before the forward voltage applied by the electrostatic adsorption power supply to the lower electrode is removed and returned to zero, the HF lower radio frequency power supply is turned on;

[0061] After the reverse voltage applied to the lower electrode by the electrostatic adsorption power supply is removed and returned to zero, the HF lower radio frequency power supply is turned off.

[0062] In specific applications, Figure 1 and Figure 4By comparison, it can be seen that after the lower RF power supply in the main process stage is turned off, ③ the adsorption end stage: at the end of adsorption (that is, the forward voltage applied by the electrostatic adsorption power supply to the lower electrode is withdrawn and returned to zero), the wafer potential drops sharply and then returns to zero; ④ the desorption stage: at the beginning of desorption (that is, the electrostatic adsorption power supply starts to apply a reverse voltage to the lower electrode), the wafer potential drops sharply and then returns to zero; at the end of desorption (that is, the reverse voltage applied by the electrostatic adsorption power supply to the lower electrode is withdrawn and returned to zero), the wafer potential rises instantly with the increase of the ESC voltage value and then returns to zero.

[0063] In order to minimize or eliminate the change of wafer potential caused by the change of ESC voltage during the adsorption end stage and desorption stage, such as Figure 6 As shown, before the forward voltage applied by the electrostatic adsorption power supply to the lower electrode is withdrawn and returned to zero, the HF lower RF power supply is turned on; after the reverse voltage applied by the electrostatic adsorption power supply to the lower electrode is withdrawn and returned to zero, the HF lower RF power supply is turned off. The purpose is to achieve: in the adsorption end stage and the desorption stage, under the action of the HF lower RF power supply, the non-process gas in the reaction chamber dissociates to form plasma, and the formed plasma can offset the charge on the wafer surface, so that the potential of the wafer surface approaches 0, that is, the potential of the wafer will basically not change due to changes in the ESC voltage in the adsorption end stage and the desorption stage.

[0064] As an optional embodiment, after the lower RF power supply in the main process stage is turned off, the time interval between the turning on moment of the HF lower RF power supply and the evacuation and zeroing moment of the forward voltage is 2-3s; the time interval between the turning off moment of the HF lower RF power supply and the evacuation and zeroing moment of the reverse voltage is 2-3s.

[0065] In this embodiment, after the lower RF power supply in the main process stage is turned off, two aspects need to be considered when turning on the HF lower RF power supply. On the one hand, time is reserved for changing the type and flow rate of the gas introduced into the reaction chamber (from process gas to non-process gas). On the other hand, the change in the wafer potential originally caused by the change in the ESC voltage can be brought close to 0 under the action of the HF lower RF power supply. The time to turn off the HF lower RF power supply only needs to consider whether the action of the HF lower RF power supply is still needed to change the wafer potential. If not, the HF lower RF power supply can be turned off.

[0066] In a specific application, the HF lower RF power supply is turned on 2s to 3s before the forward voltage applied by the electrostatic adsorption power supply to the lower electrode is removed and returned to zero; the HF lower RF power supply is turned off 2s to 3s after the reverse voltage applied by the electrostatic adsorption power supply to the lower electrode is removed and returned to zero.

[0067] As an optional embodiment, after the lower RF power supply of the main process stage is turned off, step S103b of "grounding the substrate of the lower electrode according to a preset grounding time setting strategy" may include the following steps:

[0068] Before the forward voltage applied to the lower electrode by the electrostatic adsorption power supply is removed and returned to zero, the base of the lower electrode is grounded.

[0069] In specific applications, Figure 1 and Figure 6 By comparison, it can be seen that after the lower RF power supply in the main process stage is turned off, ③ the end of adsorption stage: at the end of adsorption (that is, the forward voltage applied by the electrostatic adsorption power supply to the lower electrode is withdrawn to zero), the potential of the lower electrode substrate decreases rapidly; ④ the desorption stage: at the beginning of desorption (that is, the electrostatic adsorption power supply begins to apply a reverse voltage to the lower electrode), the potential of the lower electrode substrate continues to decrease and then stabilizes within a certain range; at the end of desorption (that is, the reverse voltage applied by the electrostatic adsorption power supply to the lower electrode is withdrawn to zero), the potential of the lower electrode substrate recovers to a certain extent, and the potential returns to zero instantly when it is grounded.

[0070] In order to minimize or eliminate the potential change of the lower electrode substrate caused by the change of ESC voltage during the adsorption end stage and desorption stage, as shown in Figure 7 As shown, before the forward voltage applied to the lower electrode by the electrostatic adsorption power supply is withdrawn and returned to zero, the substrate of the lower electrode is grounded. The purpose is to achieve: in the end of adsorption and desorption stages, the potential of the substrate of the lower electrode approaches 0 due to the grounding of the substrate of the lower electrode, that is, the potential of the substrate of the lower electrode will basically not change due to changes in the ESC voltage in the end of adsorption and desorption stages.

[0071] As an optional embodiment, after the lower RF power supply in the main process stage is turned off, the time interval between the moment when the lower electrode substrate is grounded and the moment when the forward voltage is withdrawn and returned to zero is 2-3 seconds.

[0072] In this embodiment, after the lower RF power supply is turned off in the main process stage, the grounding moment of the lower electrode substrate needs to be considered: the potential change of the lower electrode substrate caused by the change of the ESC voltage is approached to 0 under the action of the grounding of the lower electrode substrate.

[0073] In a specific application, the substrate of the lower electrode is grounded 2 to 3 seconds before the forward voltage applied to the lower electrode by the electrostatic adsorption power supply is removed and returned to zero, and then the substrate of the lower electrode is kept grounded until the grounding of the substrate of the lower electrode is disconnected.

[0074] As an optional embodiment, before the lower RF power supply is turned on in the main process stage, step S103a of "grounding the substrate of the lower electrode according to a preset grounding time setting strategy" may include the following steps:

[0075] Before the electrostatic adsorption power supply applies a forward voltage to the lower electrode, the substrate of the lower electrode is grounded;

[0076] After the electrostatic adsorption power supply applies a forward voltage to the lower electrode, the base of the lower electrode is grounded and disconnected.

[0077] In specific applications, Figure 1 and Figure 4 By comparison, it can be seen that before the lower RF power supply in the main process stage is turned on, ① the adsorption start stage: at the beginning of adsorption (that is, the electrostatic adsorption power supply starts to apply a positive voltage to the lower electrode), the potential of the lower electrode substrate also rises instantly with the increase of the ESC voltage value, maintains for a period of time, and then slowly falls back.

[0078] In order to minimize or eliminate the potential change of the lower electrode substrate caused by the change of ESC voltage at the beginning of adsorption, as shown in Figure 7 As shown, before the electrostatic adsorption power supply applies a positive voltage to the lower electrode, the substrate of the lower electrode is grounded; after the electrostatic adsorption power supply applies a positive voltage to the lower electrode, the grounding of the substrate of the lower electrode is disconnected. The purpose is to achieve: at the beginning of adsorption, the potential of the substrate of the lower electrode approaches 0 due to the grounding of the substrate of the lower electrode, that is, the potential of the substrate of the lower electrode will basically not change due to changes in the ESC voltage at the beginning of adsorption.

[0079] As an optional embodiment, before the lower RF power supply is turned on in the main process stage, the time interval between the moment when the lower electrode substrate is disconnected from the ground and the moment when the forward voltage rises is 2-3 seconds.

[0080] In this embodiment, before the lower RF power supply is turned on in the main process stage, the moment when the lower electrode substrate is disconnected from the ground needs to be considered: whether the substrate of the lower electrode needs to be grounded to change the electric potential of the lower electrode substrate. If not, the grounding of the substrate of the lower electrode can be disconnected; moreover, in the main process stage, the substrate of the lower electrode is not allowed to be grounded.

[0081] In a specific application, after the main process stage of the previous round, the substrate of the lower electrode is grounded and remains grounded; before the main process stage of the next round, the substrate grounding of the lower electrode is disconnected 2s to 3s after the electrostatic adsorption power supply applies a positive voltage to the lower electrode.

[0082] It should be noted that the base of the lower electrode (the base of the electrostatic chuck) is grounded before the adsorption begins and during the desorption stage, and the electrostatic chuck can still achieve the adsorption and desorption functions. Figure 6 and Figure 7By comparison, it can be seen that the potential of the electrostatic chuck base (gray line) decreases to zero during the grounding stage before adsorption begins, but the ESC voltage value at this time is not affected by the grounding behavior. The wafer potential is also not affected by the grounding behavior due to the neutralization effect of the RF power plasma, so the electrostatic chuck can still achieve the adsorption effect. Similarly, during the desorption stage, grounding only affects the potential of the electrostatic chuck base, making it close to 0, and does not affect the ESC voltage value. The electrostatic chuck can still achieve the desorption effect.

[0083] As an optional embodiment, before the lower RF power supply of the main process phase is turned on, the step S102a of “turning on the lower RF power supply according to a preset turn-on time setting strategy” may include the following steps:

[0084] Before the electrostatic adsorption power supply applies a positive voltage to the lower electrode, the HF lower radio frequency power supply is turned on;

[0085] After the electrostatic adsorption power supply applies a positive voltage to the lower electrode, the HF lower radio frequency power supply is turned off.

[0086] In specific applications, Figure 1 and Figure 7 It can be seen from the comparison that before the lower RF power supply of the main process stage is turned on, ① adsorption start stage: at the beginning of adsorption (that is, the electrostatic adsorption power supply begins to apply a positive voltage to the lower electrode), the wafer potential rises instantly with the increase of the ESC voltage value, then falls and tends to zero.

[0087] In order to minimize or eliminate the change in wafer potential caused by the change in ESC voltage at the beginning of adsorption, such as Figure 8 As shown, before the electrostatic adsorption power supply applies a forward voltage to the lower electrode, the HF lower RF power supply is turned on; after the electrostatic adsorption power supply applies a forward voltage to the lower electrode, the HF lower RF power supply is turned off. The purpose is to achieve: at the initial stage of adsorption, under the action of the HF lower RF power supply, the non-process gas in the reaction chamber dissociates to form plasma, and the formed plasma can offset the charge on the wafer surface, so that the potential of the wafer surface approaches 0, that is, the potential of the wafer will basically not change due to changes in the ESC voltage at the initial stage of adsorption.

[0088] As an optional embodiment, before the lower RF power supply in the main process stage is turned on, the time interval between the turning-on moment of the HF lower RF power supply and the rising edge moment of the forward voltage is 2-3s; the time interval between the turning-off moment of the HF lower RF power supply and the rising edge moment of the forward voltage is 2-3s.

[0089] In this embodiment, the timing of turning on the RF power supply under HF needs to consider: the change in the wafer potential originally caused by the change in the ESC voltage can be close to 0 under the action of the RF power supply under HF; the timing of turning off the RF power supply under HF needs to consider two aspects. On the one hand, time is reserved for changing the type and flow rate of the gas introduced into the reaction chamber (from non-process gas to process gas), and on the other hand, whether the action of the RF power supply under HF is still needed to change the wafer potential. If not, the RF power supply under HF can be turned off.

[0090] In a specific application, the HF lower RF power supply is turned on 2s to 3s before the electrostatic adsorption power supply starts to apply a forward voltage to the lower electrode; and the HF lower RF power supply is turned off 2s to 3s after the electrostatic adsorption power supply starts to apply a forward voltage to the lower electrode.

[0091] As an optional embodiment, the operating frequency of the RF power supply under HF, the type and flow rate of the non-process gas are selected according to the change of the wafer potential, so that the wafer potential that changes due to the change of the ESC voltage approaches 0 under the action of the RF power supply under HF.

[0092] In specific applications, based on Figure 4 As shown in the figure, the operating frequency of the RF power supply under HF can be 30-50 MHz, the non-process gas can be argon or nitrogen, and the flow rate of the non-process gas can be 400-600 sccm.

[0093] The present application also provides a semiconductor device, comprising:

[0094] reaction chamber;

[0095] An upper electrode is disposed in the reaction chamber and is connected to an upper radio frequency power supply;

[0096] A lower electrode is provided in the reaction chamber, and the lower electrode is connected to a lower radio frequency power supply and an electrostatic adsorption power supply respectively;

[0097] The controller uses any of the above-mentioned arc suppression methods for the wafer to suppress the arc on the wafer.

[0098] For an introduction to the semiconductor device provided in this application, please refer to the above-mentioned embodiment of the arc suppression method, which will not be repeated in this application.

[0099] The terms "first", "second" etc. in the specification and claims of the present application are used to distinguish similar objects, and are not necessarily used to describe a specific order or sequential order. It should be understood that the terms used in this way can be interchangeable under appropriate circumstances, and this is merely a way of distinguishing the objects of identical properties when describing them in the embodiments of the present application. In addition, the terms "comprise" and "have" and any of their variations are intended to cover non-exclusive inclusions, so that the process, method, system, product or equipment comprising a series of units need not be limited to those units, but may include other units that are not clearly listed or inherent to these processes, methods, products or equipment.

[0100] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present application, rather than to limit them. Although the present application has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that they can still modify the technical solutions described in the aforementioned embodiments, or make equivalent replacements for some of the technical features therein. However, these modifications or replacements do not deviate the essence of the corresponding technical solutions from the spirit and scope of the technical solutions of the embodiments of the present application.

Claims

1. A method for suppressing arc on a wafer, applied to a semiconductor device, the semiconductor device comprising: A reaction chamber, a lower electrode disposed in the reaction chamber, and a lower RF power supply and an electrostatic adsorption power supply feeding power to the lower electrode, characterized in that before the lower RF power supply is turned on and / or after the lower RF power supply is turned off in the main process stage, the arc suppression method includes: introducing a non-process gas into the reaction chamber; Turning on the lower RF power supply according to a preset turn-on time setting strategy, so that the lower RF power supply excites the non-process gas in the reaction chamber to form plasma, so that the potential of the wafer in the reaction chamber approaches 0, wherein, before the lower RF power supply is turned on in the main process stage, turning on the lower RF power supply according to the preset turn-on time setting strategy includes turning on the lower RF power supply before the electrostatic adsorption power supply applies a forward voltage to the lower electrode; According to a preset grounding time setting strategy, the substrate of the lower electrode is grounded so that the electric potential of the substrate of the lower electrode approaches 0, wherein, before the lower RF power supply in the main process stage is turned on, the substrate of the lower electrode is grounded according to the preset grounding time setting strategy, including grounding the substrate of the lower electrode before the electrostatic adsorption power supply applies a forward voltage to the lower electrode.

2. The arc suppression method according to claim 1, wherein: Before the lower RF power supply is turned on in the main process phase, turning on the lower RF power supply according to a preset turn-on time setting strategy includes: After the electrostatic adsorption power supply applies the forward voltage to the lower electrode, the lower radio frequency power supply is turned off.

3. The arc suppression method according to claim 2, wherein: The time interval between the turning-on moment of the lower RF power supply and the rising edge moment of the forward voltage is 2-3s; the time interval between the turning-off moment of the lower RF power supply and the rising edge moment of the forward voltage is 2-3s.

4. The arc suppression method according to claim 1, wherein: Before the lower RF power supply is turned on in the main process stage, the substrate of the lower electrode is grounded according to a preset grounding time setting strategy, including: After the electrostatic adsorption power supply applies the forward voltage to the lower electrode, the base of the lower electrode is grounded and disconnected.

5. The arc suppression method according to claim 4, wherein: The time interval between the moment when the lower electrode substrate is disconnected from the ground and the moment when the forward voltage rises is 2-3s.

6. The arc suppression method according to claim 1, wherein: After the lower RF power supply is turned off in the main process phase, turning on the lower RF power supply according to a preset turn-on time setting strategy includes: Before the forward voltage applied by the electrostatic adsorption power supply to the lower electrode is removed and returned to zero, the lower radio frequency power supply is turned on; After the reverse voltage applied by the electrostatic adsorption power supply to the lower electrode is removed and returned to zero, the lower radio frequency power supply is turned off.

7. The arc suppression method according to claim 6, wherein: The time interval between the turning on moment of the lower RF power supply and the evacuation and zeroing moment of the forward voltage is 2-3s; the time interval between the turning off moment of the lower RF power supply and the evacuation and zeroing moment of the reverse voltage is 2-3s.

8. The arc suppression method according to claim 1, wherein: After the lower RF power supply is turned off in the main process stage, the substrate of the lower electrode is grounded according to a preset grounding time setting strategy, including: Before the forward voltage applied to the lower electrode by the electrostatic adsorption power supply is removed and returned to zero, the base of the lower electrode is grounded.

9. The arc suppression method according to claim 8, wherein: The time interval between the grounding moment of the lower electrode substrate and the withdrawal and zeroing moment of the forward voltage is 2-3s.

10. The arc suppression method according to any one of claims 1 to 9, characterized in that: The lower radio frequency power supply includes: an HF lower radio frequency power supply and an LF lower radio frequency power supply; Turning on the lower RF power supply according to a preset turn-on time setting strategy includes: According to a preset start-up time setting strategy, the HF radio frequency power supply is turned on; wherein the operating frequency of the HF radio frequency power supply is 30-50 MHz.

11. The arc suppression method according to claim 10, wherein: The flow rate of the non-process gas is 400-600 sccm.

12. A semiconductor device, characterized in that: include: reaction chamber; an upper electrode disposed in the reaction chamber, the upper electrode being connected to an upper radio frequency power supply; A lower electrode is provided in the reaction chamber, and the lower electrode is connected to a lower radio frequency power supply and an electrostatic adsorption power supply respectively; A controller, wherein the controller adopts the arc suppression method for a wafer as described in any one of claims 1 to 11 to suppress the arc on the wafer.

Citation Information

Patent Citations

  • Secondary electron device and ion implanter machine using the same

    CN102623288A

  • Ion cleaning magnetron sputtering system

    CN108165946A