Ultra-wideband high power amplifier and transmitter

Abstract

The application provides an ultra-wideband high-power amplifier and transmitter, wherein the power amplifier comprises a signal input end for receiving an input signal, an input matching network connected with the signal input end at one end and with a gate of a GaN power amplifier chip at the other end, for matching the impedance between the gate of the GaN power amplifier chip and the signal input end, an output matching network connected with a drain of the GaN power amplifier chip at one end and with a signal output end at the other end, for matching the impedance within an ultra-wideband, an input bias network comprising a filter capacitor, connected with the gate of the GaN power amplifier chip at one end and with an external gate power supply at the other end, for filtering and bypassing the gate power supply, and an output bias network comprising a filter capacitor, connected with the drain of the GaN power amplifier chip at one end and with an external drain power supply at the other end, for filtering and bypassing the drain power supply. The frequency of the power amplifier can cover 0.2G-2GHz.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of power amplifiers, and in particular to a super wideband high-power amplifier and a transmitter. BACKGROUND

[0002] With the increasing requirement of the working bandwidth of communication, countermeasure and test equipment, the bandwidth requirement of the power amplifier as the core component of the equipment is also increasing.

[0003] GaN, as the third generation semiconductor material, can meet the performance requirements of high frequency, high temperature, high power and high efficiency due to its wide band gap and high thermal conductivity, and the microwave power performance is much better than that of Si and GaAs semiconductor materials. The wideband power amplifier based on GaN material has a wide application prospect in the fields of radio frequency amplifier equipment, wideband communication and electronic countermeasure. Developing a super wideband high-power device or power amplifier can greatly reduce the size and complexity of the equipment, and provide support and possibility for developing new functional products.

[0004] At present, the existing single wideband power device product cannot cover 0.2GHz-0.35GHz, so there is an urgent need for a super wideband GaN power amplifier with a frequency coverage of 0.2G-2GHz and an output power of 100W. SUMMARY

[0005] The embodiment of the present application provides a super wideband high-power amplifier and a transmitter to solve the problem that the frequency of the single wideband power device cannot completely cover 0.2G-2GHz.

[0006] In a first aspect, the embodiment of the present application provides a super wideband high-power amplifier, comprising:

[0007] a signal input end configured to receive an input signal;

[0008] an input matching network connected to the signal input end at one end and connected to the gate of the GaN power amplifier chip at the other end, configured to match the impedance between the gate of the GaN power amplifier chip and the signal input end;

[0009] an output matching network connected to the drain of the GaN power amplifier chip at one end and connected to the signal output end at the other end, configured to match the impedance within the super wideband;

[0010] an input bias network comprising a filter capacitor, connected to the gate of the GaN power amplifier chip at one end and connected to an external gate power supply at the other end, configured to filter and bypass the gate power supply;

[0011] The output bias network comprises a filter capacitor, one end of which is connected with the drain of the GaN power amplifier chip, and the other end of which is connected with an external drain power supply, for filtering and bypassing the drain power supply.

[0012] In a possible implementation, the input matching network comprises a three-stage matching network, which comprises a first-stage input matching network, a second-stage input matching network and a third-stage input matching network connected in sequence, and the first-stage input matching network is connected with the gate of the GaN power amplifier chip.

[0013] The first-stage input matching network comprises a T-type network and an RC parallel network connected with the T-type network, for transforming and improving the gate impedance of the GaN power amplifier chip; wherein the T-type network comprises two series-connected inductors and a capacitor connected with the two inductors, and the other end of the capacitor is grounded.

[0014] The second-stage input matching network comprises a plurality of series-connected microstrip lines and a DC blocking capacitor connected with the microstrip lines, for impedance transformation of the output impedance of the first-stage input matching network.

[0015] The third-stage input matching network comprises a transmission line transformer composed of a plurality of semi-rigid cables, for super-wideband impedance transformation.

[0016] In a possible implementation, the first-stage input matching network further comprises a ground-connected RC series network, one end of the ground-connected RC series network is connected with one end of the T-type network and the RC parallel network respectively, and the other end of the ground-connected RC series network is grounded.

[0017] The second-stage input matching network further comprises a parallel RC network, one end of the parallel RC network is connected with one end of the last microstrip line in the plurality of series-connected microstrip lines, and the other end of the parallel RC network is connected with the DC blocking capacitor.

[0018] In a possible implementation, the first-stage input matching network is a GaAs microstrip monolithic integrated circuit based on a GaAs passive process.

[0019] In a possible implementation, the output matching network comprises a three-stage matching network, which comprises a first-stage output matching network, a second-stage output matching network and a third-stage output matching network connected in sequence, and the first-stage output matching network is connected with the drain of the GaN power amplifier chip.

[0020] The first-stage output matching network comprises a T-type ceramic network prepared on a ceramic sheet, and the inductor in the T-type ceramic network is a ceramic inductor and the capacitor is a ceramic capacitor, for transforming the drain impedance of the GaN power amplifier chip.

[0021] The second-stage output matching network comprises a plurality of series-connected microstrip transmission lines, for wideband impedance transformation.

[0022] The third-stage output matching network comprises a transmission line transformer composed of a plurality of semi-rigid cables, for ultra-wideband impedance transformation.

[0023] In a possible implementation, the impedance transformation ratio of the third-stage input matching network and the third-stage output matching network is 4:1.

[0024] In a possible implementation, the third-stage input matching network and the third-stage output matching network are each composed of 2 semi-rigid cables, the characteristic impedance of the semi-rigid cables is 25 ohms, and the outer diameter is 2.2 mm;

[0025] The lengths of the 2 semi-rigid cables of the third-stage input matching network are 44.4 mm and 42.1 mm respectively;

[0026] The lengths of the 2 semi-rigid cables of the third-stage output matching network are 37.1 mm and 39.4 mm respectively.

[0027] In a possible implementation, the input bias network and the output bias network further comprise bias inductors for radio frequency isolation in the radio frequency channel and the direct current power supply channel.

[0028] In a possible implementation, the GaN power amplifier chip, the first-stage input matching network, and the first-stage output matching network are assembled on a molybdenum copper carrier, and the second-stage output matching network, the third-stage output matching network, the second-stage input matching network, the third-stage input matching network, the input bias network, and the output bias network are each assembled on a PCB board.

[0029] The molybdenum copper carrier and the PCB board are welded on a red copper carrier.

[0030] In a second aspect, the embodiments of the present application provide a transmitter for a wireless communication system, the transmitter comprising the ultra-wideband high-power amplifier provided in the first aspect.

[0031] The embodiments of the present application provide an ultra-wideband high-power amplifier, by connecting the input matching network and the input bias network to the gate of the GaN power amplifier chip, and connecting the output matching network and the output bias network to the drain of the GaN power amplifier chip, so that the frequency coverage of the power amplifier is 0.2G-2GHz, and the output power is ≥100W. BRIEF DESCRIPTION OF DRAWINGS

[0032] In order to more clearly illustrate the technical solutions in the embodiments of the present application, the following will briefly introduce the drawings needed to be used in the embodiments or the prior art description. Obviously, the drawings in the following description are only some embodiments of the present application, and other drawings can also be obtained by those skilled in the art without creative labor.

[0033] Figure 1 is a structural schematic diagram of an ultra-wideband high-power amplifier provided by an embodiment of the present application;

[0034] Figure 2 is a structural schematic diagram of another ultra-wideband high-power amplifier provided by an embodiment of the present application;

[0035] Figure 3 is a structural schematic diagram of a first-stage input matching network in Figure 2 ;

[0036] Figure 4 is a simulation schematic diagram of a power amplifier stability factor of Figure 3 ;

[0037] Figure 5 is a semi-rigid cable schematic diagram of a third-stage input matching network provided by an embodiment of the present application;

[0038] Figure 6 is a simulation result diagram of impedance of a 50-ohm port impedance after being converted by a third-stage input matching network provided by an embodiment of the present application;

[0039] Figure 7 is a semi-rigid cable schematic diagram of a third-stage output matching network provided by an embodiment of the present application;

[0040] Figure 8 is an output power simulation schematic diagram of an ultra-wideband high-power amplifier provided by an embodiment of the present application;

[0041] Figure 9 is a drain efficiency simulation schematic diagram of an ultra-wideband high-power amplifier provided by an embodiment of the present application;

[0042] Figure 10 is an input standing wave simulation schematic diagram of an ultra-wideband high-power amplifier provided by an embodiment of the present application;

[0043] Figure 11 is an assembly structural schematic diagram of an ultra-wideband high-power amplifier provided by an embodiment of the present application;

[0044] Figure 12 is a structural schematic diagram of an assembled ultra-wideband high-power amplifier provided by an embodiment of the present application. DETAILED DESCRIPTION

[0045] In the following description, for purposes of explanation and not limitation, specific details are set forth such as particular architectures, techniques, etc. in order to provide a thorough understanding of the embodiments of the present application. However, it will be apparent to those skilled in the art that the present application can be practiced in other embodiments that depart from these specific details. In other instances, detailed descriptions of well-known methods, devices, circuits, and

[0046] In order to make the objects, technical solutions and advantages of the present application clearer, the following will be described with specific embodiments in conjunction with the accompanying drawings.

[0047] As described in the background, the wideband requirement of the ultra-wideband power amplifier is wider and wider, at present, foreign countries have launched power device products with 50V working voltage, 100W output power in 0.5GHz-2.0GHz frequency band. Domestic enterprises have also launched power device products with 28V working voltage, 100W output power in 0.35GHz-2.0GHz frequency band and 28V working voltage, 100W output power in 0.8GHz-2.0GHz frequency band.

[0048] However, the current domestic and foreign products have a working bandwidth of 0.35GHz-2GHz and an output power of 100W, and the product working frequency cannot cover 0.2GHz-0.35GHz, so that the equipment with the demand of 0.2GHz-2GHz working frequency band needs to use two sets of power amplifiers to realize the power amplification function of the entire 0.2GHz-2GHz frequency band, but the cost, volume and complexity are greatly increased. When the working frequency band is expanded to 0.2GHz-2GHz, the power amplifier working frequency band is greatly increased, and the design problem of covering several octaves of circuit from the meter wave band to the L wave band needs to be solved.

[0049] In order to solve the problems in the prior art, the embodiments of the present application provide an ultra-wideband high-power amplifier and a transmitter. First, the ultra-wideband high-power amplifier provided by the embodiments of the present application will be introduced.

[0050] As shown in Figure 1 An ultra-wideband high-power amplifier, comprising: a GaN power amplifier chip, a signal input end, an input matching network, an output matching network, an input bias network, an output bias network and a signal output end.

[0051] The signal input terminal receives the input signal from an external power supply. The input matching network, connected at one end to the signal input terminal and at the other end to the gate of the GaN power amplifier chip, is used to match the impedance between the gate of the GaN power amplifier chip and the signal input terminal. The output matching network, connected at one end to the drain of the GaN power amplifier chip and at the other end to the signal output terminal, is used for impedance matching over an ultra-wide bandwidth. The input bias network, including a filter capacitor, is connected at one end to the gate of the GaN power amplifier chip and at the other end to an external gate power supply, used for filtering and bypassing the gate power supply. The output bias network, including a filter capacitor, is connected at one end to the drain of the GaN power amplifier chip and at the other end to an external drain power supply, used for filtering and bypassing the drain power supply.

[0052] Specifically, the external power supply provides the required gate operating voltage and drain operating voltage to the GaN power amplifier chip through the input bias network and the output bias network, respectively.

[0053] In some embodiments, the input bias network and the output bias network have filter capacitors to filter and bypass the power supply. In addition, the input bias network and the output bias network also have bias inductors to achieve RF isolation between the RF channel and the DC power supply channel.

[0054] An input matching network is used to achieve impedance matching between the gate impedance and the 50-ohm port impedance of the GaN power amplifier chip. Since the operating frequency band spans several octaves, achieving impedance matching across such a wide bandwidth to obtain low input VSWR is one of the design challenges of this invention. The gain of the GaN power amplifier chip increases as the frequency decreases, with a gain difference of several dB between the high and low frequency points, requiring gain equalization and control through the input matching network. Furthermore, the stability of the power amplifier operation is also a crucial consideration in the input matching network design. Circuits that improve stability can affect circuit impedance, necessitating a comprehensive design that balances impedance matching and stability enhancement circuits across the ultra-wide operating frequency band.

[0055] In some embodiments, such as Figure 2 As shown, in order to achieve ultra-wideband impedance matching, the input matching network adopts a three-stage matching network structure, and the output matching network also adopts a three-stage matching structure to achieve impedance matching within the ultra-wideband.

[0056] Specifically, the input matching network includes a first-stage input matching network, a second-stage input matching network, and a third-stage input matching network connected in sequence, and the first-stage input matching network is connected to the gate of the GaN power amplifier chip.

[0057] The first-stage input matching network includes a T-type network and an RC parallel network connected to the T-type network, used to transform and improve the gate impedance of the GaN power amplifier chip. For example... Figure 3 As shown, the T-type network includes two inductors L1 and L2 connected in series and a capacitor C3 connected to both inductors. The other end of capacitor C3 is grounded. The first-stage input matching network first transforms and improves the gate impedance of the GaN chip through the "T"-type network, and then adds an R1C1 parallel network for gain equalization to further improve stability.

[0058] like Figure 3 As shown, to improve stability, a series network of R2C2 to ground is added. Furthermore, the circuit of the first-stage input matching network is designed and implemented based on GaAs passive technology, i.e., a passive MMIC. For example... Figure 4 The simulation diagram of the power amplifier stability factor of the first-stage input matching network shown is shown below. Figure 4 As can be seen, the stability factor of the power amplifier within the operating frequency band is greater than 1, indicating that it is in an absolutely stable state.

[0059] The second-stage input matching network includes multiple microstrip lines connected in series and DC blocking capacitors connected to the microstrip lines, which are used to perform impedance transformation on the output impedance of the first-stage input matching network.

[0060] Specifically, the second-stage input matching network is a hybrid network composed of microstrip and lumped elements. The input impedance after matching by the GaAs MMIC is then transformed through a series of three microstrip transmission lines. To further achieve gain equalization and improve stability, a parallel RC network is connected in series at the network input. Since the third-stage input matching network has a path to ground, a blocking capacitor is also provided at the input of the second-stage input matching network to achieve DC-to-ground isolation.

[0061] The third-stage input matching network includes a transmission line transformer consisting of multiple semi-rigid cables, used for ultra-wideband impedance transformation.

[0062] Specifically, the third-stage input matching network uses a transmission line transformer composed of semi-rigid cables to achieve ultra-wideband impedance transformation with an impedance ratio of 4:1, transforming the 50-ohm port impedance to around ten ohms. A trade-off between the transformation ratio and bandwidth is achieved by optimizing the characteristic impedance and length of the semi-rigid cables. For example... Figure 5 The third-stage input matching network shown consists of two semi-rigid cables, T1 and T2, with a characteristic impedance of 25 ohms and an outer diameter of 2.2 mm. The lengths of the two semi-rigid cables in the third-stage input matching network are 44.4 mm and 42.1 mm, respectively. By optimizing the semi-rigid cable parameters, a trade-off between the transmission line transformer bandwidth and impedance ratio is achieved, resulting in optimal broadband impedance matching.Figure 6 The simulation result diagram of the impedance of the 50-ohm port impedance transformed through the third-stage input matching network.

[0063] The output matching network comprises a three-stage matching network, which is sequentially connected with a first-stage output matching network, a second-stage output matching network and a third-stage output matching network, and the first-stage output matching network is connected with the drain of the GaN power amplifier chip.

[0064] The first-stage output matching network comprises a T-shaped ceramic network prepared on a ceramic sheet, and the inductance in the T-shaped ceramic network is a ceramic inductance, and the capacitance is a ceramic capacitance, which is used for transforming the drain impedance of the GaN power amplifier chip.

[0065] Specifically, the first-stage output matching network is a T-shaped network, which transforms and improves the drain impedance of the GaN power amplifier chip. In the traditional method, the inductance in the T-shaped network at the root of the GaN power amplifier chip is realized by a bonding wire. However, when the required inductance is large, the inductance is improved by reducing the number of bonding wires and increasing the length of the bonding wires. However, this will cause the overcurrent capacity to be reduced, thereby causing the structure to be unachievable. In order to avoid this problem, the inductance and the capacitance in the T-shaped network are realized by a ceramic sheet in the present application, and the capacitance and the inductance are integrated on one ceramic sheet, thereby avoiding the uncertainty factors caused by the interconnection of components, and simplifying the assembly. The dielectric constant of the material used in the circuit layout of the first-stage output matching network of the T-shaped ceramic is 40, and the thickness is 0.25 mm.

[0066] The second-stage output matching network comprises a plurality of microstrip transmission lines connected in series, which is used for wideband impedance transformation. Specifically, the second-stage output matching network adopts a network composed of four microstrip transmission lines to realize wideband impedance transformation, and the wideband impedance transformation function is realized by optimizing the characteristic impedance and the electrical length of the strip line.

[0067] The third-stage output matching network comprises a transmission line transformer composed of a plurality of semi-rigid cables, which is used for super wideband impedance transformation. Specifically, the third-stage output matching network adopts the transmission line transformer composed of semi-rigid cables which has the same structure as the third-stage input matching network to realize super wideband impedance transformation, and the impedance transformation ratio is 4:1, which transforms the 50-ohm port impedance into an impedance with a real part of about 10 ohms. By optimizing the characteristic impedance and the length of the semi-rigid cable, a compromise between the transformation ratio and the bandwidth is realized. Among them, as Figure 7 The third-stage input matching network is composed of two semi-rigid cables T3 and T4, and the characteristic impedance of the semi-rigid cable is 25 ohms, and the outer diameter is 2.2 mm. The lengths of the two semi-rigid cables of the third-stage output matching network are 37.1 mm and 39.4 mm, respectively. By optimizing the parameters of the semi-rigid cable, a compromise between the wideband of the transmission line transformer and the impedance transformation ratio is realized, so as to achieve the purpose of optimal wideband impedance matching.

[0068] As Figures 8-10 The electrical performance index diagram of the super wideband high power amplifier provided by the application shows that the working frequency of the super wideband high power amplifier is 0.2GHz-2.0GHz, the output power is greater than 100W, and the input standing wave is less than 2.5.

[0069] After the simulation result is obtained through simulation, the components are assembled. The matched components mainly include a GaN tube core, a first-stage input matching network GaAs MMIC, a first-stage output matching network "T-shaped" matching ceramic circuit, a PCB board (realizing multiple microstrip lines), a semi-rigid cable of a third-stage input matching network, a semi-rigid cable of a third-stage output matching network, a molybdenum copper carrier and a red copper carrier. With the aid of the current advanced production process processing platform, the design and production of all components are completed.

[0070] The GaN power amplification chip, the first-stage input matching network GaAs MMIC and the first-stage output matching network "T-shaped" matching ceramic circuit are assembled on the molybdenum copper carrier, the second-stage output matching network, the third-stage output matching network, the second-stage input matching network, the third-stage input matching network, the input bias network and the output bias network are all assembled on the PCB board, and the molybdenum copper carrier and the PCB board are welded on the red copper carrier. Figure 11 As shown in the figure, the molybdenum copper carrier 12 and the PCB board 13 are welded on the red copper carrier 11. Figure 12 The structure diagram of the assembled super wideband high power amplifier shows that RFin represents a radio frequency signal input port, RFout represents a radio frequency signal output port, Vg represents a gate voltage power port, and Vd represents a drain voltage power port.

[0071] Specifically, the GaN power amplification chip, the GaAs MMIC and the "T-shaped" ceramic matching circuit are assembled on the molybdenum copper carrier 12 in a gold-tin soldering manner, and the thickness of the molybdenum copper carrier 12 is 0.2mm.

[0072] The molybdenum copper carrier 12 and the PCB board 13 of the assembled chip are welded on the red copper carrier 11 in a soldering manner, the semi-rigid cable and other resistance-capacitance components are welded on the PCB board 13, and the interconnection between the chip, the ceramic and the PCB board is realized in a bonding gold wire manner. The PCB board 13, the GaAs MMIC matching circuit and the GaN tube core gate are connected by 38μm bonding gold wires, and the GaN tube core drain, the "T-shaped" ceramic matching circuit and the PCB board are connected by 50μm bonding gold wires. The chip, the ceramic, the PCB and the semi-rigid cable and the resistance-capacitance components are sequentially operated in a temperature gradient from high to low in the assembly process, so as to ensure the reliability of the assembly of the components.

[0073] The super wideband high-power amplifier provided by the embodiment of the present application adopts 0.5 mu m GaN HEMT process, GaAs MMIC passive process, ceramic chip process and micro-assembly process, forms a super wideband power amplifier with working frequency of 0.2 GHz to 2.0 GHz, output power greater than 100 W, output power greater than 100 W in the whole frequency band, and input standing wave less than 2.5. However, the input standing wave of similar products at home and abroad is more than 8 at most.

[0074] In addition, the present application also provides a transmitter for a wireless communication system, which comprises the super wideband high-power amplifier described above. The transmitter can cover the whole 0.2 GHz to 2 GHz frequency band. When it is necessary to cover the 0.2 GHz to 2 GHz working frequency band, only one set of super wideband high-power amplifier is needed to realize it, without the need of two sets of power amplifiers. Thus, the cost is reduced, and the volume and assembly complexity of the transmitter are reduced.

[0075] The above-described embodiments are only used to illustrate the technical solutions of the present application, rather than limit them; although the present application has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that the technical solutions recorded in the foregoing embodiments can be modified, or some technical features can be replaced by equivalent ones; and these modifications or replacements do not make the essence of the corresponding technical solutions deviate from the spirit and scope of the technical solutions of the embodiments of the present application, and should be included in the protection scope of the present application.

Claims

1. An ultra-wideband high power amplifier characterized by, The application relates to a GaN power amplifier, which comprises the following parts: a signal input end for receiving an input signal; an input matching network, one end of which is connected with the signal input end, and the other end of which is connected with the gate of a GaN power amplifier chip, for matching the impedance between the gate of the GaN power amplifier chip and the signal input end; an output matching network, one end of which is connected with the drain of the GaN power amplifier chip, and the other end of which is connected with a signal output end, for impedance matching within an ultra-wide frequency band; an input bias network, which comprises a filter capacitor, one end of which is connected with the gate of the GaN power amplifier chip, and the other end of which is connected with an external gate power supply, for filtering and bypassing the gate power supply; an output bias network, which comprises a filter capacitor, one end of which is connected with the drain of the GaN power amplifier chip, and the other end of which is connected with an external drain power supply, for filtering and bypassing the drain power supply; wherein the input matching network comprises a three-stage matching network, which comprises a first-stage input matching network, a second-stage input matching network and a third-stage input matching network connected in sequence, and the first-stage input matching network is connected with the gate of the GaN power amplifier chip; the first-stage input matching network comprises a T-shaped network and an RC parallel network connected with the T-shaped network, for transforming and improving the gate impedance of the GaN power amplifier chip; wherein the T-shaped network comprises two series-connected inductors and a capacitor connected with the two inductors, and the other end of the capacitor is grounded; the second-stage input matching network comprises a plurality of series-connected microstrip lines and a DC blocking capacitor connected with the microstrip lines, for impedance transformation of the output impedance of the first-stage input matching network; the third-stage input matching network comprises a transmission line transformer composed of a plurality of semi-rigid cables, for ultra-wideband impedance transformation; the output matching network comprises a three-stage matching network, which comprises a first-stage output matching network, a second-stage output matching network and a third-stage output matching network connected in sequence, and the first-stage output matching network is connected with the drain of the GaN power amplifier chip; the first-stage output matching network comprises a T-shaped ceramic network prepared on a ceramic sheet, and the inductor in the T-shaped ceramic network is a ceramic inductor, and the capacitor is a ceramic capacitor, for transforming the drain impedance of the GaN power amplifier chip; the second-stage output matching network comprises a plurality of series-connected microstrip transmission lines, for wideband impedance transformation; the third-stage output matching network comprises a transmission line transformer composed of a plurality of semi-rigid cables, for ultra-wideband impedance transformation; the third-stage input matching network and the third-stage output matching network are both composed of two semi-rigid cables; the GaN power amplifier chip, the first-stage input matching network and the first-stage output matching network are assembled on a molybdenum-copper carrier, and the second-stage output matching network, the third-stage output matching network, the second-stage input matching network, the third-stage input matching network, the input bias network and the output bias network are all assembled on a PCB board; the molybdenum-copper carrier and the PCB board are welded on a red copper carrier.

2. The ultra-wideband high power amplifier of claim 1, wherein, The first-stage input matching network further comprises a pair of ground RC series networks, one end of each of the pair of ground RC series networks being connected to one end of the T-network and the RC shunt network respectively, and the other end of each of the pair of ground RC series networks being grounded; The second-stage input matching network further comprises a shunt RC network, one end of the shunt RC network being connected to one end of the last microstrip line in the plurality of series, and the other end of the shunt RC network being connected to the blocking capacitor.

3. The ultra-wideband high power amplifier of claim 1, wherein, The first-stage input matching network is a GaAs microstrip monolithic integrated circuit based on GaAs passive technology.

4. The ultra-wideband high power amplifier of claim 1, wherein, The impedance transformation ratio of the third-stage input matching network and the third-stage output matching network is 4:

1.

5. The ultra-wideband high power amplifier of claim 1, wherein, The characteristic impedance of the semi-rigid cable is 25 ohms, and the outer diameter is 2.2 mm; The lengths of the two semi-rigid cables of the third-stage input matching network are 44.4 mm and 42.1 mm respectively; The lengths of the two semi-rigid cables of the third-stage output matching network are 37.1 mm and 39.4 mm respectively.

6. The ultra-wideband high power amplifier of claim 1, wherein, The input bias network and the output bias network further comprise bias inductors for RF isolation in the RF channel and the DC power supply channel.

7. A transmitter for a wireless communication system, the transmitter comprising the ultra-wideband high-power amplifier of any one of the preceding claims 1 to 6.

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